1*51712e1dSChukun Pan// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*51712e1dSChukun Pan/*
3*51712e1dSChukun Pan * Based on rk3328-nanopi-r2s.dts, which is:
4*51712e1dSChukun Pan *   Copyright (c) 2020 David Bauer <mail@david-bauer.net>
5*51712e1dSChukun Pan */
6*51712e1dSChukun Pan
7*51712e1dSChukun Pan/dts-v1/;
8*51712e1dSChukun Pan
9*51712e1dSChukun Pan#include <dt-bindings/gpio/gpio.h>
10*51712e1dSChukun Pan#include <dt-bindings/leds/common.h>
11*51712e1dSChukun Pan#include "rk3328.dtsi"
12*51712e1dSChukun Pan
13*51712e1dSChukun Pan/ {
14*51712e1dSChukun Pan	model = "Xunlong Orange Pi R1 Plus";
15*51712e1dSChukun Pan	compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
16*51712e1dSChukun Pan
17*51712e1dSChukun Pan	aliases {
18*51712e1dSChukun Pan		ethernet1 = &rtl8153;
19*51712e1dSChukun Pan		mmc0 = &sdmmc;
20*51712e1dSChukun Pan	};
21*51712e1dSChukun Pan
22*51712e1dSChukun Pan	chosen {
23*51712e1dSChukun Pan		stdout-path = "serial2:1500000n8";
24*51712e1dSChukun Pan	};
25*51712e1dSChukun Pan
26*51712e1dSChukun Pan	gmac_clk: gmac-clock {
27*51712e1dSChukun Pan		compatible = "fixed-clock";
28*51712e1dSChukun Pan		clock-frequency = <125000000>;
29*51712e1dSChukun Pan		clock-output-names = "gmac_clkin";
30*51712e1dSChukun Pan		#clock-cells = <0>;
31*51712e1dSChukun Pan	};
32*51712e1dSChukun Pan
33*51712e1dSChukun Pan	leds {
34*51712e1dSChukun Pan		compatible = "gpio-leds";
35*51712e1dSChukun Pan		pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
36*51712e1dSChukun Pan		pinctrl-names = "default";
37*51712e1dSChukun Pan
38*51712e1dSChukun Pan		led-0 {
39*51712e1dSChukun Pan			function = LED_FUNCTION_LAN;
40*51712e1dSChukun Pan			color = <LED_COLOR_ID_GREEN>;
41*51712e1dSChukun Pan			gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
42*51712e1dSChukun Pan		};
43*51712e1dSChukun Pan
44*51712e1dSChukun Pan		led-1 {
45*51712e1dSChukun Pan			function = LED_FUNCTION_STATUS;
46*51712e1dSChukun Pan			color = <LED_COLOR_ID_RED>;
47*51712e1dSChukun Pan			gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
48*51712e1dSChukun Pan			linux,default-trigger = "heartbeat";
49*51712e1dSChukun Pan		};
50*51712e1dSChukun Pan
51*51712e1dSChukun Pan		led-2 {
52*51712e1dSChukun Pan			function = LED_FUNCTION_WAN;
53*51712e1dSChukun Pan			color = <LED_COLOR_ID_GREEN>;
54*51712e1dSChukun Pan			gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
55*51712e1dSChukun Pan		};
56*51712e1dSChukun Pan	};
57*51712e1dSChukun Pan
58*51712e1dSChukun Pan	vcc_sd: sdmmc-regulator {
59*51712e1dSChukun Pan		compatible = "regulator-fixed";
60*51712e1dSChukun Pan		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
61*51712e1dSChukun Pan		pinctrl-0 = <&sdmmc0m1_pin>;
62*51712e1dSChukun Pan		pinctrl-names = "default";
63*51712e1dSChukun Pan		regulator-name = "vcc_sd";
64*51712e1dSChukun Pan		regulator-boot-on;
65*51712e1dSChukun Pan		vin-supply = <&vcc_io>;
66*51712e1dSChukun Pan	};
67*51712e1dSChukun Pan
68*51712e1dSChukun Pan	vcc_sys: vcc-sys-regulator {
69*51712e1dSChukun Pan		compatible = "regulator-fixed";
70*51712e1dSChukun Pan		regulator-name = "vcc_sys";
71*51712e1dSChukun Pan		regulator-always-on;
72*51712e1dSChukun Pan		regulator-boot-on;
73*51712e1dSChukun Pan		regulator-min-microvolt = <5000000>;
74*51712e1dSChukun Pan		regulator-max-microvolt = <5000000>;
75*51712e1dSChukun Pan	};
76*51712e1dSChukun Pan
77*51712e1dSChukun Pan	vdd_5v_lan: vdd-5v-lan-regulator {
78*51712e1dSChukun Pan		compatible = "regulator-fixed";
79*51712e1dSChukun Pan		enable-active-high;
80*51712e1dSChukun Pan		gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
81*51712e1dSChukun Pan		pinctrl-0 = <&lan_vdd_pin>;
82*51712e1dSChukun Pan		pinctrl-names = "default";
83*51712e1dSChukun Pan		regulator-name = "vdd_5v_lan";
84*51712e1dSChukun Pan		regulator-always-on;
85*51712e1dSChukun Pan		regulator-boot-on;
86*51712e1dSChukun Pan		vin-supply = <&vcc_sys>;
87*51712e1dSChukun Pan	};
88*51712e1dSChukun Pan};
89*51712e1dSChukun Pan
90*51712e1dSChukun Pan&cpu0 {
91*51712e1dSChukun Pan	cpu-supply = <&vdd_arm>;
92*51712e1dSChukun Pan};
93*51712e1dSChukun Pan
94*51712e1dSChukun Pan&cpu1 {
95*51712e1dSChukun Pan	cpu-supply = <&vdd_arm>;
96*51712e1dSChukun Pan};
97*51712e1dSChukun Pan
98*51712e1dSChukun Pan&cpu2 {
99*51712e1dSChukun Pan	cpu-supply = <&vdd_arm>;
100*51712e1dSChukun Pan};
101*51712e1dSChukun Pan
102*51712e1dSChukun Pan&cpu3 {
103*51712e1dSChukun Pan	cpu-supply = <&vdd_arm>;
104*51712e1dSChukun Pan};
105*51712e1dSChukun Pan
106*51712e1dSChukun Pan&display_subsystem {
107*51712e1dSChukun Pan	status = "disabled";
108*51712e1dSChukun Pan};
109*51712e1dSChukun Pan
110*51712e1dSChukun Pan&gmac2io {
111*51712e1dSChukun Pan	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
112*51712e1dSChukun Pan	assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
113*51712e1dSChukun Pan	clock_in_out = "input";
114*51712e1dSChukun Pan	phy-handle = <&rtl8211e>;
115*51712e1dSChukun Pan	phy-mode = "rgmii";
116*51712e1dSChukun Pan	phy-supply = <&vcc_io>;
117*51712e1dSChukun Pan	pinctrl-0 = <&rgmiim1_pins>;
118*51712e1dSChukun Pan	pinctrl-names = "default";
119*51712e1dSChukun Pan	snps,aal;
120*51712e1dSChukun Pan	rx_delay = <0x18>;
121*51712e1dSChukun Pan	tx_delay = <0x24>;
122*51712e1dSChukun Pan	status = "okay";
123*51712e1dSChukun Pan
124*51712e1dSChukun Pan	mdio {
125*51712e1dSChukun Pan		compatible = "snps,dwmac-mdio";
126*51712e1dSChukun Pan		#address-cells = <1>;
127*51712e1dSChukun Pan		#size-cells = <0>;
128*51712e1dSChukun Pan
129*51712e1dSChukun Pan		rtl8211e: ethernet-phy@1 {
130*51712e1dSChukun Pan			reg = <1>;
131*51712e1dSChukun Pan			pinctrl-0 = <&eth_phy_reset_pin>;
132*51712e1dSChukun Pan			pinctrl-names = "default";
133*51712e1dSChukun Pan			reset-assert-us = <10000>;
134*51712e1dSChukun Pan			reset-deassert-us = <50000>;
135*51712e1dSChukun Pan			reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
136*51712e1dSChukun Pan		};
137*51712e1dSChukun Pan	};
138*51712e1dSChukun Pan};
139*51712e1dSChukun Pan
140*51712e1dSChukun Pan&i2c1 {
141*51712e1dSChukun Pan	status = "okay";
142*51712e1dSChukun Pan
143*51712e1dSChukun Pan	rk805: pmic@18 {
144*51712e1dSChukun Pan		compatible = "rockchip,rk805";
145*51712e1dSChukun Pan		reg = <0x18>;
146*51712e1dSChukun Pan		interrupt-parent = <&gpio1>;
147*51712e1dSChukun Pan		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
148*51712e1dSChukun Pan		#clock-cells = <1>;
149*51712e1dSChukun Pan		clock-output-names = "xin32k", "rk805-clkout2";
150*51712e1dSChukun Pan		gpio-controller;
151*51712e1dSChukun Pan		#gpio-cells = <2>;
152*51712e1dSChukun Pan		pinctrl-0 = <&pmic_int_l>;
153*51712e1dSChukun Pan		pinctrl-names = "default";
154*51712e1dSChukun Pan		rockchip,system-power-controller;
155*51712e1dSChukun Pan		wakeup-source;
156*51712e1dSChukun Pan
157*51712e1dSChukun Pan		vcc1-supply = <&vcc_sys>;
158*51712e1dSChukun Pan		vcc2-supply = <&vcc_sys>;
159*51712e1dSChukun Pan		vcc3-supply = <&vcc_sys>;
160*51712e1dSChukun Pan		vcc4-supply = <&vcc_sys>;
161*51712e1dSChukun Pan		vcc5-supply = <&vcc_io>;
162*51712e1dSChukun Pan		vcc6-supply = <&vcc_sys>;
163*51712e1dSChukun Pan
164*51712e1dSChukun Pan		regulators {
165*51712e1dSChukun Pan			vdd_log: DCDC_REG1 {
166*51712e1dSChukun Pan				regulator-name = "vdd_log";
167*51712e1dSChukun Pan				regulator-always-on;
168*51712e1dSChukun Pan				regulator-boot-on;
169*51712e1dSChukun Pan				regulator-min-microvolt = <712500>;
170*51712e1dSChukun Pan				regulator-max-microvolt = <1450000>;
171*51712e1dSChukun Pan				regulator-ramp-delay = <12500>;
172*51712e1dSChukun Pan
173*51712e1dSChukun Pan				regulator-state-mem {
174*51712e1dSChukun Pan					regulator-on-in-suspend;
175*51712e1dSChukun Pan					regulator-suspend-microvolt = <1000000>;
176*51712e1dSChukun Pan				};
177*51712e1dSChukun Pan			};
178*51712e1dSChukun Pan
179*51712e1dSChukun Pan			vdd_arm: DCDC_REG2 {
180*51712e1dSChukun Pan				regulator-name = "vdd_arm";
181*51712e1dSChukun Pan				regulator-always-on;
182*51712e1dSChukun Pan				regulator-boot-on;
183*51712e1dSChukun Pan				regulator-min-microvolt = <712500>;
184*51712e1dSChukun Pan				regulator-max-microvolt = <1450000>;
185*51712e1dSChukun Pan				regulator-ramp-delay = <12500>;
186*51712e1dSChukun Pan
187*51712e1dSChukun Pan				regulator-state-mem {
188*51712e1dSChukun Pan					regulator-on-in-suspend;
189*51712e1dSChukun Pan					regulator-suspend-microvolt = <950000>;
190*51712e1dSChukun Pan				};
191*51712e1dSChukun Pan			};
192*51712e1dSChukun Pan
193*51712e1dSChukun Pan			vcc_ddr: DCDC_REG3 {
194*51712e1dSChukun Pan				regulator-name = "vcc_ddr";
195*51712e1dSChukun Pan				regulator-always-on;
196*51712e1dSChukun Pan				regulator-boot-on;
197*51712e1dSChukun Pan
198*51712e1dSChukun Pan				regulator-state-mem {
199*51712e1dSChukun Pan					regulator-on-in-suspend;
200*51712e1dSChukun Pan				};
201*51712e1dSChukun Pan			};
202*51712e1dSChukun Pan
203*51712e1dSChukun Pan			vcc_io: DCDC_REG4 {
204*51712e1dSChukun Pan				regulator-name = "vcc_io";
205*51712e1dSChukun Pan				regulator-always-on;
206*51712e1dSChukun Pan				regulator-boot-on;
207*51712e1dSChukun Pan				regulator-min-microvolt = <3300000>;
208*51712e1dSChukun Pan				regulator-max-microvolt = <3300000>;
209*51712e1dSChukun Pan
210*51712e1dSChukun Pan				regulator-state-mem {
211*51712e1dSChukun Pan					regulator-on-in-suspend;
212*51712e1dSChukun Pan					regulator-suspend-microvolt = <3300000>;
213*51712e1dSChukun Pan				};
214*51712e1dSChukun Pan			};
215*51712e1dSChukun Pan
216*51712e1dSChukun Pan			vcc_18: LDO_REG1 {
217*51712e1dSChukun Pan				regulator-name = "vcc_18";
218*51712e1dSChukun Pan				regulator-always-on;
219*51712e1dSChukun Pan				regulator-boot-on;
220*51712e1dSChukun Pan				regulator-min-microvolt = <1800000>;
221*51712e1dSChukun Pan				regulator-max-microvolt = <1800000>;
222*51712e1dSChukun Pan
223*51712e1dSChukun Pan				regulator-state-mem {
224*51712e1dSChukun Pan					regulator-on-in-suspend;
225*51712e1dSChukun Pan					regulator-suspend-microvolt = <1800000>;
226*51712e1dSChukun Pan				};
227*51712e1dSChukun Pan			};
228*51712e1dSChukun Pan
229*51712e1dSChukun Pan			vcc18_emmc: LDO_REG2 {
230*51712e1dSChukun Pan				regulator-name = "vcc18_emmc";
231*51712e1dSChukun Pan				regulator-always-on;
232*51712e1dSChukun Pan				regulator-boot-on;
233*51712e1dSChukun Pan				regulator-min-microvolt = <1800000>;
234*51712e1dSChukun Pan				regulator-max-microvolt = <1800000>;
235*51712e1dSChukun Pan
236*51712e1dSChukun Pan				regulator-state-mem {
237*51712e1dSChukun Pan					regulator-on-in-suspend;
238*51712e1dSChukun Pan					regulator-suspend-microvolt = <1800000>;
239*51712e1dSChukun Pan				};
240*51712e1dSChukun Pan			};
241*51712e1dSChukun Pan
242*51712e1dSChukun Pan			vdd_10: LDO_REG3 {
243*51712e1dSChukun Pan				regulator-name = "vdd_10";
244*51712e1dSChukun Pan				regulator-always-on;
245*51712e1dSChukun Pan				regulator-boot-on;
246*51712e1dSChukun Pan				regulator-min-microvolt = <1000000>;
247*51712e1dSChukun Pan				regulator-max-microvolt = <1000000>;
248*51712e1dSChukun Pan
249*51712e1dSChukun Pan				regulator-state-mem {
250*51712e1dSChukun Pan					regulator-on-in-suspend;
251*51712e1dSChukun Pan					regulator-suspend-microvolt = <1000000>;
252*51712e1dSChukun Pan				};
253*51712e1dSChukun Pan			};
254*51712e1dSChukun Pan		};
255*51712e1dSChukun Pan	};
256*51712e1dSChukun Pan};
257*51712e1dSChukun Pan
258*51712e1dSChukun Pan&io_domains {
259*51712e1dSChukun Pan	pmuio-supply = <&vcc_io>;
260*51712e1dSChukun Pan	vccio1-supply = <&vcc_io>;
261*51712e1dSChukun Pan	vccio2-supply = <&vcc18_emmc>;
262*51712e1dSChukun Pan	vccio3-supply = <&vcc_io>;
263*51712e1dSChukun Pan	vccio4-supply = <&vcc_io>;
264*51712e1dSChukun Pan	vccio5-supply = <&vcc_io>;
265*51712e1dSChukun Pan	vccio6-supply = <&vcc_io>;
266*51712e1dSChukun Pan	status = "okay";
267*51712e1dSChukun Pan};
268*51712e1dSChukun Pan
269*51712e1dSChukun Pan&pinctrl {
270*51712e1dSChukun Pan	gmac2io {
271*51712e1dSChukun Pan		eth_phy_reset_pin: eth-phy-reset-pin {
272*51712e1dSChukun Pan			rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
273*51712e1dSChukun Pan		};
274*51712e1dSChukun Pan	};
275*51712e1dSChukun Pan
276*51712e1dSChukun Pan	leds {
277*51712e1dSChukun Pan		lan_led_pin: lan-led-pin {
278*51712e1dSChukun Pan			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
279*51712e1dSChukun Pan		};
280*51712e1dSChukun Pan
281*51712e1dSChukun Pan		sys_led_pin: sys-led-pin {
282*51712e1dSChukun Pan			rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
283*51712e1dSChukun Pan		};
284*51712e1dSChukun Pan
285*51712e1dSChukun Pan		wan_led_pin: wan-led-pin {
286*51712e1dSChukun Pan			rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
287*51712e1dSChukun Pan		};
288*51712e1dSChukun Pan	};
289*51712e1dSChukun Pan
290*51712e1dSChukun Pan	lan {
291*51712e1dSChukun Pan		lan_vdd_pin: lan-vdd-pin {
292*51712e1dSChukun Pan			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
293*51712e1dSChukun Pan		};
294*51712e1dSChukun Pan	};
295*51712e1dSChukun Pan
296*51712e1dSChukun Pan	pmic {
297*51712e1dSChukun Pan		pmic_int_l: pmic-int-l {
298*51712e1dSChukun Pan			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
299*51712e1dSChukun Pan		};
300*51712e1dSChukun Pan	};
301*51712e1dSChukun Pan};
302*51712e1dSChukun Pan
303*51712e1dSChukun Pan&pwm2 {
304*51712e1dSChukun Pan	status = "okay";
305*51712e1dSChukun Pan};
306*51712e1dSChukun Pan
307*51712e1dSChukun Pan&sdmmc {
308*51712e1dSChukun Pan	bus-width = <4>;
309*51712e1dSChukun Pan	cap-sd-highspeed;
310*51712e1dSChukun Pan	disable-wp;
311*51712e1dSChukun Pan	pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
312*51712e1dSChukun Pan	pinctrl-names = "default";
313*51712e1dSChukun Pan	vmmc-supply = <&vcc_sd>;
314*51712e1dSChukun Pan	status = "okay";
315*51712e1dSChukun Pan};
316*51712e1dSChukun Pan
317*51712e1dSChukun Pan&spi0 {
318*51712e1dSChukun Pan	status = "okay";
319*51712e1dSChukun Pan
320*51712e1dSChukun Pan	flash@0 {
321*51712e1dSChukun Pan		compatible = "jedec,spi-nor";
322*51712e1dSChukun Pan		reg = <0>;
323*51712e1dSChukun Pan		spi-max-frequency = <50000000>;
324*51712e1dSChukun Pan	};
325*51712e1dSChukun Pan};
326*51712e1dSChukun Pan
327*51712e1dSChukun Pan&tsadc {
328*51712e1dSChukun Pan	rockchip,hw-tshut-mode = <0>;
329*51712e1dSChukun Pan	rockchip,hw-tshut-polarity = <0>;
330*51712e1dSChukun Pan	status = "okay";
331*51712e1dSChukun Pan};
332*51712e1dSChukun Pan
333*51712e1dSChukun Pan&u2phy {
334*51712e1dSChukun Pan	status = "okay";
335*51712e1dSChukun Pan};
336*51712e1dSChukun Pan
337*51712e1dSChukun Pan&u2phy_host {
338*51712e1dSChukun Pan	status = "okay";
339*51712e1dSChukun Pan};
340*51712e1dSChukun Pan
341*51712e1dSChukun Pan&u2phy_otg {
342*51712e1dSChukun Pan	status = "okay";
343*51712e1dSChukun Pan};
344*51712e1dSChukun Pan
345*51712e1dSChukun Pan&uart2 {
346*51712e1dSChukun Pan	status = "okay";
347*51712e1dSChukun Pan};
348*51712e1dSChukun Pan
349*51712e1dSChukun Pan&usb20_otg {
350*51712e1dSChukun Pan	dr_mode = "host";
351*51712e1dSChukun Pan	status = "okay";
352*51712e1dSChukun Pan};
353*51712e1dSChukun Pan
354*51712e1dSChukun Pan&usbdrd3 {
355*51712e1dSChukun Pan	dr_mode = "host";
356*51712e1dSChukun Pan	status = "okay";
357*51712e1dSChukun Pan	#address-cells = <1>;
358*51712e1dSChukun Pan	#size-cells = <0>;
359*51712e1dSChukun Pan
360*51712e1dSChukun Pan	/* Second port is for USB 3.0 */
361*51712e1dSChukun Pan	rtl8153: device@2 {
362*51712e1dSChukun Pan		compatible = "usbbda,8153";
363*51712e1dSChukun Pan		reg = <2>;
364*51712e1dSChukun Pan	};
365*51712e1dSChukun Pan};
366*51712e1dSChukun Pan
367*51712e1dSChukun Pan&usb_host0_ehci {
368*51712e1dSChukun Pan	status = "okay";
369*51712e1dSChukun Pan};
370*51712e1dSChukun Pan
371*51712e1dSChukun Pan&usb_host0_ohci {
372*51712e1dSChukun Pan	status = "okay";
373*51712e1dSChukun Pan};
374