1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Hardkernel Co., Ltd
4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/pinctrl/rockchip.h>
11#include "rk3326.dtsi"
12
13/ {
14	model = "ODROID-GO Advance";
15	compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326";
16
17	aliases {
18		mmc0 = &sdmmc;
19	};
20
21	chosen {
22		stdout-path = "serial2:115200n8";
23	};
24
25	adc-joystick {
26		compatible = "adc-joystick";
27		io-channels = <&saradc 1>,
28			      <&saradc 2>;
29		#address-cells = <1>;
30		#size-cells = <0>;
31
32		axis@0 {
33			reg = <0>;
34			abs-flat = <10>;
35			abs-fuzz = <10>;
36			abs-range = <172 772>;
37			linux,code = <ABS_X>;
38		};
39
40		axis@1 {
41			reg = <1>;
42			abs-flat = <10>;
43			abs-fuzz = <10>;
44			abs-range = <278 815>;
45			linux,code = <ABS_Y>;
46		};
47	};
48
49	backlight: backlight {
50		compatible = "pwm-backlight";
51		power-supply = <&vcc_bl>;
52		pwms = <&pwm1 0 25000 0>;
53	};
54
55	gpio-keys {
56		compatible = "gpio-keys";
57		pinctrl-names = "default";
58		pinctrl-0 = <&btn_pins>;
59
60		/*
61		 *      *** ODROIDGO2-Advance Switch layout ***
62		 * |------------------------------------------------|
63		 * | sw15                                      sw16 |
64		 * |------------------------------------------------|
65		 * |     sw1      |-------------------|      sw8    |
66		 * |  sw3   sw4   |                   |   sw7   sw5 |
67		 * |     sw2      |    LCD Display    |      sw6    |
68		 * |              |                   |             |
69		 * |              |-------------------|             |
70		 * |         sw9 sw10   sw11 sw12   sw13 sw14       |
71		 * |------------------------------------------------|
72		 */
73
74		sw1 {
75			gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
76			label = "DPAD-UP";
77			linux,code = <BTN_DPAD_UP>;
78		};
79		sw2 {
80			gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
81			label = "DPAD-DOWN";
82			linux,code = <BTN_DPAD_DOWN>;
83		};
84		sw3 {
85			gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
86			label = "DPAD-LEFT";
87			linux,code = <BTN_DPAD_LEFT>;
88		};
89		sw4 {
90			gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
91			label = "DPAD-RIGHT";
92			linux,code = <BTN_DPAD_RIGHT>;
93		};
94		sw5 {
95			gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
96			label = "BTN-A";
97			linux,code = <BTN_EAST>;
98		};
99		sw6 {
100			gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
101			label = "BTN-B";
102			linux,code = <BTN_SOUTH>;
103		};
104		sw7 {
105			gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
106			label = "BTN-Y";
107			linux,code = <BTN_WEST>;
108		};
109		sw8 {
110			gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
111			label = "BTN-X";
112			linux,code = <BTN_NORTH>;
113		};
114		sw9 {
115			gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
116			label = "F1";
117			linux,code = <BTN_TRIGGER_HAPPY1>;
118		};
119		sw10 {
120			gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
121			label = "F2";
122			linux,code = <BTN_TRIGGER_HAPPY2>;
123		};
124		sw11 {
125			gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
126			label = "F3";
127			linux,code = <BTN_TRIGGER_HAPPY3>;
128		};
129		sw12 {
130			gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
131			label = "F4";
132			linux,code = <BTN_TRIGGER_HAPPY4>;
133		};
134		sw13 {
135			gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
136			label = "F5";
137			linux,code = <BTN_TRIGGER_HAPPY5>;
138		};
139		sw14 {
140			gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
141			label = "F6";
142			linux,code = <BTN_TRIGGER_HAPPY6>;
143		};
144		sw15 {
145			gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
146			label = "TOP-LEFT";
147			linux,code = <BTN_TL>;
148		};
149		sw16 {
150			gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
151			label = "TOP-RIGHT";
152			linux,code = <BTN_TR>;
153		};
154	};
155
156	leds: gpio-leds {
157		compatible = "gpio-leds";
158		pinctrl-names = "default";
159		pinctrl-0 = <&blue_led_pin>;
160
161		blue_led: led-0 {
162			label = "blue:heartbeat";
163			gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
164			linux,default-trigger = "heartbeat";
165		};
166	};
167
168	rk817-sound {
169		compatible = "simple-audio-card";
170		simple-audio-card,name = "Analog";
171		simple-audio-card,format = "i2s";
172		simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
173		simple-audio-card,mclk-fs = <256>;
174		simple-audio-card,widgets =
175			"Microphone", "Mic Jack",
176			"Headphone", "Headphones",
177			"Speaker", "Speaker";
178		simple-audio-card,routing =
179			"MICL", "Mic Jack",
180			"Headphones", "HPOL",
181			"Headphones", "HPOR",
182			"Speaker", "SPKO";
183
184		simple-audio-card,codec {
185			sound-dai = <&rk817>;
186		};
187
188		simple-audio-card,cpu {
189			sound-dai = <&i2s1_2ch>;
190		};
191	};
192
193	vccsys: vccsys {
194		compatible = "regulator-fixed";
195		regulator-name = "vcc3v8_sys";
196		regulator-always-on;
197		regulator-min-microvolt = <3800000>;
198		regulator-max-microvolt = <3800000>;
199	};
200
201	vcc_host: vcc_host {
202		compatible = "regulator-fixed";
203		regulator-name = "vcc_host";
204		regulator-min-microvolt = <5000000>;
205		regulator-max-microvolt = <5000000>;
206
207		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
208		enable-active-high;
209		regulator-always-on;
210		vin-supply = <&vccsys>;
211	};
212};
213
214&cpu0 {
215	cpu-supply = <&vdd_arm>;
216};
217
218&cpu1 {
219	cpu-supply = <&vdd_arm>;
220};
221
222&cpu2 {
223	cpu-supply = <&vdd_arm>;
224};
225
226&cpu3 {
227	cpu-supply = <&vdd_arm>;
228};
229
230&cru {
231	assigned-clocks = <&cru PLL_NPLL>,
232		<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
233		<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
234		<&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>,
235		<&cru PLL_CPLL>;
236
237	assigned-clock-rates = <1188000000>,
238		<200000000>, <200000000>,
239		<150000000>, <150000000>,
240		<100000000>, <200000000>,
241		<17000000>;
242};
243
244&display_subsystem {
245	status = "okay";
246};
247
248&dsi {
249	status = "okay";
250
251	ports {
252		mipi_out: port@1 {
253			reg = <1>;
254
255			mipi_out_panel: endpoint {
256				remote-endpoint = <&mipi_in_panel>;
257			};
258		};
259	};
260
261	panel@0 {
262		compatible = "elida,kd35t133";
263		reg = <0>;
264		backlight = <&backlight>;
265		iovcc-supply = <&vcc_lcd>;
266		reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
267		rotation = <270>;
268		vdd-supply = <&vcc_lcd>;
269
270		port {
271			mipi_in_panel: endpoint {
272				remote-endpoint = <&mipi_out_panel>;
273			};
274		};
275	};
276};
277
278&dsi_dphy {
279	status = "okay";
280};
281
282&gpu {
283	mali-supply = <&vdd_logic>;
284	status = "okay";
285};
286
287&i2c0 {
288	clock-frequency = <400000>;
289	i2c-scl-falling-time-ns = <16>;
290	i2c-scl-rising-time-ns = <280>;
291	status = "okay";
292
293	rk817: pmic@20 {
294		compatible = "rockchip,rk817";
295		reg = <0x20>;
296		interrupt-parent = <&gpio0>;
297		interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
298		clock-output-names = "rk808-clkout1", "xin32k";
299		clock-names = "mclk";
300		clocks = <&cru SCLK_I2S1_OUT>;
301		pinctrl-names = "default";
302		pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;
303		wakeup-source;
304		#clock-cells = <1>;
305		#sound-dai-cells = <0>;
306
307		vcc1-supply = <&vccsys>;
308		vcc2-supply = <&vccsys>;
309		vcc3-supply = <&vccsys>;
310		vcc4-supply = <&vccsys>;
311		vcc5-supply = <&vccsys>;
312		vcc6-supply = <&vccsys>;
313		vcc7-supply = <&vccsys>;
314
315		regulators {
316			vdd_logic: DCDC_REG1 {
317				regulator-name = "vdd_logic";
318				regulator-min-microvolt = <950000>;
319				regulator-max-microvolt = <1150000>;
320				regulator-ramp-delay = <6001>;
321				regulator-always-on;
322				regulator-boot-on;
323
324				regulator-state-mem {
325					regulator-on-in-suspend;
326					regulator-suspend-microvolt = <950000>;
327				};
328			};
329
330			vdd_arm: DCDC_REG2 {
331				regulator-name = "vdd_arm";
332				regulator-min-microvolt = <950000>;
333				regulator-max-microvolt = <1350000>;
334				regulator-ramp-delay = <6001>;
335				regulator-always-on;
336				regulator-boot-on;
337
338				regulator-state-mem {
339					regulator-off-in-suspend;
340					regulator-suspend-microvolt = <950000>;
341				};
342			};
343
344			vcc_ddr: DCDC_REG3 {
345				regulator-name = "vcc_ddr";
346				regulator-always-on;
347				regulator-boot-on;
348
349				regulator-state-mem {
350					regulator-on-in-suspend;
351				};
352			};
353
354			vcc_3v3: DCDC_REG4 {
355				regulator-name = "vcc_3v3";
356				regulator-min-microvolt = <3300000>;
357				regulator-max-microvolt = <3300000>;
358				regulator-always-on;
359				regulator-boot-on;
360
361				regulator-state-mem {
362					regulator-off-in-suspend;
363					regulator-suspend-microvolt = <3300000>;
364				};
365			};
366
367			vcc_1v8: LDO_REG2 {
368				regulator-name = "vcc_1v8";
369				regulator-min-microvolt = <1800000>;
370				regulator-max-microvolt = <1800000>;
371				regulator-always-on;
372				regulator-boot-on;
373
374				regulator-state-mem {
375					regulator-on-in-suspend;
376					regulator-suspend-microvolt = <1800000>;
377				};
378			};
379
380			vdd_1v0: LDO_REG3 {
381				regulator-name = "vdd_1v0";
382				regulator-min-microvolt = <1000000>;
383				regulator-max-microvolt = <1000000>;
384				regulator-always-on;
385				regulator-boot-on;
386
387				regulator-state-mem {
388					regulator-on-in-suspend;
389					regulator-suspend-microvolt = <1000000>;
390				};
391			};
392
393			vcc3v3_pmu: LDO_REG4 {
394				regulator-name = "vcc3v3_pmu";
395				regulator-min-microvolt = <3300000>;
396				regulator-max-microvolt = <3300000>;
397				regulator-always-on;
398				regulator-boot-on;
399
400				regulator-state-mem {
401					regulator-on-in-suspend;
402					regulator-suspend-microvolt = <3300000>;
403				};
404			};
405
406			vccio_sd: LDO_REG5 {
407				regulator-name = "vccio_sd";
408				regulator-min-microvolt = <1800000>;
409				regulator-max-microvolt = <3300000>;
410				regulator-always-on;
411				regulator-boot-on;
412
413				regulator-state-mem {
414					regulator-on-in-suspend;
415					regulator-suspend-microvolt = <3300000>;
416				};
417			};
418
419			vcc_sd: LDO_REG6 {
420				regulator-name = "vcc_sd";
421				regulator-min-microvolt = <3300000>;
422				regulator-max-microvolt = <3300000>;
423				regulator-boot-on;
424
425				regulator-state-mem {
426					regulator-on-in-suspend;
427					regulator-suspend-microvolt = <3300000>;
428				};
429			};
430
431			vcc_bl: LDO_REG7 {
432				regulator-name = "vcc_bl";
433				regulator-min-microvolt = <3300000>;
434				regulator-max-microvolt = <3300000>;
435
436				regulator-state-mem {
437					regulator-off-in-suspend;
438					regulator-suspend-microvolt = <3300000>;
439				};
440			};
441
442			vcc_lcd: LDO_REG8 {
443				regulator-name = "vcc_lcd";
444				regulator-min-microvolt = <2800000>;
445				regulator-max-microvolt = <2800000>;
446
447				regulator-state-mem {
448					regulator-off-in-suspend;
449					regulator-suspend-microvolt = <2800000>;
450				};
451			};
452
453			vcc_cam: LDO_REG9 {
454				regulator-name = "vcc_cam";
455				regulator-min-microvolt = <3000000>;
456				regulator-max-microvolt = <3000000>;
457
458				regulator-state-mem {
459					regulator-off-in-suspend;
460					regulator-suspend-microvolt = <3000000>;
461				};
462			};
463		};
464
465		rk817_codec: codec {
466			rockchip,mic-in-differential;
467		};
468	};
469};
470
471/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */
472&i2c1 {
473	clock-frequency = <400000>;
474	status = "okay";
475};
476
477/* I2S 1 Channel Used */
478&i2s1_2ch {
479	status = "okay";
480};
481
482&io_domains {
483	vccio1-supply = <&vcc_3v3>;
484	vccio2-supply = <&vccio_sd>;
485	vccio3-supply = <&vcc_3v3>;
486	vccio4-supply = <&vcc_3v3>;
487	vccio5-supply = <&vcc_3v3>;
488	vccio6-supply = <&vcc_3v3>;
489	status = "okay";
490};
491
492&pmu_io_domains {
493	pmuio1-supply = <&vcc3v3_pmu>;
494	pmuio2-supply = <&vcc3v3_pmu>;
495	status = "okay";
496};
497
498&pwm1 {
499	status = "okay";
500};
501
502&saradc {
503	vref-supply = <&vcc_1v8>;
504	status = "okay";
505};
506
507&sdmmc {
508	cap-sd-highspeed;
509	card-detect-delay = <200>;
510	cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
511	sd-uhs-sdr12;
512	sd-uhs-sdr25;
513	sd-uhs-sdr50;
514	sd-uhs-sdr104;
515	vmmc-supply = <&vcc_sd>;
516	vqmmc-supply = <&vccio_sd>;
517	status = "okay";
518};
519
520&tsadc {
521	status = "okay";
522};
523
524&u2phy {
525	status = "okay";
526
527	u2phy_host: host-port {
528		status = "okay";
529	};
530
531	u2phy_otg: otg-port {
532		status = "disabled";
533	};
534};
535
536&usb20_otg {
537	status = "okay";
538};
539
540/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
541&uart1 {
542	pinctrl-names = "default";
543	pinctrl-0 = <&uart1_xfer &uart1_cts>;
544	status = "okay";
545};
546
547&uart2 {
548	pinctrl-names = "default";
549	pinctrl-0 = <&uart2m1_xfer>;
550	status = "okay";
551};
552
553&vopb {
554	status = "okay";
555};
556
557&vopb_mmu {
558	status = "okay";
559};
560
561&pinctrl {
562	btns {
563		btn_pins: btn-pins {
564			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
565					<1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
566					<1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
567					<1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
568					<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
569					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
570					<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
571					<1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
572					<2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
573					<2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
574					<2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
575					<2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
576					<2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
577					<2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
578					<2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
579					<2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
580		};
581	};
582
583	headphone {
584		hp_det: hp-det {
585			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
586		};
587	};
588
589	leds {
590		blue_led_pin: blue-led-pin {
591			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
592		};
593	};
594
595	pmic {
596		dc_det: dc-det {
597			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
598		};
599
600		pmic_int: pmic-int {
601			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
602		};
603
604		soc_slppin_gpio: soc_slppin_gpio {
605			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
606		};
607
608		soc_slppin_rst: soc_slppin_rst {
609			rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
610		};
611
612		soc_slppin_slp: soc_slppin_slp {
613			rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
614		};
615	};
616};
617