1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car Gen3 ULCB board 4 * 5 * Copyright (C) 2016 Renesas Electronics Corp. 6 * Copyright (C) 2016 Cogent Embedded, Inc. 7 */ 8 9/* 10 * SSI-AK4613 11 * aplay -D plughw:0,0 xxx.wav 12 * arecord -D plughw:0,0 xxx.wav 13 * SSI-HDMI 14 * aplay -D plughw:0,1 xxx.wav 15 */ 16 17#include <dt-bindings/gpio/gpio.h> 18#include <dt-bindings/input/input.h> 19 20/ { 21 model = "Renesas R-Car Gen3 ULCB board"; 22 23 aliases { 24 serial0 = &scif2; 25 ethernet0 = &avb; 26 mmc0 = &sdhi2; 27 mmc1 = &sdhi0; 28 }; 29 30 chosen { 31 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 32 stdout-path = "serial0:115200n8"; 33 }; 34 35 audio_clkout: audio-clkout { 36 /* 37 * This is same as <&rcar_sound 0> 38 * but needed to avoid cs2000/rcar_sound probe dead-lock 39 */ 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <12288000>; 43 }; 44 45 hdmi0-out { 46 compatible = "hdmi-connector"; 47 type = "a"; 48 49 port { 50 hdmi0_con: endpoint { 51 }; 52 }; 53 }; 54 55 keyboard { 56 compatible = "gpio-keys"; 57 58 key-1 { 59 linux,code = <KEY_1>; 60 label = "SW3"; 61 wakeup-source; 62 debounce-interval = <20>; 63 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; 64 }; 65 }; 66 67 leds { 68 compatible = "gpio-leds"; 69 70 led5 { 71 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; 72 }; 73 led6 { 74 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; 75 }; 76 }; 77 78 reg_1p8v: regulator0 { 79 compatible = "regulator-fixed"; 80 regulator-name = "fixed-1.8V"; 81 regulator-min-microvolt = <1800000>; 82 regulator-max-microvolt = <1800000>; 83 regulator-boot-on; 84 regulator-always-on; 85 }; 86 87 reg_3p3v: regulator1 { 88 compatible = "regulator-fixed"; 89 regulator-name = "fixed-3.3V"; 90 regulator-min-microvolt = <3300000>; 91 regulator-max-microvolt = <3300000>; 92 regulator-boot-on; 93 regulator-always-on; 94 }; 95 96 sound_card: sound { 97 compatible = "audio-graph-card"; 98 label = "rcar-sound"; 99 100 dais = <&rsnd_port0 /* ak4613 */ 101 &rsnd_port1 /* HDMI0 */ 102 >; 103 }; 104 105 vcc_sdhi0: regulator-vcc-sdhi0 { 106 compatible = "regulator-fixed"; 107 108 regulator-name = "SDHI0 Vcc"; 109 regulator-min-microvolt = <3300000>; 110 regulator-max-microvolt = <3300000>; 111 112 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; 113 enable-active-high; 114 }; 115 116 vccq_sdhi0: regulator-vccq-sdhi0 { 117 compatible = "regulator-gpio"; 118 119 regulator-name = "SDHI0 VccQ"; 120 regulator-min-microvolt = <1800000>; 121 regulator-max-microvolt = <3300000>; 122 123 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 124 gpios-states = <1>; 125 states = <3300000 1>, <1800000 0>; 126 }; 127 128 x12_clk: x12 { 129 compatible = "fixed-clock"; 130 #clock-cells = <0>; 131 clock-frequency = <24576000>; 132 }; 133 134 x23_clk: x23-clock { 135 compatible = "fixed-clock"; 136 #clock-cells = <0>; 137 clock-frequency = <25000000>; 138 }; 139}; 140 141&audio_clk_a { 142 clock-frequency = <22579200>; 143}; 144 145&avb { 146 pinctrl-0 = <&avb_pins>; 147 pinctrl-names = "default"; 148 phy-handle = <&phy0>; 149 phy-mode = "rgmii-txid"; 150 status = "okay"; 151 152 phy0: ethernet-phy@0 { 153 rxc-skew-ps = <1500>; 154 reg = <0>; 155 interrupt-parent = <&gpio2>; 156 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 157 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 158 }; 159}; 160 161&du { 162 status = "okay"; 163}; 164 165&ehci1 { 166 status = "okay"; 167}; 168 169&extal_clk { 170 clock-frequency = <16666666>; 171}; 172 173&extalr_clk { 174 clock-frequency = <32768>; 175}; 176 177&hdmi0 { 178 status = "okay"; 179 180 ports { 181 port@1 { 182 reg = <1>; 183 rcar_dw_hdmi0_out: endpoint { 184 remote-endpoint = <&hdmi0_con>; 185 }; 186 }; 187 port@2 { 188 reg = <2>; 189 dw_hdmi0_snd_in: endpoint { 190 remote-endpoint = <&rsnd_for_hdmi>; 191 }; 192 }; 193 }; 194}; 195 196&hdmi0_con { 197 remote-endpoint = <&rcar_dw_hdmi0_out>; 198}; 199 200&i2c2 { 201 pinctrl-0 = <&i2c2_pins>; 202 pinctrl-names = "default"; 203 204 status = "okay"; 205 206 clock-frequency = <100000>; 207 208 ak4613: codec@10 { 209 compatible = "asahi-kasei,ak4613"; 210 #sound-dai-cells = <0>; 211 reg = <0x10>; 212 clocks = <&rcar_sound 3>; 213 214 asahi-kasei,in1-single-end; 215 asahi-kasei,in2-single-end; 216 asahi-kasei,out1-single-end; 217 asahi-kasei,out2-single-end; 218 asahi-kasei,out3-single-end; 219 asahi-kasei,out4-single-end; 220 asahi-kasei,out5-single-end; 221 asahi-kasei,out6-single-end; 222 223 port { 224 ak4613_endpoint: endpoint { 225 remote-endpoint = <&rsnd_for_ak4613>; 226 }; 227 }; 228 }; 229 230 cs2000: clk-multiplier@4f { 231 #clock-cells = <0>; 232 compatible = "cirrus,cs2000-cp"; 233 reg = <0x4f>; 234 clocks = <&audio_clkout>, <&x12_clk>; 235 clock-names = "clk_in", "ref_clk"; 236 237 assigned-clocks = <&cs2000>; 238 assigned-clock-rates = <24576000>; /* 1/1 divide */ 239 }; 240}; 241 242&i2c4 { 243 status = "okay"; 244 245 clock-frequency = <400000>; 246 247 versaclock5: clock-generator@6a { 248 compatible = "idt,5p49v5925"; 249 reg = <0x6a>; 250 #clock-cells = <1>; 251 clocks = <&x23_clk>; 252 clock-names = "xin"; 253 }; 254}; 255 256&i2c_dvfs { 257 status = "okay"; 258 259 clock-frequency = <400000>; 260 261 pmic: pmic@30 { 262 pinctrl-0 = <&irq0_pins>; 263 pinctrl-names = "default"; 264 265 compatible = "rohm,bd9571mwv"; 266 reg = <0x30>; 267 interrupt-parent = <&intc_ex>; 268 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 269 interrupt-controller; 270 #interrupt-cells = <2>; 271 gpio-controller; 272 #gpio-cells = <2>; 273 rohm,ddr-backup-power = <0xf>; 274 rohm,rstbmode-pulse; 275 276 regulators { 277 dvfs: dvfs { 278 regulator-name = "dvfs"; 279 regulator-min-microvolt = <750000>; 280 regulator-max-microvolt = <1030000>; 281 regulator-boot-on; 282 regulator-always-on; 283 }; 284 }; 285 }; 286}; 287 288&ohci1 { 289 status = "okay"; 290}; 291 292&pfc { 293 pinctrl-0 = <&scif_clk_pins>; 294 pinctrl-names = "default"; 295 296 avb_pins: avb { 297 mux { 298 groups = "avb_link", "avb_mdio", "avb_mii"; 299 function = "avb"; 300 }; 301 302 pins_mdio { 303 groups = "avb_mdio"; 304 drive-strength = <24>; 305 }; 306 307 pins_mii_tx { 308 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 309 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 310 drive-strength = <12>; 311 }; 312 }; 313 314 i2c2_pins: i2c2 { 315 groups = "i2c2_a"; 316 function = "i2c2"; 317 }; 318 319 irq0_pins: irq0 { 320 groups = "intc_ex_irq0"; 321 function = "intc_ex"; 322 }; 323 324 scif2_pins: scif2 { 325 groups = "scif2_data_a"; 326 function = "scif2"; 327 }; 328 329 scif_clk_pins: scif_clk { 330 groups = "scif_clk_a"; 331 function = "scif_clk"; 332 }; 333 334 sdhi0_pins: sd0 { 335 groups = "sdhi0_data4", "sdhi0_ctrl"; 336 function = "sdhi0"; 337 power-source = <3300>; 338 }; 339 340 sdhi0_pins_uhs: sd0_uhs { 341 groups = "sdhi0_data4", "sdhi0_ctrl"; 342 function = "sdhi0"; 343 power-source = <1800>; 344 }; 345 346 sdhi2_pins: sd2 { 347 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; 348 function = "sdhi2"; 349 power-source = <1800>; 350 }; 351 352 sound_pins: sound { 353 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; 354 function = "ssi"; 355 }; 356 357 sound_clk_pins: sound-clk { 358 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", 359 "audio_clkout_a", "audio_clkout3_a"; 360 function = "audio_clk"; 361 }; 362 363 usb1_pins: usb1 { 364 groups = "usb1"; 365 function = "usb1"; 366 }; 367}; 368 369&rcar_sound { 370 pinctrl-0 = <&sound_pins &sound_clk_pins>; 371 pinctrl-names = "default"; 372 373 /* Single DAI */ 374 #sound-dai-cells = <0>; 375 376 /* audio_clkout0/1/2/3 */ 377 #clock-cells = <1>; 378 clock-frequency = <12288000 11289600>; 379 380 status = "okay"; 381 382 /* update <audio_clk_b> to <cs2000> */ 383 clocks = <&cpg CPG_MOD 1005>, 384 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 385 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 386 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 387 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 388 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 389 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 390 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 391 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 392 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 393 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 394 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 395 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 396 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 397 <&audio_clk_a>, <&cs2000>, 398 <&audio_clk_c>, 399 <&cpg CPG_CORE CPG_AUDIO_CLK_I>; 400 401 ports { 402 #address-cells = <1>; 403 #size-cells = <0>; 404 rsnd_port0: port@0 { 405 reg = <0>; 406 rsnd_for_ak4613: endpoint { 407 remote-endpoint = <&ak4613_endpoint>; 408 409 dai-format = "left_j"; 410 bitclock-master = <&rsnd_for_ak4613>; 411 frame-master = <&rsnd_for_ak4613>; 412 413 playback = <&ssi0 &src0 &dvc0>; 414 capture = <&ssi1 &src1 &dvc1>; 415 }; 416 }; 417 rsnd_port1: port@1 { 418 reg = <1>; 419 rsnd_for_hdmi: endpoint { 420 remote-endpoint = <&dw_hdmi0_snd_in>; 421 422 dai-format = "i2s"; 423 bitclock-master = <&rsnd_for_hdmi>; 424 frame-master = <&rsnd_for_hdmi>; 425 426 playback = <&ssi2>; 427 }; 428 }; 429 }; 430}; 431 432&rwdt { 433 timeout-sec = <60>; 434 status = "okay"; 435}; 436 437&scif2 { 438 pinctrl-0 = <&scif2_pins>; 439 pinctrl-names = "default"; 440 441 status = "okay"; 442}; 443 444&scif_clk { 445 clock-frequency = <14745600>; 446}; 447 448&sdhi0 { 449 pinctrl-0 = <&sdhi0_pins>; 450 pinctrl-1 = <&sdhi0_pins_uhs>; 451 pinctrl-names = "default", "state_uhs"; 452 453 vmmc-supply = <&vcc_sdhi0>; 454 vqmmc-supply = <&vccq_sdhi0>; 455 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 456 bus-width = <4>; 457 sd-uhs-sdr50; 458 sd-uhs-sdr104; 459 status = "okay"; 460}; 461 462&sdhi2 { 463 /* used for on-board 8bit eMMC */ 464 pinctrl-0 = <&sdhi2_pins>; 465 pinctrl-1 = <&sdhi2_pins>; 466 pinctrl-names = "default", "state_uhs"; 467 468 vmmc-supply = <®_3p3v>; 469 vqmmc-supply = <®_1p8v>; 470 bus-width = <8>; 471 mmc-hs200-1_8v; 472 mmc-hs400-1_8v; 473 non-removable; 474 full-pwr-cycle-in-suspend; 475 status = "okay"; 476}; 477 478&ssi1 { 479 shared-pin; 480}; 481 482&usb2_phy1 { 483 pinctrl-0 = <&usb1_pins>; 484 pinctrl-names = "default"; 485 486 status = "okay"; 487}; 488