1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car Gen3 ULCB board 4 * 5 * Copyright (C) 2016 Renesas Electronics Corp. 6 * Copyright (C) 2016 Cogent Embedded, Inc. 7 */ 8 9/* 10 * SSI-AK4613 11 * aplay -D plughw:0,0 xxx.wav 12 * arecord -D plughw:0,0 xxx.wav 13 * SSI-HDMI 14 * aplay -D plughw:0,1 xxx.wav 15 */ 16 17#include <dt-bindings/gpio/gpio.h> 18#include <dt-bindings/input/input.h> 19 20/ { 21 model = "Renesas R-Car Gen3 ULCB board"; 22 23 aliases { 24 serial0 = &scif2; 25 ethernet0 = &avb; 26 }; 27 28 chosen { 29 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 30 stdout-path = "serial0:115200n8"; 31 }; 32 33 audio_clkout: audio-clkout { 34 /* 35 * This is same as <&rcar_sound 0> 36 * but needed to avoid cs2000/rcar_sound probe dead-lock 37 */ 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <12288000>; 41 }; 42 43 hdmi0-out { 44 compatible = "hdmi-connector"; 45 type = "a"; 46 47 port { 48 hdmi0_con: endpoint { 49 }; 50 }; 51 }; 52 53 keyboard { 54 compatible = "gpio-keys"; 55 56 key-1 { 57 linux,code = <KEY_1>; 58 label = "SW3"; 59 wakeup-source; 60 debounce-interval = <20>; 61 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; 62 }; 63 }; 64 65 leds { 66 compatible = "gpio-leds"; 67 68 led5 { 69 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; 70 }; 71 led6 { 72 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; 73 }; 74 }; 75 76 reg_1p8v: regulator0 { 77 compatible = "regulator-fixed"; 78 regulator-name = "fixed-1.8V"; 79 regulator-min-microvolt = <1800000>; 80 regulator-max-microvolt = <1800000>; 81 regulator-boot-on; 82 regulator-always-on; 83 }; 84 85 reg_3p3v: regulator1 { 86 compatible = "regulator-fixed"; 87 regulator-name = "fixed-3.3V"; 88 regulator-min-microvolt = <3300000>; 89 regulator-max-microvolt = <3300000>; 90 regulator-boot-on; 91 regulator-always-on; 92 }; 93 94 sound_card: sound { 95 compatible = "audio-graph-card"; 96 label = "rcar-sound"; 97 98 dais = <&rsnd_port0 /* ak4613 */ 99 &rsnd_port1 /* HDMI0 */ 100 >; 101 }; 102 103 vcc_sdhi0: regulator-vcc-sdhi0 { 104 compatible = "regulator-fixed"; 105 106 regulator-name = "SDHI0 Vcc"; 107 regulator-min-microvolt = <3300000>; 108 regulator-max-microvolt = <3300000>; 109 110 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; 111 enable-active-high; 112 }; 113 114 vccq_sdhi0: regulator-vccq-sdhi0 { 115 compatible = "regulator-gpio"; 116 117 regulator-name = "SDHI0 VccQ"; 118 regulator-min-microvolt = <1800000>; 119 regulator-max-microvolt = <3300000>; 120 121 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 122 gpios-states = <1>; 123 states = <3300000 1 124 1800000 0>; 125 }; 126 127 x12_clk: x12 { 128 compatible = "fixed-clock"; 129 #clock-cells = <0>; 130 clock-frequency = <24576000>; 131 }; 132 133 x23_clk: x23-clock { 134 compatible = "fixed-clock"; 135 #clock-cells = <0>; 136 clock-frequency = <25000000>; 137 }; 138}; 139 140&audio_clk_a { 141 clock-frequency = <22579200>; 142}; 143 144&avb { 145 pinctrl-0 = <&avb_pins>; 146 pinctrl-names = "default"; 147 phy-handle = <&phy0>; 148 phy-mode = "rgmii-txid"; 149 status = "okay"; 150 151 phy0: ethernet-phy@0 { 152 rxc-skew-ps = <1500>; 153 reg = <0>; 154 interrupt-parent = <&gpio2>; 155 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 156 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 157 }; 158}; 159 160&du { 161 status = "okay"; 162}; 163 164&ehci1 { 165 status = "okay"; 166}; 167 168&extal_clk { 169 clock-frequency = <16666666>; 170}; 171 172&extalr_clk { 173 clock-frequency = <32768>; 174}; 175 176&hdmi0 { 177 status = "okay"; 178 179 ports { 180 port@1 { 181 reg = <1>; 182 rcar_dw_hdmi0_out: endpoint { 183 remote-endpoint = <&hdmi0_con>; 184 }; 185 }; 186 port@2 { 187 reg = <2>; 188 dw_hdmi0_snd_in: endpoint { 189 remote-endpoint = <&rsnd_for_hdmi>; 190 }; 191 }; 192 }; 193}; 194 195&hdmi0_con { 196 remote-endpoint = <&rcar_dw_hdmi0_out>; 197}; 198 199&i2c2 { 200 pinctrl-0 = <&i2c2_pins>; 201 pinctrl-names = "default"; 202 203 status = "okay"; 204 205 clock-frequency = <100000>; 206 207 ak4613: codec@10 { 208 compatible = "asahi-kasei,ak4613"; 209 #sound-dai-cells = <0>; 210 reg = <0x10>; 211 clocks = <&rcar_sound 3>; 212 213 asahi-kasei,in1-single-end; 214 asahi-kasei,in2-single-end; 215 asahi-kasei,out1-single-end; 216 asahi-kasei,out2-single-end; 217 asahi-kasei,out3-single-end; 218 asahi-kasei,out4-single-end; 219 asahi-kasei,out5-single-end; 220 asahi-kasei,out6-single-end; 221 222 port { 223 ak4613_endpoint: endpoint { 224 remote-endpoint = <&rsnd_for_ak4613>; 225 }; 226 }; 227 }; 228 229 cs2000: clk-multiplier@4f { 230 #clock-cells = <0>; 231 compatible = "cirrus,cs2000-cp"; 232 reg = <0x4f>; 233 clocks = <&audio_clkout>, <&x12_clk>; 234 clock-names = "clk_in", "ref_clk"; 235 236 assigned-clocks = <&cs2000>; 237 assigned-clock-rates = <24576000>; /* 1/1 divide */ 238 }; 239}; 240 241&i2c4 { 242 status = "okay"; 243 244 clock-frequency = <400000>; 245 246 versaclock5: clock-generator@6a { 247 compatible = "idt,5p49v5925"; 248 reg = <0x6a>; 249 #clock-cells = <1>; 250 clocks = <&x23_clk>; 251 clock-names = "xin"; 252 }; 253}; 254 255&i2c_dvfs { 256 status = "okay"; 257 258 clock-frequency = <400000>; 259 260 pmic: pmic@30 { 261 pinctrl-0 = <&irq0_pins>; 262 pinctrl-names = "default"; 263 264 compatible = "rohm,bd9571mwv"; 265 reg = <0x30>; 266 interrupt-parent = <&intc_ex>; 267 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 268 interrupt-controller; 269 #interrupt-cells = <2>; 270 gpio-controller; 271 #gpio-cells = <2>; 272 rohm,ddr-backup-power = <0xf>; 273 rohm,rstbmode-pulse; 274 275 regulators { 276 dvfs: dvfs { 277 regulator-name = "dvfs"; 278 regulator-min-microvolt = <750000>; 279 regulator-max-microvolt = <1030000>; 280 regulator-boot-on; 281 regulator-always-on; 282 }; 283 }; 284 }; 285}; 286 287&ohci1 { 288 status = "okay"; 289}; 290 291&pfc { 292 pinctrl-0 = <&scif_clk_pins>; 293 pinctrl-names = "default"; 294 295 avb_pins: avb { 296 mux { 297 groups = "avb_link", "avb_mdio", "avb_mii"; 298 function = "avb"; 299 }; 300 301 pins_mdio { 302 groups = "avb_mdio"; 303 drive-strength = <24>; 304 }; 305 306 pins_mii_tx { 307 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 308 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 309 drive-strength = <12>; 310 }; 311 }; 312 313 i2c2_pins: i2c2 { 314 groups = "i2c2_a"; 315 function = "i2c2"; 316 }; 317 318 irq0_pins: irq0 { 319 groups = "intc_ex_irq0"; 320 function = "intc_ex"; 321 }; 322 323 scif2_pins: scif2 { 324 groups = "scif2_data_a"; 325 function = "scif2"; 326 }; 327 328 scif_clk_pins: scif_clk { 329 groups = "scif_clk_a"; 330 function = "scif_clk"; 331 }; 332 333 sdhi0_pins: sd0 { 334 groups = "sdhi0_data4", "sdhi0_ctrl"; 335 function = "sdhi0"; 336 power-source = <3300>; 337 }; 338 339 sdhi0_pins_uhs: sd0_uhs { 340 groups = "sdhi0_data4", "sdhi0_ctrl"; 341 function = "sdhi0"; 342 power-source = <1800>; 343 }; 344 345 sdhi2_pins: sd2 { 346 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; 347 function = "sdhi2"; 348 power-source = <1800>; 349 }; 350 351 sound_pins: sound { 352 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; 353 function = "ssi"; 354 }; 355 356 sound_clk_pins: sound-clk { 357 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", 358 "audio_clkout_a", "audio_clkout3_a"; 359 function = "audio_clk"; 360 }; 361 362 usb1_pins: usb1 { 363 groups = "usb1"; 364 function = "usb1"; 365 }; 366}; 367 368&rcar_sound { 369 pinctrl-0 = <&sound_pins &sound_clk_pins>; 370 pinctrl-names = "default"; 371 372 /* Single DAI */ 373 #sound-dai-cells = <0>; 374 375 /* audio_clkout0/1/2/3 */ 376 #clock-cells = <1>; 377 clock-frequency = <12288000 11289600>; 378 379 status = "okay"; 380 381 /* update <audio_clk_b> to <cs2000> */ 382 clocks = <&cpg CPG_MOD 1005>, 383 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 384 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 385 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 386 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 387 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 388 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 389 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 390 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 391 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 392 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 393 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 394 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 395 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 396 <&audio_clk_a>, <&cs2000>, 397 <&audio_clk_c>, 398 <&cpg CPG_CORE CPG_AUDIO_CLK_I>; 399 400 ports { 401 #address-cells = <1>; 402 #size-cells = <0>; 403 rsnd_port0: port@0 { 404 reg = <0>; 405 rsnd_for_ak4613: endpoint { 406 remote-endpoint = <&ak4613_endpoint>; 407 408 dai-format = "left_j"; 409 bitclock-master = <&rsnd_for_ak4613>; 410 frame-master = <&rsnd_for_ak4613>; 411 412 playback = <&ssi0 &src0 &dvc0>; 413 capture = <&ssi1 &src1 &dvc1>; 414 }; 415 }; 416 rsnd_port1: port@1 { 417 reg = <1>; 418 rsnd_for_hdmi: endpoint { 419 remote-endpoint = <&dw_hdmi0_snd_in>; 420 421 dai-format = "i2s"; 422 bitclock-master = <&rsnd_for_hdmi>; 423 frame-master = <&rsnd_for_hdmi>; 424 425 playback = <&ssi2>; 426 }; 427 }; 428 }; 429}; 430 431&rwdt { 432 timeout-sec = <60>; 433 status = "okay"; 434}; 435 436&scif2 { 437 pinctrl-0 = <&scif2_pins>; 438 pinctrl-names = "default"; 439 440 status = "okay"; 441}; 442 443&scif_clk { 444 clock-frequency = <14745600>; 445}; 446 447&sdhi0 { 448 pinctrl-0 = <&sdhi0_pins>; 449 pinctrl-1 = <&sdhi0_pins_uhs>; 450 pinctrl-names = "default", "state_uhs"; 451 452 vmmc-supply = <&vcc_sdhi0>; 453 vqmmc-supply = <&vccq_sdhi0>; 454 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 455 bus-width = <4>; 456 sd-uhs-sdr50; 457 sd-uhs-sdr104; 458 status = "okay"; 459}; 460 461&sdhi2 { 462 /* used for on-board 8bit eMMC */ 463 pinctrl-0 = <&sdhi2_pins>; 464 pinctrl-1 = <&sdhi2_pins>; 465 pinctrl-names = "default", "state_uhs"; 466 467 vmmc-supply = <®_3p3v>; 468 vqmmc-supply = <®_1p8v>; 469 bus-width = <8>; 470 mmc-hs200-1_8v; 471 mmc-hs400-1_8v; 472 non-removable; 473 status = "okay"; 474}; 475 476&ssi1 { 477 shared-pin; 478}; 479 480&usb2_phy1 { 481 pinctrl-0 = <&usb1_pins>; 482 pinctrl-names = "default"; 483 484 status = "okay"; 485}; 486