xref: /openbmc/linux/arch/arm64/boot/dts/renesas/ulcb.dtsi (revision 537433b6) 
1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2.  This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14
15/ {
16	model = "Renesas R-Car Gen3 ULCB board";
17
18	aliases {
19		serial0 = &scif2;
20		ethernet0 = &avb;
21	};
22
23	chosen {
24		stdout-path = "serial0:115200n8";
25	};
26
27	audio_clkout: audio-clkout {
28		/*
29		 * This is same as <&rcar_sound 0>
30		 * but needed to avoid cs2000/rcar_sound probe dead-lock
31		 */
32		compatible = "fixed-clock";
33		#clock-cells = <0>;
34		clock-frequency = <12288000>;
35	};
36
37	hdmi0-out {
38		compatible = "hdmi-connector";
39		type = "a";
40
41		port {
42			hdmi0_con: endpoint {
43			};
44		};
45	};
46
47	keyboard {
48		compatible = "gpio-keys";
49
50		key-1 {
51			linux,code = <KEY_1>;
52			label = "SW3";
53			wakeup-source;
54			debounce-interval = <20>;
55			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
56		};
57	};
58
59	leds {
60		compatible = "gpio-leds";
61
62		led5 {
63			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
64		};
65		led6 {
66			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
67		};
68	};
69
70	reg_1p8v: regulator0 {
71		compatible = "regulator-fixed";
72		regulator-name = "fixed-1.8V";
73		regulator-min-microvolt = <1800000>;
74		regulator-max-microvolt = <1800000>;
75		regulator-boot-on;
76		regulator-always-on;
77	};
78
79	reg_3p3v: regulator1 {
80		compatible = "regulator-fixed";
81		regulator-name = "fixed-3.3V";
82		regulator-min-microvolt = <3300000>;
83		regulator-max-microvolt = <3300000>;
84		regulator-boot-on;
85		regulator-always-on;
86	};
87
88	rsnd_ak4613: sound {
89		compatible = "simple-audio-card";
90
91		simple-audio-card,format = "left_j";
92		simple-audio-card,bitclock-master = <&sndcpu>;
93		simple-audio-card,frame-master = <&sndcpu>;
94
95		sndcpu: simple-audio-card,cpu {
96			sound-dai = <&rcar_sound>;
97		};
98
99		sndcodec: simple-audio-card,codec {
100			sound-dai = <&ak4613>;
101		};
102	};
103
104	vcc_sdhi0: regulator-vcc-sdhi0 {
105		compatible = "regulator-fixed";
106
107		regulator-name = "SDHI0 Vcc";
108		regulator-min-microvolt = <3300000>;
109		regulator-max-microvolt = <3300000>;
110
111		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
112		enable-active-high;
113	};
114
115	vccq_sdhi0: regulator-vccq-sdhi0 {
116		compatible = "regulator-gpio";
117
118		regulator-name = "SDHI0 VccQ";
119		regulator-min-microvolt = <1800000>;
120		regulator-max-microvolt = <3300000>;
121
122		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
123		gpios-states = <1>;
124		states = <3300000 1
125			  1800000 0>;
126	};
127
128	x12_clk: x12 {
129		compatible = "fixed-clock";
130		#clock-cells = <0>;
131		clock-frequency = <24576000>;
132	};
133
134	x23_clk: x23-clock {
135		compatible = "fixed-clock";
136		#clock-cells = <0>;
137		clock-frequency = <25000000>;
138	};
139};
140
141&audio_clk_a {
142	clock-frequency = <22579200>;
143};
144
145&avb {
146	pinctrl-0 = <&avb_pins>;
147	pinctrl-names = "default";
148	phy-handle = <&phy0>;
149	status = "okay";
150
151	phy0: ethernet-phy@0 {
152		rxc-skew-ps = <1500>;
153		reg = <0>;
154		interrupt-parent = <&gpio2>;
155		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
156		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
157	};
158};
159
160&du {
161	status = "okay";
162};
163
164&ehci1 {
165	status = "okay";
166};
167
168&extal_clk {
169	clock-frequency = <16666666>;
170};
171
172&extalr_clk {
173	clock-frequency = <32768>;
174};
175
176&hdmi0 {
177	status = "okay";
178
179	ports {
180		port@1 {
181			reg = <1>;
182			rcar_dw_hdmi0_out: endpoint {
183				remote-endpoint = <&hdmi0_con>;
184			};
185		};
186	};
187};
188
189&hdmi0_con {
190	remote-endpoint = <&rcar_dw_hdmi0_out>;
191};
192
193&i2c2 {
194	pinctrl-0 = <&i2c2_pins>;
195	pinctrl-names = "default";
196
197	status = "okay";
198
199	clock-frequency = <100000>;
200
201	ak4613: codec@10 {
202		compatible = "asahi-kasei,ak4613";
203		#sound-dai-cells = <0>;
204		reg = <0x10>;
205		clocks = <&rcar_sound 3>;
206
207		asahi-kasei,in1-single-end;
208		asahi-kasei,in2-single-end;
209		asahi-kasei,out1-single-end;
210		asahi-kasei,out2-single-end;
211		asahi-kasei,out3-single-end;
212		asahi-kasei,out4-single-end;
213		asahi-kasei,out5-single-end;
214		asahi-kasei,out6-single-end;
215	};
216
217	cs2000: clk-multiplier@4f {
218		#clock-cells = <0>;
219		compatible = "cirrus,cs2000-cp";
220		reg = <0x4f>;
221		clocks = <&audio_clkout>, <&x12_clk>;
222		clock-names = "clk_in", "ref_clk";
223
224		assigned-clocks = <&cs2000>;
225		assigned-clock-rates = <24576000>; /* 1/1 divide */
226	};
227};
228
229&i2c4 {
230	status = "okay";
231
232	clock-frequency = <400000>;
233
234	versaclock5: clock-generator@6a {
235		compatible = "idt,5p49v5925";
236		reg = <0x6a>;
237		#clock-cells = <1>;
238		clocks = <&x23_clk>;
239		clock-names = "xin";
240	};
241};
242
243&i2c_dvfs {
244	status = "okay";
245};
246
247&ohci1 {
248	status = "okay";
249};
250
251&pfc {
252	pinctrl-0 = <&scif_clk_pins>;
253	pinctrl-names = "default";
254
255	avb_pins: avb {
256		mux {
257			groups = "avb_link", "avb_mdc", "avb_mii";
258			function = "avb";
259		};
260
261		pins_mdc {
262			groups = "avb_mdc";
263			drive-strength = <24>;
264		};
265
266		pins_mii_tx {
267			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
268			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
269			drive-strength = <12>;
270		};
271	};
272
273	i2c2_pins: i2c2 {
274		groups = "i2c2_a";
275		function = "i2c2";
276	};
277
278	scif2_pins: scif2 {
279		groups = "scif2_data_a";
280		function = "scif2";
281	};
282
283	scif_clk_pins: scif_clk {
284		groups = "scif_clk_a";
285		function = "scif_clk";
286	};
287
288	sdhi0_pins: sd0 {
289		groups = "sdhi0_data4", "sdhi0_ctrl";
290		function = "sdhi0";
291		power-source = <3300>;
292	};
293
294	sdhi0_pins_uhs: sd0_uhs {
295		groups = "sdhi0_data4", "sdhi0_ctrl";
296		function = "sdhi0";
297		power-source = <1800>;
298	};
299
300	sdhi2_pins: sd2 {
301		groups = "sdhi2_data8", "sdhi2_ctrl";
302		function = "sdhi2";
303		power-source = <3300>;
304	};
305
306	sdhi2_pins_uhs: sd2_uhs {
307		groups = "sdhi2_data8", "sdhi2_ctrl";
308		function = "sdhi2";
309		power-source = <1800>;
310	};
311
312	sound_pins: sound {
313		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
314		function = "ssi";
315	};
316
317	sound_clk_pins: sound-clk {
318		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
319			 "audio_clkout_a", "audio_clkout3_a";
320		function = "audio_clk";
321	};
322
323	usb1_pins: usb1 {
324		groups = "usb1";
325		function = "usb1";
326	};
327};
328
329&rcar_sound {
330	pinctrl-0 = <&sound_pins &sound_clk_pins>;
331	pinctrl-names = "default";
332
333	/* Single DAI */
334	#sound-dai-cells = <0>;
335
336	/* audio_clkout0/1/2/3 */
337	#clock-cells = <1>;
338	clock-frequency = <12288000 11289600>;
339
340	status = "okay";
341
342	/* update <audio_clk_b> to <cs2000> */
343	clocks = <&cpg CPG_MOD 1005>,
344		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
345		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
346		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
347		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
348		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
349		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
350		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
351		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
352		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
353		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
354		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
355		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
356		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
357		 <&audio_clk_a>, <&cs2000>,
358		 <&audio_clk_c>,
359		 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
360
361	rcar_sound,dai {
362		dai0 {
363			playback = <&ssi0 &src0 &dvc0>;
364			capture  = <&ssi1 &src1 &dvc1>;
365		};
366	};
367};
368
369&scif2 {
370	pinctrl-0 = <&scif2_pins>;
371	pinctrl-names = "default";
372
373	status = "okay";
374};
375
376&scif_clk {
377	clock-frequency = <14745600>;
378};
379
380&sdhi0 {
381	pinctrl-0 = <&sdhi0_pins>;
382	pinctrl-1 = <&sdhi0_pins_uhs>;
383	pinctrl-names = "default", "state_uhs";
384
385	vmmc-supply = <&vcc_sdhi0>;
386	vqmmc-supply = <&vccq_sdhi0>;
387	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
388	bus-width = <4>;
389	sd-uhs-sdr50;
390	status = "okay";
391};
392
393&sdhi2 {
394	/* used for on-board 8bit eMMC */
395	pinctrl-0 = <&sdhi2_pins>;
396	pinctrl-1 = <&sdhi2_pins_uhs>;
397	pinctrl-names = "default", "state_uhs";
398
399	vmmc-supply = <&reg_3p3v>;
400	vqmmc-supply = <&reg_1p8v>;
401	bus-width = <8>;
402	mmc-hs200-1_8v;
403	non-removable;
404	status = "okay";
405};
406
407&ssi1 {
408	shared-pin;
409};
410
411&usb2_phy1 {
412	pinctrl-0 = <&usb1_pins>;
413	pinctrl-names = "default";
414
415	status = "okay";
416};
417
418&wdt0 {
419	timeout-sec = <60>;
420	status = "okay";
421};
422