1ce0c63b6SBiju Das// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ce0c63b6SBiju Das/* 3ce0c63b6SBiju Das * Device Tree Source for the RZ/G2LC SMARC SOM common parts 4ce0c63b6SBiju Das * 5ce0c63b6SBiju Das * Copyright (C) 2021 Renesas Electronics Corp. 6ce0c63b6SBiju Das */ 7ce0c63b6SBiju Das 8ce0c63b6SBiju Das#include <dt-bindings/gpio/gpio.h> 9ce0c63b6SBiju Das#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 10ce0c63b6SBiju Das 11ce0c63b6SBiju Das/ { 12ce0c63b6SBiju Das aliases { 13ce0c63b6SBiju Das ethernet0 = ð0; 14ce0c63b6SBiju Das }; 15ce0c63b6SBiju Das 16ce0c63b6SBiju Das chosen { 17ce0c63b6SBiju Das bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 18ce0c63b6SBiju Das }; 19ce0c63b6SBiju Das 20ce0c63b6SBiju Das memory@48000000 { 21ce0c63b6SBiju Das device_type = "memory"; 22ce0c63b6SBiju Das /* first 128MB is reserved for secure area. */ 23ce0c63b6SBiju Das reg = <0x0 0x48000000 0x0 0x38000000>; 24ce0c63b6SBiju Das }; 257ca0ce64SBiju Das 267ca0ce64SBiju Das reg_1p8v: regulator0 { 277ca0ce64SBiju Das compatible = "regulator-fixed"; 287ca0ce64SBiju Das regulator-name = "fixed-1.8V"; 297ca0ce64SBiju Das regulator-min-microvolt = <1800000>; 307ca0ce64SBiju Das regulator-max-microvolt = <1800000>; 317ca0ce64SBiju Das regulator-boot-on; 327ca0ce64SBiju Das regulator-always-on; 337ca0ce64SBiju Das }; 347ca0ce64SBiju Das 357ca0ce64SBiju Das reg_3p3v: regulator1 { 367ca0ce64SBiju Das compatible = "regulator-fixed"; 377ca0ce64SBiju Das regulator-name = "fixed-3.3V"; 387ca0ce64SBiju Das regulator-min-microvolt = <3300000>; 397ca0ce64SBiju Das regulator-max-microvolt = <3300000>; 407ca0ce64SBiju Das regulator-boot-on; 417ca0ce64SBiju Das regulator-always-on; 427ca0ce64SBiju Das }; 437ca0ce64SBiju Das 44*6f57895cSBiju Das reg_1p1v: regulator-vdd-core { 45*6f57895cSBiju Das compatible = "regulator-fixed"; 46*6f57895cSBiju Das regulator-name = "fixed-1.1V"; 47*6f57895cSBiju Das regulator-min-microvolt = <1100000>; 48*6f57895cSBiju Das regulator-max-microvolt = <1100000>; 49*6f57895cSBiju Das regulator-boot-on; 50*6f57895cSBiju Das regulator-always-on; 51*6f57895cSBiju Das }; 52*6f57895cSBiju Das 537ca0ce64SBiju Das vccq_sdhi0: regulator-vccq-sdhi0 { 547ca0ce64SBiju Das compatible = "regulator-gpio"; 557ca0ce64SBiju Das 567ca0ce64SBiju Das regulator-name = "SDHI0 VccQ"; 577ca0ce64SBiju Das regulator-min-microvolt = <1800000>; 587ca0ce64SBiju Das regulator-max-microvolt = <3300000>; 597ca0ce64SBiju Das states = <3300000 1>, <1800000 0>; 607ca0ce64SBiju Das regulator-boot-on; 617ca0ce64SBiju Das gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>; 627ca0ce64SBiju Das regulator-always-on; 637ca0ce64SBiju Das }; 64ce0c63b6SBiju Das}; 65ce0c63b6SBiju Das 66ce0c63b6SBiju Dasð0 { 67ce0c63b6SBiju Das pinctrl-0 = <ð0_pins>; 68ce0c63b6SBiju Das pinctrl-names = "default"; 69ce0c63b6SBiju Das phy-handle = <&phy0>; 70ce0c63b6SBiju Das phy-mode = "rgmii-id"; 71ce0c63b6SBiju Das status = "okay"; 72ce0c63b6SBiju Das 73ce0c63b6SBiju Das phy0: ethernet-phy@7 { 74ce0c63b6SBiju Das compatible = "ethernet-phy-id0022.1640", 75ce0c63b6SBiju Das "ethernet-phy-ieee802.3-c22"; 76ce0c63b6SBiju Das reg = <7>; 77ce0c63b6SBiju Das rxc-skew-psec = <2400>; 78ce0c63b6SBiju Das txc-skew-psec = <2400>; 79ce0c63b6SBiju Das rxdv-skew-psec = <0>; 80ce0c63b6SBiju Das txdv-skew-psec = <0>; 81ce0c63b6SBiju Das rxd0-skew-psec = <0>; 82ce0c63b6SBiju Das rxd1-skew-psec = <0>; 83ce0c63b6SBiju Das rxd2-skew-psec = <0>; 84ce0c63b6SBiju Das rxd3-skew-psec = <0>; 85ce0c63b6SBiju Das txd0-skew-psec = <0>; 86ce0c63b6SBiju Das txd1-skew-psec = <0>; 87ce0c63b6SBiju Das txd2-skew-psec = <0>; 88ce0c63b6SBiju Das txd3-skew-psec = <0>; 89ce0c63b6SBiju Das }; 90ce0c63b6SBiju Das}; 91ce0c63b6SBiju Das 92ce0c63b6SBiju Das&extal_clk { 93ce0c63b6SBiju Das clock-frequency = <24000000>; 94ce0c63b6SBiju Das}; 95ce0c63b6SBiju Das 96*6f57895cSBiju Das&gpu { 97*6f57895cSBiju Das mali-supply = <®_1p1v>; 98*6f57895cSBiju Das}; 99*6f57895cSBiju Das 100a081c4feSBiju Das&ostm1 { 101a081c4feSBiju Das status = "okay"; 102a081c4feSBiju Das}; 103a081c4feSBiju Das 104a081c4feSBiju Das&ostm2 { 105a081c4feSBiju Das status = "okay"; 106a081c4feSBiju Das}; 107a081c4feSBiju Das 108ce0c63b6SBiju Das&pinctrl { 109ce0c63b6SBiju Das eth0_pins: eth0 { 110ce0c63b6SBiju Das pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */ 111ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */ 112ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */ 113ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */ 114ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */ 115ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */ 116ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */ 117ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */ 118ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */ 119ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */ 120ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */ 121ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */ 122ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */ 123ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */ 124ce0c63b6SBiju Das <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */ 125ce0c63b6SBiju Das }; 1267ca0ce64SBiju Das 1277ca0ce64SBiju Das gpio-sd0-pwr-en-hog { 1287ca0ce64SBiju Das gpio-hog; 1297ca0ce64SBiju Das gpios = <RZG2L_GPIO(18, 1) GPIO_ACTIVE_HIGH>; 1307ca0ce64SBiju Das output-high; 1317ca0ce64SBiju Das line-name = "gpio_sd0_pwr_en"; 132ce0c63b6SBiju Das }; 133ce0c63b6SBiju Das 134018d7b93SBiju Das qspi0_pins: qspi0 { 135018d7b93SBiju Das qspi0-data { 136018d7b93SBiju Das pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3"; 137018d7b93SBiju Das power-source = <1800>; 138018d7b93SBiju Das }; 139018d7b93SBiju Das 140018d7b93SBiju Das qspi0-ctrl { 141018d7b93SBiju Das pins = "QSPI0_SPCLK", "QSPI0_SSL", "QSPI_RESET#"; 142018d7b93SBiju Das power-source = <1800>; 143018d7b93SBiju Das }; 144018d7b93SBiju Das }; 145018d7b93SBiju Das 1467ca0ce64SBiju Das /* 1477ca0ce64SBiju Das * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2] 1487ca0ce64SBiju Das * The below switch logic can be used to select the device between 1497ca0ce64SBiju Das * eMMC and microSD, after setting GPIO_SD0_DEV_SEL to high in DT. 1507ca0ce64SBiju Das * SW1[2] should be at OFF position to enable 64 GB eMMC 1517ca0ce64SBiju Das * SW1[2] should be at position ON to enable uSD card CN3 1527ca0ce64SBiju Das */ 1537ca0ce64SBiju Das gpio-sd0-dev-sel-hog { 1547ca0ce64SBiju Das gpio-hog; 1557ca0ce64SBiju Das gpios = <RZG2L_GPIO(40, 2) GPIO_ACTIVE_HIGH>; 1567ca0ce64SBiju Das output-high; 1577ca0ce64SBiju Das line-name = "gpio_sd0_dev_sel"; 1587ca0ce64SBiju Das }; 1597ca0ce64SBiju Das 1607ca0ce64SBiju Das sdhi0_emmc_pins: sd0emmc { 1617ca0ce64SBiju Das sd0_emmc_data { 1627ca0ce64SBiju Das pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3", 1637ca0ce64SBiju Das "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7"; 1647ca0ce64SBiju Das power-source = <1800>; 1657ca0ce64SBiju Das }; 1667ca0ce64SBiju Das 1677ca0ce64SBiju Das sd0_emmc_ctrl { 1687ca0ce64SBiju Das pins = "SD0_CLK", "SD0_CMD"; 1697ca0ce64SBiju Das power-source = <1800>; 1707ca0ce64SBiju Das }; 1717ca0ce64SBiju Das 1727ca0ce64SBiju Das sd0_emmc_rst { 1737ca0ce64SBiju Das pins = "SD0_RST#"; 1747ca0ce64SBiju Das power-source = <1800>; 1757ca0ce64SBiju Das }; 1767ca0ce64SBiju Das }; 1777ca0ce64SBiju Das 1787ca0ce64SBiju Das sdhi0_pins: sd0 { 1797ca0ce64SBiju Das sd0_data { 1807ca0ce64SBiju Das pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3"; 1817ca0ce64SBiju Das power-source = <3300>; 1827ca0ce64SBiju Das }; 1837ca0ce64SBiju Das 1847ca0ce64SBiju Das sd0_ctrl { 1857ca0ce64SBiju Das pins = "SD0_CLK", "SD0_CMD"; 1867ca0ce64SBiju Das power-source = <3300>; 1877ca0ce64SBiju Das }; 1887ca0ce64SBiju Das 1897ca0ce64SBiju Das sd0_mux { 1907ca0ce64SBiju Das pinmux = <RZG2L_PORT_PINMUX(18, 0, 1)>; /* SD0_CD */ 1917ca0ce64SBiju Das }; 1927ca0ce64SBiju Das }; 1937ca0ce64SBiju Das 1947ca0ce64SBiju Das sdhi0_pins_uhs: sd0_uhs { 1957ca0ce64SBiju Das sd0_data_uhs { 1967ca0ce64SBiju Das pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3"; 1977ca0ce64SBiju Das power-source = <1800>; 1987ca0ce64SBiju Das }; 1997ca0ce64SBiju Das 2007ca0ce64SBiju Das sd0_ctrl_uhs { 2017ca0ce64SBiju Das pins = "SD0_CLK", "SD0_CMD"; 2027ca0ce64SBiju Das power-source = <1800>; 2037ca0ce64SBiju Das }; 2047ca0ce64SBiju Das 2057ca0ce64SBiju Das sd0_mux_uhs { 2067ca0ce64SBiju Das pinmux = <RZG2L_PORT_PINMUX(18, 0, 1)>; /* SD0_CD */ 2077ca0ce64SBiju Das }; 2087ca0ce64SBiju Das }; 2097ca0ce64SBiju Das}; 2107ca0ce64SBiju Das 211018d7b93SBiju Das&sbc { 212018d7b93SBiju Das pinctrl-0 = <&qspi0_pins>; 213018d7b93SBiju Das pinctrl-names = "default"; 214018d7b93SBiju Das status = "okay"; 215018d7b93SBiju Das 216018d7b93SBiju Das flash@0 { 217018d7b93SBiju Das compatible = "micron,mt25qu512a", "jedec,spi-nor"; 218018d7b93SBiju Das reg = <0>; 219018d7b93SBiju Das m25p,fast-read; 220018d7b93SBiju Das spi-max-frequency = <50000000>; 221018d7b93SBiju Das spi-rx-bus-width = <4>; 222018d7b93SBiju Das 223018d7b93SBiju Das partitions { 224018d7b93SBiju Das compatible = "fixed-partitions"; 225018d7b93SBiju Das #address-cells = <1>; 226018d7b93SBiju Das #size-cells = <1>; 227018d7b93SBiju Das 228018d7b93SBiju Das boot@0 { 229018d7b93SBiju Das reg = <0x00000000 0x2000000>; 230018d7b93SBiju Das read-only; 231018d7b93SBiju Das }; 232018d7b93SBiju Das user@2000000 { 233018d7b93SBiju Das reg = <0x2000000 0x2000000>; 234018d7b93SBiju Das }; 235018d7b93SBiju Das }; 236018d7b93SBiju Das }; 237018d7b93SBiju Das}; 238018d7b93SBiju Das 2395c65ad12SBiju Das#if (!SW_SD0_DEV_SEL) 2407ca0ce64SBiju Das&sdhi0 { 2417ca0ce64SBiju Das pinctrl-0 = <&sdhi0_pins>; 2427ca0ce64SBiju Das pinctrl-1 = <&sdhi0_pins_uhs>; 2437ca0ce64SBiju Das pinctrl-names = "default", "state_uhs"; 2447ca0ce64SBiju Das 2457ca0ce64SBiju Das vmmc-supply = <®_3p3v>; 2467ca0ce64SBiju Das vqmmc-supply = <&vccq_sdhi0>; 2477ca0ce64SBiju Das bus-width = <4>; 2487ca0ce64SBiju Das sd-uhs-sdr50; 2497ca0ce64SBiju Das sd-uhs-sdr104; 2507ca0ce64SBiju Das status = "okay"; 2517ca0ce64SBiju Das}; 2527ca0ce64SBiju Das#endif 2537ca0ce64SBiju Das 2545c65ad12SBiju Das#if SW_SD0_DEV_SEL 2557ca0ce64SBiju Das&sdhi0 { 2567ca0ce64SBiju Das pinctrl-0 = <&sdhi0_emmc_pins>; 2577ca0ce64SBiju Das pinctrl-1 = <&sdhi0_emmc_pins>; 2587ca0ce64SBiju Das pinctrl-names = "default", "state_uhs"; 2597ca0ce64SBiju Das 2607ca0ce64SBiju Das vmmc-supply = <®_3p3v>; 2617ca0ce64SBiju Das vqmmc-supply = <®_1p8v>; 2627ca0ce64SBiju Das bus-width = <8>; 2637ca0ce64SBiju Das mmc-hs200-1_8v; 2647ca0ce64SBiju Das non-removable; 2657ca0ce64SBiju Das fixed-emmc-driver-type = <1>; 2667ca0ce64SBiju Das status = "okay"; 2677ca0ce64SBiju Das}; 2687ca0ce64SBiju Das#endif 2697ca0ce64SBiju Das 270d05e409eSBiju Das&wdt0 { 271d05e409eSBiju Das status = "okay"; 272d05e409eSBiju Das timeout-sec = <60>; 273d05e409eSBiju Das}; 274d05e409eSBiju Das 275d05e409eSBiju Das&wdt1 { 276d05e409eSBiju Das status = "okay"; 277d05e409eSBiju Das timeout-sec = <60>; 278d05e409eSBiju Das}; 279d05e409eSBiju Das 280d05e409eSBiju Das&wdt2 { 281d05e409eSBiju Das status = "okay"; 282d05e409eSBiju Das timeout-sec = <60>; 283d05e409eSBiju Das}; 284