1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/V2M (r9a09g011) Evaluation Kit Board
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8/dts-v1/;
9#include "r9a09g011.dtsi"
10#include <dt-bindings/pinctrl/rzv2m-pinctrl.h>
11
12/ {
13	model = "RZ/V2M Evaluation Kit 2.0";
14	compatible = "renesas,rzv2mevk2", "renesas,r9a09g011";
15
16	aliases {
17		serial0 = &uart0;
18		ethernet0 = &avb;
19	};
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24
25	memory@58000000 {
26		device_type = "memory";
27		/*
28		 * first 1.25GiB is reserved for ISP Firmware,
29		 * next 128MiB is reserved for secure area.
30		 */
31		reg = <0x0 0x58000000 0x0 0x28000000>;
32	};
33
34	memory@180000000 {
35		device_type = "memory";
36		reg = <0x1 0x80000000 0x0 0x80000000>;
37	};
38};
39
40&avb {
41	renesas,no-ether-link;
42	phy-handle = <&phy0>;
43	phy-mode = "gmii";
44	status = "okay";
45
46	phy0: ethernet-phy@0 {
47		compatible = "ethernet-phy-id001c.c916",
48			     "ethernet-phy-ieee802.3-c22";
49		reg = <0>;
50	};
51};
52
53&extal_clk {
54	clock-frequency = <48000000>;
55};
56
57&i2c0 {
58	pinctrl-0 = <&i2c0_pins>;
59	pinctrl-names = "default";
60	clock-frequency = <400000>;
61	status = "okay";
62};
63
64&i2c2 {
65	pinctrl-0 = <&i2c2_pins>;
66	pinctrl-names = "default";
67	clock-frequency = <100000>;
68	status = "okay";
69};
70
71&pinctrl {
72	i2c0_pins: i2c0 {
73		pinmux = <RZV2M_PORT_PINMUX(5, 0, 2)>, /* SDA */
74			 <RZV2M_PORT_PINMUX(5, 1, 2)>; /* SCL */
75	};
76
77	i2c2_pins: i2c2 {
78		pinmux = <RZV2M_PORT_PINMUX(3, 8, 2)>, /* SDA */
79			 <RZV2M_PORT_PINMUX(3, 9, 2)>; /* SCL */
80	};
81};
82
83&pwc {
84	renesas,rzv2m-pwc-power;
85	status = "okay";
86};
87
88&uart0 {
89	status = "okay";
90};
91
92&wdt0 {
93	status = "okay";
94};
95