1987da486SYoshihiro Shimoda// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2987da486SYoshihiro Shimoda/* 3987da486SYoshihiro Shimoda * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4987da486SYoshihiro Shimoda * 5987da486SYoshihiro Shimoda * Copyright (C) 2022 Renesas Electronics Corp. 6987da486SYoshihiro Shimoda */ 7987da486SYoshihiro Shimoda 8987da486SYoshihiro Shimoda#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9987da486SYoshihiro Shimoda#include <dt-bindings/interrupt-controller/arm-gic.h> 10987da486SYoshihiro Shimoda#include <dt-bindings/power/r8a779g0-sysc.h> 11987da486SYoshihiro Shimoda 12987da486SYoshihiro Shimoda/ { 13987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0"; 14987da486SYoshihiro Shimoda #address-cells = <2>; 15987da486SYoshihiro Shimoda #size-cells = <2>; 16987da486SYoshihiro Shimoda 17987da486SYoshihiro Shimoda cpus { 18987da486SYoshihiro Shimoda #address-cells = <1>; 19987da486SYoshihiro Shimoda #size-cells = <0>; 20987da486SYoshihiro Shimoda 21987da486SYoshihiro Shimoda a76_0: cpu@0 { 22987da486SYoshihiro Shimoda compatible = "arm,cortex-a76"; 23987da486SYoshihiro Shimoda reg = <0>; 24987da486SYoshihiro Shimoda device_type = "cpu"; 25987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 26987da486SYoshihiro Shimoda }; 27987da486SYoshihiro Shimoda }; 28987da486SYoshihiro Shimoda 29987da486SYoshihiro Shimoda extal_clk: extal { 30987da486SYoshihiro Shimoda compatible = "fixed-clock"; 31987da486SYoshihiro Shimoda #clock-cells = <0>; 32987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 33987da486SYoshihiro Shimoda clock-frequency = <0>; 34987da486SYoshihiro Shimoda }; 35987da486SYoshihiro Shimoda 36987da486SYoshihiro Shimoda extalr_clk: extalr { 37987da486SYoshihiro Shimoda compatible = "fixed-clock"; 38987da486SYoshihiro Shimoda #clock-cells = <0>; 39987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 40987da486SYoshihiro Shimoda clock-frequency = <0>; 41987da486SYoshihiro Shimoda }; 42987da486SYoshihiro Shimoda 43987da486SYoshihiro Shimoda pmu_a76 { 44987da486SYoshihiro Shimoda compatible = "arm,cortex-a76-pmu"; 45987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 46987da486SYoshihiro Shimoda }; 47987da486SYoshihiro Shimoda 48987da486SYoshihiro Shimoda /* External SCIF clock - to be overridden by boards that provide it */ 49987da486SYoshihiro Shimoda scif_clk: scif { 50987da486SYoshihiro Shimoda compatible = "fixed-clock"; 51987da486SYoshihiro Shimoda #clock-cells = <0>; 52987da486SYoshihiro Shimoda clock-frequency = <0>; 53987da486SYoshihiro Shimoda }; 54987da486SYoshihiro Shimoda 55987da486SYoshihiro Shimoda soc: soc { 56987da486SYoshihiro Shimoda compatible = "simple-bus"; 57987da486SYoshihiro Shimoda interrupt-parent = <&gic>; 58987da486SYoshihiro Shimoda #address-cells = <2>; 59987da486SYoshihiro Shimoda #size-cells = <2>; 60987da486SYoshihiro Shimoda ranges; 61987da486SYoshihiro Shimoda 62a43306faSGeert Uytterhoeven rwdt: watchdog@e6020000 { 63a43306faSGeert Uytterhoeven compatible = "renesas,r8a779g0-wdt", 64a43306faSGeert Uytterhoeven "renesas,rcar-gen4-wdt"; 65a43306faSGeert Uytterhoeven reg = <0 0xe6020000 0 0x0c>; 66a43306faSGeert Uytterhoeven interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 67a43306faSGeert Uytterhoeven clocks = <&cpg CPG_MOD 907>; 68a43306faSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 69a43306faSGeert Uytterhoeven resets = <&cpg 907>; 70a43306faSGeert Uytterhoeven status = "disabled"; 71a43306faSGeert Uytterhoeven }; 72a43306faSGeert Uytterhoeven 734cebce25SGeert Uytterhoeven pfc: pinctrl@e6050000 { 744cebce25SGeert Uytterhoeven compatible = "renesas,pfc-r8a779g0"; 754cebce25SGeert Uytterhoeven reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 764cebce25SGeert Uytterhoeven <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 774cebce25SGeert Uytterhoeven <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 784cebce25SGeert Uytterhoeven <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 794cebce25SGeert Uytterhoeven <0 0xe6068000 0 0x16c>; 804cebce25SGeert Uytterhoeven }; 814cebce25SGeert Uytterhoeven 82120c7a58SGeert Uytterhoeven gpio0: gpio@e6050180 { 83120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 84120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 85120c7a58SGeert Uytterhoeven reg = <0 0xe6050180 0 0x54>; 86120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 87120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 88120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 89120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 90120c7a58SGeert Uytterhoeven gpio-controller; 91120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 92120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 0 19>; 93120c7a58SGeert Uytterhoeven interrupt-controller; 94120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 95120c7a58SGeert Uytterhoeven }; 96120c7a58SGeert Uytterhoeven 97120c7a58SGeert Uytterhoeven gpio1: gpio@e6050980 { 98120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 99120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 100120c7a58SGeert Uytterhoeven reg = <0 0xe6050980 0 0x54>; 101120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 102120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 103120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 104120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 105120c7a58SGeert Uytterhoeven gpio-controller; 106120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 107120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 32 29>; 108120c7a58SGeert Uytterhoeven interrupt-controller; 109120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 110120c7a58SGeert Uytterhoeven }; 111120c7a58SGeert Uytterhoeven 112120c7a58SGeert Uytterhoeven gpio2: gpio@e6058180 { 113120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 114120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 115120c7a58SGeert Uytterhoeven reg = <0 0xe6058180 0 0x54>; 116120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 117120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 118120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 119120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 120120c7a58SGeert Uytterhoeven gpio-controller; 121120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 122120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 64 20>; 123120c7a58SGeert Uytterhoeven interrupt-controller; 124120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 125120c7a58SGeert Uytterhoeven }; 126120c7a58SGeert Uytterhoeven 127120c7a58SGeert Uytterhoeven gpio3: gpio@e6058980 { 128120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 129120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 130120c7a58SGeert Uytterhoeven reg = <0 0xe6058980 0 0x54>; 131120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 132120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 133120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 134120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 135120c7a58SGeert Uytterhoeven gpio-controller; 136120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 137120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 96 30>; 138120c7a58SGeert Uytterhoeven interrupt-controller; 139120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 140120c7a58SGeert Uytterhoeven }; 141120c7a58SGeert Uytterhoeven 142120c7a58SGeert Uytterhoeven gpio4: gpio@e6060180 { 143120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 144120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 145120c7a58SGeert Uytterhoeven reg = <0 0xe6060180 0 0x54>; 146120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 147120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 148120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 149120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 150120c7a58SGeert Uytterhoeven gpio-controller; 151120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 152120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 128 25>; 153120c7a58SGeert Uytterhoeven interrupt-controller; 154120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 155120c7a58SGeert Uytterhoeven }; 156120c7a58SGeert Uytterhoeven 157120c7a58SGeert Uytterhoeven gpio5: gpio@e6060980 { 158120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 159120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 160120c7a58SGeert Uytterhoeven reg = <0 0xe6060980 0 0x54>; 161120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 162120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 163120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 164120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 165120c7a58SGeert Uytterhoeven gpio-controller; 166120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 167120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 160 21>; 168120c7a58SGeert Uytterhoeven interrupt-controller; 169120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 170120c7a58SGeert Uytterhoeven }; 171120c7a58SGeert Uytterhoeven 172120c7a58SGeert Uytterhoeven gpio6: gpio@e6061180 { 173120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 174120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 175120c7a58SGeert Uytterhoeven reg = <0 0xe6061180 0 0x54>; 176120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 177120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 178120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 179120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 180120c7a58SGeert Uytterhoeven gpio-controller; 181120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 182120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 192 21>; 183120c7a58SGeert Uytterhoeven interrupt-controller; 184120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 185120c7a58SGeert Uytterhoeven }; 186120c7a58SGeert Uytterhoeven 187120c7a58SGeert Uytterhoeven gpio7: gpio@e6061980 { 188120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 189120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 190120c7a58SGeert Uytterhoeven reg = <0 0xe6061980 0 0x54>; 191120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 192120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 193120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 194120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 195120c7a58SGeert Uytterhoeven gpio-controller; 196120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 197120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 224 21>; 198120c7a58SGeert Uytterhoeven interrupt-controller; 199120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 200120c7a58SGeert Uytterhoeven }; 201120c7a58SGeert Uytterhoeven 202120c7a58SGeert Uytterhoeven gpio8: gpio@e6068180 { 203120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 204120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 205120c7a58SGeert Uytterhoeven reg = <0 0xe6068180 0 0x54>; 206120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 207120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 918>; 208120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 209120c7a58SGeert Uytterhoeven resets = <&cpg 918>; 210120c7a58SGeert Uytterhoeven gpio-controller; 211120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 212120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 256 14>; 213120c7a58SGeert Uytterhoeven interrupt-controller; 214120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 215120c7a58SGeert Uytterhoeven }; 216120c7a58SGeert Uytterhoeven 217987da486SYoshihiro Shimoda cpg: clock-controller@e6150000 { 218987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-cpg-mssr"; 219987da486SYoshihiro Shimoda reg = <0 0xe6150000 0 0x4000>; 220987da486SYoshihiro Shimoda clocks = <&extal_clk>, <&extalr_clk>; 221987da486SYoshihiro Shimoda clock-names = "extal", "extalr"; 222987da486SYoshihiro Shimoda #clock-cells = <2>; 223987da486SYoshihiro Shimoda #power-domain-cells = <0>; 224987da486SYoshihiro Shimoda #reset-cells = <1>; 225987da486SYoshihiro Shimoda }; 226987da486SYoshihiro Shimoda 227987da486SYoshihiro Shimoda rst: reset-controller@e6160000 { 228987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-rst"; 229987da486SYoshihiro Shimoda reg = <0 0xe6160000 0 0x4000>; 230987da486SYoshihiro Shimoda }; 231987da486SYoshihiro Shimoda 232987da486SYoshihiro Shimoda sysc: system-controller@e6180000 { 233987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-sysc"; 234987da486SYoshihiro Shimoda reg = <0 0xe6180000 0 0x4000>; 235987da486SYoshihiro Shimoda #power-domain-cells = <1>; 236987da486SYoshihiro Shimoda }; 237987da486SYoshihiro Shimoda 238b6ce840bSGeert Uytterhoeven intc_ex: interrupt-controller@e61c0000 { 239b6ce840bSGeert Uytterhoeven compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 240b6ce840bSGeert Uytterhoeven #interrupt-cells = <2>; 241b6ce840bSGeert Uytterhoeven interrupt-controller; 242b6ce840bSGeert Uytterhoeven reg = <0 0xe61c0000 0 0x200>; 243b6ce840bSGeert Uytterhoeven interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 244b6ce840bSGeert Uytterhoeven <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 245b6ce840bSGeert Uytterhoeven <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 246b6ce840bSGeert Uytterhoeven <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 247b6ce840bSGeert Uytterhoeven <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 248b6ce840bSGeert Uytterhoeven <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 249b6ce840bSGeert Uytterhoeven clocks = <&cpg CPG_MOD 611>; 250b6ce840bSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 251b6ce840bSGeert Uytterhoeven resets = <&cpg 611>; 252b6ce840bSGeert Uytterhoeven }; 253b6ce840bSGeert Uytterhoeven 254ff77ba05SGeert Uytterhoeven i2c0: i2c@e6500000 { 255ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 256ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 257ff77ba05SGeert Uytterhoeven reg = <0 0xe6500000 0 0x40>; 258ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 259ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 518>; 26008f28288SGeert Uytterhoeven dmas = <&dmac0 0x91>, <&dmac0 0x90>, 26108f28288SGeert Uytterhoeven <&dmac1 0x91>, <&dmac1 0x90>; 26208f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 263ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 264ff77ba05SGeert Uytterhoeven resets = <&cpg 518>; 265ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 266ff77ba05SGeert Uytterhoeven #address-cells = <1>; 267ff77ba05SGeert Uytterhoeven #size-cells = <0>; 268ff77ba05SGeert Uytterhoeven status = "disabled"; 269ff77ba05SGeert Uytterhoeven }; 270ff77ba05SGeert Uytterhoeven 271ff77ba05SGeert Uytterhoeven i2c1: i2c@e6508000 { 272ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 273ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 274ff77ba05SGeert Uytterhoeven reg = <0 0xe6508000 0 0x40>; 275ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 276ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 519>; 27708f28288SGeert Uytterhoeven dmas = <&dmac0 0x93>, <&dmac0 0x92>, 27808f28288SGeert Uytterhoeven <&dmac1 0x93>, <&dmac1 0x92>; 27908f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 280ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 281ff77ba05SGeert Uytterhoeven resets = <&cpg 519>; 282ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 283ff77ba05SGeert Uytterhoeven #address-cells = <1>; 284ff77ba05SGeert Uytterhoeven #size-cells = <0>; 285ff77ba05SGeert Uytterhoeven status = "disabled"; 286ff77ba05SGeert Uytterhoeven }; 287ff77ba05SGeert Uytterhoeven 288ff77ba05SGeert Uytterhoeven i2c2: i2c@e6510000 { 289ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 290ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 291ff77ba05SGeert Uytterhoeven reg = <0 0xe6510000 0 0x40>; 292ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 293ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 520>; 29408f28288SGeert Uytterhoeven dmas = <&dmac0 0x95>, <&dmac0 0x94>, 29508f28288SGeert Uytterhoeven <&dmac1 0x95>, <&dmac1 0x94>; 29608f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 297ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 298ff77ba05SGeert Uytterhoeven resets = <&cpg 520>; 299ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 300ff77ba05SGeert Uytterhoeven #address-cells = <1>; 301ff77ba05SGeert Uytterhoeven #size-cells = <0>; 302ff77ba05SGeert Uytterhoeven status = "disabled"; 303ff77ba05SGeert Uytterhoeven }; 304ff77ba05SGeert Uytterhoeven 305ff77ba05SGeert Uytterhoeven i2c3: i2c@e66d0000 { 306ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 307ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 308ff77ba05SGeert Uytterhoeven reg = <0 0xe66d0000 0 0x40>; 309ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 310ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 521>; 31108f28288SGeert Uytterhoeven dmas = <&dmac0 0x97>, <&dmac0 0x96>, 31208f28288SGeert Uytterhoeven <&dmac1 0x97>, <&dmac1 0x96>; 31308f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 314ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 315ff77ba05SGeert Uytterhoeven resets = <&cpg 521>; 316ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 317ff77ba05SGeert Uytterhoeven #address-cells = <1>; 318ff77ba05SGeert Uytterhoeven #size-cells = <0>; 319ff77ba05SGeert Uytterhoeven status = "disabled"; 320ff77ba05SGeert Uytterhoeven }; 321ff77ba05SGeert Uytterhoeven 322ff77ba05SGeert Uytterhoeven i2c4: i2c@e66d8000 { 323ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 324ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 325ff77ba05SGeert Uytterhoeven reg = <0 0xe66d8000 0 0x40>; 326ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 327ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 522>; 32808f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 32908f28288SGeert Uytterhoeven dmas = <&dmac0 0x99>, <&dmac0 0x98>, 33008f28288SGeert Uytterhoeven <&dmac1 0x99>, <&dmac1 0x98>; 331ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 332ff77ba05SGeert Uytterhoeven resets = <&cpg 522>; 333ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 334ff77ba05SGeert Uytterhoeven #address-cells = <1>; 335ff77ba05SGeert Uytterhoeven #size-cells = <0>; 336ff77ba05SGeert Uytterhoeven status = "disabled"; 337ff77ba05SGeert Uytterhoeven }; 338ff77ba05SGeert Uytterhoeven 339ff77ba05SGeert Uytterhoeven i2c5: i2c@e66e0000 { 340ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 341ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 342ff77ba05SGeert Uytterhoeven reg = <0 0xe66e0000 0 0x40>; 343ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 344ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 523>; 34508f28288SGeert Uytterhoeven dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 34608f28288SGeert Uytterhoeven <&dmac1 0x9b>, <&dmac1 0x9a>; 34708f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 348ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 349ff77ba05SGeert Uytterhoeven resets = <&cpg 523>; 350ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 351ff77ba05SGeert Uytterhoeven #address-cells = <1>; 352ff77ba05SGeert Uytterhoeven #size-cells = <0>; 353ff77ba05SGeert Uytterhoeven status = "disabled"; 354ff77ba05SGeert Uytterhoeven }; 355ff77ba05SGeert Uytterhoeven 356987da486SYoshihiro Shimoda hscif0: serial@e6540000 { 357987da486SYoshihiro Shimoda compatible = "renesas,hscif-r8a779g0", 358987da486SYoshihiro Shimoda "renesas,rcar-gen4-hscif", 359987da486SYoshihiro Shimoda "renesas,hscif"; 360987da486SYoshihiro Shimoda reg = <0 0xe6540000 0 96>; 361ab2866f1SGeert Uytterhoeven interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 362987da486SYoshihiro Shimoda clocks = <&cpg CPG_MOD 514>, 363a4290d40SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 364987da486SYoshihiro Shimoda <&scif_clk>; 365987da486SYoshihiro Shimoda clock-names = "fck", "brg_int", "scif_clk"; 36608f28288SGeert Uytterhoeven dmas = <&dmac0 0x31>, <&dmac0 0x30>, 36708f28288SGeert Uytterhoeven <&dmac1 0x31>, <&dmac1 0x30>; 36808f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 369987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 370987da486SYoshihiro Shimoda resets = <&cpg 514>; 371987da486SYoshihiro Shimoda status = "disabled"; 372987da486SYoshihiro Shimoda }; 373987da486SYoshihiro Shimoda 374848c82dbSGeert Uytterhoeven avb0: ethernet@e6800000 { 375848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 376848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 377848c82dbSGeert Uytterhoeven reg = <0 0xe6800000 0 0x800>; 378848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 379848c82dbSGeert Uytterhoeven <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 380848c82dbSGeert Uytterhoeven <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 381848c82dbSGeert Uytterhoeven <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 382848c82dbSGeert Uytterhoeven <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 383848c82dbSGeert Uytterhoeven <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 384848c82dbSGeert Uytterhoeven <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 385848c82dbSGeert Uytterhoeven <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 386848c82dbSGeert Uytterhoeven <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 387848c82dbSGeert Uytterhoeven <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 388848c82dbSGeert Uytterhoeven <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 389848c82dbSGeert Uytterhoeven <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 390848c82dbSGeert Uytterhoeven <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 391848c82dbSGeert Uytterhoeven <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 392848c82dbSGeert Uytterhoeven <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 393848c82dbSGeert Uytterhoeven <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 394848c82dbSGeert Uytterhoeven <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 395848c82dbSGeert Uytterhoeven <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 396848c82dbSGeert Uytterhoeven <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 397848c82dbSGeert Uytterhoeven <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 398848c82dbSGeert Uytterhoeven <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 399848c82dbSGeert Uytterhoeven <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 400848c82dbSGeert Uytterhoeven <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 401848c82dbSGeert Uytterhoeven <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 402848c82dbSGeert Uytterhoeven <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 403848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 404848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 405848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 406848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 407848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 408848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 409848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 211>; 410848c82dbSGeert Uytterhoeven clock-names = "fck"; 411848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 412848c82dbSGeert Uytterhoeven resets = <&cpg 211>; 413848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 414848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 415848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 416848c82dbSGeert Uytterhoeven #address-cells = <1>; 417848c82dbSGeert Uytterhoeven #size-cells = <0>; 418848c82dbSGeert Uytterhoeven status = "disabled"; 419848c82dbSGeert Uytterhoeven }; 420848c82dbSGeert Uytterhoeven 421848c82dbSGeert Uytterhoeven avb1: ethernet@e6810000 { 422848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 423848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 424848c82dbSGeert Uytterhoeven reg = <0 0xe6810000 0 0x800>; 425848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 426848c82dbSGeert Uytterhoeven <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 427848c82dbSGeert Uytterhoeven <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 428848c82dbSGeert Uytterhoeven <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 429848c82dbSGeert Uytterhoeven <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 430848c82dbSGeert Uytterhoeven <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 431848c82dbSGeert Uytterhoeven <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 432848c82dbSGeert Uytterhoeven <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 433848c82dbSGeert Uytterhoeven <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 434848c82dbSGeert Uytterhoeven <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 435848c82dbSGeert Uytterhoeven <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 436848c82dbSGeert Uytterhoeven <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 437848c82dbSGeert Uytterhoeven <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 438848c82dbSGeert Uytterhoeven <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 439848c82dbSGeert Uytterhoeven <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 440848c82dbSGeert Uytterhoeven <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 441848c82dbSGeert Uytterhoeven <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 442848c82dbSGeert Uytterhoeven <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 443848c82dbSGeert Uytterhoeven <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 444848c82dbSGeert Uytterhoeven <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 445848c82dbSGeert Uytterhoeven <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 446848c82dbSGeert Uytterhoeven <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 447848c82dbSGeert Uytterhoeven <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 448848c82dbSGeert Uytterhoeven <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 449848c82dbSGeert Uytterhoeven <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 450848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 451848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 452848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 453848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 454848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 455848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 456848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 212>; 457848c82dbSGeert Uytterhoeven clock-names = "fck"; 458848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 459848c82dbSGeert Uytterhoeven resets = <&cpg 212>; 460848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 461848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 462848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 463848c82dbSGeert Uytterhoeven #address-cells = <1>; 464848c82dbSGeert Uytterhoeven #size-cells = <0>; 465848c82dbSGeert Uytterhoeven status = "disabled"; 466848c82dbSGeert Uytterhoeven }; 467848c82dbSGeert Uytterhoeven 468848c82dbSGeert Uytterhoeven avb2: ethernet@e6820000 { 469848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 470848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 471848c82dbSGeert Uytterhoeven reg = <0 0xe6820000 0 0x1000>; 472848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 473848c82dbSGeert Uytterhoeven <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 474848c82dbSGeert Uytterhoeven <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 475848c82dbSGeert Uytterhoeven <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 476848c82dbSGeert Uytterhoeven <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 477848c82dbSGeert Uytterhoeven <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 478848c82dbSGeert Uytterhoeven <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 479848c82dbSGeert Uytterhoeven <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 480848c82dbSGeert Uytterhoeven <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 481848c82dbSGeert Uytterhoeven <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 482848c82dbSGeert Uytterhoeven <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 483848c82dbSGeert Uytterhoeven <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 484848c82dbSGeert Uytterhoeven <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 485848c82dbSGeert Uytterhoeven <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 486848c82dbSGeert Uytterhoeven <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 487848c82dbSGeert Uytterhoeven <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 488848c82dbSGeert Uytterhoeven <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 489848c82dbSGeert Uytterhoeven <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 490848c82dbSGeert Uytterhoeven <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 491848c82dbSGeert Uytterhoeven <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 492848c82dbSGeert Uytterhoeven <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 493848c82dbSGeert Uytterhoeven <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 494848c82dbSGeert Uytterhoeven <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 495848c82dbSGeert Uytterhoeven <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 496848c82dbSGeert Uytterhoeven <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 497848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 498848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 499848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 500848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 501848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 502848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 503848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 213>; 504848c82dbSGeert Uytterhoeven clock-names = "fck"; 505848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 506848c82dbSGeert Uytterhoeven resets = <&cpg 213>; 507848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 508848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 509848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 510848c82dbSGeert Uytterhoeven #address-cells = <1>; 511848c82dbSGeert Uytterhoeven #size-cells = <0>; 512848c82dbSGeert Uytterhoeven status = "disabled"; 513848c82dbSGeert Uytterhoeven }; 514848c82dbSGeert Uytterhoeven 5155b9d1306SCongDang pwm0: pwm@e6e30000 { 5165b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 5175b9d1306SCongDang reg = <0 0xe6e30000 0 0x10>; 5185b9d1306SCongDang #pwm-cells = <2>; 5195b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 5205b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 5215b9d1306SCongDang resets = <&cpg 628>; 5225b9d1306SCongDang status = "disabled"; 5235b9d1306SCongDang }; 5245b9d1306SCongDang 5255b9d1306SCongDang pwm1: pwm@e6e31000 { 5265b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 5275b9d1306SCongDang reg = <0 0xe6e31000 0 0x10>; 5285b9d1306SCongDang #pwm-cells = <2>; 5295b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 5305b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 5315b9d1306SCongDang resets = <&cpg 628>; 5325b9d1306SCongDang status = "disabled"; 5335b9d1306SCongDang }; 5345b9d1306SCongDang 5355b9d1306SCongDang pwm2: pwm@e6e32000 { 5365b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 5375b9d1306SCongDang reg = <0 0xe6e32000 0 0x10>; 5385b9d1306SCongDang #pwm-cells = <2>; 5395b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 5405b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 5415b9d1306SCongDang resets = <&cpg 628>; 5425b9d1306SCongDang status = "disabled"; 5435b9d1306SCongDang }; 5445b9d1306SCongDang 5455b9d1306SCongDang pwm3: pwm@e6e33000 { 5465b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 5475b9d1306SCongDang reg = <0 0xe6e33000 0 0x10>; 5485b9d1306SCongDang #pwm-cells = <2>; 5495b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 5505b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 5515b9d1306SCongDang resets = <&cpg 628>; 5525b9d1306SCongDang status = "disabled"; 5535b9d1306SCongDang }; 5545b9d1306SCongDang 5555b9d1306SCongDang pwm4: pwm@e6e34000 { 5565b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 5575b9d1306SCongDang reg = <0 0xe6e34000 0 0x10>; 5585b9d1306SCongDang #pwm-cells = <2>; 5595b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 5605b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 5615b9d1306SCongDang resets = <&cpg 628>; 5625b9d1306SCongDang status = "disabled"; 5635b9d1306SCongDang }; 5645b9d1306SCongDang 5655b9d1306SCongDang pwm5: pwm@e6e35000 { 5665b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 5675b9d1306SCongDang reg = <0 0xe6e35000 0 0x10>; 5685b9d1306SCongDang #pwm-cells = <2>; 5695b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 5705b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 5715b9d1306SCongDang resets = <&cpg 628>; 5725b9d1306SCongDang status = "disabled"; 5735b9d1306SCongDang }; 5745b9d1306SCongDang 5755b9d1306SCongDang pwm6: pwm@e6e36000 { 5765b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 5775b9d1306SCongDang reg = <0 0xe6e36000 0 0x10>; 5785b9d1306SCongDang #pwm-cells = <2>; 5795b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 5805b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 5815b9d1306SCongDang resets = <&cpg 628>; 5825b9d1306SCongDang status = "disabled"; 5835b9d1306SCongDang }; 5845b9d1306SCongDang 5855b9d1306SCongDang pwm7: pwm@e6e37000 { 5865b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 5875b9d1306SCongDang reg = <0 0xe6e37000 0 0x10>; 5885b9d1306SCongDang #pwm-cells = <2>; 5895b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 5905b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 5915b9d1306SCongDang resets = <&cpg 628>; 5925b9d1306SCongDang status = "disabled"; 5935b9d1306SCongDang }; 5945b9d1306SCongDang 5955b9d1306SCongDang pwm8: pwm@e6e38000 { 5965b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 5975b9d1306SCongDang reg = <0 0xe6e38000 0 0x10>; 5985b9d1306SCongDang #pwm-cells = <2>; 5995b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 6005b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6015b9d1306SCongDang resets = <&cpg 628>; 6025b9d1306SCongDang status = "disabled"; 6035b9d1306SCongDang }; 6045b9d1306SCongDang 6055b9d1306SCongDang pwm9: pwm@e6e39000 { 6065b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 6075b9d1306SCongDang reg = <0 0xe6e39000 0 0x10>; 6085b9d1306SCongDang #pwm-cells = <2>; 6095b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 6105b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6115b9d1306SCongDang resets = <&cpg 628>; 6125b9d1306SCongDang status = "disabled"; 6135b9d1306SCongDang }; 6145b9d1306SCongDang 615*a4c31c56SGeert Uytterhoeven scif0: serial@e6e60000 { 616*a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 617*a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 618*a4c31c56SGeert Uytterhoeven reg = <0 0xe6e60000 0 64>; 619*a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 620*a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 702>, 621*a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 622*a4c31c56SGeert Uytterhoeven <&scif_clk>; 623*a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 624*a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x51>, <&dmac0 0x50>, 625*a4c31c56SGeert Uytterhoeven <&dmac1 0x51>, <&dmac1 0x50>; 626*a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 627*a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 628*a4c31c56SGeert Uytterhoeven resets = <&cpg 702>; 629*a4c31c56SGeert Uytterhoeven status = "disabled"; 630*a4c31c56SGeert Uytterhoeven }; 631*a4c31c56SGeert Uytterhoeven 632*a4c31c56SGeert Uytterhoeven scif1: serial@e6e68000 { 633*a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 634*a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 635*a4c31c56SGeert Uytterhoeven reg = <0 0xe6e68000 0 64>; 636*a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 637*a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 703>, 638*a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 639*a4c31c56SGeert Uytterhoeven <&scif_clk>; 640*a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 641*a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x53>, <&dmac0 0x52>, 642*a4c31c56SGeert Uytterhoeven <&dmac1 0x53>, <&dmac1 0x52>; 643*a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 644*a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 645*a4c31c56SGeert Uytterhoeven resets = <&cpg 703>; 646*a4c31c56SGeert Uytterhoeven status = "disabled"; 647*a4c31c56SGeert Uytterhoeven }; 648*a4c31c56SGeert Uytterhoeven 649*a4c31c56SGeert Uytterhoeven scif3: serial@e6c50000 { 650*a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 651*a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 652*a4c31c56SGeert Uytterhoeven reg = <0 0xe6c50000 0 64>; 653*a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 654*a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 704>, 655*a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 656*a4c31c56SGeert Uytterhoeven <&scif_clk>; 657*a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 658*a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x57>, <&dmac0 0x56>, 659*a4c31c56SGeert Uytterhoeven <&dmac1 0x57>, <&dmac1 0x56>; 660*a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 661*a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 662*a4c31c56SGeert Uytterhoeven resets = <&cpg 704>; 663*a4c31c56SGeert Uytterhoeven status = "disabled"; 664*a4c31c56SGeert Uytterhoeven }; 665*a4c31c56SGeert Uytterhoeven 666*a4c31c56SGeert Uytterhoeven scif4: serial@e6c40000 { 667*a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 668*a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 669*a4c31c56SGeert Uytterhoeven reg = <0 0xe6c40000 0 64>; 670*a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 671*a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 705>, 672*a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 673*a4c31c56SGeert Uytterhoeven <&scif_clk>; 674*a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 675*a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x59>, <&dmac0 0x58>, 676*a4c31c56SGeert Uytterhoeven <&dmac1 0x59>, <&dmac1 0x58>; 677*a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 678*a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 679*a4c31c56SGeert Uytterhoeven resets = <&cpg 705>; 680*a4c31c56SGeert Uytterhoeven status = "disabled"; 681*a4c31c56SGeert Uytterhoeven }; 682*a4c31c56SGeert Uytterhoeven 6834a76d4abSCongDang tpu: pwm@e6e80000 { 6844a76d4abSCongDang compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 6854a76d4abSCongDang reg = <0 0xe6e80000 0 0x148>; 6864a76d4abSCongDang interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 6874a76d4abSCongDang clocks = <&cpg CPG_MOD 718>; 6884a76d4abSCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6894a76d4abSCongDang resets = <&cpg 718>; 6904a76d4abSCongDang #pwm-cells = <3>; 6914a76d4abSCongDang status = "disabled"; 6924a76d4abSCongDang }; 6934a76d4abSCongDang 694e0768073SGeert Uytterhoeven msiof0: spi@e6e90000 { 695e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 696e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 697e0768073SGeert Uytterhoeven reg = <0 0xe6e90000 0 0x0064>; 698e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 699e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 618>; 700e0768073SGeert Uytterhoeven dmas = <&dmac0 0x41>, <&dmac0 0x40>, 701e0768073SGeert Uytterhoeven <&dmac1 0x41>, <&dmac1 0x40>; 702e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 703e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 704e0768073SGeert Uytterhoeven resets = <&cpg 618>; 705e0768073SGeert Uytterhoeven #address-cells = <1>; 706e0768073SGeert Uytterhoeven #size-cells = <0>; 707e0768073SGeert Uytterhoeven status = "disabled"; 708e0768073SGeert Uytterhoeven }; 709e0768073SGeert Uytterhoeven 710e0768073SGeert Uytterhoeven msiof1: spi@e6ea0000 { 711e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 712e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 713e0768073SGeert Uytterhoeven reg = <0 0xe6ea0000 0 0x0064>; 714e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 715e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 619>; 716e0768073SGeert Uytterhoeven dmas = <&dmac0 0x43>, <&dmac0 0x42>, 717e0768073SGeert Uytterhoeven <&dmac1 0x43>, <&dmac1 0x42>; 718e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 719e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 720e0768073SGeert Uytterhoeven resets = <&cpg 619>; 721e0768073SGeert Uytterhoeven #address-cells = <1>; 722e0768073SGeert Uytterhoeven #size-cells = <0>; 723e0768073SGeert Uytterhoeven status = "disabled"; 724e0768073SGeert Uytterhoeven }; 725e0768073SGeert Uytterhoeven 726e0768073SGeert Uytterhoeven msiof2: spi@e6c00000 { 727e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 728e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 729e0768073SGeert Uytterhoeven reg = <0 0xe6c00000 0 0x0064>; 730e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 731e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 620>; 732e0768073SGeert Uytterhoeven dmas = <&dmac0 0x45>, <&dmac0 0x44>, 733e0768073SGeert Uytterhoeven <&dmac1 0x45>, <&dmac1 0x44>; 734e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 735e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 736e0768073SGeert Uytterhoeven resets = <&cpg 620>; 737e0768073SGeert Uytterhoeven #address-cells = <1>; 738e0768073SGeert Uytterhoeven #size-cells = <0>; 739e0768073SGeert Uytterhoeven status = "disabled"; 740e0768073SGeert Uytterhoeven }; 741e0768073SGeert Uytterhoeven 742e0768073SGeert Uytterhoeven msiof3: spi@e6c10000 { 743e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 744e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 745e0768073SGeert Uytterhoeven reg = <0 0xe6c10000 0 0x0064>; 746e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 747e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 621>; 748e0768073SGeert Uytterhoeven dmas = <&dmac0 0x47>, <&dmac0 0x46>, 749e0768073SGeert Uytterhoeven <&dmac1 0x47>, <&dmac1 0x46>; 750e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 751e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 752e0768073SGeert Uytterhoeven resets = <&cpg 621>; 753e0768073SGeert Uytterhoeven #address-cells = <1>; 754e0768073SGeert Uytterhoeven #size-cells = <0>; 755e0768073SGeert Uytterhoeven status = "disabled"; 756e0768073SGeert Uytterhoeven }; 757e0768073SGeert Uytterhoeven 758e0768073SGeert Uytterhoeven msiof4: spi@e6c20000 { 759e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 760e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 761e0768073SGeert Uytterhoeven reg = <0 0xe6c20000 0 0x0064>; 762e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 763e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 622>; 764e0768073SGeert Uytterhoeven dmas = <&dmac0 0x49>, <&dmac0 0x48>, 765e0768073SGeert Uytterhoeven <&dmac1 0x49>, <&dmac1 0x48>; 766e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 767e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 768e0768073SGeert Uytterhoeven resets = <&cpg 622>; 769e0768073SGeert Uytterhoeven #address-cells = <1>; 770e0768073SGeert Uytterhoeven #size-cells = <0>; 771e0768073SGeert Uytterhoeven status = "disabled"; 772e0768073SGeert Uytterhoeven }; 773e0768073SGeert Uytterhoeven 774e0768073SGeert Uytterhoeven msiof5: spi@e6c28000 { 775e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 776e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 777e0768073SGeert Uytterhoeven reg = <0 0xe6c28000 0 0x0064>; 778e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 779e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 623>; 780e0768073SGeert Uytterhoeven dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 781e0768073SGeert Uytterhoeven <&dmac1 0x4b>, <&dmac1 0x4a>; 782e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 783e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 784e0768073SGeert Uytterhoeven resets = <&cpg 623>; 785e0768073SGeert Uytterhoeven #address-cells = <1>; 786e0768073SGeert Uytterhoeven #size-cells = <0>; 787e0768073SGeert Uytterhoeven status = "disabled"; 788e0768073SGeert Uytterhoeven }; 789e0768073SGeert Uytterhoeven 79008f28288SGeert Uytterhoeven dmac0: dma-controller@e7350000 { 79108f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 79208f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 79308f28288SGeert Uytterhoeven reg = <0 0xe7350000 0 0x1000>, 79408f28288SGeert Uytterhoeven <0 0xe7300000 0 0x10000>; 79508f28288SGeert Uytterhoeven interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 79608f28288SGeert Uytterhoeven <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 79708f28288SGeert Uytterhoeven <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 79808f28288SGeert Uytterhoeven <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 79908f28288SGeert Uytterhoeven <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 80008f28288SGeert Uytterhoeven <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 80108f28288SGeert Uytterhoeven <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 80208f28288SGeert Uytterhoeven <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 80308f28288SGeert Uytterhoeven <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 80408f28288SGeert Uytterhoeven <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 80508f28288SGeert Uytterhoeven <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 80608f28288SGeert Uytterhoeven <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 80708f28288SGeert Uytterhoeven <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 80808f28288SGeert Uytterhoeven <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 80908f28288SGeert Uytterhoeven <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 81008f28288SGeert Uytterhoeven <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 81108f28288SGeert Uytterhoeven <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 81208f28288SGeert Uytterhoeven interrupt-names = "error", 81308f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 81408f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 81508f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 81608f28288SGeert Uytterhoeven "ch14", "ch15"; 81708f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 709>; 81808f28288SGeert Uytterhoeven clock-names = "fck"; 81908f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 82008f28288SGeert Uytterhoeven resets = <&cpg 709>; 82108f28288SGeert Uytterhoeven #dma-cells = <1>; 82208f28288SGeert Uytterhoeven dma-channels = <16>; 82308f28288SGeert Uytterhoeven }; 82408f28288SGeert Uytterhoeven 82508f28288SGeert Uytterhoeven dmac1: dma-controller@e7351000 { 82608f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 82708f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 82808f28288SGeert Uytterhoeven reg = <0 0xe7351000 0 0x1000>, 82908f28288SGeert Uytterhoeven <0 0xe7310000 0 0x10000>; 83008f28288SGeert Uytterhoeven interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 83108f28288SGeert Uytterhoeven <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 83208f28288SGeert Uytterhoeven <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 83308f28288SGeert Uytterhoeven <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 83408f28288SGeert Uytterhoeven <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 83508f28288SGeert Uytterhoeven <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 83608f28288SGeert Uytterhoeven <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 83708f28288SGeert Uytterhoeven <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 83808f28288SGeert Uytterhoeven <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 83908f28288SGeert Uytterhoeven <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 84008f28288SGeert Uytterhoeven <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 84108f28288SGeert Uytterhoeven <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 84208f28288SGeert Uytterhoeven <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 84308f28288SGeert Uytterhoeven <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 84408f28288SGeert Uytterhoeven <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 84508f28288SGeert Uytterhoeven <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 84608f28288SGeert Uytterhoeven <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 84708f28288SGeert Uytterhoeven interrupt-names = "error", 84808f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 84908f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 85008f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 85108f28288SGeert Uytterhoeven "ch14", "ch15"; 85208f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 710>; 85308f28288SGeert Uytterhoeven clock-names = "fck"; 85408f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 85508f28288SGeert Uytterhoeven resets = <&cpg 710>; 85608f28288SGeert Uytterhoeven #dma-cells = <1>; 85708f28288SGeert Uytterhoeven dma-channels = <16>; 85808f28288SGeert Uytterhoeven }; 85908f28288SGeert Uytterhoeven 860bc7bf913SGeert Uytterhoeven mmc0: mmc@ee140000 { 861bc7bf913SGeert Uytterhoeven compatible = "renesas,sdhi-r8a779g0", 862bc7bf913SGeert Uytterhoeven "renesas,rcar-gen4-sdhi"; 863bc7bf913SGeert Uytterhoeven reg = <0 0xee140000 0 0x2000>; 864bc7bf913SGeert Uytterhoeven interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 865bc7bf913SGeert Uytterhoeven clocks = <&cpg CPG_MOD 706>, 866bc7bf913SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 867bc7bf913SGeert Uytterhoeven clock-names = "core", "clkh"; 868bc7bf913SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 869bc7bf913SGeert Uytterhoeven resets = <&cpg 706>; 870bc7bf913SGeert Uytterhoeven max-frequency = <200000000>; 871bc7bf913SGeert Uytterhoeven status = "disabled"; 872bc7bf913SGeert Uytterhoeven }; 873bc7bf913SGeert Uytterhoeven 874d5014bedSHai Pham rpc: spi@ee200000 { 875d5014bedSHai Pham compatible = "renesas,r8a779g0-rpc-if", 876d5014bedSHai Pham "renesas,rcar-gen4-rpc-if"; 877d5014bedSHai Pham reg = <0 0xee200000 0 0x200>, 878d5014bedSHai Pham <0 0x08000000 0 0x04000000>, 879d5014bedSHai Pham <0 0xee208000 0 0x100>; 880d5014bedSHai Pham reg-names = "regs", "dirmap", "wbuf"; 881d5014bedSHai Pham interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 882d5014bedSHai Pham clocks = <&cpg CPG_MOD 629>; 883d5014bedSHai Pham power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 884d5014bedSHai Pham resets = <&cpg 629>; 885d5014bedSHai Pham #address-cells = <1>; 886d5014bedSHai Pham #size-cells = <0>; 887d5014bedSHai Pham status = "disabled"; 888d5014bedSHai Pham }; 889d5014bedSHai Pham 890987da486SYoshihiro Shimoda gic: interrupt-controller@f1000000 { 891987da486SYoshihiro Shimoda compatible = "arm,gic-v3"; 892987da486SYoshihiro Shimoda #interrupt-cells = <3>; 893987da486SYoshihiro Shimoda #address-cells = <0>; 894987da486SYoshihiro Shimoda interrupt-controller; 895987da486SYoshihiro Shimoda reg = <0x0 0xf1000000 0 0x20000>, 896987da486SYoshihiro Shimoda <0x0 0xf1060000 0 0x110000>; 897987da486SYoshihiro Shimoda interrupts = <GIC_PPI 9 898987da486SYoshihiro Shimoda (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 899987da486SYoshihiro Shimoda }; 900987da486SYoshihiro Shimoda 901987da486SYoshihiro Shimoda prr: chipid@fff00044 { 902987da486SYoshihiro Shimoda compatible = "renesas,prr"; 903987da486SYoshihiro Shimoda reg = <0 0xfff00044 0 4>; 904987da486SYoshihiro Shimoda }; 905987da486SYoshihiro Shimoda }; 906987da486SYoshihiro Shimoda 907987da486SYoshihiro Shimoda timer { 908987da486SYoshihiro Shimoda compatible = "arm,armv8-timer"; 909987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 910987da486SYoshihiro Shimoda <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 911987da486SYoshihiro Shimoda <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 912987da486SYoshihiro Shimoda <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 913987da486SYoshihiro Shimoda }; 914987da486SYoshihiro Shimoda}; 915