1987da486SYoshihiro Shimoda// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2987da486SYoshihiro Shimoda/* 3987da486SYoshihiro Shimoda * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4987da486SYoshihiro Shimoda * 5987da486SYoshihiro Shimoda * Copyright (C) 2022 Renesas Electronics Corp. 6987da486SYoshihiro Shimoda */ 7987da486SYoshihiro Shimoda 8987da486SYoshihiro Shimoda#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9987da486SYoshihiro Shimoda#include <dt-bindings/interrupt-controller/arm-gic.h> 10987da486SYoshihiro Shimoda#include <dt-bindings/power/r8a779g0-sysc.h> 11987da486SYoshihiro Shimoda 12987da486SYoshihiro Shimoda/ { 13987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0"; 14987da486SYoshihiro Shimoda #address-cells = <2>; 15987da486SYoshihiro Shimoda #size-cells = <2>; 16987da486SYoshihiro Shimoda 17*9a0e6306SGeert Uytterhoeven cluster0_opp: opp-table-0 { 18*9a0e6306SGeert Uytterhoeven compatible = "operating-points-v2"; 19*9a0e6306SGeert Uytterhoeven opp-shared; 20*9a0e6306SGeert Uytterhoeven 21*9a0e6306SGeert Uytterhoeven opp-500000000 { 22*9a0e6306SGeert Uytterhoeven opp-hz = /bits/ 64 <500000000>; 23*9a0e6306SGeert Uytterhoeven opp-microvolt = <825000>; 24*9a0e6306SGeert Uytterhoeven clock-latency-ns = <500000>; 25*9a0e6306SGeert Uytterhoeven }; 26*9a0e6306SGeert Uytterhoeven opp-1000000000 { 27*9a0e6306SGeert Uytterhoeven opp-hz = /bits/ 64 <1000000000>; 28*9a0e6306SGeert Uytterhoeven opp-microvolt = <825000>; 29*9a0e6306SGeert Uytterhoeven clock-latency-ns = <500000>; 30*9a0e6306SGeert Uytterhoeven }; 31*9a0e6306SGeert Uytterhoeven opp-1500000000 { 32*9a0e6306SGeert Uytterhoeven opp-hz = /bits/ 64 <1500000000>; 33*9a0e6306SGeert Uytterhoeven opp-microvolt = <825000>; 34*9a0e6306SGeert Uytterhoeven clock-latency-ns = <500000>; 35*9a0e6306SGeert Uytterhoeven }; 36*9a0e6306SGeert Uytterhoeven opp-1700000000 { 37*9a0e6306SGeert Uytterhoeven opp-hz = /bits/ 64 <1700000000>; 38*9a0e6306SGeert Uytterhoeven opp-microvolt = <825000>; 39*9a0e6306SGeert Uytterhoeven clock-latency-ns = <500000>; 40*9a0e6306SGeert Uytterhoeven opp-suspend; 41*9a0e6306SGeert Uytterhoeven }; 42*9a0e6306SGeert Uytterhoeven }; 43*9a0e6306SGeert Uytterhoeven 44987da486SYoshihiro Shimoda cpus { 45987da486SYoshihiro Shimoda #address-cells = <1>; 46987da486SYoshihiro Shimoda #size-cells = <0>; 47987da486SYoshihiro Shimoda 4868c9c53dSGeert Uytterhoeven cpu-map { 4968c9c53dSGeert Uytterhoeven cluster0 { 5068c9c53dSGeert Uytterhoeven core0 { 5168c9c53dSGeert Uytterhoeven cpu = <&a76_0>; 5268c9c53dSGeert Uytterhoeven }; 5368c9c53dSGeert Uytterhoeven core1 { 5468c9c53dSGeert Uytterhoeven cpu = <&a76_1>; 5568c9c53dSGeert Uytterhoeven }; 5668c9c53dSGeert Uytterhoeven }; 5768c9c53dSGeert Uytterhoeven 5868c9c53dSGeert Uytterhoeven cluster1 { 5968c9c53dSGeert Uytterhoeven core0 { 6068c9c53dSGeert Uytterhoeven cpu = <&a76_2>; 6168c9c53dSGeert Uytterhoeven }; 6268c9c53dSGeert Uytterhoeven core1 { 6368c9c53dSGeert Uytterhoeven cpu = <&a76_3>; 6468c9c53dSGeert Uytterhoeven }; 6568c9c53dSGeert Uytterhoeven }; 6668c9c53dSGeert Uytterhoeven }; 6768c9c53dSGeert Uytterhoeven 68987da486SYoshihiro Shimoda a76_0: cpu@0 { 69987da486SYoshihiro Shimoda compatible = "arm,cortex-a76"; 70987da486SYoshihiro Shimoda reg = <0>; 71987da486SYoshihiro Shimoda device_type = "cpu"; 72987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 73f0840721SGeert Uytterhoeven next-level-cache = <&L3_CA76_0>; 7468c9c53dSGeert Uytterhoeven enable-method = "psci"; 755bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 76ee8ce199SGeert Uytterhoeven clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 77*9a0e6306SGeert Uytterhoeven operating-points-v2 = <&cluster0_opp>; 7868c9c53dSGeert Uytterhoeven }; 7968c9c53dSGeert Uytterhoeven 8068c9c53dSGeert Uytterhoeven a76_1: cpu@100 { 8168c9c53dSGeert Uytterhoeven compatible = "arm,cortex-a76"; 8268c9c53dSGeert Uytterhoeven reg = <0x100>; 8368c9c53dSGeert Uytterhoeven device_type = "cpu"; 8468c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 8568c9c53dSGeert Uytterhoeven next-level-cache = <&L3_CA76_0>; 8668c9c53dSGeert Uytterhoeven enable-method = "psci"; 875bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 88ee8ce199SGeert Uytterhoeven clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 89*9a0e6306SGeert Uytterhoeven operating-points-v2 = <&cluster0_opp>; 9068c9c53dSGeert Uytterhoeven }; 9168c9c53dSGeert Uytterhoeven 9268c9c53dSGeert Uytterhoeven a76_2: cpu@10000 { 9368c9c53dSGeert Uytterhoeven compatible = "arm,cortex-a76"; 9468c9c53dSGeert Uytterhoeven reg = <0x10000>; 9568c9c53dSGeert Uytterhoeven device_type = "cpu"; 9668c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 9768c9c53dSGeert Uytterhoeven next-level-cache = <&L3_CA76_1>; 9868c9c53dSGeert Uytterhoeven enable-method = "psci"; 995bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 100ee8ce199SGeert Uytterhoeven clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 101*9a0e6306SGeert Uytterhoeven operating-points-v2 = <&cluster0_opp>; 10268c9c53dSGeert Uytterhoeven }; 10368c9c53dSGeert Uytterhoeven 10468c9c53dSGeert Uytterhoeven a76_3: cpu@10100 { 10568c9c53dSGeert Uytterhoeven compatible = "arm,cortex-a76"; 10668c9c53dSGeert Uytterhoeven reg = <0x10100>; 10768c9c53dSGeert Uytterhoeven device_type = "cpu"; 10868c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 10968c9c53dSGeert Uytterhoeven next-level-cache = <&L3_CA76_1>; 11068c9c53dSGeert Uytterhoeven enable-method = "psci"; 1115bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 112ee8ce199SGeert Uytterhoeven clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 113*9a0e6306SGeert Uytterhoeven operating-points-v2 = <&cluster0_opp>; 1145bb355a8SGeert Uytterhoeven }; 1155bb355a8SGeert Uytterhoeven 1165bb355a8SGeert Uytterhoeven idle-states { 1175bb355a8SGeert Uytterhoeven entry-method = "psci"; 1185bb355a8SGeert Uytterhoeven 1195bb355a8SGeert Uytterhoeven CPU_SLEEP_0: cpu-sleep-0 { 1205bb355a8SGeert Uytterhoeven compatible = "arm,idle-state"; 1215bb355a8SGeert Uytterhoeven arm,psci-suspend-param = <0x0010000>; 1225bb355a8SGeert Uytterhoeven local-timer-stop; 1235bb355a8SGeert Uytterhoeven entry-latency-us = <400>; 1245bb355a8SGeert Uytterhoeven exit-latency-us = <500>; 1255bb355a8SGeert Uytterhoeven min-residency-us = <4000>; 1265bb355a8SGeert Uytterhoeven }; 127f0840721SGeert Uytterhoeven }; 128f0840721SGeert Uytterhoeven 129f0840721SGeert Uytterhoeven L3_CA76_0: cache-controller-0 { 130f0840721SGeert Uytterhoeven compatible = "cache"; 131f0840721SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A2E0D0>; 132f0840721SGeert Uytterhoeven cache-unified; 133f0840721SGeert Uytterhoeven cache-level = <3>; 134987da486SYoshihiro Shimoda }; 13568c9c53dSGeert Uytterhoeven 13668c9c53dSGeert Uytterhoeven L3_CA76_1: cache-controller-1 { 13768c9c53dSGeert Uytterhoeven compatible = "cache"; 13868c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A2E0D1>; 13968c9c53dSGeert Uytterhoeven cache-unified; 14068c9c53dSGeert Uytterhoeven cache-level = <3>; 14168c9c53dSGeert Uytterhoeven }; 14268c9c53dSGeert Uytterhoeven }; 14368c9c53dSGeert Uytterhoeven 14468c9c53dSGeert Uytterhoeven psci { 14568c9c53dSGeert Uytterhoeven compatible = "arm,psci-1.0", "arm,psci-0.2"; 14668c9c53dSGeert Uytterhoeven method = "smc"; 147987da486SYoshihiro Shimoda }; 148987da486SYoshihiro Shimoda 149987da486SYoshihiro Shimoda extal_clk: extal { 150987da486SYoshihiro Shimoda compatible = "fixed-clock"; 151987da486SYoshihiro Shimoda #clock-cells = <0>; 152987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 153987da486SYoshihiro Shimoda clock-frequency = <0>; 154987da486SYoshihiro Shimoda }; 155987da486SYoshihiro Shimoda 156987da486SYoshihiro Shimoda extalr_clk: extalr { 157987da486SYoshihiro Shimoda compatible = "fixed-clock"; 158987da486SYoshihiro Shimoda #clock-cells = <0>; 159987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 160987da486SYoshihiro Shimoda clock-frequency = <0>; 161987da486SYoshihiro Shimoda }; 162987da486SYoshihiro Shimoda 163987da486SYoshihiro Shimoda pmu_a76 { 164987da486SYoshihiro Shimoda compatible = "arm,cortex-a76-pmu"; 165987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 166987da486SYoshihiro Shimoda }; 167987da486SYoshihiro Shimoda 168987da486SYoshihiro Shimoda /* External SCIF clock - to be overridden by boards that provide it */ 169987da486SYoshihiro Shimoda scif_clk: scif { 170987da486SYoshihiro Shimoda compatible = "fixed-clock"; 171987da486SYoshihiro Shimoda #clock-cells = <0>; 172987da486SYoshihiro Shimoda clock-frequency = <0>; 173987da486SYoshihiro Shimoda }; 174987da486SYoshihiro Shimoda 175987da486SYoshihiro Shimoda soc: soc { 176987da486SYoshihiro Shimoda compatible = "simple-bus"; 177987da486SYoshihiro Shimoda interrupt-parent = <&gic>; 178987da486SYoshihiro Shimoda #address-cells = <2>; 179987da486SYoshihiro Shimoda #size-cells = <2>; 180987da486SYoshihiro Shimoda ranges; 181987da486SYoshihiro Shimoda 182a43306faSGeert Uytterhoeven rwdt: watchdog@e6020000 { 183a43306faSGeert Uytterhoeven compatible = "renesas,r8a779g0-wdt", 184a43306faSGeert Uytterhoeven "renesas,rcar-gen4-wdt"; 185a43306faSGeert Uytterhoeven reg = <0 0xe6020000 0 0x0c>; 186a43306faSGeert Uytterhoeven interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 187a43306faSGeert Uytterhoeven clocks = <&cpg CPG_MOD 907>; 188a43306faSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 189a43306faSGeert Uytterhoeven resets = <&cpg 907>; 190a43306faSGeert Uytterhoeven status = "disabled"; 191a43306faSGeert Uytterhoeven }; 192a43306faSGeert Uytterhoeven 1934cebce25SGeert Uytterhoeven pfc: pinctrl@e6050000 { 1944cebce25SGeert Uytterhoeven compatible = "renesas,pfc-r8a779g0"; 1954cebce25SGeert Uytterhoeven reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 1964cebce25SGeert Uytterhoeven <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 1974cebce25SGeert Uytterhoeven <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 1984cebce25SGeert Uytterhoeven <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 1994cebce25SGeert Uytterhoeven <0 0xe6068000 0 0x16c>; 2004cebce25SGeert Uytterhoeven }; 2014cebce25SGeert Uytterhoeven 202120c7a58SGeert Uytterhoeven gpio0: gpio@e6050180 { 203120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 204120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 205120c7a58SGeert Uytterhoeven reg = <0 0xe6050180 0 0x54>; 206120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 207120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 208120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 209120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 210120c7a58SGeert Uytterhoeven gpio-controller; 211120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 212120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 0 19>; 213120c7a58SGeert Uytterhoeven interrupt-controller; 214120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 215120c7a58SGeert Uytterhoeven }; 216120c7a58SGeert Uytterhoeven 217120c7a58SGeert Uytterhoeven gpio1: gpio@e6050980 { 218120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 219120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 220120c7a58SGeert Uytterhoeven reg = <0 0xe6050980 0 0x54>; 221120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 222120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 223120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 224120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 225120c7a58SGeert Uytterhoeven gpio-controller; 226120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 227120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 32 29>; 228120c7a58SGeert Uytterhoeven interrupt-controller; 229120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 230120c7a58SGeert Uytterhoeven }; 231120c7a58SGeert Uytterhoeven 232120c7a58SGeert Uytterhoeven gpio2: gpio@e6058180 { 233120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 234120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 235120c7a58SGeert Uytterhoeven reg = <0 0xe6058180 0 0x54>; 236120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 237120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 238120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 239120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 240120c7a58SGeert Uytterhoeven gpio-controller; 241120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 242120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 64 20>; 243120c7a58SGeert Uytterhoeven interrupt-controller; 244120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 245120c7a58SGeert Uytterhoeven }; 246120c7a58SGeert Uytterhoeven 247120c7a58SGeert Uytterhoeven gpio3: gpio@e6058980 { 248120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 249120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 250120c7a58SGeert Uytterhoeven reg = <0 0xe6058980 0 0x54>; 251120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 252120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 253120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 254120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 255120c7a58SGeert Uytterhoeven gpio-controller; 256120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 257120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 96 30>; 258120c7a58SGeert Uytterhoeven interrupt-controller; 259120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 260120c7a58SGeert Uytterhoeven }; 261120c7a58SGeert Uytterhoeven 262120c7a58SGeert Uytterhoeven gpio4: gpio@e6060180 { 263120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 264120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 265120c7a58SGeert Uytterhoeven reg = <0 0xe6060180 0 0x54>; 266120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 267120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 268120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 269120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 270120c7a58SGeert Uytterhoeven gpio-controller; 271120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 272120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 128 25>; 273120c7a58SGeert Uytterhoeven interrupt-controller; 274120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 275120c7a58SGeert Uytterhoeven }; 276120c7a58SGeert Uytterhoeven 277120c7a58SGeert Uytterhoeven gpio5: gpio@e6060980 { 278120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 279120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 280120c7a58SGeert Uytterhoeven reg = <0 0xe6060980 0 0x54>; 281120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 282120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 283120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 284120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 285120c7a58SGeert Uytterhoeven gpio-controller; 286120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 287120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 160 21>; 288120c7a58SGeert Uytterhoeven interrupt-controller; 289120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 290120c7a58SGeert Uytterhoeven }; 291120c7a58SGeert Uytterhoeven 292120c7a58SGeert Uytterhoeven gpio6: gpio@e6061180 { 293120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 294120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 295120c7a58SGeert Uytterhoeven reg = <0 0xe6061180 0 0x54>; 296120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 297120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 298120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 299120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 300120c7a58SGeert Uytterhoeven gpio-controller; 301120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 302120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 192 21>; 303120c7a58SGeert Uytterhoeven interrupt-controller; 304120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 305120c7a58SGeert Uytterhoeven }; 306120c7a58SGeert Uytterhoeven 307120c7a58SGeert Uytterhoeven gpio7: gpio@e6061980 { 308120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 309120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 310120c7a58SGeert Uytterhoeven reg = <0 0xe6061980 0 0x54>; 311120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 312120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 313120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 314120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 315120c7a58SGeert Uytterhoeven gpio-controller; 316120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 317120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 224 21>; 318120c7a58SGeert Uytterhoeven interrupt-controller; 319120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 320120c7a58SGeert Uytterhoeven }; 321120c7a58SGeert Uytterhoeven 322120c7a58SGeert Uytterhoeven gpio8: gpio@e6068180 { 323120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 324120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 325120c7a58SGeert Uytterhoeven reg = <0 0xe6068180 0 0x54>; 326120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 327120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 918>; 328120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 329120c7a58SGeert Uytterhoeven resets = <&cpg 918>; 330120c7a58SGeert Uytterhoeven gpio-controller; 331120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 332120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 256 14>; 333120c7a58SGeert Uytterhoeven interrupt-controller; 334120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 335120c7a58SGeert Uytterhoeven }; 336120c7a58SGeert Uytterhoeven 33740a6dd7bSThanh Quan cmt0: timer@e60f0000 { 33840a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt0", 33940a6dd7bSThanh Quan "renesas,rcar-gen4-cmt0"; 34040a6dd7bSThanh Quan reg = <0 0xe60f0000 0 0x1004>; 34140a6dd7bSThanh Quan interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 34240a6dd7bSThanh Quan <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 34340a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 910>; 34440a6dd7bSThanh Quan clock-names = "fck"; 34540a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 34640a6dd7bSThanh Quan resets = <&cpg 910>; 34740a6dd7bSThanh Quan status = "disabled"; 34840a6dd7bSThanh Quan }; 34940a6dd7bSThanh Quan 35040a6dd7bSThanh Quan cmt1: timer@e6130000 { 35140a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 35240a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 35340a6dd7bSThanh Quan reg = <0 0xe6130000 0 0x1004>; 35440a6dd7bSThanh Quan interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 35540a6dd7bSThanh Quan <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 35640a6dd7bSThanh Quan <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 35740a6dd7bSThanh Quan <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 35840a6dd7bSThanh Quan <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 35940a6dd7bSThanh Quan <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 36040a6dd7bSThanh Quan <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 36140a6dd7bSThanh Quan <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 36240a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 911>; 36340a6dd7bSThanh Quan clock-names = "fck"; 36440a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 36540a6dd7bSThanh Quan resets = <&cpg 911>; 36640a6dd7bSThanh Quan status = "disabled"; 36740a6dd7bSThanh Quan }; 36840a6dd7bSThanh Quan 36940a6dd7bSThanh Quan cmt2: timer@e6140000 { 37040a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 37140a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 37240a6dd7bSThanh Quan reg = <0 0xe6140000 0 0x1004>; 37340a6dd7bSThanh Quan interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 37440a6dd7bSThanh Quan <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 37540a6dd7bSThanh Quan <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 37640a6dd7bSThanh Quan <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 37740a6dd7bSThanh Quan <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 37840a6dd7bSThanh Quan <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 37940a6dd7bSThanh Quan <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 38040a6dd7bSThanh Quan <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 38140a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 912>; 38240a6dd7bSThanh Quan clock-names = "fck"; 38340a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 38440a6dd7bSThanh Quan resets = <&cpg 912>; 38540a6dd7bSThanh Quan status = "disabled"; 38640a6dd7bSThanh Quan }; 38740a6dd7bSThanh Quan 38840a6dd7bSThanh Quan cmt3: timer@e6148000 { 38940a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 39040a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 39140a6dd7bSThanh Quan reg = <0 0xe6148000 0 0x1004>; 39240a6dd7bSThanh Quan interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 39340a6dd7bSThanh Quan <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 39440a6dd7bSThanh Quan <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 39540a6dd7bSThanh Quan <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 39640a6dd7bSThanh Quan <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 39740a6dd7bSThanh Quan <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 39840a6dd7bSThanh Quan <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 39940a6dd7bSThanh Quan <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 40040a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 913>; 40140a6dd7bSThanh Quan clock-names = "fck"; 40240a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 40340a6dd7bSThanh Quan resets = <&cpg 913>; 40440a6dd7bSThanh Quan status = "disabled"; 40540a6dd7bSThanh Quan }; 40640a6dd7bSThanh Quan 407987da486SYoshihiro Shimoda cpg: clock-controller@e6150000 { 408987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-cpg-mssr"; 409987da486SYoshihiro Shimoda reg = <0 0xe6150000 0 0x4000>; 410987da486SYoshihiro Shimoda clocks = <&extal_clk>, <&extalr_clk>; 411987da486SYoshihiro Shimoda clock-names = "extal", "extalr"; 412987da486SYoshihiro Shimoda #clock-cells = <2>; 413987da486SYoshihiro Shimoda #power-domain-cells = <0>; 414987da486SYoshihiro Shimoda #reset-cells = <1>; 415987da486SYoshihiro Shimoda }; 416987da486SYoshihiro Shimoda 417987da486SYoshihiro Shimoda rst: reset-controller@e6160000 { 418987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-rst"; 419987da486SYoshihiro Shimoda reg = <0 0xe6160000 0 0x4000>; 420987da486SYoshihiro Shimoda }; 421987da486SYoshihiro Shimoda 422987da486SYoshihiro Shimoda sysc: system-controller@e6180000 { 423987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-sysc"; 424987da486SYoshihiro Shimoda reg = <0 0xe6180000 0 0x4000>; 425987da486SYoshihiro Shimoda #power-domain-cells = <1>; 426987da486SYoshihiro Shimoda }; 427987da486SYoshihiro Shimoda 428b6ce840bSGeert Uytterhoeven intc_ex: interrupt-controller@e61c0000 { 429b6ce840bSGeert Uytterhoeven compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 430b6ce840bSGeert Uytterhoeven #interrupt-cells = <2>; 431b6ce840bSGeert Uytterhoeven interrupt-controller; 432b6ce840bSGeert Uytterhoeven reg = <0 0xe61c0000 0 0x200>; 433b6ce840bSGeert Uytterhoeven interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 434b6ce840bSGeert Uytterhoeven <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 435b6ce840bSGeert Uytterhoeven <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 436b6ce840bSGeert Uytterhoeven <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 437b6ce840bSGeert Uytterhoeven <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 438b6ce840bSGeert Uytterhoeven <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 439b6ce840bSGeert Uytterhoeven clocks = <&cpg CPG_MOD 611>; 440b6ce840bSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 441b6ce840bSGeert Uytterhoeven resets = <&cpg 611>; 442b6ce840bSGeert Uytterhoeven }; 443b6ce840bSGeert Uytterhoeven 44452478925SWolfram Sang tmu0: timer@e61e0000 { 44552478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 44652478925SWolfram Sang reg = <0 0xe61e0000 0 0x30>; 44752478925SWolfram Sang interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 44852478925SWolfram Sang <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 44952478925SWolfram Sang <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 45052478925SWolfram Sang clocks = <&cpg CPG_MOD 713>; 45152478925SWolfram Sang clock-names = "fck"; 45252478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 45352478925SWolfram Sang resets = <&cpg 713>; 45452478925SWolfram Sang status = "disabled"; 45552478925SWolfram Sang }; 45652478925SWolfram Sang 45752478925SWolfram Sang tmu1: timer@e6fc0000 { 45852478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 45952478925SWolfram Sang reg = <0 0xe6fc0000 0 0x30>; 46052478925SWolfram Sang interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 46152478925SWolfram Sang <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 46252478925SWolfram Sang <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>; 46352478925SWolfram Sang clocks = <&cpg CPG_MOD 714>; 46452478925SWolfram Sang clock-names = "fck"; 46552478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 46652478925SWolfram Sang resets = <&cpg 714>; 46752478925SWolfram Sang status = "disabled"; 46852478925SWolfram Sang }; 46952478925SWolfram Sang 47052478925SWolfram Sang tmu2: timer@e6fd0000 { 47152478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 47252478925SWolfram Sang reg = <0 0xe6fd0000 0 0x30>; 47352478925SWolfram Sang interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 47452478925SWolfram Sang <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 47552478925SWolfram Sang <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 47652478925SWolfram Sang clocks = <&cpg CPG_MOD 715>; 47752478925SWolfram Sang clock-names = "fck"; 47852478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 47952478925SWolfram Sang resets = <&cpg 715>; 48052478925SWolfram Sang status = "disabled"; 48152478925SWolfram Sang }; 48252478925SWolfram Sang 48352478925SWolfram Sang tmu3: timer@e6fe0000 { 48452478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 48552478925SWolfram Sang reg = <0 0xe6fe0000 0 0x30>; 48652478925SWolfram Sang interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 48752478925SWolfram Sang <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 48852478925SWolfram Sang <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>; 48952478925SWolfram Sang clocks = <&cpg CPG_MOD 716>; 49052478925SWolfram Sang clock-names = "fck"; 49152478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 49252478925SWolfram Sang resets = <&cpg 716>; 49352478925SWolfram Sang status = "disabled"; 49452478925SWolfram Sang }; 49552478925SWolfram Sang 49652478925SWolfram Sang tmu4: timer@ffc00000 { 49752478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 49852478925SWolfram Sang reg = <0 0xffc00000 0 0x30>; 49952478925SWolfram Sang interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 50052478925SWolfram Sang <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 50152478925SWolfram Sang <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 50252478925SWolfram Sang clocks = <&cpg CPG_MOD 717>; 50352478925SWolfram Sang clock-names = "fck"; 50452478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 50552478925SWolfram Sang resets = <&cpg 717>; 50652478925SWolfram Sang status = "disabled"; 50752478925SWolfram Sang }; 50852478925SWolfram Sang 509ff77ba05SGeert Uytterhoeven i2c0: i2c@e6500000 { 510ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 511ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 512ff77ba05SGeert Uytterhoeven reg = <0 0xe6500000 0 0x40>; 513ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 514ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 518>; 51508f28288SGeert Uytterhoeven dmas = <&dmac0 0x91>, <&dmac0 0x90>, 51608f28288SGeert Uytterhoeven <&dmac1 0x91>, <&dmac1 0x90>; 51708f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 518ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 519ff77ba05SGeert Uytterhoeven resets = <&cpg 518>; 520ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 521ff77ba05SGeert Uytterhoeven #address-cells = <1>; 522ff77ba05SGeert Uytterhoeven #size-cells = <0>; 523ff77ba05SGeert Uytterhoeven status = "disabled"; 524ff77ba05SGeert Uytterhoeven }; 525ff77ba05SGeert Uytterhoeven 526ff77ba05SGeert Uytterhoeven i2c1: i2c@e6508000 { 527ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 528ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 529ff77ba05SGeert Uytterhoeven reg = <0 0xe6508000 0 0x40>; 530ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 531ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 519>; 53208f28288SGeert Uytterhoeven dmas = <&dmac0 0x93>, <&dmac0 0x92>, 53308f28288SGeert Uytterhoeven <&dmac1 0x93>, <&dmac1 0x92>; 53408f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 535ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 536ff77ba05SGeert Uytterhoeven resets = <&cpg 519>; 537ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 538ff77ba05SGeert Uytterhoeven #address-cells = <1>; 539ff77ba05SGeert Uytterhoeven #size-cells = <0>; 540ff77ba05SGeert Uytterhoeven status = "disabled"; 541ff77ba05SGeert Uytterhoeven }; 542ff77ba05SGeert Uytterhoeven 543ff77ba05SGeert Uytterhoeven i2c2: i2c@e6510000 { 544ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 545ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 546ff77ba05SGeert Uytterhoeven reg = <0 0xe6510000 0 0x40>; 547ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 548ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 520>; 54908f28288SGeert Uytterhoeven dmas = <&dmac0 0x95>, <&dmac0 0x94>, 55008f28288SGeert Uytterhoeven <&dmac1 0x95>, <&dmac1 0x94>; 55108f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 552ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 553ff77ba05SGeert Uytterhoeven resets = <&cpg 520>; 554ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 555ff77ba05SGeert Uytterhoeven #address-cells = <1>; 556ff77ba05SGeert Uytterhoeven #size-cells = <0>; 557ff77ba05SGeert Uytterhoeven status = "disabled"; 558ff77ba05SGeert Uytterhoeven }; 559ff77ba05SGeert Uytterhoeven 560ff77ba05SGeert Uytterhoeven i2c3: i2c@e66d0000 { 561ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 562ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 563ff77ba05SGeert Uytterhoeven reg = <0 0xe66d0000 0 0x40>; 564ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 565ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 521>; 56608f28288SGeert Uytterhoeven dmas = <&dmac0 0x97>, <&dmac0 0x96>, 56708f28288SGeert Uytterhoeven <&dmac1 0x97>, <&dmac1 0x96>; 56808f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 569ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 570ff77ba05SGeert Uytterhoeven resets = <&cpg 521>; 571ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 572ff77ba05SGeert Uytterhoeven #address-cells = <1>; 573ff77ba05SGeert Uytterhoeven #size-cells = <0>; 574ff77ba05SGeert Uytterhoeven status = "disabled"; 575ff77ba05SGeert Uytterhoeven }; 576ff77ba05SGeert Uytterhoeven 577ff77ba05SGeert Uytterhoeven i2c4: i2c@e66d8000 { 578ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 579ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 580ff77ba05SGeert Uytterhoeven reg = <0 0xe66d8000 0 0x40>; 581ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 582ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 522>; 58308f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 58408f28288SGeert Uytterhoeven dmas = <&dmac0 0x99>, <&dmac0 0x98>, 58508f28288SGeert Uytterhoeven <&dmac1 0x99>, <&dmac1 0x98>; 586ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 587ff77ba05SGeert Uytterhoeven resets = <&cpg 522>; 588ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 589ff77ba05SGeert Uytterhoeven #address-cells = <1>; 590ff77ba05SGeert Uytterhoeven #size-cells = <0>; 591ff77ba05SGeert Uytterhoeven status = "disabled"; 592ff77ba05SGeert Uytterhoeven }; 593ff77ba05SGeert Uytterhoeven 594ff77ba05SGeert Uytterhoeven i2c5: i2c@e66e0000 { 595ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 596ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 597ff77ba05SGeert Uytterhoeven reg = <0 0xe66e0000 0 0x40>; 598ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 599ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 523>; 60008f28288SGeert Uytterhoeven dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 60108f28288SGeert Uytterhoeven <&dmac1 0x9b>, <&dmac1 0x9a>; 60208f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 603ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 604ff77ba05SGeert Uytterhoeven resets = <&cpg 523>; 605ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 606ff77ba05SGeert Uytterhoeven #address-cells = <1>; 607ff77ba05SGeert Uytterhoeven #size-cells = <0>; 608ff77ba05SGeert Uytterhoeven status = "disabled"; 609ff77ba05SGeert Uytterhoeven }; 610ff77ba05SGeert Uytterhoeven 611987da486SYoshihiro Shimoda hscif0: serial@e6540000 { 612987da486SYoshihiro Shimoda compatible = "renesas,hscif-r8a779g0", 61339d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 61439d9dfc6SGeert Uytterhoeven reg = <0 0xe6540000 0 0x60>; 615ab2866f1SGeert Uytterhoeven interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 616987da486SYoshihiro Shimoda clocks = <&cpg CPG_MOD 514>, 617a4290d40SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 618987da486SYoshihiro Shimoda <&scif_clk>; 619987da486SYoshihiro Shimoda clock-names = "fck", "brg_int", "scif_clk"; 62008f28288SGeert Uytterhoeven dmas = <&dmac0 0x31>, <&dmac0 0x30>, 62108f28288SGeert Uytterhoeven <&dmac1 0x31>, <&dmac1 0x30>; 62208f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 623987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 624987da486SYoshihiro Shimoda resets = <&cpg 514>; 625987da486SYoshihiro Shimoda status = "disabled"; 626987da486SYoshihiro Shimoda }; 627987da486SYoshihiro Shimoda 62839d9dfc6SGeert Uytterhoeven hscif1: serial@e6550000 { 62939d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 63039d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 63139d9dfc6SGeert Uytterhoeven reg = <0 0xe6550000 0 0x60>; 63239d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 63339d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 515>, 63439d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 63539d9dfc6SGeert Uytterhoeven <&scif_clk>; 63639d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 63739d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x33>, <&dmac0 0x32>, 63839d9dfc6SGeert Uytterhoeven <&dmac1 0x33>, <&dmac1 0x32>; 63939d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 64039d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 64139d9dfc6SGeert Uytterhoeven resets = <&cpg 515>; 64239d9dfc6SGeert Uytterhoeven status = "disabled"; 64339d9dfc6SGeert Uytterhoeven }; 64439d9dfc6SGeert Uytterhoeven 64539d9dfc6SGeert Uytterhoeven hscif2: serial@e6560000 { 64639d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 64739d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 64839d9dfc6SGeert Uytterhoeven reg = <0 0xe6560000 0 0x60>; 64939d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 65039d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 516>, 65139d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 65239d9dfc6SGeert Uytterhoeven <&scif_clk>; 65339d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 65439d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x35>, <&dmac0 0x34>, 65539d9dfc6SGeert Uytterhoeven <&dmac1 0x35>, <&dmac1 0x34>; 65639d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 65739d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 65839d9dfc6SGeert Uytterhoeven resets = <&cpg 516>; 65939d9dfc6SGeert Uytterhoeven status = "disabled"; 66039d9dfc6SGeert Uytterhoeven }; 66139d9dfc6SGeert Uytterhoeven 66239d9dfc6SGeert Uytterhoeven hscif3: serial@e66a0000 { 66339d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 66439d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 66539d9dfc6SGeert Uytterhoeven reg = <0 0xe66a0000 0 0x60>; 66639d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 66739d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 517>, 66839d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 66939d9dfc6SGeert Uytterhoeven <&scif_clk>; 67039d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 67139d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x37>, <&dmac0 0x36>, 67239d9dfc6SGeert Uytterhoeven <&dmac1 0x37>, <&dmac1 0x36>; 67339d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 67439d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 67539d9dfc6SGeert Uytterhoeven resets = <&cpg 517>; 67639d9dfc6SGeert Uytterhoeven status = "disabled"; 67739d9dfc6SGeert Uytterhoeven }; 67839d9dfc6SGeert Uytterhoeven 679848c82dbSGeert Uytterhoeven avb0: ethernet@e6800000 { 680848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 681848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 682848c82dbSGeert Uytterhoeven reg = <0 0xe6800000 0 0x800>; 683848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 684848c82dbSGeert Uytterhoeven <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 685848c82dbSGeert Uytterhoeven <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 686848c82dbSGeert Uytterhoeven <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 687848c82dbSGeert Uytterhoeven <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 688848c82dbSGeert Uytterhoeven <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 689848c82dbSGeert Uytterhoeven <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 690848c82dbSGeert Uytterhoeven <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 691848c82dbSGeert Uytterhoeven <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 692848c82dbSGeert Uytterhoeven <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 693848c82dbSGeert Uytterhoeven <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 694848c82dbSGeert Uytterhoeven <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 695848c82dbSGeert Uytterhoeven <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 696848c82dbSGeert Uytterhoeven <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 697848c82dbSGeert Uytterhoeven <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 698848c82dbSGeert Uytterhoeven <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 699848c82dbSGeert Uytterhoeven <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 700848c82dbSGeert Uytterhoeven <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 701848c82dbSGeert Uytterhoeven <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 702848c82dbSGeert Uytterhoeven <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 703848c82dbSGeert Uytterhoeven <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 704848c82dbSGeert Uytterhoeven <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 705848c82dbSGeert Uytterhoeven <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 706848c82dbSGeert Uytterhoeven <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 707848c82dbSGeert Uytterhoeven <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 708848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 709848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 710848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 711848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 712848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 713848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 714848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 211>; 715848c82dbSGeert Uytterhoeven clock-names = "fck"; 716848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 717848c82dbSGeert Uytterhoeven resets = <&cpg 211>; 718848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 719848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 720848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 721848c82dbSGeert Uytterhoeven #address-cells = <1>; 722848c82dbSGeert Uytterhoeven #size-cells = <0>; 723848c82dbSGeert Uytterhoeven status = "disabled"; 724848c82dbSGeert Uytterhoeven }; 725848c82dbSGeert Uytterhoeven 726848c82dbSGeert Uytterhoeven avb1: ethernet@e6810000 { 727848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 728848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 729848c82dbSGeert Uytterhoeven reg = <0 0xe6810000 0 0x800>; 730848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 731848c82dbSGeert Uytterhoeven <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 732848c82dbSGeert Uytterhoeven <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 733848c82dbSGeert Uytterhoeven <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 734848c82dbSGeert Uytterhoeven <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 735848c82dbSGeert Uytterhoeven <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 736848c82dbSGeert Uytterhoeven <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 737848c82dbSGeert Uytterhoeven <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 738848c82dbSGeert Uytterhoeven <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 739848c82dbSGeert Uytterhoeven <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 740848c82dbSGeert Uytterhoeven <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 741848c82dbSGeert Uytterhoeven <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 742848c82dbSGeert Uytterhoeven <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 743848c82dbSGeert Uytterhoeven <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 744848c82dbSGeert Uytterhoeven <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 745848c82dbSGeert Uytterhoeven <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 746848c82dbSGeert Uytterhoeven <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 747848c82dbSGeert Uytterhoeven <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 748848c82dbSGeert Uytterhoeven <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 749848c82dbSGeert Uytterhoeven <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 750848c82dbSGeert Uytterhoeven <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 751848c82dbSGeert Uytterhoeven <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 752848c82dbSGeert Uytterhoeven <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 753848c82dbSGeert Uytterhoeven <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 754848c82dbSGeert Uytterhoeven <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 755848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 756848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 757848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 758848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 759848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 760848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 761848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 212>; 762848c82dbSGeert Uytterhoeven clock-names = "fck"; 763848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 764848c82dbSGeert Uytterhoeven resets = <&cpg 212>; 765848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 766848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 767848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 768848c82dbSGeert Uytterhoeven #address-cells = <1>; 769848c82dbSGeert Uytterhoeven #size-cells = <0>; 770848c82dbSGeert Uytterhoeven status = "disabled"; 771848c82dbSGeert Uytterhoeven }; 772848c82dbSGeert Uytterhoeven 773848c82dbSGeert Uytterhoeven avb2: ethernet@e6820000 { 774848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 775848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 776848c82dbSGeert Uytterhoeven reg = <0 0xe6820000 0 0x1000>; 777848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 778848c82dbSGeert Uytterhoeven <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 779848c82dbSGeert Uytterhoeven <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 780848c82dbSGeert Uytterhoeven <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 781848c82dbSGeert Uytterhoeven <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 782848c82dbSGeert Uytterhoeven <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 783848c82dbSGeert Uytterhoeven <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 784848c82dbSGeert Uytterhoeven <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 785848c82dbSGeert Uytterhoeven <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 786848c82dbSGeert Uytterhoeven <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 787848c82dbSGeert Uytterhoeven <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 788848c82dbSGeert Uytterhoeven <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 789848c82dbSGeert Uytterhoeven <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 790848c82dbSGeert Uytterhoeven <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 791848c82dbSGeert Uytterhoeven <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 792848c82dbSGeert Uytterhoeven <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 793848c82dbSGeert Uytterhoeven <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 794848c82dbSGeert Uytterhoeven <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 795848c82dbSGeert Uytterhoeven <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 796848c82dbSGeert Uytterhoeven <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 797848c82dbSGeert Uytterhoeven <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 798848c82dbSGeert Uytterhoeven <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 799848c82dbSGeert Uytterhoeven <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 800848c82dbSGeert Uytterhoeven <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 801848c82dbSGeert Uytterhoeven <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 802848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 803848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 804848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 805848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 806848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 807848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 808848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 213>; 809848c82dbSGeert Uytterhoeven clock-names = "fck"; 810848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 811848c82dbSGeert Uytterhoeven resets = <&cpg 213>; 812848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 813848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 814848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 815848c82dbSGeert Uytterhoeven #address-cells = <1>; 816848c82dbSGeert Uytterhoeven #size-cells = <0>; 817848c82dbSGeert Uytterhoeven status = "disabled"; 818848c82dbSGeert Uytterhoeven }; 819848c82dbSGeert Uytterhoeven 8205b9d1306SCongDang pwm0: pwm@e6e30000 { 8215b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8225b9d1306SCongDang reg = <0 0xe6e30000 0 0x10>; 8235b9d1306SCongDang #pwm-cells = <2>; 8245b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8255b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8265b9d1306SCongDang resets = <&cpg 628>; 8275b9d1306SCongDang status = "disabled"; 8285b9d1306SCongDang }; 8295b9d1306SCongDang 8305b9d1306SCongDang pwm1: pwm@e6e31000 { 8315b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8325b9d1306SCongDang reg = <0 0xe6e31000 0 0x10>; 8335b9d1306SCongDang #pwm-cells = <2>; 8345b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8355b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8365b9d1306SCongDang resets = <&cpg 628>; 8375b9d1306SCongDang status = "disabled"; 8385b9d1306SCongDang }; 8395b9d1306SCongDang 8405b9d1306SCongDang pwm2: pwm@e6e32000 { 8415b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8425b9d1306SCongDang reg = <0 0xe6e32000 0 0x10>; 8435b9d1306SCongDang #pwm-cells = <2>; 8445b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8455b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8465b9d1306SCongDang resets = <&cpg 628>; 8475b9d1306SCongDang status = "disabled"; 8485b9d1306SCongDang }; 8495b9d1306SCongDang 8505b9d1306SCongDang pwm3: pwm@e6e33000 { 8515b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8525b9d1306SCongDang reg = <0 0xe6e33000 0 0x10>; 8535b9d1306SCongDang #pwm-cells = <2>; 8545b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8555b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8565b9d1306SCongDang resets = <&cpg 628>; 8575b9d1306SCongDang status = "disabled"; 8585b9d1306SCongDang }; 8595b9d1306SCongDang 8605b9d1306SCongDang pwm4: pwm@e6e34000 { 8615b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8625b9d1306SCongDang reg = <0 0xe6e34000 0 0x10>; 8635b9d1306SCongDang #pwm-cells = <2>; 8645b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8655b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8665b9d1306SCongDang resets = <&cpg 628>; 8675b9d1306SCongDang status = "disabled"; 8685b9d1306SCongDang }; 8695b9d1306SCongDang 8705b9d1306SCongDang pwm5: pwm@e6e35000 { 8715b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8725b9d1306SCongDang reg = <0 0xe6e35000 0 0x10>; 8735b9d1306SCongDang #pwm-cells = <2>; 8745b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8755b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8765b9d1306SCongDang resets = <&cpg 628>; 8775b9d1306SCongDang status = "disabled"; 8785b9d1306SCongDang }; 8795b9d1306SCongDang 8805b9d1306SCongDang pwm6: pwm@e6e36000 { 8815b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8825b9d1306SCongDang reg = <0 0xe6e36000 0 0x10>; 8835b9d1306SCongDang #pwm-cells = <2>; 8845b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8855b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8865b9d1306SCongDang resets = <&cpg 628>; 8875b9d1306SCongDang status = "disabled"; 8885b9d1306SCongDang }; 8895b9d1306SCongDang 8905b9d1306SCongDang pwm7: pwm@e6e37000 { 8915b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8925b9d1306SCongDang reg = <0 0xe6e37000 0 0x10>; 8935b9d1306SCongDang #pwm-cells = <2>; 8945b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8955b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8965b9d1306SCongDang resets = <&cpg 628>; 8975b9d1306SCongDang status = "disabled"; 8985b9d1306SCongDang }; 8995b9d1306SCongDang 9005b9d1306SCongDang pwm8: pwm@e6e38000 { 9015b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 9025b9d1306SCongDang reg = <0 0xe6e38000 0 0x10>; 9035b9d1306SCongDang #pwm-cells = <2>; 9045b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 9055b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 9065b9d1306SCongDang resets = <&cpg 628>; 9075b9d1306SCongDang status = "disabled"; 9085b9d1306SCongDang }; 9095b9d1306SCongDang 9105b9d1306SCongDang pwm9: pwm@e6e39000 { 9115b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 9125b9d1306SCongDang reg = <0 0xe6e39000 0 0x10>; 9135b9d1306SCongDang #pwm-cells = <2>; 9145b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 9155b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 9165b9d1306SCongDang resets = <&cpg 628>; 9175b9d1306SCongDang status = "disabled"; 9185b9d1306SCongDang }; 9195b9d1306SCongDang 920a4c31c56SGeert Uytterhoeven scif0: serial@e6e60000 { 921a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 922a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 923a4c31c56SGeert Uytterhoeven reg = <0 0xe6e60000 0 64>; 924a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 925a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 702>, 926a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 927a4c31c56SGeert Uytterhoeven <&scif_clk>; 928a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 929a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x51>, <&dmac0 0x50>, 930a4c31c56SGeert Uytterhoeven <&dmac1 0x51>, <&dmac1 0x50>; 931a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 932a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 933a4c31c56SGeert Uytterhoeven resets = <&cpg 702>; 934a4c31c56SGeert Uytterhoeven status = "disabled"; 935a4c31c56SGeert Uytterhoeven }; 936a4c31c56SGeert Uytterhoeven 937a4c31c56SGeert Uytterhoeven scif1: serial@e6e68000 { 938a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 939a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 940a4c31c56SGeert Uytterhoeven reg = <0 0xe6e68000 0 64>; 941a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 942a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 703>, 943a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 944a4c31c56SGeert Uytterhoeven <&scif_clk>; 945a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 946a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x53>, <&dmac0 0x52>, 947a4c31c56SGeert Uytterhoeven <&dmac1 0x53>, <&dmac1 0x52>; 948a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 949a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 950a4c31c56SGeert Uytterhoeven resets = <&cpg 703>; 951a4c31c56SGeert Uytterhoeven status = "disabled"; 952a4c31c56SGeert Uytterhoeven }; 953a4c31c56SGeert Uytterhoeven 954a4c31c56SGeert Uytterhoeven scif3: serial@e6c50000 { 955a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 956a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 957a4c31c56SGeert Uytterhoeven reg = <0 0xe6c50000 0 64>; 958a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 959a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 704>, 960a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 961a4c31c56SGeert Uytterhoeven <&scif_clk>; 962a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 963a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x57>, <&dmac0 0x56>, 964a4c31c56SGeert Uytterhoeven <&dmac1 0x57>, <&dmac1 0x56>; 965a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 966a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 967a4c31c56SGeert Uytterhoeven resets = <&cpg 704>; 968a4c31c56SGeert Uytterhoeven status = "disabled"; 969a4c31c56SGeert Uytterhoeven }; 970a4c31c56SGeert Uytterhoeven 971a4c31c56SGeert Uytterhoeven scif4: serial@e6c40000 { 972a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 973a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 974a4c31c56SGeert Uytterhoeven reg = <0 0xe6c40000 0 64>; 975a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 976a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 705>, 977a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 978a4c31c56SGeert Uytterhoeven <&scif_clk>; 979a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 980a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x59>, <&dmac0 0x58>, 981a4c31c56SGeert Uytterhoeven <&dmac1 0x59>, <&dmac1 0x58>; 982a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 983a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 984a4c31c56SGeert Uytterhoeven resets = <&cpg 705>; 985a4c31c56SGeert Uytterhoeven status = "disabled"; 986a4c31c56SGeert Uytterhoeven }; 987a4c31c56SGeert Uytterhoeven 9884a76d4abSCongDang tpu: pwm@e6e80000 { 9894a76d4abSCongDang compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 9904a76d4abSCongDang reg = <0 0xe6e80000 0 0x148>; 9914a76d4abSCongDang interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 9924a76d4abSCongDang clocks = <&cpg CPG_MOD 718>; 9934a76d4abSCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 9944a76d4abSCongDang resets = <&cpg 718>; 9954a76d4abSCongDang #pwm-cells = <3>; 9964a76d4abSCongDang status = "disabled"; 9974a76d4abSCongDang }; 9984a76d4abSCongDang 999e0768073SGeert Uytterhoeven msiof0: spi@e6e90000 { 1000e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1001e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1002e0768073SGeert Uytterhoeven reg = <0 0xe6e90000 0 0x0064>; 1003e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1004e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 618>; 1005e0768073SGeert Uytterhoeven dmas = <&dmac0 0x41>, <&dmac0 0x40>, 1006e0768073SGeert Uytterhoeven <&dmac1 0x41>, <&dmac1 0x40>; 1007e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1008e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1009e0768073SGeert Uytterhoeven resets = <&cpg 618>; 1010e0768073SGeert Uytterhoeven #address-cells = <1>; 1011e0768073SGeert Uytterhoeven #size-cells = <0>; 1012e0768073SGeert Uytterhoeven status = "disabled"; 1013e0768073SGeert Uytterhoeven }; 1014e0768073SGeert Uytterhoeven 1015e0768073SGeert Uytterhoeven msiof1: spi@e6ea0000 { 1016e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1017e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1018e0768073SGeert Uytterhoeven reg = <0 0xe6ea0000 0 0x0064>; 1019e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1020e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 619>; 1021e0768073SGeert Uytterhoeven dmas = <&dmac0 0x43>, <&dmac0 0x42>, 1022e0768073SGeert Uytterhoeven <&dmac1 0x43>, <&dmac1 0x42>; 1023e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1024e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1025e0768073SGeert Uytterhoeven resets = <&cpg 619>; 1026e0768073SGeert Uytterhoeven #address-cells = <1>; 1027e0768073SGeert Uytterhoeven #size-cells = <0>; 1028e0768073SGeert Uytterhoeven status = "disabled"; 1029e0768073SGeert Uytterhoeven }; 1030e0768073SGeert Uytterhoeven 1031e0768073SGeert Uytterhoeven msiof2: spi@e6c00000 { 1032e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1033e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1034e0768073SGeert Uytterhoeven reg = <0 0xe6c00000 0 0x0064>; 1035e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1036e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 620>; 1037e0768073SGeert Uytterhoeven dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1038e0768073SGeert Uytterhoeven <&dmac1 0x45>, <&dmac1 0x44>; 1039e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1040e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1041e0768073SGeert Uytterhoeven resets = <&cpg 620>; 1042e0768073SGeert Uytterhoeven #address-cells = <1>; 1043e0768073SGeert Uytterhoeven #size-cells = <0>; 1044e0768073SGeert Uytterhoeven status = "disabled"; 1045e0768073SGeert Uytterhoeven }; 1046e0768073SGeert Uytterhoeven 1047e0768073SGeert Uytterhoeven msiof3: spi@e6c10000 { 1048e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1049e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1050e0768073SGeert Uytterhoeven reg = <0 0xe6c10000 0 0x0064>; 1051e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1052e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 621>; 1053e0768073SGeert Uytterhoeven dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1054e0768073SGeert Uytterhoeven <&dmac1 0x47>, <&dmac1 0x46>; 1055e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1056e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1057e0768073SGeert Uytterhoeven resets = <&cpg 621>; 1058e0768073SGeert Uytterhoeven #address-cells = <1>; 1059e0768073SGeert Uytterhoeven #size-cells = <0>; 1060e0768073SGeert Uytterhoeven status = "disabled"; 1061e0768073SGeert Uytterhoeven }; 1062e0768073SGeert Uytterhoeven 1063e0768073SGeert Uytterhoeven msiof4: spi@e6c20000 { 1064e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1065e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1066e0768073SGeert Uytterhoeven reg = <0 0xe6c20000 0 0x0064>; 1067e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1068e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 622>; 1069e0768073SGeert Uytterhoeven dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1070e0768073SGeert Uytterhoeven <&dmac1 0x49>, <&dmac1 0x48>; 1071e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1072e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1073e0768073SGeert Uytterhoeven resets = <&cpg 622>; 1074e0768073SGeert Uytterhoeven #address-cells = <1>; 1075e0768073SGeert Uytterhoeven #size-cells = <0>; 1076e0768073SGeert Uytterhoeven status = "disabled"; 1077e0768073SGeert Uytterhoeven }; 1078e0768073SGeert Uytterhoeven 1079e0768073SGeert Uytterhoeven msiof5: spi@e6c28000 { 1080e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1081e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1082e0768073SGeert Uytterhoeven reg = <0 0xe6c28000 0 0x0064>; 1083e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1084e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 623>; 1085e0768073SGeert Uytterhoeven dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1086e0768073SGeert Uytterhoeven <&dmac1 0x4b>, <&dmac1 0x4a>; 1087e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1088e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1089e0768073SGeert Uytterhoeven resets = <&cpg 623>; 1090e0768073SGeert Uytterhoeven #address-cells = <1>; 1091e0768073SGeert Uytterhoeven #size-cells = <0>; 1092e0768073SGeert Uytterhoeven status = "disabled"; 1093e0768073SGeert Uytterhoeven }; 1094e0768073SGeert Uytterhoeven 109508f28288SGeert Uytterhoeven dmac0: dma-controller@e7350000 { 109608f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 109708f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 109808f28288SGeert Uytterhoeven reg = <0 0xe7350000 0 0x1000>, 109908f28288SGeert Uytterhoeven <0 0xe7300000 0 0x10000>; 110008f28288SGeert Uytterhoeven interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 110108f28288SGeert Uytterhoeven <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 110208f28288SGeert Uytterhoeven <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 110308f28288SGeert Uytterhoeven <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 110408f28288SGeert Uytterhoeven <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 110508f28288SGeert Uytterhoeven <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 110608f28288SGeert Uytterhoeven <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 110708f28288SGeert Uytterhoeven <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 110808f28288SGeert Uytterhoeven <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 110908f28288SGeert Uytterhoeven <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 111008f28288SGeert Uytterhoeven <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 111108f28288SGeert Uytterhoeven <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 111208f28288SGeert Uytterhoeven <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 111308f28288SGeert Uytterhoeven <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 111408f28288SGeert Uytterhoeven <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 111508f28288SGeert Uytterhoeven <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 111608f28288SGeert Uytterhoeven <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 111708f28288SGeert Uytterhoeven interrupt-names = "error", 111808f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 111908f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 112008f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 112108f28288SGeert Uytterhoeven "ch14", "ch15"; 112208f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 709>; 112308f28288SGeert Uytterhoeven clock-names = "fck"; 112408f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 112508f28288SGeert Uytterhoeven resets = <&cpg 709>; 112608f28288SGeert Uytterhoeven #dma-cells = <1>; 112708f28288SGeert Uytterhoeven dma-channels = <16>; 112808f28288SGeert Uytterhoeven }; 112908f28288SGeert Uytterhoeven 113008f28288SGeert Uytterhoeven dmac1: dma-controller@e7351000 { 113108f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 113208f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 113308f28288SGeert Uytterhoeven reg = <0 0xe7351000 0 0x1000>, 113408f28288SGeert Uytterhoeven <0 0xe7310000 0 0x10000>; 113508f28288SGeert Uytterhoeven interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 113608f28288SGeert Uytterhoeven <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 113708f28288SGeert Uytterhoeven <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 113808f28288SGeert Uytterhoeven <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 113908f28288SGeert Uytterhoeven <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 114008f28288SGeert Uytterhoeven <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 114108f28288SGeert Uytterhoeven <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 114208f28288SGeert Uytterhoeven <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 114308f28288SGeert Uytterhoeven <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 114408f28288SGeert Uytterhoeven <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 114508f28288SGeert Uytterhoeven <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 114608f28288SGeert Uytterhoeven <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 114708f28288SGeert Uytterhoeven <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 114808f28288SGeert Uytterhoeven <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 114908f28288SGeert Uytterhoeven <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 115008f28288SGeert Uytterhoeven <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 115108f28288SGeert Uytterhoeven <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 115208f28288SGeert Uytterhoeven interrupt-names = "error", 115308f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 115408f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 115508f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 115608f28288SGeert Uytterhoeven "ch14", "ch15"; 115708f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 710>; 115808f28288SGeert Uytterhoeven clock-names = "fck"; 115908f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 116008f28288SGeert Uytterhoeven resets = <&cpg 710>; 116108f28288SGeert Uytterhoeven #dma-cells = <1>; 116208f28288SGeert Uytterhoeven dma-channels = <16>; 116308f28288SGeert Uytterhoeven }; 116408f28288SGeert Uytterhoeven 1165bc7bf913SGeert Uytterhoeven mmc0: mmc@ee140000 { 1166bc7bf913SGeert Uytterhoeven compatible = "renesas,sdhi-r8a779g0", 1167bc7bf913SGeert Uytterhoeven "renesas,rcar-gen4-sdhi"; 1168bc7bf913SGeert Uytterhoeven reg = <0 0xee140000 0 0x2000>; 1169bc7bf913SGeert Uytterhoeven interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1170bc7bf913SGeert Uytterhoeven clocks = <&cpg CPG_MOD 706>, 1171bc7bf913SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1172bc7bf913SGeert Uytterhoeven clock-names = "core", "clkh"; 1173bc7bf913SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1174bc7bf913SGeert Uytterhoeven resets = <&cpg 706>; 1175bc7bf913SGeert Uytterhoeven max-frequency = <200000000>; 1176bc7bf913SGeert Uytterhoeven status = "disabled"; 1177bc7bf913SGeert Uytterhoeven }; 1178bc7bf913SGeert Uytterhoeven 1179d5014bedSHai Pham rpc: spi@ee200000 { 1180d5014bedSHai Pham compatible = "renesas,r8a779g0-rpc-if", 1181d5014bedSHai Pham "renesas,rcar-gen4-rpc-if"; 1182d5014bedSHai Pham reg = <0 0xee200000 0 0x200>, 1183d5014bedSHai Pham <0 0x08000000 0 0x04000000>, 1184d5014bedSHai Pham <0 0xee208000 0 0x100>; 1185d5014bedSHai Pham reg-names = "regs", "dirmap", "wbuf"; 1186d5014bedSHai Pham interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1187d5014bedSHai Pham clocks = <&cpg CPG_MOD 629>; 1188d5014bedSHai Pham power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1189d5014bedSHai Pham resets = <&cpg 629>; 1190d5014bedSHai Pham #address-cells = <1>; 1191d5014bedSHai Pham #size-cells = <0>; 1192d5014bedSHai Pham status = "disabled"; 1193d5014bedSHai Pham }; 1194d5014bedSHai Pham 1195987da486SYoshihiro Shimoda gic: interrupt-controller@f1000000 { 1196987da486SYoshihiro Shimoda compatible = "arm,gic-v3"; 1197987da486SYoshihiro Shimoda #interrupt-cells = <3>; 1198987da486SYoshihiro Shimoda #address-cells = <0>; 1199987da486SYoshihiro Shimoda interrupt-controller; 1200987da486SYoshihiro Shimoda reg = <0x0 0xf1000000 0 0x20000>, 1201987da486SYoshihiro Shimoda <0x0 0xf1060000 0 0x110000>; 1202987da486SYoshihiro Shimoda interrupts = <GIC_PPI 9 120368c9c53dSGeert Uytterhoeven (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1204987da486SYoshihiro Shimoda }; 1205987da486SYoshihiro Shimoda 1206987da486SYoshihiro Shimoda prr: chipid@fff00044 { 1207987da486SYoshihiro Shimoda compatible = "renesas,prr"; 1208987da486SYoshihiro Shimoda reg = <0 0xfff00044 0 4>; 1209987da486SYoshihiro Shimoda }; 1210987da486SYoshihiro Shimoda }; 1211987da486SYoshihiro Shimoda 1212987da486SYoshihiro Shimoda timer { 1213987da486SYoshihiro Shimoda compatible = "arm,armv8-timer"; 121468c9c53dSGeert Uytterhoeven interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 121568c9c53dSGeert Uytterhoeven <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 121668c9c53dSGeert Uytterhoeven <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 121768c9c53dSGeert Uytterhoeven <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1218987da486SYoshihiro Shimoda }; 1219987da486SYoshihiro Shimoda}; 1220