1987da486SYoshihiro Shimoda// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2987da486SYoshihiro Shimoda/* 3987da486SYoshihiro Shimoda * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4987da486SYoshihiro Shimoda * 5987da486SYoshihiro Shimoda * Copyright (C) 2022 Renesas Electronics Corp. 6987da486SYoshihiro Shimoda */ 7987da486SYoshihiro Shimoda 8987da486SYoshihiro Shimoda#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9987da486SYoshihiro Shimoda#include <dt-bindings/interrupt-controller/arm-gic.h> 10987da486SYoshihiro Shimoda#include <dt-bindings/power/r8a779g0-sysc.h> 11987da486SYoshihiro Shimoda 12987da486SYoshihiro Shimoda/ { 13987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0"; 14987da486SYoshihiro Shimoda #address-cells = <2>; 15987da486SYoshihiro Shimoda #size-cells = <2>; 16987da486SYoshihiro Shimoda 179a0e6306SGeert Uytterhoeven cluster0_opp: opp-table-0 { 189a0e6306SGeert Uytterhoeven compatible = "operating-points-v2"; 199a0e6306SGeert Uytterhoeven opp-shared; 209a0e6306SGeert Uytterhoeven 219a0e6306SGeert Uytterhoeven opp-500000000 { 229a0e6306SGeert Uytterhoeven opp-hz = /bits/ 64 <500000000>; 239a0e6306SGeert Uytterhoeven opp-microvolt = <825000>; 249a0e6306SGeert Uytterhoeven clock-latency-ns = <500000>; 259a0e6306SGeert Uytterhoeven }; 269a0e6306SGeert Uytterhoeven opp-1000000000 { 279a0e6306SGeert Uytterhoeven opp-hz = /bits/ 64 <1000000000>; 289a0e6306SGeert Uytterhoeven opp-microvolt = <825000>; 299a0e6306SGeert Uytterhoeven clock-latency-ns = <500000>; 309a0e6306SGeert Uytterhoeven }; 319a0e6306SGeert Uytterhoeven opp-1500000000 { 329a0e6306SGeert Uytterhoeven opp-hz = /bits/ 64 <1500000000>; 339a0e6306SGeert Uytterhoeven opp-microvolt = <825000>; 349a0e6306SGeert Uytterhoeven clock-latency-ns = <500000>; 359a0e6306SGeert Uytterhoeven }; 369a0e6306SGeert Uytterhoeven opp-1700000000 { 379a0e6306SGeert Uytterhoeven opp-hz = /bits/ 64 <1700000000>; 389a0e6306SGeert Uytterhoeven opp-microvolt = <825000>; 399a0e6306SGeert Uytterhoeven clock-latency-ns = <500000>; 409a0e6306SGeert Uytterhoeven opp-suspend; 419a0e6306SGeert Uytterhoeven }; 42*87d85b48SGeert Uytterhoeven opp-1800000000 { 43*87d85b48SGeert Uytterhoeven opp-hz = /bits/ 64 <1800000000>; 44*87d85b48SGeert Uytterhoeven opp-microvolt = <880000>; 45*87d85b48SGeert Uytterhoeven clock-latency-ns = <500000>; 46*87d85b48SGeert Uytterhoeven turbo-mode; 47*87d85b48SGeert Uytterhoeven }; 489a0e6306SGeert Uytterhoeven }; 499a0e6306SGeert Uytterhoeven 50987da486SYoshihiro Shimoda cpus { 51987da486SYoshihiro Shimoda #address-cells = <1>; 52987da486SYoshihiro Shimoda #size-cells = <0>; 53987da486SYoshihiro Shimoda 5468c9c53dSGeert Uytterhoeven cpu-map { 5568c9c53dSGeert Uytterhoeven cluster0 { 5668c9c53dSGeert Uytterhoeven core0 { 5768c9c53dSGeert Uytterhoeven cpu = <&a76_0>; 5868c9c53dSGeert Uytterhoeven }; 5968c9c53dSGeert Uytterhoeven core1 { 6068c9c53dSGeert Uytterhoeven cpu = <&a76_1>; 6168c9c53dSGeert Uytterhoeven }; 6268c9c53dSGeert Uytterhoeven }; 6368c9c53dSGeert Uytterhoeven 6468c9c53dSGeert Uytterhoeven cluster1 { 6568c9c53dSGeert Uytterhoeven core0 { 6668c9c53dSGeert Uytterhoeven cpu = <&a76_2>; 6768c9c53dSGeert Uytterhoeven }; 6868c9c53dSGeert Uytterhoeven core1 { 6968c9c53dSGeert Uytterhoeven cpu = <&a76_3>; 7068c9c53dSGeert Uytterhoeven }; 7168c9c53dSGeert Uytterhoeven }; 7268c9c53dSGeert Uytterhoeven }; 7368c9c53dSGeert Uytterhoeven 74987da486SYoshihiro Shimoda a76_0: cpu@0 { 75987da486SYoshihiro Shimoda compatible = "arm,cortex-a76"; 76987da486SYoshihiro Shimoda reg = <0>; 77987da486SYoshihiro Shimoda device_type = "cpu"; 78987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 79f0840721SGeert Uytterhoeven next-level-cache = <&L3_CA76_0>; 8068c9c53dSGeert Uytterhoeven enable-method = "psci"; 815bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 82ee8ce199SGeert Uytterhoeven clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 839a0e6306SGeert Uytterhoeven operating-points-v2 = <&cluster0_opp>; 8468c9c53dSGeert Uytterhoeven }; 8568c9c53dSGeert Uytterhoeven 8668c9c53dSGeert Uytterhoeven a76_1: cpu@100 { 8768c9c53dSGeert Uytterhoeven compatible = "arm,cortex-a76"; 8868c9c53dSGeert Uytterhoeven reg = <0x100>; 8968c9c53dSGeert Uytterhoeven device_type = "cpu"; 9068c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 9168c9c53dSGeert Uytterhoeven next-level-cache = <&L3_CA76_0>; 9268c9c53dSGeert Uytterhoeven enable-method = "psci"; 935bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 94ee8ce199SGeert Uytterhoeven clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 959a0e6306SGeert Uytterhoeven operating-points-v2 = <&cluster0_opp>; 9668c9c53dSGeert Uytterhoeven }; 9768c9c53dSGeert Uytterhoeven 9868c9c53dSGeert Uytterhoeven a76_2: cpu@10000 { 9968c9c53dSGeert Uytterhoeven compatible = "arm,cortex-a76"; 10068c9c53dSGeert Uytterhoeven reg = <0x10000>; 10168c9c53dSGeert Uytterhoeven device_type = "cpu"; 10268c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 10368c9c53dSGeert Uytterhoeven next-level-cache = <&L3_CA76_1>; 10468c9c53dSGeert Uytterhoeven enable-method = "psci"; 1055bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 106ee8ce199SGeert Uytterhoeven clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 1079a0e6306SGeert Uytterhoeven operating-points-v2 = <&cluster0_opp>; 10868c9c53dSGeert Uytterhoeven }; 10968c9c53dSGeert Uytterhoeven 11068c9c53dSGeert Uytterhoeven a76_3: cpu@10100 { 11168c9c53dSGeert Uytterhoeven compatible = "arm,cortex-a76"; 11268c9c53dSGeert Uytterhoeven reg = <0x10100>; 11368c9c53dSGeert Uytterhoeven device_type = "cpu"; 11468c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 11568c9c53dSGeert Uytterhoeven next-level-cache = <&L3_CA76_1>; 11668c9c53dSGeert Uytterhoeven enable-method = "psci"; 1175bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 118ee8ce199SGeert Uytterhoeven clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 1199a0e6306SGeert Uytterhoeven operating-points-v2 = <&cluster0_opp>; 1205bb355a8SGeert Uytterhoeven }; 1215bb355a8SGeert Uytterhoeven 1225bb355a8SGeert Uytterhoeven idle-states { 1235bb355a8SGeert Uytterhoeven entry-method = "psci"; 1245bb355a8SGeert Uytterhoeven 1255bb355a8SGeert Uytterhoeven CPU_SLEEP_0: cpu-sleep-0 { 1265bb355a8SGeert Uytterhoeven compatible = "arm,idle-state"; 1275bb355a8SGeert Uytterhoeven arm,psci-suspend-param = <0x0010000>; 1285bb355a8SGeert Uytterhoeven local-timer-stop; 1295bb355a8SGeert Uytterhoeven entry-latency-us = <400>; 1305bb355a8SGeert Uytterhoeven exit-latency-us = <500>; 1315bb355a8SGeert Uytterhoeven min-residency-us = <4000>; 1325bb355a8SGeert Uytterhoeven }; 133f0840721SGeert Uytterhoeven }; 134f0840721SGeert Uytterhoeven 135f0840721SGeert Uytterhoeven L3_CA76_0: cache-controller-0 { 136f0840721SGeert Uytterhoeven compatible = "cache"; 137f0840721SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A2E0D0>; 138f0840721SGeert Uytterhoeven cache-unified; 139f0840721SGeert Uytterhoeven cache-level = <3>; 140987da486SYoshihiro Shimoda }; 14168c9c53dSGeert Uytterhoeven 14268c9c53dSGeert Uytterhoeven L3_CA76_1: cache-controller-1 { 14368c9c53dSGeert Uytterhoeven compatible = "cache"; 14468c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A2E0D1>; 14568c9c53dSGeert Uytterhoeven cache-unified; 14668c9c53dSGeert Uytterhoeven cache-level = <3>; 14768c9c53dSGeert Uytterhoeven }; 14868c9c53dSGeert Uytterhoeven }; 14968c9c53dSGeert Uytterhoeven 15068c9c53dSGeert Uytterhoeven psci { 15168c9c53dSGeert Uytterhoeven compatible = "arm,psci-1.0", "arm,psci-0.2"; 15268c9c53dSGeert Uytterhoeven method = "smc"; 153987da486SYoshihiro Shimoda }; 154987da486SYoshihiro Shimoda 155987da486SYoshihiro Shimoda extal_clk: extal { 156987da486SYoshihiro Shimoda compatible = "fixed-clock"; 157987da486SYoshihiro Shimoda #clock-cells = <0>; 158987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 159987da486SYoshihiro Shimoda clock-frequency = <0>; 160987da486SYoshihiro Shimoda }; 161987da486SYoshihiro Shimoda 162987da486SYoshihiro Shimoda extalr_clk: extalr { 163987da486SYoshihiro Shimoda compatible = "fixed-clock"; 164987da486SYoshihiro Shimoda #clock-cells = <0>; 165987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 166987da486SYoshihiro Shimoda clock-frequency = <0>; 167987da486SYoshihiro Shimoda }; 168987da486SYoshihiro Shimoda 169987da486SYoshihiro Shimoda pmu_a76 { 170987da486SYoshihiro Shimoda compatible = "arm,cortex-a76-pmu"; 171987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 172987da486SYoshihiro Shimoda }; 173987da486SYoshihiro Shimoda 174987da486SYoshihiro Shimoda /* External SCIF clock - to be overridden by boards that provide it */ 175987da486SYoshihiro Shimoda scif_clk: scif { 176987da486SYoshihiro Shimoda compatible = "fixed-clock"; 177987da486SYoshihiro Shimoda #clock-cells = <0>; 178987da486SYoshihiro Shimoda clock-frequency = <0>; 179987da486SYoshihiro Shimoda }; 180987da486SYoshihiro Shimoda 181987da486SYoshihiro Shimoda soc: soc { 182987da486SYoshihiro Shimoda compatible = "simple-bus"; 183987da486SYoshihiro Shimoda interrupt-parent = <&gic>; 184987da486SYoshihiro Shimoda #address-cells = <2>; 185987da486SYoshihiro Shimoda #size-cells = <2>; 186987da486SYoshihiro Shimoda ranges; 187987da486SYoshihiro Shimoda 188a43306faSGeert Uytterhoeven rwdt: watchdog@e6020000 { 189a43306faSGeert Uytterhoeven compatible = "renesas,r8a779g0-wdt", 190a43306faSGeert Uytterhoeven "renesas,rcar-gen4-wdt"; 191a43306faSGeert Uytterhoeven reg = <0 0xe6020000 0 0x0c>; 192a43306faSGeert Uytterhoeven interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 193a43306faSGeert Uytterhoeven clocks = <&cpg CPG_MOD 907>; 194a43306faSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 195a43306faSGeert Uytterhoeven resets = <&cpg 907>; 196a43306faSGeert Uytterhoeven status = "disabled"; 197a43306faSGeert Uytterhoeven }; 198a43306faSGeert Uytterhoeven 1994cebce25SGeert Uytterhoeven pfc: pinctrl@e6050000 { 2004cebce25SGeert Uytterhoeven compatible = "renesas,pfc-r8a779g0"; 2014cebce25SGeert Uytterhoeven reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 2024cebce25SGeert Uytterhoeven <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 2034cebce25SGeert Uytterhoeven <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 2044cebce25SGeert Uytterhoeven <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 2054cebce25SGeert Uytterhoeven <0 0xe6068000 0 0x16c>; 2064cebce25SGeert Uytterhoeven }; 2074cebce25SGeert Uytterhoeven 208120c7a58SGeert Uytterhoeven gpio0: gpio@e6050180 { 209120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 210120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 211120c7a58SGeert Uytterhoeven reg = <0 0xe6050180 0 0x54>; 212120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 213120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 214120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 215120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 216120c7a58SGeert Uytterhoeven gpio-controller; 217120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 218120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 0 19>; 219120c7a58SGeert Uytterhoeven interrupt-controller; 220120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 221120c7a58SGeert Uytterhoeven }; 222120c7a58SGeert Uytterhoeven 223120c7a58SGeert Uytterhoeven gpio1: gpio@e6050980 { 224120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 225120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 226120c7a58SGeert Uytterhoeven reg = <0 0xe6050980 0 0x54>; 227120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 228120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 229120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 230120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 231120c7a58SGeert Uytterhoeven gpio-controller; 232120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 233120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 32 29>; 234120c7a58SGeert Uytterhoeven interrupt-controller; 235120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 236120c7a58SGeert Uytterhoeven }; 237120c7a58SGeert Uytterhoeven 238120c7a58SGeert Uytterhoeven gpio2: gpio@e6058180 { 239120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 240120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 241120c7a58SGeert Uytterhoeven reg = <0 0xe6058180 0 0x54>; 242120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 243120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 244120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 245120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 246120c7a58SGeert Uytterhoeven gpio-controller; 247120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 248120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 64 20>; 249120c7a58SGeert Uytterhoeven interrupt-controller; 250120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 251120c7a58SGeert Uytterhoeven }; 252120c7a58SGeert Uytterhoeven 253120c7a58SGeert Uytterhoeven gpio3: gpio@e6058980 { 254120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 255120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 256120c7a58SGeert Uytterhoeven reg = <0 0xe6058980 0 0x54>; 257120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 258120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 259120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 260120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 261120c7a58SGeert Uytterhoeven gpio-controller; 262120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 263120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 96 30>; 264120c7a58SGeert Uytterhoeven interrupt-controller; 265120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 266120c7a58SGeert Uytterhoeven }; 267120c7a58SGeert Uytterhoeven 268120c7a58SGeert Uytterhoeven gpio4: gpio@e6060180 { 269120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 270120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 271120c7a58SGeert Uytterhoeven reg = <0 0xe6060180 0 0x54>; 272120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 273120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 274120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 275120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 276120c7a58SGeert Uytterhoeven gpio-controller; 277120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 278120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 128 25>; 279120c7a58SGeert Uytterhoeven interrupt-controller; 280120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 281120c7a58SGeert Uytterhoeven }; 282120c7a58SGeert Uytterhoeven 283120c7a58SGeert Uytterhoeven gpio5: gpio@e6060980 { 284120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 285120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 286120c7a58SGeert Uytterhoeven reg = <0 0xe6060980 0 0x54>; 287120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 288120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 289120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 290120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 291120c7a58SGeert Uytterhoeven gpio-controller; 292120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 293120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 160 21>; 294120c7a58SGeert Uytterhoeven interrupt-controller; 295120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 296120c7a58SGeert Uytterhoeven }; 297120c7a58SGeert Uytterhoeven 298120c7a58SGeert Uytterhoeven gpio6: gpio@e6061180 { 299120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 300120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 301120c7a58SGeert Uytterhoeven reg = <0 0xe6061180 0 0x54>; 302120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 303120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 304120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 305120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 306120c7a58SGeert Uytterhoeven gpio-controller; 307120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 308120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 192 21>; 309120c7a58SGeert Uytterhoeven interrupt-controller; 310120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 311120c7a58SGeert Uytterhoeven }; 312120c7a58SGeert Uytterhoeven 313120c7a58SGeert Uytterhoeven gpio7: gpio@e6061980 { 314120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 315120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 316120c7a58SGeert Uytterhoeven reg = <0 0xe6061980 0 0x54>; 317120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 318120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 319120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 320120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 321120c7a58SGeert Uytterhoeven gpio-controller; 322120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 323120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 224 21>; 324120c7a58SGeert Uytterhoeven interrupt-controller; 325120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 326120c7a58SGeert Uytterhoeven }; 327120c7a58SGeert Uytterhoeven 328120c7a58SGeert Uytterhoeven gpio8: gpio@e6068180 { 329120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 330120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 331120c7a58SGeert Uytterhoeven reg = <0 0xe6068180 0 0x54>; 332120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 333120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 918>; 334120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 335120c7a58SGeert Uytterhoeven resets = <&cpg 918>; 336120c7a58SGeert Uytterhoeven gpio-controller; 337120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 338120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 256 14>; 339120c7a58SGeert Uytterhoeven interrupt-controller; 340120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 341120c7a58SGeert Uytterhoeven }; 342120c7a58SGeert Uytterhoeven 34340a6dd7bSThanh Quan cmt0: timer@e60f0000 { 34440a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt0", 34540a6dd7bSThanh Quan "renesas,rcar-gen4-cmt0"; 34640a6dd7bSThanh Quan reg = <0 0xe60f0000 0 0x1004>; 34740a6dd7bSThanh Quan interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 34840a6dd7bSThanh Quan <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 34940a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 910>; 35040a6dd7bSThanh Quan clock-names = "fck"; 35140a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 35240a6dd7bSThanh Quan resets = <&cpg 910>; 35340a6dd7bSThanh Quan status = "disabled"; 35440a6dd7bSThanh Quan }; 35540a6dd7bSThanh Quan 35640a6dd7bSThanh Quan cmt1: timer@e6130000 { 35740a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 35840a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 35940a6dd7bSThanh Quan reg = <0 0xe6130000 0 0x1004>; 36040a6dd7bSThanh Quan interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 36140a6dd7bSThanh Quan <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 36240a6dd7bSThanh Quan <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 36340a6dd7bSThanh Quan <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 36440a6dd7bSThanh Quan <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 36540a6dd7bSThanh Quan <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 36640a6dd7bSThanh Quan <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 36740a6dd7bSThanh Quan <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 36840a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 911>; 36940a6dd7bSThanh Quan clock-names = "fck"; 37040a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 37140a6dd7bSThanh Quan resets = <&cpg 911>; 37240a6dd7bSThanh Quan status = "disabled"; 37340a6dd7bSThanh Quan }; 37440a6dd7bSThanh Quan 37540a6dd7bSThanh Quan cmt2: timer@e6140000 { 37640a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 37740a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 37840a6dd7bSThanh Quan reg = <0 0xe6140000 0 0x1004>; 37940a6dd7bSThanh Quan interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 38040a6dd7bSThanh Quan <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 38140a6dd7bSThanh Quan <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 38240a6dd7bSThanh Quan <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 38340a6dd7bSThanh Quan <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 38440a6dd7bSThanh Quan <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 38540a6dd7bSThanh Quan <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 38640a6dd7bSThanh Quan <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 38740a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 912>; 38840a6dd7bSThanh Quan clock-names = "fck"; 38940a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 39040a6dd7bSThanh Quan resets = <&cpg 912>; 39140a6dd7bSThanh Quan status = "disabled"; 39240a6dd7bSThanh Quan }; 39340a6dd7bSThanh Quan 39440a6dd7bSThanh Quan cmt3: timer@e6148000 { 39540a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 39640a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 39740a6dd7bSThanh Quan reg = <0 0xe6148000 0 0x1004>; 39840a6dd7bSThanh Quan interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 39940a6dd7bSThanh Quan <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 40040a6dd7bSThanh Quan <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 40140a6dd7bSThanh Quan <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 40240a6dd7bSThanh Quan <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 40340a6dd7bSThanh Quan <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 40440a6dd7bSThanh Quan <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 40540a6dd7bSThanh Quan <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 40640a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 913>; 40740a6dd7bSThanh Quan clock-names = "fck"; 40840a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 40940a6dd7bSThanh Quan resets = <&cpg 913>; 41040a6dd7bSThanh Quan status = "disabled"; 41140a6dd7bSThanh Quan }; 41240a6dd7bSThanh Quan 413987da486SYoshihiro Shimoda cpg: clock-controller@e6150000 { 414987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-cpg-mssr"; 415987da486SYoshihiro Shimoda reg = <0 0xe6150000 0 0x4000>; 416987da486SYoshihiro Shimoda clocks = <&extal_clk>, <&extalr_clk>; 417987da486SYoshihiro Shimoda clock-names = "extal", "extalr"; 418987da486SYoshihiro Shimoda #clock-cells = <2>; 419987da486SYoshihiro Shimoda #power-domain-cells = <0>; 420987da486SYoshihiro Shimoda #reset-cells = <1>; 421987da486SYoshihiro Shimoda }; 422987da486SYoshihiro Shimoda 423987da486SYoshihiro Shimoda rst: reset-controller@e6160000 { 424987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-rst"; 425987da486SYoshihiro Shimoda reg = <0 0xe6160000 0 0x4000>; 426987da486SYoshihiro Shimoda }; 427987da486SYoshihiro Shimoda 428987da486SYoshihiro Shimoda sysc: system-controller@e6180000 { 429987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-sysc"; 430987da486SYoshihiro Shimoda reg = <0 0xe6180000 0 0x4000>; 431987da486SYoshihiro Shimoda #power-domain-cells = <1>; 432987da486SYoshihiro Shimoda }; 433987da486SYoshihiro Shimoda 434b6ce840bSGeert Uytterhoeven intc_ex: interrupt-controller@e61c0000 { 435b6ce840bSGeert Uytterhoeven compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 436b6ce840bSGeert Uytterhoeven #interrupt-cells = <2>; 437b6ce840bSGeert Uytterhoeven interrupt-controller; 438b6ce840bSGeert Uytterhoeven reg = <0 0xe61c0000 0 0x200>; 439b6ce840bSGeert Uytterhoeven interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 440b6ce840bSGeert Uytterhoeven <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 441b6ce840bSGeert Uytterhoeven <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 442b6ce840bSGeert Uytterhoeven <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 443b6ce840bSGeert Uytterhoeven <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 444b6ce840bSGeert Uytterhoeven <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 445b6ce840bSGeert Uytterhoeven clocks = <&cpg CPG_MOD 611>; 446b6ce840bSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 447b6ce840bSGeert Uytterhoeven resets = <&cpg 611>; 448b6ce840bSGeert Uytterhoeven }; 449b6ce840bSGeert Uytterhoeven 45052478925SWolfram Sang tmu0: timer@e61e0000 { 45152478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 45252478925SWolfram Sang reg = <0 0xe61e0000 0 0x30>; 45352478925SWolfram Sang interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 45452478925SWolfram Sang <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 45552478925SWolfram Sang <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 45652478925SWolfram Sang clocks = <&cpg CPG_MOD 713>; 45752478925SWolfram Sang clock-names = "fck"; 45852478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 45952478925SWolfram Sang resets = <&cpg 713>; 46052478925SWolfram Sang status = "disabled"; 46152478925SWolfram Sang }; 46252478925SWolfram Sang 46352478925SWolfram Sang tmu1: timer@e6fc0000 { 46452478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 46552478925SWolfram Sang reg = <0 0xe6fc0000 0 0x30>; 46652478925SWolfram Sang interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 46752478925SWolfram Sang <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 46852478925SWolfram Sang <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>; 46952478925SWolfram Sang clocks = <&cpg CPG_MOD 714>; 47052478925SWolfram Sang clock-names = "fck"; 47152478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 47252478925SWolfram Sang resets = <&cpg 714>; 47352478925SWolfram Sang status = "disabled"; 47452478925SWolfram Sang }; 47552478925SWolfram Sang 47652478925SWolfram Sang tmu2: timer@e6fd0000 { 47752478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 47852478925SWolfram Sang reg = <0 0xe6fd0000 0 0x30>; 47952478925SWolfram Sang interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 48052478925SWolfram Sang <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 48152478925SWolfram Sang <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 48252478925SWolfram Sang clocks = <&cpg CPG_MOD 715>; 48352478925SWolfram Sang clock-names = "fck"; 48452478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 48552478925SWolfram Sang resets = <&cpg 715>; 48652478925SWolfram Sang status = "disabled"; 48752478925SWolfram Sang }; 48852478925SWolfram Sang 48952478925SWolfram Sang tmu3: timer@e6fe0000 { 49052478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 49152478925SWolfram Sang reg = <0 0xe6fe0000 0 0x30>; 49252478925SWolfram Sang interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 49352478925SWolfram Sang <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 49452478925SWolfram Sang <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>; 49552478925SWolfram Sang clocks = <&cpg CPG_MOD 716>; 49652478925SWolfram Sang clock-names = "fck"; 49752478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 49852478925SWolfram Sang resets = <&cpg 716>; 49952478925SWolfram Sang status = "disabled"; 50052478925SWolfram Sang }; 50152478925SWolfram Sang 50252478925SWolfram Sang tmu4: timer@ffc00000 { 50352478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 50452478925SWolfram Sang reg = <0 0xffc00000 0 0x30>; 50552478925SWolfram Sang interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 50652478925SWolfram Sang <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 50752478925SWolfram Sang <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 50852478925SWolfram Sang clocks = <&cpg CPG_MOD 717>; 50952478925SWolfram Sang clock-names = "fck"; 51052478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 51152478925SWolfram Sang resets = <&cpg 717>; 51252478925SWolfram Sang status = "disabled"; 51352478925SWolfram Sang }; 51452478925SWolfram Sang 515ff77ba05SGeert Uytterhoeven i2c0: i2c@e6500000 { 516ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 517ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 518ff77ba05SGeert Uytterhoeven reg = <0 0xe6500000 0 0x40>; 519ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 520ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 518>; 52108f28288SGeert Uytterhoeven dmas = <&dmac0 0x91>, <&dmac0 0x90>, 52208f28288SGeert Uytterhoeven <&dmac1 0x91>, <&dmac1 0x90>; 52308f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 524ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 525ff77ba05SGeert Uytterhoeven resets = <&cpg 518>; 526ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 527ff77ba05SGeert Uytterhoeven #address-cells = <1>; 528ff77ba05SGeert Uytterhoeven #size-cells = <0>; 529ff77ba05SGeert Uytterhoeven status = "disabled"; 530ff77ba05SGeert Uytterhoeven }; 531ff77ba05SGeert Uytterhoeven 532ff77ba05SGeert Uytterhoeven i2c1: i2c@e6508000 { 533ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 534ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 535ff77ba05SGeert Uytterhoeven reg = <0 0xe6508000 0 0x40>; 536ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 537ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 519>; 53808f28288SGeert Uytterhoeven dmas = <&dmac0 0x93>, <&dmac0 0x92>, 53908f28288SGeert Uytterhoeven <&dmac1 0x93>, <&dmac1 0x92>; 54008f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 541ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 542ff77ba05SGeert Uytterhoeven resets = <&cpg 519>; 543ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 544ff77ba05SGeert Uytterhoeven #address-cells = <1>; 545ff77ba05SGeert Uytterhoeven #size-cells = <0>; 546ff77ba05SGeert Uytterhoeven status = "disabled"; 547ff77ba05SGeert Uytterhoeven }; 548ff77ba05SGeert Uytterhoeven 549ff77ba05SGeert Uytterhoeven i2c2: i2c@e6510000 { 550ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 551ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 552ff77ba05SGeert Uytterhoeven reg = <0 0xe6510000 0 0x40>; 553ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 554ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 520>; 55508f28288SGeert Uytterhoeven dmas = <&dmac0 0x95>, <&dmac0 0x94>, 55608f28288SGeert Uytterhoeven <&dmac1 0x95>, <&dmac1 0x94>; 55708f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 558ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 559ff77ba05SGeert Uytterhoeven resets = <&cpg 520>; 560ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 561ff77ba05SGeert Uytterhoeven #address-cells = <1>; 562ff77ba05SGeert Uytterhoeven #size-cells = <0>; 563ff77ba05SGeert Uytterhoeven status = "disabled"; 564ff77ba05SGeert Uytterhoeven }; 565ff77ba05SGeert Uytterhoeven 566ff77ba05SGeert Uytterhoeven i2c3: i2c@e66d0000 { 567ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 568ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 569ff77ba05SGeert Uytterhoeven reg = <0 0xe66d0000 0 0x40>; 570ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 571ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 521>; 57208f28288SGeert Uytterhoeven dmas = <&dmac0 0x97>, <&dmac0 0x96>, 57308f28288SGeert Uytterhoeven <&dmac1 0x97>, <&dmac1 0x96>; 57408f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 575ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 576ff77ba05SGeert Uytterhoeven resets = <&cpg 521>; 577ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 578ff77ba05SGeert Uytterhoeven #address-cells = <1>; 579ff77ba05SGeert Uytterhoeven #size-cells = <0>; 580ff77ba05SGeert Uytterhoeven status = "disabled"; 581ff77ba05SGeert Uytterhoeven }; 582ff77ba05SGeert Uytterhoeven 583ff77ba05SGeert Uytterhoeven i2c4: i2c@e66d8000 { 584ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 585ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 586ff77ba05SGeert Uytterhoeven reg = <0 0xe66d8000 0 0x40>; 587ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 588ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 522>; 58908f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 59008f28288SGeert Uytterhoeven dmas = <&dmac0 0x99>, <&dmac0 0x98>, 59108f28288SGeert Uytterhoeven <&dmac1 0x99>, <&dmac1 0x98>; 592ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 593ff77ba05SGeert Uytterhoeven resets = <&cpg 522>; 594ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 595ff77ba05SGeert Uytterhoeven #address-cells = <1>; 596ff77ba05SGeert Uytterhoeven #size-cells = <0>; 597ff77ba05SGeert Uytterhoeven status = "disabled"; 598ff77ba05SGeert Uytterhoeven }; 599ff77ba05SGeert Uytterhoeven 600ff77ba05SGeert Uytterhoeven i2c5: i2c@e66e0000 { 601ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 602ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 603ff77ba05SGeert Uytterhoeven reg = <0 0xe66e0000 0 0x40>; 604ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 605ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 523>; 60608f28288SGeert Uytterhoeven dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 60708f28288SGeert Uytterhoeven <&dmac1 0x9b>, <&dmac1 0x9a>; 60808f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 609ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 610ff77ba05SGeert Uytterhoeven resets = <&cpg 523>; 611ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 612ff77ba05SGeert Uytterhoeven #address-cells = <1>; 613ff77ba05SGeert Uytterhoeven #size-cells = <0>; 614ff77ba05SGeert Uytterhoeven status = "disabled"; 615ff77ba05SGeert Uytterhoeven }; 616ff77ba05SGeert Uytterhoeven 617987da486SYoshihiro Shimoda hscif0: serial@e6540000 { 618987da486SYoshihiro Shimoda compatible = "renesas,hscif-r8a779g0", 61939d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 62039d9dfc6SGeert Uytterhoeven reg = <0 0xe6540000 0 0x60>; 621ab2866f1SGeert Uytterhoeven interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 622987da486SYoshihiro Shimoda clocks = <&cpg CPG_MOD 514>, 623a4290d40SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 624987da486SYoshihiro Shimoda <&scif_clk>; 625987da486SYoshihiro Shimoda clock-names = "fck", "brg_int", "scif_clk"; 62608f28288SGeert Uytterhoeven dmas = <&dmac0 0x31>, <&dmac0 0x30>, 62708f28288SGeert Uytterhoeven <&dmac1 0x31>, <&dmac1 0x30>; 62808f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 629987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 630987da486SYoshihiro Shimoda resets = <&cpg 514>; 631987da486SYoshihiro Shimoda status = "disabled"; 632987da486SYoshihiro Shimoda }; 633987da486SYoshihiro Shimoda 63439d9dfc6SGeert Uytterhoeven hscif1: serial@e6550000 { 63539d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 63639d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 63739d9dfc6SGeert Uytterhoeven reg = <0 0xe6550000 0 0x60>; 63839d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 63939d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 515>, 64039d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 64139d9dfc6SGeert Uytterhoeven <&scif_clk>; 64239d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 64339d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x33>, <&dmac0 0x32>, 64439d9dfc6SGeert Uytterhoeven <&dmac1 0x33>, <&dmac1 0x32>; 64539d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 64639d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 64739d9dfc6SGeert Uytterhoeven resets = <&cpg 515>; 64839d9dfc6SGeert Uytterhoeven status = "disabled"; 64939d9dfc6SGeert Uytterhoeven }; 65039d9dfc6SGeert Uytterhoeven 65139d9dfc6SGeert Uytterhoeven hscif2: serial@e6560000 { 65239d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 65339d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 65439d9dfc6SGeert Uytterhoeven reg = <0 0xe6560000 0 0x60>; 65539d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 65639d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 516>, 65739d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 65839d9dfc6SGeert Uytterhoeven <&scif_clk>; 65939d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 66039d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x35>, <&dmac0 0x34>, 66139d9dfc6SGeert Uytterhoeven <&dmac1 0x35>, <&dmac1 0x34>; 66239d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 66339d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 66439d9dfc6SGeert Uytterhoeven resets = <&cpg 516>; 66539d9dfc6SGeert Uytterhoeven status = "disabled"; 66639d9dfc6SGeert Uytterhoeven }; 66739d9dfc6SGeert Uytterhoeven 66839d9dfc6SGeert Uytterhoeven hscif3: serial@e66a0000 { 66939d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 67039d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 67139d9dfc6SGeert Uytterhoeven reg = <0 0xe66a0000 0 0x60>; 67239d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 67339d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 517>, 67439d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 67539d9dfc6SGeert Uytterhoeven <&scif_clk>; 67639d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 67739d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x37>, <&dmac0 0x36>, 67839d9dfc6SGeert Uytterhoeven <&dmac1 0x37>, <&dmac1 0x36>; 67939d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 68039d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 68139d9dfc6SGeert Uytterhoeven resets = <&cpg 517>; 68239d9dfc6SGeert Uytterhoeven status = "disabled"; 68339d9dfc6SGeert Uytterhoeven }; 68439d9dfc6SGeert Uytterhoeven 685848c82dbSGeert Uytterhoeven avb0: ethernet@e6800000 { 686848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 687848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 688848c82dbSGeert Uytterhoeven reg = <0 0xe6800000 0 0x800>; 689848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 690848c82dbSGeert Uytterhoeven <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 691848c82dbSGeert Uytterhoeven <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 692848c82dbSGeert Uytterhoeven <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 693848c82dbSGeert Uytterhoeven <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 694848c82dbSGeert Uytterhoeven <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 695848c82dbSGeert Uytterhoeven <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 696848c82dbSGeert Uytterhoeven <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 697848c82dbSGeert Uytterhoeven <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 698848c82dbSGeert Uytterhoeven <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 699848c82dbSGeert Uytterhoeven <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 700848c82dbSGeert Uytterhoeven <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 701848c82dbSGeert Uytterhoeven <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 702848c82dbSGeert Uytterhoeven <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 703848c82dbSGeert Uytterhoeven <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 704848c82dbSGeert Uytterhoeven <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 705848c82dbSGeert Uytterhoeven <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 706848c82dbSGeert Uytterhoeven <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 707848c82dbSGeert Uytterhoeven <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 708848c82dbSGeert Uytterhoeven <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 709848c82dbSGeert Uytterhoeven <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 710848c82dbSGeert Uytterhoeven <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 711848c82dbSGeert Uytterhoeven <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 712848c82dbSGeert Uytterhoeven <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 713848c82dbSGeert Uytterhoeven <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 714848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 715848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 716848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 717848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 718848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 719848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 720848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 211>; 721848c82dbSGeert Uytterhoeven clock-names = "fck"; 722848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 723848c82dbSGeert Uytterhoeven resets = <&cpg 211>; 724848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 725848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 726848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 727848c82dbSGeert Uytterhoeven #address-cells = <1>; 728848c82dbSGeert Uytterhoeven #size-cells = <0>; 729848c82dbSGeert Uytterhoeven status = "disabled"; 730848c82dbSGeert Uytterhoeven }; 731848c82dbSGeert Uytterhoeven 732848c82dbSGeert Uytterhoeven avb1: ethernet@e6810000 { 733848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 734848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 735848c82dbSGeert Uytterhoeven reg = <0 0xe6810000 0 0x800>; 736848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 737848c82dbSGeert Uytterhoeven <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 738848c82dbSGeert Uytterhoeven <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 739848c82dbSGeert Uytterhoeven <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 740848c82dbSGeert Uytterhoeven <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 741848c82dbSGeert Uytterhoeven <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 742848c82dbSGeert Uytterhoeven <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 743848c82dbSGeert Uytterhoeven <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 744848c82dbSGeert Uytterhoeven <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 745848c82dbSGeert Uytterhoeven <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 746848c82dbSGeert Uytterhoeven <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 747848c82dbSGeert Uytterhoeven <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 748848c82dbSGeert Uytterhoeven <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 749848c82dbSGeert Uytterhoeven <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 750848c82dbSGeert Uytterhoeven <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 751848c82dbSGeert Uytterhoeven <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 752848c82dbSGeert Uytterhoeven <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 753848c82dbSGeert Uytterhoeven <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 754848c82dbSGeert Uytterhoeven <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 755848c82dbSGeert Uytterhoeven <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 756848c82dbSGeert Uytterhoeven <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 757848c82dbSGeert Uytterhoeven <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 758848c82dbSGeert Uytterhoeven <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 759848c82dbSGeert Uytterhoeven <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 760848c82dbSGeert Uytterhoeven <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 761848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 762848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 763848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 764848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 765848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 766848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 767848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 212>; 768848c82dbSGeert Uytterhoeven clock-names = "fck"; 769848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 770848c82dbSGeert Uytterhoeven resets = <&cpg 212>; 771848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 772848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 773848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 774848c82dbSGeert Uytterhoeven #address-cells = <1>; 775848c82dbSGeert Uytterhoeven #size-cells = <0>; 776848c82dbSGeert Uytterhoeven status = "disabled"; 777848c82dbSGeert Uytterhoeven }; 778848c82dbSGeert Uytterhoeven 779848c82dbSGeert Uytterhoeven avb2: ethernet@e6820000 { 780848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 781848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 782848c82dbSGeert Uytterhoeven reg = <0 0xe6820000 0 0x1000>; 783848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 784848c82dbSGeert Uytterhoeven <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 785848c82dbSGeert Uytterhoeven <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 786848c82dbSGeert Uytterhoeven <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 787848c82dbSGeert Uytterhoeven <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 788848c82dbSGeert Uytterhoeven <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 789848c82dbSGeert Uytterhoeven <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 790848c82dbSGeert Uytterhoeven <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 791848c82dbSGeert Uytterhoeven <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 792848c82dbSGeert Uytterhoeven <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 793848c82dbSGeert Uytterhoeven <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 794848c82dbSGeert Uytterhoeven <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 795848c82dbSGeert Uytterhoeven <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 796848c82dbSGeert Uytterhoeven <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 797848c82dbSGeert Uytterhoeven <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 798848c82dbSGeert Uytterhoeven <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 799848c82dbSGeert Uytterhoeven <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 800848c82dbSGeert Uytterhoeven <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 801848c82dbSGeert Uytterhoeven <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 802848c82dbSGeert Uytterhoeven <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 803848c82dbSGeert Uytterhoeven <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 804848c82dbSGeert Uytterhoeven <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 805848c82dbSGeert Uytterhoeven <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 806848c82dbSGeert Uytterhoeven <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 807848c82dbSGeert Uytterhoeven <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 808848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 809848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 810848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 811848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 812848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 813848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 814848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 213>; 815848c82dbSGeert Uytterhoeven clock-names = "fck"; 816848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 817848c82dbSGeert Uytterhoeven resets = <&cpg 213>; 818848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 819848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 820848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 821848c82dbSGeert Uytterhoeven #address-cells = <1>; 822848c82dbSGeert Uytterhoeven #size-cells = <0>; 823848c82dbSGeert Uytterhoeven status = "disabled"; 824848c82dbSGeert Uytterhoeven }; 825848c82dbSGeert Uytterhoeven 8265b9d1306SCongDang pwm0: pwm@e6e30000 { 8275b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8285b9d1306SCongDang reg = <0 0xe6e30000 0 0x10>; 8295b9d1306SCongDang #pwm-cells = <2>; 8305b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8315b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8325b9d1306SCongDang resets = <&cpg 628>; 8335b9d1306SCongDang status = "disabled"; 8345b9d1306SCongDang }; 8355b9d1306SCongDang 8365b9d1306SCongDang pwm1: pwm@e6e31000 { 8375b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8385b9d1306SCongDang reg = <0 0xe6e31000 0 0x10>; 8395b9d1306SCongDang #pwm-cells = <2>; 8405b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8415b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8425b9d1306SCongDang resets = <&cpg 628>; 8435b9d1306SCongDang status = "disabled"; 8445b9d1306SCongDang }; 8455b9d1306SCongDang 8465b9d1306SCongDang pwm2: pwm@e6e32000 { 8475b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8485b9d1306SCongDang reg = <0 0xe6e32000 0 0x10>; 8495b9d1306SCongDang #pwm-cells = <2>; 8505b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8515b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8525b9d1306SCongDang resets = <&cpg 628>; 8535b9d1306SCongDang status = "disabled"; 8545b9d1306SCongDang }; 8555b9d1306SCongDang 8565b9d1306SCongDang pwm3: pwm@e6e33000 { 8575b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8585b9d1306SCongDang reg = <0 0xe6e33000 0 0x10>; 8595b9d1306SCongDang #pwm-cells = <2>; 8605b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8615b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8625b9d1306SCongDang resets = <&cpg 628>; 8635b9d1306SCongDang status = "disabled"; 8645b9d1306SCongDang }; 8655b9d1306SCongDang 8665b9d1306SCongDang pwm4: pwm@e6e34000 { 8675b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8685b9d1306SCongDang reg = <0 0xe6e34000 0 0x10>; 8695b9d1306SCongDang #pwm-cells = <2>; 8705b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8715b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8725b9d1306SCongDang resets = <&cpg 628>; 8735b9d1306SCongDang status = "disabled"; 8745b9d1306SCongDang }; 8755b9d1306SCongDang 8765b9d1306SCongDang pwm5: pwm@e6e35000 { 8775b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8785b9d1306SCongDang reg = <0 0xe6e35000 0 0x10>; 8795b9d1306SCongDang #pwm-cells = <2>; 8805b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8815b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8825b9d1306SCongDang resets = <&cpg 628>; 8835b9d1306SCongDang status = "disabled"; 8845b9d1306SCongDang }; 8855b9d1306SCongDang 8865b9d1306SCongDang pwm6: pwm@e6e36000 { 8875b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8885b9d1306SCongDang reg = <0 0xe6e36000 0 0x10>; 8895b9d1306SCongDang #pwm-cells = <2>; 8905b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8915b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8925b9d1306SCongDang resets = <&cpg 628>; 8935b9d1306SCongDang status = "disabled"; 8945b9d1306SCongDang }; 8955b9d1306SCongDang 8965b9d1306SCongDang pwm7: pwm@e6e37000 { 8975b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8985b9d1306SCongDang reg = <0 0xe6e37000 0 0x10>; 8995b9d1306SCongDang #pwm-cells = <2>; 9005b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 9015b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 9025b9d1306SCongDang resets = <&cpg 628>; 9035b9d1306SCongDang status = "disabled"; 9045b9d1306SCongDang }; 9055b9d1306SCongDang 9065b9d1306SCongDang pwm8: pwm@e6e38000 { 9075b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 9085b9d1306SCongDang reg = <0 0xe6e38000 0 0x10>; 9095b9d1306SCongDang #pwm-cells = <2>; 9105b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 9115b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 9125b9d1306SCongDang resets = <&cpg 628>; 9135b9d1306SCongDang status = "disabled"; 9145b9d1306SCongDang }; 9155b9d1306SCongDang 9165b9d1306SCongDang pwm9: pwm@e6e39000 { 9175b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 9185b9d1306SCongDang reg = <0 0xe6e39000 0 0x10>; 9195b9d1306SCongDang #pwm-cells = <2>; 9205b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 9215b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 9225b9d1306SCongDang resets = <&cpg 628>; 9235b9d1306SCongDang status = "disabled"; 9245b9d1306SCongDang }; 9255b9d1306SCongDang 926a4c31c56SGeert Uytterhoeven scif0: serial@e6e60000 { 927a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 928a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 929a4c31c56SGeert Uytterhoeven reg = <0 0xe6e60000 0 64>; 930a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 931a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 702>, 932a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 933a4c31c56SGeert Uytterhoeven <&scif_clk>; 934a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 935a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x51>, <&dmac0 0x50>, 936a4c31c56SGeert Uytterhoeven <&dmac1 0x51>, <&dmac1 0x50>; 937a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 938a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 939a4c31c56SGeert Uytterhoeven resets = <&cpg 702>; 940a4c31c56SGeert Uytterhoeven status = "disabled"; 941a4c31c56SGeert Uytterhoeven }; 942a4c31c56SGeert Uytterhoeven 943a4c31c56SGeert Uytterhoeven scif1: serial@e6e68000 { 944a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 945a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 946a4c31c56SGeert Uytterhoeven reg = <0 0xe6e68000 0 64>; 947a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 948a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 703>, 949a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 950a4c31c56SGeert Uytterhoeven <&scif_clk>; 951a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 952a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x53>, <&dmac0 0x52>, 953a4c31c56SGeert Uytterhoeven <&dmac1 0x53>, <&dmac1 0x52>; 954a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 955a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 956a4c31c56SGeert Uytterhoeven resets = <&cpg 703>; 957a4c31c56SGeert Uytterhoeven status = "disabled"; 958a4c31c56SGeert Uytterhoeven }; 959a4c31c56SGeert Uytterhoeven 960a4c31c56SGeert Uytterhoeven scif3: serial@e6c50000 { 961a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 962a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 963a4c31c56SGeert Uytterhoeven reg = <0 0xe6c50000 0 64>; 964a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 965a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 704>, 966a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 967a4c31c56SGeert Uytterhoeven <&scif_clk>; 968a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 969a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x57>, <&dmac0 0x56>, 970a4c31c56SGeert Uytterhoeven <&dmac1 0x57>, <&dmac1 0x56>; 971a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 972a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 973a4c31c56SGeert Uytterhoeven resets = <&cpg 704>; 974a4c31c56SGeert Uytterhoeven status = "disabled"; 975a4c31c56SGeert Uytterhoeven }; 976a4c31c56SGeert Uytterhoeven 977a4c31c56SGeert Uytterhoeven scif4: serial@e6c40000 { 978a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 979a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 980a4c31c56SGeert Uytterhoeven reg = <0 0xe6c40000 0 64>; 981a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 982a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 705>, 983a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 984a4c31c56SGeert Uytterhoeven <&scif_clk>; 985a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 986a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x59>, <&dmac0 0x58>, 987a4c31c56SGeert Uytterhoeven <&dmac1 0x59>, <&dmac1 0x58>; 988a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 989a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 990a4c31c56SGeert Uytterhoeven resets = <&cpg 705>; 991a4c31c56SGeert Uytterhoeven status = "disabled"; 992a4c31c56SGeert Uytterhoeven }; 993a4c31c56SGeert Uytterhoeven 9944a76d4abSCongDang tpu: pwm@e6e80000 { 9954a76d4abSCongDang compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 9964a76d4abSCongDang reg = <0 0xe6e80000 0 0x148>; 9974a76d4abSCongDang interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 9984a76d4abSCongDang clocks = <&cpg CPG_MOD 718>; 9994a76d4abSCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 10004a76d4abSCongDang resets = <&cpg 718>; 10014a76d4abSCongDang #pwm-cells = <3>; 10024a76d4abSCongDang status = "disabled"; 10034a76d4abSCongDang }; 10044a76d4abSCongDang 1005e0768073SGeert Uytterhoeven msiof0: spi@e6e90000 { 1006e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1007e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1008e0768073SGeert Uytterhoeven reg = <0 0xe6e90000 0 0x0064>; 1009e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1010e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 618>; 1011e0768073SGeert Uytterhoeven dmas = <&dmac0 0x41>, <&dmac0 0x40>, 1012e0768073SGeert Uytterhoeven <&dmac1 0x41>, <&dmac1 0x40>; 1013e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1014e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1015e0768073SGeert Uytterhoeven resets = <&cpg 618>; 1016e0768073SGeert Uytterhoeven #address-cells = <1>; 1017e0768073SGeert Uytterhoeven #size-cells = <0>; 1018e0768073SGeert Uytterhoeven status = "disabled"; 1019e0768073SGeert Uytterhoeven }; 1020e0768073SGeert Uytterhoeven 1021e0768073SGeert Uytterhoeven msiof1: spi@e6ea0000 { 1022e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1023e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1024e0768073SGeert Uytterhoeven reg = <0 0xe6ea0000 0 0x0064>; 1025e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1026e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 619>; 1027e0768073SGeert Uytterhoeven dmas = <&dmac0 0x43>, <&dmac0 0x42>, 1028e0768073SGeert Uytterhoeven <&dmac1 0x43>, <&dmac1 0x42>; 1029e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1030e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1031e0768073SGeert Uytterhoeven resets = <&cpg 619>; 1032e0768073SGeert Uytterhoeven #address-cells = <1>; 1033e0768073SGeert Uytterhoeven #size-cells = <0>; 1034e0768073SGeert Uytterhoeven status = "disabled"; 1035e0768073SGeert Uytterhoeven }; 1036e0768073SGeert Uytterhoeven 1037e0768073SGeert Uytterhoeven msiof2: spi@e6c00000 { 1038e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1039e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1040e0768073SGeert Uytterhoeven reg = <0 0xe6c00000 0 0x0064>; 1041e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1042e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 620>; 1043e0768073SGeert Uytterhoeven dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1044e0768073SGeert Uytterhoeven <&dmac1 0x45>, <&dmac1 0x44>; 1045e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1046e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1047e0768073SGeert Uytterhoeven resets = <&cpg 620>; 1048e0768073SGeert Uytterhoeven #address-cells = <1>; 1049e0768073SGeert Uytterhoeven #size-cells = <0>; 1050e0768073SGeert Uytterhoeven status = "disabled"; 1051e0768073SGeert Uytterhoeven }; 1052e0768073SGeert Uytterhoeven 1053e0768073SGeert Uytterhoeven msiof3: spi@e6c10000 { 1054e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1055e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1056e0768073SGeert Uytterhoeven reg = <0 0xe6c10000 0 0x0064>; 1057e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1058e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 621>; 1059e0768073SGeert Uytterhoeven dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1060e0768073SGeert Uytterhoeven <&dmac1 0x47>, <&dmac1 0x46>; 1061e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1062e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1063e0768073SGeert Uytterhoeven resets = <&cpg 621>; 1064e0768073SGeert Uytterhoeven #address-cells = <1>; 1065e0768073SGeert Uytterhoeven #size-cells = <0>; 1066e0768073SGeert Uytterhoeven status = "disabled"; 1067e0768073SGeert Uytterhoeven }; 1068e0768073SGeert Uytterhoeven 1069e0768073SGeert Uytterhoeven msiof4: spi@e6c20000 { 1070e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1071e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1072e0768073SGeert Uytterhoeven reg = <0 0xe6c20000 0 0x0064>; 1073e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1074e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 622>; 1075e0768073SGeert Uytterhoeven dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1076e0768073SGeert Uytterhoeven <&dmac1 0x49>, <&dmac1 0x48>; 1077e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1078e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1079e0768073SGeert Uytterhoeven resets = <&cpg 622>; 1080e0768073SGeert Uytterhoeven #address-cells = <1>; 1081e0768073SGeert Uytterhoeven #size-cells = <0>; 1082e0768073SGeert Uytterhoeven status = "disabled"; 1083e0768073SGeert Uytterhoeven }; 1084e0768073SGeert Uytterhoeven 1085e0768073SGeert Uytterhoeven msiof5: spi@e6c28000 { 1086e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1087e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1088e0768073SGeert Uytterhoeven reg = <0 0xe6c28000 0 0x0064>; 1089e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1090e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 623>; 1091e0768073SGeert Uytterhoeven dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1092e0768073SGeert Uytterhoeven <&dmac1 0x4b>, <&dmac1 0x4a>; 1093e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1094e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1095e0768073SGeert Uytterhoeven resets = <&cpg 623>; 1096e0768073SGeert Uytterhoeven #address-cells = <1>; 1097e0768073SGeert Uytterhoeven #size-cells = <0>; 1098e0768073SGeert Uytterhoeven status = "disabled"; 1099e0768073SGeert Uytterhoeven }; 1100e0768073SGeert Uytterhoeven 110108f28288SGeert Uytterhoeven dmac0: dma-controller@e7350000 { 110208f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 110308f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 110408f28288SGeert Uytterhoeven reg = <0 0xe7350000 0 0x1000>, 110508f28288SGeert Uytterhoeven <0 0xe7300000 0 0x10000>; 110608f28288SGeert Uytterhoeven interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 110708f28288SGeert Uytterhoeven <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 110808f28288SGeert Uytterhoeven <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 110908f28288SGeert Uytterhoeven <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 111008f28288SGeert Uytterhoeven <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 111108f28288SGeert Uytterhoeven <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 111208f28288SGeert Uytterhoeven <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 111308f28288SGeert Uytterhoeven <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 111408f28288SGeert Uytterhoeven <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 111508f28288SGeert Uytterhoeven <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 111608f28288SGeert Uytterhoeven <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 111708f28288SGeert Uytterhoeven <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 111808f28288SGeert Uytterhoeven <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 111908f28288SGeert Uytterhoeven <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 112008f28288SGeert Uytterhoeven <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 112108f28288SGeert Uytterhoeven <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 112208f28288SGeert Uytterhoeven <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 112308f28288SGeert Uytterhoeven interrupt-names = "error", 112408f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 112508f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 112608f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 112708f28288SGeert Uytterhoeven "ch14", "ch15"; 112808f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 709>; 112908f28288SGeert Uytterhoeven clock-names = "fck"; 113008f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 113108f28288SGeert Uytterhoeven resets = <&cpg 709>; 113208f28288SGeert Uytterhoeven #dma-cells = <1>; 113308f28288SGeert Uytterhoeven dma-channels = <16>; 113408f28288SGeert Uytterhoeven }; 113508f28288SGeert Uytterhoeven 113608f28288SGeert Uytterhoeven dmac1: dma-controller@e7351000 { 113708f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 113808f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 113908f28288SGeert Uytterhoeven reg = <0 0xe7351000 0 0x1000>, 114008f28288SGeert Uytterhoeven <0 0xe7310000 0 0x10000>; 114108f28288SGeert Uytterhoeven interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 114208f28288SGeert Uytterhoeven <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 114308f28288SGeert Uytterhoeven <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 114408f28288SGeert Uytterhoeven <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 114508f28288SGeert Uytterhoeven <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 114608f28288SGeert Uytterhoeven <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 114708f28288SGeert Uytterhoeven <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 114808f28288SGeert Uytterhoeven <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 114908f28288SGeert Uytterhoeven <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 115008f28288SGeert Uytterhoeven <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 115108f28288SGeert Uytterhoeven <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 115208f28288SGeert Uytterhoeven <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 115308f28288SGeert Uytterhoeven <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 115408f28288SGeert Uytterhoeven <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 115508f28288SGeert Uytterhoeven <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 115608f28288SGeert Uytterhoeven <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 115708f28288SGeert Uytterhoeven <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 115808f28288SGeert Uytterhoeven interrupt-names = "error", 115908f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 116008f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 116108f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 116208f28288SGeert Uytterhoeven "ch14", "ch15"; 116308f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 710>; 116408f28288SGeert Uytterhoeven clock-names = "fck"; 116508f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 116608f28288SGeert Uytterhoeven resets = <&cpg 710>; 116708f28288SGeert Uytterhoeven #dma-cells = <1>; 116808f28288SGeert Uytterhoeven dma-channels = <16>; 116908f28288SGeert Uytterhoeven }; 117008f28288SGeert Uytterhoeven 1171bc7bf913SGeert Uytterhoeven mmc0: mmc@ee140000 { 1172bc7bf913SGeert Uytterhoeven compatible = "renesas,sdhi-r8a779g0", 1173bc7bf913SGeert Uytterhoeven "renesas,rcar-gen4-sdhi"; 1174bc7bf913SGeert Uytterhoeven reg = <0 0xee140000 0 0x2000>; 1175bc7bf913SGeert Uytterhoeven interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1176bc7bf913SGeert Uytterhoeven clocks = <&cpg CPG_MOD 706>, 1177bc7bf913SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1178bc7bf913SGeert Uytterhoeven clock-names = "core", "clkh"; 1179bc7bf913SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1180bc7bf913SGeert Uytterhoeven resets = <&cpg 706>; 1181bc7bf913SGeert Uytterhoeven max-frequency = <200000000>; 1182bc7bf913SGeert Uytterhoeven status = "disabled"; 1183bc7bf913SGeert Uytterhoeven }; 1184bc7bf913SGeert Uytterhoeven 1185d5014bedSHai Pham rpc: spi@ee200000 { 1186d5014bedSHai Pham compatible = "renesas,r8a779g0-rpc-if", 1187d5014bedSHai Pham "renesas,rcar-gen4-rpc-if"; 1188d5014bedSHai Pham reg = <0 0xee200000 0 0x200>, 1189d5014bedSHai Pham <0 0x08000000 0 0x04000000>, 1190d5014bedSHai Pham <0 0xee208000 0 0x100>; 1191d5014bedSHai Pham reg-names = "regs", "dirmap", "wbuf"; 1192d5014bedSHai Pham interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1193d5014bedSHai Pham clocks = <&cpg CPG_MOD 629>; 1194d5014bedSHai Pham power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1195d5014bedSHai Pham resets = <&cpg 629>; 1196d5014bedSHai Pham #address-cells = <1>; 1197d5014bedSHai Pham #size-cells = <0>; 1198d5014bedSHai Pham status = "disabled"; 1199d5014bedSHai Pham }; 1200d5014bedSHai Pham 1201987da486SYoshihiro Shimoda gic: interrupt-controller@f1000000 { 1202987da486SYoshihiro Shimoda compatible = "arm,gic-v3"; 1203987da486SYoshihiro Shimoda #interrupt-cells = <3>; 1204987da486SYoshihiro Shimoda #address-cells = <0>; 1205987da486SYoshihiro Shimoda interrupt-controller; 1206987da486SYoshihiro Shimoda reg = <0x0 0xf1000000 0 0x20000>, 1207987da486SYoshihiro Shimoda <0x0 0xf1060000 0 0x110000>; 1208987da486SYoshihiro Shimoda interrupts = <GIC_PPI 9 120968c9c53dSGeert Uytterhoeven (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1210987da486SYoshihiro Shimoda }; 1211987da486SYoshihiro Shimoda 121295d60f13STomi Valkeinen fcpvd0: fcp@fea10000 { 121395d60f13STomi Valkeinen compatible = "renesas,fcpv"; 121495d60f13STomi Valkeinen reg = <0 0xfea10000 0 0x200>; 121595d60f13STomi Valkeinen clocks = <&cpg CPG_MOD 508>; 121695d60f13STomi Valkeinen power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 121795d60f13STomi Valkeinen resets = <&cpg 508>; 121895d60f13STomi Valkeinen }; 121995d60f13STomi Valkeinen 122095d60f13STomi Valkeinen fcpvd1: fcp@fea11000 { 122195d60f13STomi Valkeinen compatible = "renesas,fcpv"; 122295d60f13STomi Valkeinen reg = <0 0xfea11000 0 0x200>; 122395d60f13STomi Valkeinen clocks = <&cpg CPG_MOD 509>; 122495d60f13STomi Valkeinen power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 122595d60f13STomi Valkeinen resets = <&cpg 509>; 122695d60f13STomi Valkeinen }; 122795d60f13STomi Valkeinen 122895d60f13STomi Valkeinen vspd0: vsp@fea20000 { 122995d60f13STomi Valkeinen compatible = "renesas,vsp2"; 123095d60f13STomi Valkeinen reg = <0 0xfea20000 0 0x7000>; 123195d60f13STomi Valkeinen interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; 123295d60f13STomi Valkeinen clocks = <&cpg CPG_MOD 830>; 123395d60f13STomi Valkeinen power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 123495d60f13STomi Valkeinen resets = <&cpg 830>; 123595d60f13STomi Valkeinen 123695d60f13STomi Valkeinen renesas,fcp = <&fcpvd0>; 123795d60f13STomi Valkeinen }; 123895d60f13STomi Valkeinen 123995d60f13STomi Valkeinen vspd1: vsp@fea28000 { 124095d60f13STomi Valkeinen compatible = "renesas,vsp2"; 124195d60f13STomi Valkeinen reg = <0 0xfea28000 0 0x7000>; 124295d60f13STomi Valkeinen interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; 124395d60f13STomi Valkeinen clocks = <&cpg CPG_MOD 831>; 124495d60f13STomi Valkeinen power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 124595d60f13STomi Valkeinen resets = <&cpg 831>; 124695d60f13STomi Valkeinen 124795d60f13STomi Valkeinen renesas,fcp = <&fcpvd1>; 124895d60f13STomi Valkeinen }; 124995d60f13STomi Valkeinen 125095d60f13STomi Valkeinen du: display@feb00000 { 125195d60f13STomi Valkeinen compatible = "renesas,du-r8a779g0"; 125295d60f13STomi Valkeinen reg = <0 0xfeb00000 0 0x40000>; 125395d60f13STomi Valkeinen interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, 125495d60f13STomi Valkeinen <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; 125595d60f13STomi Valkeinen clocks = <&cpg CPG_MOD 411>; 125695d60f13STomi Valkeinen clock-names = "du.0"; 125795d60f13STomi Valkeinen power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 125895d60f13STomi Valkeinen resets = <&cpg 411>; 125995d60f13STomi Valkeinen reset-names = "du.0"; 126095d60f13STomi Valkeinen renesas,vsps = <&vspd0 0>, <&vspd1 0>; 126195d60f13STomi Valkeinen 126295d60f13STomi Valkeinen status = "disabled"; 126395d60f13STomi Valkeinen 126495d60f13STomi Valkeinen ports { 126595d60f13STomi Valkeinen #address-cells = <1>; 126695d60f13STomi Valkeinen #size-cells = <0>; 126795d60f13STomi Valkeinen 126895d60f13STomi Valkeinen port@0 { 126995d60f13STomi Valkeinen reg = <0>; 127095d60f13STomi Valkeinen du_out_dsi0: endpoint { 127195d60f13STomi Valkeinen remote-endpoint = <&dsi0_in>; 127295d60f13STomi Valkeinen }; 127395d60f13STomi Valkeinen }; 127495d60f13STomi Valkeinen 127595d60f13STomi Valkeinen port@1 { 127695d60f13STomi Valkeinen reg = <1>; 127795d60f13STomi Valkeinen du_out_dsi1: endpoint { 127895d60f13STomi Valkeinen remote-endpoint = <&dsi1_in>; 127995d60f13STomi Valkeinen }; 128095d60f13STomi Valkeinen }; 128195d60f13STomi Valkeinen }; 128295d60f13STomi Valkeinen }; 128395d60f13STomi Valkeinen 128495d60f13STomi Valkeinen dsi0: dsi-encoder@fed80000 { 128595d60f13STomi Valkeinen compatible = "renesas,r8a779g0-dsi-csi2-tx"; 128695d60f13STomi Valkeinen reg = <0 0xfed80000 0 0x10000>; 128795d60f13STomi Valkeinen clocks = <&cpg CPG_MOD 415>, 128895d60f13STomi Valkeinen <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 128995d60f13STomi Valkeinen <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 129095d60f13STomi Valkeinen clock-names = "fck", "dsi", "pll"; 129195d60f13STomi Valkeinen power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 129295d60f13STomi Valkeinen resets = <&cpg 415>; 129395d60f13STomi Valkeinen 129495d60f13STomi Valkeinen status = "disabled"; 129595d60f13STomi Valkeinen 129695d60f13STomi Valkeinen ports { 129795d60f13STomi Valkeinen #address-cells = <1>; 129895d60f13STomi Valkeinen #size-cells = <0>; 129995d60f13STomi Valkeinen 130095d60f13STomi Valkeinen port@0 { 130195d60f13STomi Valkeinen reg = <0>; 130295d60f13STomi Valkeinen dsi0_in: endpoint { 130395d60f13STomi Valkeinen remote-endpoint = <&du_out_dsi0>; 130495d60f13STomi Valkeinen }; 130595d60f13STomi Valkeinen }; 130695d60f13STomi Valkeinen 130795d60f13STomi Valkeinen port@1 { 130895d60f13STomi Valkeinen reg = <1>; 130995d60f13STomi Valkeinen }; 131095d60f13STomi Valkeinen }; 131195d60f13STomi Valkeinen }; 131295d60f13STomi Valkeinen 131395d60f13STomi Valkeinen dsi1: dsi-encoder@fed90000 { 131495d60f13STomi Valkeinen compatible = "renesas,r8a779g0-dsi-csi2-tx"; 131595d60f13STomi Valkeinen reg = <0 0xfed90000 0 0x10000>; 131695d60f13STomi Valkeinen clocks = <&cpg CPG_MOD 416>, 131795d60f13STomi Valkeinen <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 131895d60f13STomi Valkeinen <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 131995d60f13STomi Valkeinen clock-names = "fck", "dsi", "pll"; 132095d60f13STomi Valkeinen power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 132195d60f13STomi Valkeinen resets = <&cpg 416>; 132295d60f13STomi Valkeinen 132395d60f13STomi Valkeinen status = "disabled"; 132495d60f13STomi Valkeinen 132595d60f13STomi Valkeinen ports { 132695d60f13STomi Valkeinen #address-cells = <1>; 132795d60f13STomi Valkeinen #size-cells = <0>; 132895d60f13STomi Valkeinen 132995d60f13STomi Valkeinen port@0 { 133095d60f13STomi Valkeinen reg = <0>; 133195d60f13STomi Valkeinen dsi1_in: endpoint { 133295d60f13STomi Valkeinen remote-endpoint = <&du_out_dsi1>; 133395d60f13STomi Valkeinen }; 133495d60f13STomi Valkeinen }; 133595d60f13STomi Valkeinen 133695d60f13STomi Valkeinen port@1 { 133795d60f13STomi Valkeinen reg = <1>; 133895d60f13STomi Valkeinen }; 133995d60f13STomi Valkeinen }; 134095d60f13STomi Valkeinen }; 134195d60f13STomi Valkeinen 1342987da486SYoshihiro Shimoda prr: chipid@fff00044 { 1343987da486SYoshihiro Shimoda compatible = "renesas,prr"; 1344987da486SYoshihiro Shimoda reg = <0 0xfff00044 0 4>; 1345987da486SYoshihiro Shimoda }; 1346987da486SYoshihiro Shimoda }; 1347987da486SYoshihiro Shimoda 1348987da486SYoshihiro Shimoda timer { 1349987da486SYoshihiro Shimoda compatible = "arm,armv8-timer"; 135068c9c53dSGeert Uytterhoeven interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 135168c9c53dSGeert Uytterhoeven <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 135268c9c53dSGeert Uytterhoeven <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 135368c9c53dSGeert Uytterhoeven <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1354987da486SYoshihiro Shimoda }; 1355987da486SYoshihiro Shimoda}; 1356