1987da486SYoshihiro Shimoda// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2987da486SYoshihiro Shimoda/* 3987da486SYoshihiro Shimoda * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4987da486SYoshihiro Shimoda * 5987da486SYoshihiro Shimoda * Copyright (C) 2022 Renesas Electronics Corp. 6987da486SYoshihiro Shimoda */ 7987da486SYoshihiro Shimoda 8987da486SYoshihiro Shimoda#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9987da486SYoshihiro Shimoda#include <dt-bindings/interrupt-controller/arm-gic.h> 10987da486SYoshihiro Shimoda#include <dt-bindings/power/r8a779g0-sysc.h> 11987da486SYoshihiro Shimoda 12987da486SYoshihiro Shimoda/ { 13987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0"; 14987da486SYoshihiro Shimoda #address-cells = <2>; 15987da486SYoshihiro Shimoda #size-cells = <2>; 16987da486SYoshihiro Shimoda 17987da486SYoshihiro Shimoda cpus { 18987da486SYoshihiro Shimoda #address-cells = <1>; 19987da486SYoshihiro Shimoda #size-cells = <0>; 20987da486SYoshihiro Shimoda 2168c9c53dSGeert Uytterhoeven cpu-map { 2268c9c53dSGeert Uytterhoeven cluster0 { 2368c9c53dSGeert Uytterhoeven core0 { 2468c9c53dSGeert Uytterhoeven cpu = <&a76_0>; 2568c9c53dSGeert Uytterhoeven }; 2668c9c53dSGeert Uytterhoeven core1 { 2768c9c53dSGeert Uytterhoeven cpu = <&a76_1>; 2868c9c53dSGeert Uytterhoeven }; 2968c9c53dSGeert Uytterhoeven }; 3068c9c53dSGeert Uytterhoeven 3168c9c53dSGeert Uytterhoeven cluster1 { 3268c9c53dSGeert Uytterhoeven core0 { 3368c9c53dSGeert Uytterhoeven cpu = <&a76_2>; 3468c9c53dSGeert Uytterhoeven }; 3568c9c53dSGeert Uytterhoeven core1 { 3668c9c53dSGeert Uytterhoeven cpu = <&a76_3>; 3768c9c53dSGeert Uytterhoeven }; 3868c9c53dSGeert Uytterhoeven }; 3968c9c53dSGeert Uytterhoeven }; 4068c9c53dSGeert Uytterhoeven 41987da486SYoshihiro Shimoda a76_0: cpu@0 { 42987da486SYoshihiro Shimoda compatible = "arm,cortex-a76"; 43987da486SYoshihiro Shimoda reg = <0>; 44987da486SYoshihiro Shimoda device_type = "cpu"; 45987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 46f0840721SGeert Uytterhoeven next-level-cache = <&L3_CA76_0>; 4768c9c53dSGeert Uytterhoeven enable-method = "psci"; 48*5bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 4968c9c53dSGeert Uytterhoeven }; 5068c9c53dSGeert Uytterhoeven 5168c9c53dSGeert Uytterhoeven a76_1: cpu@100 { 5268c9c53dSGeert Uytterhoeven compatible = "arm,cortex-a76"; 5368c9c53dSGeert Uytterhoeven reg = <0x100>; 5468c9c53dSGeert Uytterhoeven device_type = "cpu"; 5568c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 5668c9c53dSGeert Uytterhoeven next-level-cache = <&L3_CA76_0>; 5768c9c53dSGeert Uytterhoeven enable-method = "psci"; 58*5bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 5968c9c53dSGeert Uytterhoeven }; 6068c9c53dSGeert Uytterhoeven 6168c9c53dSGeert Uytterhoeven a76_2: cpu@10000 { 6268c9c53dSGeert Uytterhoeven compatible = "arm,cortex-a76"; 6368c9c53dSGeert Uytterhoeven reg = <0x10000>; 6468c9c53dSGeert Uytterhoeven device_type = "cpu"; 6568c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 6668c9c53dSGeert Uytterhoeven next-level-cache = <&L3_CA76_1>; 6768c9c53dSGeert Uytterhoeven enable-method = "psci"; 68*5bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 6968c9c53dSGeert Uytterhoeven }; 7068c9c53dSGeert Uytterhoeven 7168c9c53dSGeert Uytterhoeven a76_3: cpu@10100 { 7268c9c53dSGeert Uytterhoeven compatible = "arm,cortex-a76"; 7368c9c53dSGeert Uytterhoeven reg = <0x10100>; 7468c9c53dSGeert Uytterhoeven device_type = "cpu"; 7568c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 7668c9c53dSGeert Uytterhoeven next-level-cache = <&L3_CA76_1>; 7768c9c53dSGeert Uytterhoeven enable-method = "psci"; 78*5bb355a8SGeert Uytterhoeven cpu-idle-states = <&CPU_SLEEP_0>; 79*5bb355a8SGeert Uytterhoeven }; 80*5bb355a8SGeert Uytterhoeven 81*5bb355a8SGeert Uytterhoeven idle-states { 82*5bb355a8SGeert Uytterhoeven entry-method = "psci"; 83*5bb355a8SGeert Uytterhoeven 84*5bb355a8SGeert Uytterhoeven CPU_SLEEP_0: cpu-sleep-0 { 85*5bb355a8SGeert Uytterhoeven compatible = "arm,idle-state"; 86*5bb355a8SGeert Uytterhoeven arm,psci-suspend-param = <0x0010000>; 87*5bb355a8SGeert Uytterhoeven local-timer-stop; 88*5bb355a8SGeert Uytterhoeven entry-latency-us = <400>; 89*5bb355a8SGeert Uytterhoeven exit-latency-us = <500>; 90*5bb355a8SGeert Uytterhoeven min-residency-us = <4000>; 91*5bb355a8SGeert Uytterhoeven }; 92f0840721SGeert Uytterhoeven }; 93f0840721SGeert Uytterhoeven 94f0840721SGeert Uytterhoeven L3_CA76_0: cache-controller-0 { 95f0840721SGeert Uytterhoeven compatible = "cache"; 96f0840721SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A2E0D0>; 97f0840721SGeert Uytterhoeven cache-unified; 98f0840721SGeert Uytterhoeven cache-level = <3>; 99987da486SYoshihiro Shimoda }; 10068c9c53dSGeert Uytterhoeven 10168c9c53dSGeert Uytterhoeven L3_CA76_1: cache-controller-1 { 10268c9c53dSGeert Uytterhoeven compatible = "cache"; 10368c9c53dSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_A2E0D1>; 10468c9c53dSGeert Uytterhoeven cache-unified; 10568c9c53dSGeert Uytterhoeven cache-level = <3>; 10668c9c53dSGeert Uytterhoeven }; 10768c9c53dSGeert Uytterhoeven }; 10868c9c53dSGeert Uytterhoeven 10968c9c53dSGeert Uytterhoeven psci { 11068c9c53dSGeert Uytterhoeven compatible = "arm,psci-1.0", "arm,psci-0.2"; 11168c9c53dSGeert Uytterhoeven method = "smc"; 112987da486SYoshihiro Shimoda }; 113987da486SYoshihiro Shimoda 114987da486SYoshihiro Shimoda extal_clk: extal { 115987da486SYoshihiro Shimoda compatible = "fixed-clock"; 116987da486SYoshihiro Shimoda #clock-cells = <0>; 117987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 118987da486SYoshihiro Shimoda clock-frequency = <0>; 119987da486SYoshihiro Shimoda }; 120987da486SYoshihiro Shimoda 121987da486SYoshihiro Shimoda extalr_clk: extalr { 122987da486SYoshihiro Shimoda compatible = "fixed-clock"; 123987da486SYoshihiro Shimoda #clock-cells = <0>; 124987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 125987da486SYoshihiro Shimoda clock-frequency = <0>; 126987da486SYoshihiro Shimoda }; 127987da486SYoshihiro Shimoda 128987da486SYoshihiro Shimoda pmu_a76 { 129987da486SYoshihiro Shimoda compatible = "arm,cortex-a76-pmu"; 130987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 131987da486SYoshihiro Shimoda }; 132987da486SYoshihiro Shimoda 133987da486SYoshihiro Shimoda /* External SCIF clock - to be overridden by boards that provide it */ 134987da486SYoshihiro Shimoda scif_clk: scif { 135987da486SYoshihiro Shimoda compatible = "fixed-clock"; 136987da486SYoshihiro Shimoda #clock-cells = <0>; 137987da486SYoshihiro Shimoda clock-frequency = <0>; 138987da486SYoshihiro Shimoda }; 139987da486SYoshihiro Shimoda 140987da486SYoshihiro Shimoda soc: soc { 141987da486SYoshihiro Shimoda compatible = "simple-bus"; 142987da486SYoshihiro Shimoda interrupt-parent = <&gic>; 143987da486SYoshihiro Shimoda #address-cells = <2>; 144987da486SYoshihiro Shimoda #size-cells = <2>; 145987da486SYoshihiro Shimoda ranges; 146987da486SYoshihiro Shimoda 147a43306faSGeert Uytterhoeven rwdt: watchdog@e6020000 { 148a43306faSGeert Uytterhoeven compatible = "renesas,r8a779g0-wdt", 149a43306faSGeert Uytterhoeven "renesas,rcar-gen4-wdt"; 150a43306faSGeert Uytterhoeven reg = <0 0xe6020000 0 0x0c>; 151a43306faSGeert Uytterhoeven interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 152a43306faSGeert Uytterhoeven clocks = <&cpg CPG_MOD 907>; 153a43306faSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 154a43306faSGeert Uytterhoeven resets = <&cpg 907>; 155a43306faSGeert Uytterhoeven status = "disabled"; 156a43306faSGeert Uytterhoeven }; 157a43306faSGeert Uytterhoeven 1584cebce25SGeert Uytterhoeven pfc: pinctrl@e6050000 { 1594cebce25SGeert Uytterhoeven compatible = "renesas,pfc-r8a779g0"; 1604cebce25SGeert Uytterhoeven reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 1614cebce25SGeert Uytterhoeven <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 1624cebce25SGeert Uytterhoeven <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 1634cebce25SGeert Uytterhoeven <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 1644cebce25SGeert Uytterhoeven <0 0xe6068000 0 0x16c>; 1654cebce25SGeert Uytterhoeven }; 1664cebce25SGeert Uytterhoeven 167120c7a58SGeert Uytterhoeven gpio0: gpio@e6050180 { 168120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 169120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 170120c7a58SGeert Uytterhoeven reg = <0 0xe6050180 0 0x54>; 171120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 172120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 173120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 174120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 175120c7a58SGeert Uytterhoeven gpio-controller; 176120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 177120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 0 19>; 178120c7a58SGeert Uytterhoeven interrupt-controller; 179120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 180120c7a58SGeert Uytterhoeven }; 181120c7a58SGeert Uytterhoeven 182120c7a58SGeert Uytterhoeven gpio1: gpio@e6050980 { 183120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 184120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 185120c7a58SGeert Uytterhoeven reg = <0 0xe6050980 0 0x54>; 186120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 187120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 188120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 189120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 190120c7a58SGeert Uytterhoeven gpio-controller; 191120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 192120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 32 29>; 193120c7a58SGeert Uytterhoeven interrupt-controller; 194120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 195120c7a58SGeert Uytterhoeven }; 196120c7a58SGeert Uytterhoeven 197120c7a58SGeert Uytterhoeven gpio2: gpio@e6058180 { 198120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 199120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 200120c7a58SGeert Uytterhoeven reg = <0 0xe6058180 0 0x54>; 201120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 202120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 203120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 204120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 205120c7a58SGeert Uytterhoeven gpio-controller; 206120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 207120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 64 20>; 208120c7a58SGeert Uytterhoeven interrupt-controller; 209120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 210120c7a58SGeert Uytterhoeven }; 211120c7a58SGeert Uytterhoeven 212120c7a58SGeert Uytterhoeven gpio3: gpio@e6058980 { 213120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 214120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 215120c7a58SGeert Uytterhoeven reg = <0 0xe6058980 0 0x54>; 216120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 217120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 218120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 219120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 220120c7a58SGeert Uytterhoeven gpio-controller; 221120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 222120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 96 30>; 223120c7a58SGeert Uytterhoeven interrupt-controller; 224120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 225120c7a58SGeert Uytterhoeven }; 226120c7a58SGeert Uytterhoeven 227120c7a58SGeert Uytterhoeven gpio4: gpio@e6060180 { 228120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 229120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 230120c7a58SGeert Uytterhoeven reg = <0 0xe6060180 0 0x54>; 231120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 232120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 233120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 234120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 235120c7a58SGeert Uytterhoeven gpio-controller; 236120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 237120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 128 25>; 238120c7a58SGeert Uytterhoeven interrupt-controller; 239120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 240120c7a58SGeert Uytterhoeven }; 241120c7a58SGeert Uytterhoeven 242120c7a58SGeert Uytterhoeven gpio5: gpio@e6060980 { 243120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 244120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 245120c7a58SGeert Uytterhoeven reg = <0 0xe6060980 0 0x54>; 246120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 247120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 248120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 249120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 250120c7a58SGeert Uytterhoeven gpio-controller; 251120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 252120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 160 21>; 253120c7a58SGeert Uytterhoeven interrupt-controller; 254120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 255120c7a58SGeert Uytterhoeven }; 256120c7a58SGeert Uytterhoeven 257120c7a58SGeert Uytterhoeven gpio6: gpio@e6061180 { 258120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 259120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 260120c7a58SGeert Uytterhoeven reg = <0 0xe6061180 0 0x54>; 261120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 262120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 263120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 264120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 265120c7a58SGeert Uytterhoeven gpio-controller; 266120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 267120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 192 21>; 268120c7a58SGeert Uytterhoeven interrupt-controller; 269120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 270120c7a58SGeert Uytterhoeven }; 271120c7a58SGeert Uytterhoeven 272120c7a58SGeert Uytterhoeven gpio7: gpio@e6061980 { 273120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 274120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 275120c7a58SGeert Uytterhoeven reg = <0 0xe6061980 0 0x54>; 276120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 277120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 278120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 279120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 280120c7a58SGeert Uytterhoeven gpio-controller; 281120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 282120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 224 21>; 283120c7a58SGeert Uytterhoeven interrupt-controller; 284120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 285120c7a58SGeert Uytterhoeven }; 286120c7a58SGeert Uytterhoeven 287120c7a58SGeert Uytterhoeven gpio8: gpio@e6068180 { 288120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 289120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 290120c7a58SGeert Uytterhoeven reg = <0 0xe6068180 0 0x54>; 291120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 292120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 918>; 293120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 294120c7a58SGeert Uytterhoeven resets = <&cpg 918>; 295120c7a58SGeert Uytterhoeven gpio-controller; 296120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 297120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 256 14>; 298120c7a58SGeert Uytterhoeven interrupt-controller; 299120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 300120c7a58SGeert Uytterhoeven }; 301120c7a58SGeert Uytterhoeven 30240a6dd7bSThanh Quan cmt0: timer@e60f0000 { 30340a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt0", 30440a6dd7bSThanh Quan "renesas,rcar-gen4-cmt0"; 30540a6dd7bSThanh Quan reg = <0 0xe60f0000 0 0x1004>; 30640a6dd7bSThanh Quan interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 30740a6dd7bSThanh Quan <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 30840a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 910>; 30940a6dd7bSThanh Quan clock-names = "fck"; 31040a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 31140a6dd7bSThanh Quan resets = <&cpg 910>; 31240a6dd7bSThanh Quan status = "disabled"; 31340a6dd7bSThanh Quan }; 31440a6dd7bSThanh Quan 31540a6dd7bSThanh Quan cmt1: timer@e6130000 { 31640a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 31740a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 31840a6dd7bSThanh Quan reg = <0 0xe6130000 0 0x1004>; 31940a6dd7bSThanh Quan interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 32040a6dd7bSThanh Quan <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 32140a6dd7bSThanh Quan <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 32240a6dd7bSThanh Quan <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 32340a6dd7bSThanh Quan <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 32440a6dd7bSThanh Quan <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 32540a6dd7bSThanh Quan <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 32640a6dd7bSThanh Quan <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 32740a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 911>; 32840a6dd7bSThanh Quan clock-names = "fck"; 32940a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 33040a6dd7bSThanh Quan resets = <&cpg 911>; 33140a6dd7bSThanh Quan status = "disabled"; 33240a6dd7bSThanh Quan }; 33340a6dd7bSThanh Quan 33440a6dd7bSThanh Quan cmt2: timer@e6140000 { 33540a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 33640a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 33740a6dd7bSThanh Quan reg = <0 0xe6140000 0 0x1004>; 33840a6dd7bSThanh Quan interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 33940a6dd7bSThanh Quan <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 34040a6dd7bSThanh Quan <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 34140a6dd7bSThanh Quan <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 34240a6dd7bSThanh Quan <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 34340a6dd7bSThanh Quan <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 34440a6dd7bSThanh Quan <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 34540a6dd7bSThanh Quan <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 34640a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 912>; 34740a6dd7bSThanh Quan clock-names = "fck"; 34840a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 34940a6dd7bSThanh Quan resets = <&cpg 912>; 35040a6dd7bSThanh Quan status = "disabled"; 35140a6dd7bSThanh Quan }; 35240a6dd7bSThanh Quan 35340a6dd7bSThanh Quan cmt3: timer@e6148000 { 35440a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 35540a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 35640a6dd7bSThanh Quan reg = <0 0xe6148000 0 0x1004>; 35740a6dd7bSThanh Quan interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 35840a6dd7bSThanh Quan <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 35940a6dd7bSThanh Quan <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 36040a6dd7bSThanh Quan <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 36140a6dd7bSThanh Quan <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 36240a6dd7bSThanh Quan <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 36340a6dd7bSThanh Quan <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 36440a6dd7bSThanh Quan <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 36540a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 913>; 36640a6dd7bSThanh Quan clock-names = "fck"; 36740a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 36840a6dd7bSThanh Quan resets = <&cpg 913>; 36940a6dd7bSThanh Quan status = "disabled"; 37040a6dd7bSThanh Quan }; 37140a6dd7bSThanh Quan 372987da486SYoshihiro Shimoda cpg: clock-controller@e6150000 { 373987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-cpg-mssr"; 374987da486SYoshihiro Shimoda reg = <0 0xe6150000 0 0x4000>; 375987da486SYoshihiro Shimoda clocks = <&extal_clk>, <&extalr_clk>; 376987da486SYoshihiro Shimoda clock-names = "extal", "extalr"; 377987da486SYoshihiro Shimoda #clock-cells = <2>; 378987da486SYoshihiro Shimoda #power-domain-cells = <0>; 379987da486SYoshihiro Shimoda #reset-cells = <1>; 380987da486SYoshihiro Shimoda }; 381987da486SYoshihiro Shimoda 382987da486SYoshihiro Shimoda rst: reset-controller@e6160000 { 383987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-rst"; 384987da486SYoshihiro Shimoda reg = <0 0xe6160000 0 0x4000>; 385987da486SYoshihiro Shimoda }; 386987da486SYoshihiro Shimoda 387987da486SYoshihiro Shimoda sysc: system-controller@e6180000 { 388987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-sysc"; 389987da486SYoshihiro Shimoda reg = <0 0xe6180000 0 0x4000>; 390987da486SYoshihiro Shimoda #power-domain-cells = <1>; 391987da486SYoshihiro Shimoda }; 392987da486SYoshihiro Shimoda 393b6ce840bSGeert Uytterhoeven intc_ex: interrupt-controller@e61c0000 { 394b6ce840bSGeert Uytterhoeven compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 395b6ce840bSGeert Uytterhoeven #interrupt-cells = <2>; 396b6ce840bSGeert Uytterhoeven interrupt-controller; 397b6ce840bSGeert Uytterhoeven reg = <0 0xe61c0000 0 0x200>; 398b6ce840bSGeert Uytterhoeven interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 399b6ce840bSGeert Uytterhoeven <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 400b6ce840bSGeert Uytterhoeven <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 401b6ce840bSGeert Uytterhoeven <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 402b6ce840bSGeert Uytterhoeven <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 403b6ce840bSGeert Uytterhoeven <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 404b6ce840bSGeert Uytterhoeven clocks = <&cpg CPG_MOD 611>; 405b6ce840bSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 406b6ce840bSGeert Uytterhoeven resets = <&cpg 611>; 407b6ce840bSGeert Uytterhoeven }; 408b6ce840bSGeert Uytterhoeven 40952478925SWolfram Sang tmu0: timer@e61e0000 { 41052478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 41152478925SWolfram Sang reg = <0 0xe61e0000 0 0x30>; 41252478925SWolfram Sang interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 41352478925SWolfram Sang <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 41452478925SWolfram Sang <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 41552478925SWolfram Sang clocks = <&cpg CPG_MOD 713>; 41652478925SWolfram Sang clock-names = "fck"; 41752478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 41852478925SWolfram Sang resets = <&cpg 713>; 41952478925SWolfram Sang status = "disabled"; 42052478925SWolfram Sang }; 42152478925SWolfram Sang 42252478925SWolfram Sang tmu1: timer@e6fc0000 { 42352478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 42452478925SWolfram Sang reg = <0 0xe6fc0000 0 0x30>; 42552478925SWolfram Sang interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 42652478925SWolfram Sang <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 42752478925SWolfram Sang <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>; 42852478925SWolfram Sang clocks = <&cpg CPG_MOD 714>; 42952478925SWolfram Sang clock-names = "fck"; 43052478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 43152478925SWolfram Sang resets = <&cpg 714>; 43252478925SWolfram Sang status = "disabled"; 43352478925SWolfram Sang }; 43452478925SWolfram Sang 43552478925SWolfram Sang tmu2: timer@e6fd0000 { 43652478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 43752478925SWolfram Sang reg = <0 0xe6fd0000 0 0x30>; 43852478925SWolfram Sang interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 43952478925SWolfram Sang <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 44052478925SWolfram Sang <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 44152478925SWolfram Sang clocks = <&cpg CPG_MOD 715>; 44252478925SWolfram Sang clock-names = "fck"; 44352478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 44452478925SWolfram Sang resets = <&cpg 715>; 44552478925SWolfram Sang status = "disabled"; 44652478925SWolfram Sang }; 44752478925SWolfram Sang 44852478925SWolfram Sang tmu3: timer@e6fe0000 { 44952478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 45052478925SWolfram Sang reg = <0 0xe6fe0000 0 0x30>; 45152478925SWolfram Sang interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 45252478925SWolfram Sang <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 45352478925SWolfram Sang <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>; 45452478925SWolfram Sang clocks = <&cpg CPG_MOD 716>; 45552478925SWolfram Sang clock-names = "fck"; 45652478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 45752478925SWolfram Sang resets = <&cpg 716>; 45852478925SWolfram Sang status = "disabled"; 45952478925SWolfram Sang }; 46052478925SWolfram Sang 46152478925SWolfram Sang tmu4: timer@ffc00000 { 46252478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 46352478925SWolfram Sang reg = <0 0xffc00000 0 0x30>; 46452478925SWolfram Sang interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 46552478925SWolfram Sang <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 46652478925SWolfram Sang <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 46752478925SWolfram Sang clocks = <&cpg CPG_MOD 717>; 46852478925SWolfram Sang clock-names = "fck"; 46952478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 47052478925SWolfram Sang resets = <&cpg 717>; 47152478925SWolfram Sang status = "disabled"; 47252478925SWolfram Sang }; 47352478925SWolfram Sang 474ff77ba05SGeert Uytterhoeven i2c0: i2c@e6500000 { 475ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 476ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 477ff77ba05SGeert Uytterhoeven reg = <0 0xe6500000 0 0x40>; 478ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 479ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 518>; 48008f28288SGeert Uytterhoeven dmas = <&dmac0 0x91>, <&dmac0 0x90>, 48108f28288SGeert Uytterhoeven <&dmac1 0x91>, <&dmac1 0x90>; 48208f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 483ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 484ff77ba05SGeert Uytterhoeven resets = <&cpg 518>; 485ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 486ff77ba05SGeert Uytterhoeven #address-cells = <1>; 487ff77ba05SGeert Uytterhoeven #size-cells = <0>; 488ff77ba05SGeert Uytterhoeven status = "disabled"; 489ff77ba05SGeert Uytterhoeven }; 490ff77ba05SGeert Uytterhoeven 491ff77ba05SGeert Uytterhoeven i2c1: i2c@e6508000 { 492ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 493ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 494ff77ba05SGeert Uytterhoeven reg = <0 0xe6508000 0 0x40>; 495ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 496ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 519>; 49708f28288SGeert Uytterhoeven dmas = <&dmac0 0x93>, <&dmac0 0x92>, 49808f28288SGeert Uytterhoeven <&dmac1 0x93>, <&dmac1 0x92>; 49908f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 500ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 501ff77ba05SGeert Uytterhoeven resets = <&cpg 519>; 502ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 503ff77ba05SGeert Uytterhoeven #address-cells = <1>; 504ff77ba05SGeert Uytterhoeven #size-cells = <0>; 505ff77ba05SGeert Uytterhoeven status = "disabled"; 506ff77ba05SGeert Uytterhoeven }; 507ff77ba05SGeert Uytterhoeven 508ff77ba05SGeert Uytterhoeven i2c2: i2c@e6510000 { 509ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 510ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 511ff77ba05SGeert Uytterhoeven reg = <0 0xe6510000 0 0x40>; 512ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 513ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 520>; 51408f28288SGeert Uytterhoeven dmas = <&dmac0 0x95>, <&dmac0 0x94>, 51508f28288SGeert Uytterhoeven <&dmac1 0x95>, <&dmac1 0x94>; 51608f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 517ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 518ff77ba05SGeert Uytterhoeven resets = <&cpg 520>; 519ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 520ff77ba05SGeert Uytterhoeven #address-cells = <1>; 521ff77ba05SGeert Uytterhoeven #size-cells = <0>; 522ff77ba05SGeert Uytterhoeven status = "disabled"; 523ff77ba05SGeert Uytterhoeven }; 524ff77ba05SGeert Uytterhoeven 525ff77ba05SGeert Uytterhoeven i2c3: i2c@e66d0000 { 526ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 527ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 528ff77ba05SGeert Uytterhoeven reg = <0 0xe66d0000 0 0x40>; 529ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 530ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 521>; 53108f28288SGeert Uytterhoeven dmas = <&dmac0 0x97>, <&dmac0 0x96>, 53208f28288SGeert Uytterhoeven <&dmac1 0x97>, <&dmac1 0x96>; 53308f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 534ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 535ff77ba05SGeert Uytterhoeven resets = <&cpg 521>; 536ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 537ff77ba05SGeert Uytterhoeven #address-cells = <1>; 538ff77ba05SGeert Uytterhoeven #size-cells = <0>; 539ff77ba05SGeert Uytterhoeven status = "disabled"; 540ff77ba05SGeert Uytterhoeven }; 541ff77ba05SGeert Uytterhoeven 542ff77ba05SGeert Uytterhoeven i2c4: i2c@e66d8000 { 543ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 544ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 545ff77ba05SGeert Uytterhoeven reg = <0 0xe66d8000 0 0x40>; 546ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 547ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 522>; 54808f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 54908f28288SGeert Uytterhoeven dmas = <&dmac0 0x99>, <&dmac0 0x98>, 55008f28288SGeert Uytterhoeven <&dmac1 0x99>, <&dmac1 0x98>; 551ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 552ff77ba05SGeert Uytterhoeven resets = <&cpg 522>; 553ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 554ff77ba05SGeert Uytterhoeven #address-cells = <1>; 555ff77ba05SGeert Uytterhoeven #size-cells = <0>; 556ff77ba05SGeert Uytterhoeven status = "disabled"; 557ff77ba05SGeert Uytterhoeven }; 558ff77ba05SGeert Uytterhoeven 559ff77ba05SGeert Uytterhoeven i2c5: i2c@e66e0000 { 560ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 561ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 562ff77ba05SGeert Uytterhoeven reg = <0 0xe66e0000 0 0x40>; 563ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 564ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 523>; 56508f28288SGeert Uytterhoeven dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 56608f28288SGeert Uytterhoeven <&dmac1 0x9b>, <&dmac1 0x9a>; 56708f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 568ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 569ff77ba05SGeert Uytterhoeven resets = <&cpg 523>; 570ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 571ff77ba05SGeert Uytterhoeven #address-cells = <1>; 572ff77ba05SGeert Uytterhoeven #size-cells = <0>; 573ff77ba05SGeert Uytterhoeven status = "disabled"; 574ff77ba05SGeert Uytterhoeven }; 575ff77ba05SGeert Uytterhoeven 576987da486SYoshihiro Shimoda hscif0: serial@e6540000 { 577987da486SYoshihiro Shimoda compatible = "renesas,hscif-r8a779g0", 57839d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 57939d9dfc6SGeert Uytterhoeven reg = <0 0xe6540000 0 0x60>; 580ab2866f1SGeert Uytterhoeven interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 581987da486SYoshihiro Shimoda clocks = <&cpg CPG_MOD 514>, 582a4290d40SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 583987da486SYoshihiro Shimoda <&scif_clk>; 584987da486SYoshihiro Shimoda clock-names = "fck", "brg_int", "scif_clk"; 58508f28288SGeert Uytterhoeven dmas = <&dmac0 0x31>, <&dmac0 0x30>, 58608f28288SGeert Uytterhoeven <&dmac1 0x31>, <&dmac1 0x30>; 58708f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 588987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 589987da486SYoshihiro Shimoda resets = <&cpg 514>; 590987da486SYoshihiro Shimoda status = "disabled"; 591987da486SYoshihiro Shimoda }; 592987da486SYoshihiro Shimoda 59339d9dfc6SGeert Uytterhoeven hscif1: serial@e6550000 { 59439d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 59539d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 59639d9dfc6SGeert Uytterhoeven reg = <0 0xe6550000 0 0x60>; 59739d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 59839d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 515>, 59939d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 60039d9dfc6SGeert Uytterhoeven <&scif_clk>; 60139d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 60239d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x33>, <&dmac0 0x32>, 60339d9dfc6SGeert Uytterhoeven <&dmac1 0x33>, <&dmac1 0x32>; 60439d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 60539d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 60639d9dfc6SGeert Uytterhoeven resets = <&cpg 515>; 60739d9dfc6SGeert Uytterhoeven status = "disabled"; 60839d9dfc6SGeert Uytterhoeven }; 60939d9dfc6SGeert Uytterhoeven 61039d9dfc6SGeert Uytterhoeven hscif2: serial@e6560000 { 61139d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 61239d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 61339d9dfc6SGeert Uytterhoeven reg = <0 0xe6560000 0 0x60>; 61439d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 61539d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 516>, 61639d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 61739d9dfc6SGeert Uytterhoeven <&scif_clk>; 61839d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 61939d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x35>, <&dmac0 0x34>, 62039d9dfc6SGeert Uytterhoeven <&dmac1 0x35>, <&dmac1 0x34>; 62139d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 62239d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 62339d9dfc6SGeert Uytterhoeven resets = <&cpg 516>; 62439d9dfc6SGeert Uytterhoeven status = "disabled"; 62539d9dfc6SGeert Uytterhoeven }; 62639d9dfc6SGeert Uytterhoeven 62739d9dfc6SGeert Uytterhoeven hscif3: serial@e66a0000 { 62839d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 62939d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 63039d9dfc6SGeert Uytterhoeven reg = <0 0xe66a0000 0 0x60>; 63139d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 63239d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 517>, 63339d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 63439d9dfc6SGeert Uytterhoeven <&scif_clk>; 63539d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 63639d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x37>, <&dmac0 0x36>, 63739d9dfc6SGeert Uytterhoeven <&dmac1 0x37>, <&dmac1 0x36>; 63839d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 63939d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 64039d9dfc6SGeert Uytterhoeven resets = <&cpg 517>; 64139d9dfc6SGeert Uytterhoeven status = "disabled"; 64239d9dfc6SGeert Uytterhoeven }; 64339d9dfc6SGeert Uytterhoeven 644848c82dbSGeert Uytterhoeven avb0: ethernet@e6800000 { 645848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 646848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 647848c82dbSGeert Uytterhoeven reg = <0 0xe6800000 0 0x800>; 648848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 649848c82dbSGeert Uytterhoeven <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 650848c82dbSGeert Uytterhoeven <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 651848c82dbSGeert Uytterhoeven <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 652848c82dbSGeert Uytterhoeven <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 653848c82dbSGeert Uytterhoeven <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 654848c82dbSGeert Uytterhoeven <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 655848c82dbSGeert Uytterhoeven <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 656848c82dbSGeert Uytterhoeven <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 657848c82dbSGeert Uytterhoeven <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 658848c82dbSGeert Uytterhoeven <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 659848c82dbSGeert Uytterhoeven <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 660848c82dbSGeert Uytterhoeven <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 661848c82dbSGeert Uytterhoeven <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 662848c82dbSGeert Uytterhoeven <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 663848c82dbSGeert Uytterhoeven <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 664848c82dbSGeert Uytterhoeven <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 665848c82dbSGeert Uytterhoeven <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 666848c82dbSGeert Uytterhoeven <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 667848c82dbSGeert Uytterhoeven <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 668848c82dbSGeert Uytterhoeven <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 669848c82dbSGeert Uytterhoeven <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 670848c82dbSGeert Uytterhoeven <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 671848c82dbSGeert Uytterhoeven <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 672848c82dbSGeert Uytterhoeven <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 673848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 674848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 675848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 676848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 677848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 678848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 679848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 211>; 680848c82dbSGeert Uytterhoeven clock-names = "fck"; 681848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 682848c82dbSGeert Uytterhoeven resets = <&cpg 211>; 683848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 684848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 685848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 686848c82dbSGeert Uytterhoeven #address-cells = <1>; 687848c82dbSGeert Uytterhoeven #size-cells = <0>; 688848c82dbSGeert Uytterhoeven status = "disabled"; 689848c82dbSGeert Uytterhoeven }; 690848c82dbSGeert Uytterhoeven 691848c82dbSGeert Uytterhoeven avb1: ethernet@e6810000 { 692848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 693848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 694848c82dbSGeert Uytterhoeven reg = <0 0xe6810000 0 0x800>; 695848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 696848c82dbSGeert Uytterhoeven <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 697848c82dbSGeert Uytterhoeven <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 698848c82dbSGeert Uytterhoeven <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 699848c82dbSGeert Uytterhoeven <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 700848c82dbSGeert Uytterhoeven <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 701848c82dbSGeert Uytterhoeven <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 702848c82dbSGeert Uytterhoeven <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 703848c82dbSGeert Uytterhoeven <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 704848c82dbSGeert Uytterhoeven <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 705848c82dbSGeert Uytterhoeven <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 706848c82dbSGeert Uytterhoeven <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 707848c82dbSGeert Uytterhoeven <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 708848c82dbSGeert Uytterhoeven <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 709848c82dbSGeert Uytterhoeven <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 710848c82dbSGeert Uytterhoeven <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 711848c82dbSGeert Uytterhoeven <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 712848c82dbSGeert Uytterhoeven <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 713848c82dbSGeert Uytterhoeven <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 714848c82dbSGeert Uytterhoeven <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 715848c82dbSGeert Uytterhoeven <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 716848c82dbSGeert Uytterhoeven <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 717848c82dbSGeert Uytterhoeven <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 718848c82dbSGeert Uytterhoeven <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 719848c82dbSGeert Uytterhoeven <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 720848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 721848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 722848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 723848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 724848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 725848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 726848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 212>; 727848c82dbSGeert Uytterhoeven clock-names = "fck"; 728848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 729848c82dbSGeert Uytterhoeven resets = <&cpg 212>; 730848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 731848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 732848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 733848c82dbSGeert Uytterhoeven #address-cells = <1>; 734848c82dbSGeert Uytterhoeven #size-cells = <0>; 735848c82dbSGeert Uytterhoeven status = "disabled"; 736848c82dbSGeert Uytterhoeven }; 737848c82dbSGeert Uytterhoeven 738848c82dbSGeert Uytterhoeven avb2: ethernet@e6820000 { 739848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 740848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 741848c82dbSGeert Uytterhoeven reg = <0 0xe6820000 0 0x1000>; 742848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 743848c82dbSGeert Uytterhoeven <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 744848c82dbSGeert Uytterhoeven <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 745848c82dbSGeert Uytterhoeven <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 746848c82dbSGeert Uytterhoeven <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 747848c82dbSGeert Uytterhoeven <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 748848c82dbSGeert Uytterhoeven <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 749848c82dbSGeert Uytterhoeven <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 750848c82dbSGeert Uytterhoeven <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 751848c82dbSGeert Uytterhoeven <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 752848c82dbSGeert Uytterhoeven <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 753848c82dbSGeert Uytterhoeven <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 754848c82dbSGeert Uytterhoeven <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 755848c82dbSGeert Uytterhoeven <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 756848c82dbSGeert Uytterhoeven <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 757848c82dbSGeert Uytterhoeven <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 758848c82dbSGeert Uytterhoeven <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 759848c82dbSGeert Uytterhoeven <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 760848c82dbSGeert Uytterhoeven <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 761848c82dbSGeert Uytterhoeven <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 762848c82dbSGeert Uytterhoeven <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 763848c82dbSGeert Uytterhoeven <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 764848c82dbSGeert Uytterhoeven <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 765848c82dbSGeert Uytterhoeven <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 766848c82dbSGeert Uytterhoeven <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 767848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 768848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 769848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 770848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 771848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 772848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 773848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 213>; 774848c82dbSGeert Uytterhoeven clock-names = "fck"; 775848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 776848c82dbSGeert Uytterhoeven resets = <&cpg 213>; 777848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 778848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 779848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 780848c82dbSGeert Uytterhoeven #address-cells = <1>; 781848c82dbSGeert Uytterhoeven #size-cells = <0>; 782848c82dbSGeert Uytterhoeven status = "disabled"; 783848c82dbSGeert Uytterhoeven }; 784848c82dbSGeert Uytterhoeven 7855b9d1306SCongDang pwm0: pwm@e6e30000 { 7865b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7875b9d1306SCongDang reg = <0 0xe6e30000 0 0x10>; 7885b9d1306SCongDang #pwm-cells = <2>; 7895b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7905b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7915b9d1306SCongDang resets = <&cpg 628>; 7925b9d1306SCongDang status = "disabled"; 7935b9d1306SCongDang }; 7945b9d1306SCongDang 7955b9d1306SCongDang pwm1: pwm@e6e31000 { 7965b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7975b9d1306SCongDang reg = <0 0xe6e31000 0 0x10>; 7985b9d1306SCongDang #pwm-cells = <2>; 7995b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8005b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8015b9d1306SCongDang resets = <&cpg 628>; 8025b9d1306SCongDang status = "disabled"; 8035b9d1306SCongDang }; 8045b9d1306SCongDang 8055b9d1306SCongDang pwm2: pwm@e6e32000 { 8065b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8075b9d1306SCongDang reg = <0 0xe6e32000 0 0x10>; 8085b9d1306SCongDang #pwm-cells = <2>; 8095b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8105b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8115b9d1306SCongDang resets = <&cpg 628>; 8125b9d1306SCongDang status = "disabled"; 8135b9d1306SCongDang }; 8145b9d1306SCongDang 8155b9d1306SCongDang pwm3: pwm@e6e33000 { 8165b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8175b9d1306SCongDang reg = <0 0xe6e33000 0 0x10>; 8185b9d1306SCongDang #pwm-cells = <2>; 8195b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8205b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8215b9d1306SCongDang resets = <&cpg 628>; 8225b9d1306SCongDang status = "disabled"; 8235b9d1306SCongDang }; 8245b9d1306SCongDang 8255b9d1306SCongDang pwm4: pwm@e6e34000 { 8265b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8275b9d1306SCongDang reg = <0 0xe6e34000 0 0x10>; 8285b9d1306SCongDang #pwm-cells = <2>; 8295b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8305b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8315b9d1306SCongDang resets = <&cpg 628>; 8325b9d1306SCongDang status = "disabled"; 8335b9d1306SCongDang }; 8345b9d1306SCongDang 8355b9d1306SCongDang pwm5: pwm@e6e35000 { 8365b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8375b9d1306SCongDang reg = <0 0xe6e35000 0 0x10>; 8385b9d1306SCongDang #pwm-cells = <2>; 8395b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8405b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8415b9d1306SCongDang resets = <&cpg 628>; 8425b9d1306SCongDang status = "disabled"; 8435b9d1306SCongDang }; 8445b9d1306SCongDang 8455b9d1306SCongDang pwm6: pwm@e6e36000 { 8465b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8475b9d1306SCongDang reg = <0 0xe6e36000 0 0x10>; 8485b9d1306SCongDang #pwm-cells = <2>; 8495b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8505b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8515b9d1306SCongDang resets = <&cpg 628>; 8525b9d1306SCongDang status = "disabled"; 8535b9d1306SCongDang }; 8545b9d1306SCongDang 8555b9d1306SCongDang pwm7: pwm@e6e37000 { 8565b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8575b9d1306SCongDang reg = <0 0xe6e37000 0 0x10>; 8585b9d1306SCongDang #pwm-cells = <2>; 8595b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8605b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8615b9d1306SCongDang resets = <&cpg 628>; 8625b9d1306SCongDang status = "disabled"; 8635b9d1306SCongDang }; 8645b9d1306SCongDang 8655b9d1306SCongDang pwm8: pwm@e6e38000 { 8665b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8675b9d1306SCongDang reg = <0 0xe6e38000 0 0x10>; 8685b9d1306SCongDang #pwm-cells = <2>; 8695b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8705b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8715b9d1306SCongDang resets = <&cpg 628>; 8725b9d1306SCongDang status = "disabled"; 8735b9d1306SCongDang }; 8745b9d1306SCongDang 8755b9d1306SCongDang pwm9: pwm@e6e39000 { 8765b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 8775b9d1306SCongDang reg = <0 0xe6e39000 0 0x10>; 8785b9d1306SCongDang #pwm-cells = <2>; 8795b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 8805b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8815b9d1306SCongDang resets = <&cpg 628>; 8825b9d1306SCongDang status = "disabled"; 8835b9d1306SCongDang }; 8845b9d1306SCongDang 885a4c31c56SGeert Uytterhoeven scif0: serial@e6e60000 { 886a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 887a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 888a4c31c56SGeert Uytterhoeven reg = <0 0xe6e60000 0 64>; 889a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 890a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 702>, 891a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 892a4c31c56SGeert Uytterhoeven <&scif_clk>; 893a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 894a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x51>, <&dmac0 0x50>, 895a4c31c56SGeert Uytterhoeven <&dmac1 0x51>, <&dmac1 0x50>; 896a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 897a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 898a4c31c56SGeert Uytterhoeven resets = <&cpg 702>; 899a4c31c56SGeert Uytterhoeven status = "disabled"; 900a4c31c56SGeert Uytterhoeven }; 901a4c31c56SGeert Uytterhoeven 902a4c31c56SGeert Uytterhoeven scif1: serial@e6e68000 { 903a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 904a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 905a4c31c56SGeert Uytterhoeven reg = <0 0xe6e68000 0 64>; 906a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 907a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 703>, 908a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 909a4c31c56SGeert Uytterhoeven <&scif_clk>; 910a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 911a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x53>, <&dmac0 0x52>, 912a4c31c56SGeert Uytterhoeven <&dmac1 0x53>, <&dmac1 0x52>; 913a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 914a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 915a4c31c56SGeert Uytterhoeven resets = <&cpg 703>; 916a4c31c56SGeert Uytterhoeven status = "disabled"; 917a4c31c56SGeert Uytterhoeven }; 918a4c31c56SGeert Uytterhoeven 919a4c31c56SGeert Uytterhoeven scif3: serial@e6c50000 { 920a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 921a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 922a4c31c56SGeert Uytterhoeven reg = <0 0xe6c50000 0 64>; 923a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 924a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 704>, 925a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 926a4c31c56SGeert Uytterhoeven <&scif_clk>; 927a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 928a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x57>, <&dmac0 0x56>, 929a4c31c56SGeert Uytterhoeven <&dmac1 0x57>, <&dmac1 0x56>; 930a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 931a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 932a4c31c56SGeert Uytterhoeven resets = <&cpg 704>; 933a4c31c56SGeert Uytterhoeven status = "disabled"; 934a4c31c56SGeert Uytterhoeven }; 935a4c31c56SGeert Uytterhoeven 936a4c31c56SGeert Uytterhoeven scif4: serial@e6c40000 { 937a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 938a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 939a4c31c56SGeert Uytterhoeven reg = <0 0xe6c40000 0 64>; 940a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 941a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 705>, 942a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 943a4c31c56SGeert Uytterhoeven <&scif_clk>; 944a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 945a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x59>, <&dmac0 0x58>, 946a4c31c56SGeert Uytterhoeven <&dmac1 0x59>, <&dmac1 0x58>; 947a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 948a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 949a4c31c56SGeert Uytterhoeven resets = <&cpg 705>; 950a4c31c56SGeert Uytterhoeven status = "disabled"; 951a4c31c56SGeert Uytterhoeven }; 952a4c31c56SGeert Uytterhoeven 9534a76d4abSCongDang tpu: pwm@e6e80000 { 9544a76d4abSCongDang compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 9554a76d4abSCongDang reg = <0 0xe6e80000 0 0x148>; 9564a76d4abSCongDang interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 9574a76d4abSCongDang clocks = <&cpg CPG_MOD 718>; 9584a76d4abSCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 9594a76d4abSCongDang resets = <&cpg 718>; 9604a76d4abSCongDang #pwm-cells = <3>; 9614a76d4abSCongDang status = "disabled"; 9624a76d4abSCongDang }; 9634a76d4abSCongDang 964e0768073SGeert Uytterhoeven msiof0: spi@e6e90000 { 965e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 966e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 967e0768073SGeert Uytterhoeven reg = <0 0xe6e90000 0 0x0064>; 968e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 969e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 618>; 970e0768073SGeert Uytterhoeven dmas = <&dmac0 0x41>, <&dmac0 0x40>, 971e0768073SGeert Uytterhoeven <&dmac1 0x41>, <&dmac1 0x40>; 972e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 973e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 974e0768073SGeert Uytterhoeven resets = <&cpg 618>; 975e0768073SGeert Uytterhoeven #address-cells = <1>; 976e0768073SGeert Uytterhoeven #size-cells = <0>; 977e0768073SGeert Uytterhoeven status = "disabled"; 978e0768073SGeert Uytterhoeven }; 979e0768073SGeert Uytterhoeven 980e0768073SGeert Uytterhoeven msiof1: spi@e6ea0000 { 981e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 982e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 983e0768073SGeert Uytterhoeven reg = <0 0xe6ea0000 0 0x0064>; 984e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 985e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 619>; 986e0768073SGeert Uytterhoeven dmas = <&dmac0 0x43>, <&dmac0 0x42>, 987e0768073SGeert Uytterhoeven <&dmac1 0x43>, <&dmac1 0x42>; 988e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 989e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 990e0768073SGeert Uytterhoeven resets = <&cpg 619>; 991e0768073SGeert Uytterhoeven #address-cells = <1>; 992e0768073SGeert Uytterhoeven #size-cells = <0>; 993e0768073SGeert Uytterhoeven status = "disabled"; 994e0768073SGeert Uytterhoeven }; 995e0768073SGeert Uytterhoeven 996e0768073SGeert Uytterhoeven msiof2: spi@e6c00000 { 997e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 998e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 999e0768073SGeert Uytterhoeven reg = <0 0xe6c00000 0 0x0064>; 1000e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1001e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 620>; 1002e0768073SGeert Uytterhoeven dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1003e0768073SGeert Uytterhoeven <&dmac1 0x45>, <&dmac1 0x44>; 1004e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1005e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1006e0768073SGeert Uytterhoeven resets = <&cpg 620>; 1007e0768073SGeert Uytterhoeven #address-cells = <1>; 1008e0768073SGeert Uytterhoeven #size-cells = <0>; 1009e0768073SGeert Uytterhoeven status = "disabled"; 1010e0768073SGeert Uytterhoeven }; 1011e0768073SGeert Uytterhoeven 1012e0768073SGeert Uytterhoeven msiof3: spi@e6c10000 { 1013e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1014e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1015e0768073SGeert Uytterhoeven reg = <0 0xe6c10000 0 0x0064>; 1016e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1017e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 621>; 1018e0768073SGeert Uytterhoeven dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1019e0768073SGeert Uytterhoeven <&dmac1 0x47>, <&dmac1 0x46>; 1020e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1021e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1022e0768073SGeert Uytterhoeven resets = <&cpg 621>; 1023e0768073SGeert Uytterhoeven #address-cells = <1>; 1024e0768073SGeert Uytterhoeven #size-cells = <0>; 1025e0768073SGeert Uytterhoeven status = "disabled"; 1026e0768073SGeert Uytterhoeven }; 1027e0768073SGeert Uytterhoeven 1028e0768073SGeert Uytterhoeven msiof4: spi@e6c20000 { 1029e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1030e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1031e0768073SGeert Uytterhoeven reg = <0 0xe6c20000 0 0x0064>; 1032e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1033e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 622>; 1034e0768073SGeert Uytterhoeven dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1035e0768073SGeert Uytterhoeven <&dmac1 0x49>, <&dmac1 0x48>; 1036e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1037e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1038e0768073SGeert Uytterhoeven resets = <&cpg 622>; 1039e0768073SGeert Uytterhoeven #address-cells = <1>; 1040e0768073SGeert Uytterhoeven #size-cells = <0>; 1041e0768073SGeert Uytterhoeven status = "disabled"; 1042e0768073SGeert Uytterhoeven }; 1043e0768073SGeert Uytterhoeven 1044e0768073SGeert Uytterhoeven msiof5: spi@e6c28000 { 1045e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 1046e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 1047e0768073SGeert Uytterhoeven reg = <0 0xe6c28000 0 0x0064>; 1048e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1049e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 623>; 1050e0768073SGeert Uytterhoeven dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1051e0768073SGeert Uytterhoeven <&dmac1 0x4b>, <&dmac1 0x4a>; 1052e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 1053e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1054e0768073SGeert Uytterhoeven resets = <&cpg 623>; 1055e0768073SGeert Uytterhoeven #address-cells = <1>; 1056e0768073SGeert Uytterhoeven #size-cells = <0>; 1057e0768073SGeert Uytterhoeven status = "disabled"; 1058e0768073SGeert Uytterhoeven }; 1059e0768073SGeert Uytterhoeven 106008f28288SGeert Uytterhoeven dmac0: dma-controller@e7350000 { 106108f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 106208f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 106308f28288SGeert Uytterhoeven reg = <0 0xe7350000 0 0x1000>, 106408f28288SGeert Uytterhoeven <0 0xe7300000 0 0x10000>; 106508f28288SGeert Uytterhoeven interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 106608f28288SGeert Uytterhoeven <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 106708f28288SGeert Uytterhoeven <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 106808f28288SGeert Uytterhoeven <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 106908f28288SGeert Uytterhoeven <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 107008f28288SGeert Uytterhoeven <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 107108f28288SGeert Uytterhoeven <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 107208f28288SGeert Uytterhoeven <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 107308f28288SGeert Uytterhoeven <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 107408f28288SGeert Uytterhoeven <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 107508f28288SGeert Uytterhoeven <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 107608f28288SGeert Uytterhoeven <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 107708f28288SGeert Uytterhoeven <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 107808f28288SGeert Uytterhoeven <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 107908f28288SGeert Uytterhoeven <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 108008f28288SGeert Uytterhoeven <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 108108f28288SGeert Uytterhoeven <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 108208f28288SGeert Uytterhoeven interrupt-names = "error", 108308f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 108408f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 108508f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 108608f28288SGeert Uytterhoeven "ch14", "ch15"; 108708f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 709>; 108808f28288SGeert Uytterhoeven clock-names = "fck"; 108908f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 109008f28288SGeert Uytterhoeven resets = <&cpg 709>; 109108f28288SGeert Uytterhoeven #dma-cells = <1>; 109208f28288SGeert Uytterhoeven dma-channels = <16>; 109308f28288SGeert Uytterhoeven }; 109408f28288SGeert Uytterhoeven 109508f28288SGeert Uytterhoeven dmac1: dma-controller@e7351000 { 109608f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 109708f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 109808f28288SGeert Uytterhoeven reg = <0 0xe7351000 0 0x1000>, 109908f28288SGeert Uytterhoeven <0 0xe7310000 0 0x10000>; 110008f28288SGeert Uytterhoeven interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 110108f28288SGeert Uytterhoeven <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 110208f28288SGeert Uytterhoeven <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 110308f28288SGeert Uytterhoeven <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 110408f28288SGeert Uytterhoeven <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 110508f28288SGeert Uytterhoeven <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 110608f28288SGeert Uytterhoeven <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 110708f28288SGeert Uytterhoeven <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 110808f28288SGeert Uytterhoeven <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 110908f28288SGeert Uytterhoeven <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 111008f28288SGeert Uytterhoeven <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 111108f28288SGeert Uytterhoeven <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 111208f28288SGeert Uytterhoeven <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 111308f28288SGeert Uytterhoeven <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 111408f28288SGeert Uytterhoeven <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 111508f28288SGeert Uytterhoeven <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 111608f28288SGeert Uytterhoeven <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 111708f28288SGeert Uytterhoeven interrupt-names = "error", 111808f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 111908f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 112008f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 112108f28288SGeert Uytterhoeven "ch14", "ch15"; 112208f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 710>; 112308f28288SGeert Uytterhoeven clock-names = "fck"; 112408f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 112508f28288SGeert Uytterhoeven resets = <&cpg 710>; 112608f28288SGeert Uytterhoeven #dma-cells = <1>; 112708f28288SGeert Uytterhoeven dma-channels = <16>; 112808f28288SGeert Uytterhoeven }; 112908f28288SGeert Uytterhoeven 1130bc7bf913SGeert Uytterhoeven mmc0: mmc@ee140000 { 1131bc7bf913SGeert Uytterhoeven compatible = "renesas,sdhi-r8a779g0", 1132bc7bf913SGeert Uytterhoeven "renesas,rcar-gen4-sdhi"; 1133bc7bf913SGeert Uytterhoeven reg = <0 0xee140000 0 0x2000>; 1134bc7bf913SGeert Uytterhoeven interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1135bc7bf913SGeert Uytterhoeven clocks = <&cpg CPG_MOD 706>, 1136bc7bf913SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1137bc7bf913SGeert Uytterhoeven clock-names = "core", "clkh"; 1138bc7bf913SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1139bc7bf913SGeert Uytterhoeven resets = <&cpg 706>; 1140bc7bf913SGeert Uytterhoeven max-frequency = <200000000>; 1141bc7bf913SGeert Uytterhoeven status = "disabled"; 1142bc7bf913SGeert Uytterhoeven }; 1143bc7bf913SGeert Uytterhoeven 1144d5014bedSHai Pham rpc: spi@ee200000 { 1145d5014bedSHai Pham compatible = "renesas,r8a779g0-rpc-if", 1146d5014bedSHai Pham "renesas,rcar-gen4-rpc-if"; 1147d5014bedSHai Pham reg = <0 0xee200000 0 0x200>, 1148d5014bedSHai Pham <0 0x08000000 0 0x04000000>, 1149d5014bedSHai Pham <0 0xee208000 0 0x100>; 1150d5014bedSHai Pham reg-names = "regs", "dirmap", "wbuf"; 1151d5014bedSHai Pham interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1152d5014bedSHai Pham clocks = <&cpg CPG_MOD 629>; 1153d5014bedSHai Pham power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1154d5014bedSHai Pham resets = <&cpg 629>; 1155d5014bedSHai Pham #address-cells = <1>; 1156d5014bedSHai Pham #size-cells = <0>; 1157d5014bedSHai Pham status = "disabled"; 1158d5014bedSHai Pham }; 1159d5014bedSHai Pham 1160987da486SYoshihiro Shimoda gic: interrupt-controller@f1000000 { 1161987da486SYoshihiro Shimoda compatible = "arm,gic-v3"; 1162987da486SYoshihiro Shimoda #interrupt-cells = <3>; 1163987da486SYoshihiro Shimoda #address-cells = <0>; 1164987da486SYoshihiro Shimoda interrupt-controller; 1165987da486SYoshihiro Shimoda reg = <0x0 0xf1000000 0 0x20000>, 1166987da486SYoshihiro Shimoda <0x0 0xf1060000 0 0x110000>; 1167987da486SYoshihiro Shimoda interrupts = <GIC_PPI 9 116868c9c53dSGeert Uytterhoeven (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1169987da486SYoshihiro Shimoda }; 1170987da486SYoshihiro Shimoda 1171987da486SYoshihiro Shimoda prr: chipid@fff00044 { 1172987da486SYoshihiro Shimoda compatible = "renesas,prr"; 1173987da486SYoshihiro Shimoda reg = <0 0xfff00044 0 4>; 1174987da486SYoshihiro Shimoda }; 1175987da486SYoshihiro Shimoda }; 1176987da486SYoshihiro Shimoda 1177987da486SYoshihiro Shimoda timer { 1178987da486SYoshihiro Shimoda compatible = "arm,armv8-timer"; 117968c9c53dSGeert Uytterhoeven interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 118068c9c53dSGeert Uytterhoeven <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 118168c9c53dSGeert Uytterhoeven <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 118268c9c53dSGeert Uytterhoeven <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 1183987da486SYoshihiro Shimoda }; 1184987da486SYoshihiro Shimoda}; 1185