1987da486SYoshihiro Shimoda// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2987da486SYoshihiro Shimoda/* 3987da486SYoshihiro Shimoda * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4987da486SYoshihiro Shimoda * 5987da486SYoshihiro Shimoda * Copyright (C) 2022 Renesas Electronics Corp. 6987da486SYoshihiro Shimoda */ 7987da486SYoshihiro Shimoda 8987da486SYoshihiro Shimoda#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9987da486SYoshihiro Shimoda#include <dt-bindings/interrupt-controller/arm-gic.h> 10987da486SYoshihiro Shimoda#include <dt-bindings/power/r8a779g0-sysc.h> 11987da486SYoshihiro Shimoda 12987da486SYoshihiro Shimoda/ { 13987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0"; 14987da486SYoshihiro Shimoda #address-cells = <2>; 15987da486SYoshihiro Shimoda #size-cells = <2>; 16987da486SYoshihiro Shimoda 17987da486SYoshihiro Shimoda cpus { 18987da486SYoshihiro Shimoda #address-cells = <1>; 19987da486SYoshihiro Shimoda #size-cells = <0>; 20987da486SYoshihiro Shimoda 21987da486SYoshihiro Shimoda a76_0: cpu@0 { 22987da486SYoshihiro Shimoda compatible = "arm,cortex-a76"; 23987da486SYoshihiro Shimoda reg = <0>; 24987da486SYoshihiro Shimoda device_type = "cpu"; 25987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 26987da486SYoshihiro Shimoda }; 27987da486SYoshihiro Shimoda }; 28987da486SYoshihiro Shimoda 29987da486SYoshihiro Shimoda extal_clk: extal { 30987da486SYoshihiro Shimoda compatible = "fixed-clock"; 31987da486SYoshihiro Shimoda #clock-cells = <0>; 32987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 33987da486SYoshihiro Shimoda clock-frequency = <0>; 34987da486SYoshihiro Shimoda }; 35987da486SYoshihiro Shimoda 36987da486SYoshihiro Shimoda extalr_clk: extalr { 37987da486SYoshihiro Shimoda compatible = "fixed-clock"; 38987da486SYoshihiro Shimoda #clock-cells = <0>; 39987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 40987da486SYoshihiro Shimoda clock-frequency = <0>; 41987da486SYoshihiro Shimoda }; 42987da486SYoshihiro Shimoda 43987da486SYoshihiro Shimoda pmu_a76 { 44987da486SYoshihiro Shimoda compatible = "arm,cortex-a76-pmu"; 45987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 46987da486SYoshihiro Shimoda }; 47987da486SYoshihiro Shimoda 48987da486SYoshihiro Shimoda /* External SCIF clock - to be overridden by boards that provide it */ 49987da486SYoshihiro Shimoda scif_clk: scif { 50987da486SYoshihiro Shimoda compatible = "fixed-clock"; 51987da486SYoshihiro Shimoda #clock-cells = <0>; 52987da486SYoshihiro Shimoda clock-frequency = <0>; 53987da486SYoshihiro Shimoda }; 54987da486SYoshihiro Shimoda 55987da486SYoshihiro Shimoda soc: soc { 56987da486SYoshihiro Shimoda compatible = "simple-bus"; 57987da486SYoshihiro Shimoda interrupt-parent = <&gic>; 58987da486SYoshihiro Shimoda #address-cells = <2>; 59987da486SYoshihiro Shimoda #size-cells = <2>; 60987da486SYoshihiro Shimoda ranges; 61987da486SYoshihiro Shimoda 62a43306faSGeert Uytterhoeven rwdt: watchdog@e6020000 { 63a43306faSGeert Uytterhoeven compatible = "renesas,r8a779g0-wdt", 64a43306faSGeert Uytterhoeven "renesas,rcar-gen4-wdt"; 65a43306faSGeert Uytterhoeven reg = <0 0xe6020000 0 0x0c>; 66a43306faSGeert Uytterhoeven interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 67a43306faSGeert Uytterhoeven clocks = <&cpg CPG_MOD 907>; 68a43306faSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 69a43306faSGeert Uytterhoeven resets = <&cpg 907>; 70a43306faSGeert Uytterhoeven status = "disabled"; 71a43306faSGeert Uytterhoeven }; 72a43306faSGeert Uytterhoeven 734cebce25SGeert Uytterhoeven pfc: pinctrl@e6050000 { 744cebce25SGeert Uytterhoeven compatible = "renesas,pfc-r8a779g0"; 754cebce25SGeert Uytterhoeven reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 764cebce25SGeert Uytterhoeven <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 774cebce25SGeert Uytterhoeven <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 784cebce25SGeert Uytterhoeven <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 794cebce25SGeert Uytterhoeven <0 0xe6068000 0 0x16c>; 804cebce25SGeert Uytterhoeven }; 814cebce25SGeert Uytterhoeven 82120c7a58SGeert Uytterhoeven gpio0: gpio@e6050180 { 83120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 84120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 85120c7a58SGeert Uytterhoeven reg = <0 0xe6050180 0 0x54>; 86120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 87120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 88120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 89120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 90120c7a58SGeert Uytterhoeven gpio-controller; 91120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 92120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 0 19>; 93120c7a58SGeert Uytterhoeven interrupt-controller; 94120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 95120c7a58SGeert Uytterhoeven }; 96120c7a58SGeert Uytterhoeven 97120c7a58SGeert Uytterhoeven gpio1: gpio@e6050980 { 98120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 99120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 100120c7a58SGeert Uytterhoeven reg = <0 0xe6050980 0 0x54>; 101120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 102120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 103120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 104120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 105120c7a58SGeert Uytterhoeven gpio-controller; 106120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 107120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 32 29>; 108120c7a58SGeert Uytterhoeven interrupt-controller; 109120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 110120c7a58SGeert Uytterhoeven }; 111120c7a58SGeert Uytterhoeven 112120c7a58SGeert Uytterhoeven gpio2: gpio@e6058180 { 113120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 114120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 115120c7a58SGeert Uytterhoeven reg = <0 0xe6058180 0 0x54>; 116120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 117120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 118120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 119120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 120120c7a58SGeert Uytterhoeven gpio-controller; 121120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 122120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 64 20>; 123120c7a58SGeert Uytterhoeven interrupt-controller; 124120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 125120c7a58SGeert Uytterhoeven }; 126120c7a58SGeert Uytterhoeven 127120c7a58SGeert Uytterhoeven gpio3: gpio@e6058980 { 128120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 129120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 130120c7a58SGeert Uytterhoeven reg = <0 0xe6058980 0 0x54>; 131120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 132120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 133120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 134120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 135120c7a58SGeert Uytterhoeven gpio-controller; 136120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 137120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 96 30>; 138120c7a58SGeert Uytterhoeven interrupt-controller; 139120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 140120c7a58SGeert Uytterhoeven }; 141120c7a58SGeert Uytterhoeven 142120c7a58SGeert Uytterhoeven gpio4: gpio@e6060180 { 143120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 144120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 145120c7a58SGeert Uytterhoeven reg = <0 0xe6060180 0 0x54>; 146120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 147120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 148120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 149120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 150120c7a58SGeert Uytterhoeven gpio-controller; 151120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 152120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 128 25>; 153120c7a58SGeert Uytterhoeven interrupt-controller; 154120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 155120c7a58SGeert Uytterhoeven }; 156120c7a58SGeert Uytterhoeven 157120c7a58SGeert Uytterhoeven gpio5: gpio@e6060980 { 158120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 159120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 160120c7a58SGeert Uytterhoeven reg = <0 0xe6060980 0 0x54>; 161120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 162120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 163120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 164120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 165120c7a58SGeert Uytterhoeven gpio-controller; 166120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 167120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 160 21>; 168120c7a58SGeert Uytterhoeven interrupt-controller; 169120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 170120c7a58SGeert Uytterhoeven }; 171120c7a58SGeert Uytterhoeven 172120c7a58SGeert Uytterhoeven gpio6: gpio@e6061180 { 173120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 174120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 175120c7a58SGeert Uytterhoeven reg = <0 0xe6061180 0 0x54>; 176120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 177120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 178120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 179120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 180120c7a58SGeert Uytterhoeven gpio-controller; 181120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 182120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 192 21>; 183120c7a58SGeert Uytterhoeven interrupt-controller; 184120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 185120c7a58SGeert Uytterhoeven }; 186120c7a58SGeert Uytterhoeven 187120c7a58SGeert Uytterhoeven gpio7: gpio@e6061980 { 188120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 189120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 190120c7a58SGeert Uytterhoeven reg = <0 0xe6061980 0 0x54>; 191120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 192120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 193120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 194120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 195120c7a58SGeert Uytterhoeven gpio-controller; 196120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 197120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 224 21>; 198120c7a58SGeert Uytterhoeven interrupt-controller; 199120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 200120c7a58SGeert Uytterhoeven }; 201120c7a58SGeert Uytterhoeven 202120c7a58SGeert Uytterhoeven gpio8: gpio@e6068180 { 203120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 204120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 205120c7a58SGeert Uytterhoeven reg = <0 0xe6068180 0 0x54>; 206120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 207120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 918>; 208120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 209120c7a58SGeert Uytterhoeven resets = <&cpg 918>; 210120c7a58SGeert Uytterhoeven gpio-controller; 211120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 212120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 256 14>; 213120c7a58SGeert Uytterhoeven interrupt-controller; 214120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 215120c7a58SGeert Uytterhoeven }; 216120c7a58SGeert Uytterhoeven 217987da486SYoshihiro Shimoda cpg: clock-controller@e6150000 { 218987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-cpg-mssr"; 219987da486SYoshihiro Shimoda reg = <0 0xe6150000 0 0x4000>; 220987da486SYoshihiro Shimoda clocks = <&extal_clk>, <&extalr_clk>; 221987da486SYoshihiro Shimoda clock-names = "extal", "extalr"; 222987da486SYoshihiro Shimoda #clock-cells = <2>; 223987da486SYoshihiro Shimoda #power-domain-cells = <0>; 224987da486SYoshihiro Shimoda #reset-cells = <1>; 225987da486SYoshihiro Shimoda }; 226987da486SYoshihiro Shimoda 227987da486SYoshihiro Shimoda rst: reset-controller@e6160000 { 228987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-rst"; 229987da486SYoshihiro Shimoda reg = <0 0xe6160000 0 0x4000>; 230987da486SYoshihiro Shimoda }; 231987da486SYoshihiro Shimoda 232987da486SYoshihiro Shimoda sysc: system-controller@e6180000 { 233987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-sysc"; 234987da486SYoshihiro Shimoda reg = <0 0xe6180000 0 0x4000>; 235987da486SYoshihiro Shimoda #power-domain-cells = <1>; 236987da486SYoshihiro Shimoda }; 237987da486SYoshihiro Shimoda 238b6ce840bSGeert Uytterhoeven intc_ex: interrupt-controller@e61c0000 { 239b6ce840bSGeert Uytterhoeven compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 240b6ce840bSGeert Uytterhoeven #interrupt-cells = <2>; 241b6ce840bSGeert Uytterhoeven interrupt-controller; 242b6ce840bSGeert Uytterhoeven reg = <0 0xe61c0000 0 0x200>; 243b6ce840bSGeert Uytterhoeven interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 244b6ce840bSGeert Uytterhoeven <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 245b6ce840bSGeert Uytterhoeven <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 246b6ce840bSGeert Uytterhoeven <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 247b6ce840bSGeert Uytterhoeven <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 248b6ce840bSGeert Uytterhoeven <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 249b6ce840bSGeert Uytterhoeven clocks = <&cpg CPG_MOD 611>; 250b6ce840bSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 251b6ce840bSGeert Uytterhoeven resets = <&cpg 611>; 252b6ce840bSGeert Uytterhoeven }; 253b6ce840bSGeert Uytterhoeven 254*52478925SWolfram Sang tmu0: timer@e61e0000 { 255*52478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 256*52478925SWolfram Sang reg = <0 0xe61e0000 0 0x30>; 257*52478925SWolfram Sang interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 258*52478925SWolfram Sang <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 259*52478925SWolfram Sang <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 260*52478925SWolfram Sang clocks = <&cpg CPG_MOD 713>; 261*52478925SWolfram Sang clock-names = "fck"; 262*52478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 263*52478925SWolfram Sang resets = <&cpg 713>; 264*52478925SWolfram Sang status = "disabled"; 265*52478925SWolfram Sang }; 266*52478925SWolfram Sang 267*52478925SWolfram Sang tmu1: timer@e6fc0000 { 268*52478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 269*52478925SWolfram Sang reg = <0 0xe6fc0000 0 0x30>; 270*52478925SWolfram Sang interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 271*52478925SWolfram Sang <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 272*52478925SWolfram Sang <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>; 273*52478925SWolfram Sang clocks = <&cpg CPG_MOD 714>; 274*52478925SWolfram Sang clock-names = "fck"; 275*52478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 276*52478925SWolfram Sang resets = <&cpg 714>; 277*52478925SWolfram Sang status = "disabled"; 278*52478925SWolfram Sang }; 279*52478925SWolfram Sang 280*52478925SWolfram Sang tmu2: timer@e6fd0000 { 281*52478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 282*52478925SWolfram Sang reg = <0 0xe6fd0000 0 0x30>; 283*52478925SWolfram Sang interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 284*52478925SWolfram Sang <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 285*52478925SWolfram Sang <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 286*52478925SWolfram Sang clocks = <&cpg CPG_MOD 715>; 287*52478925SWolfram Sang clock-names = "fck"; 288*52478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 289*52478925SWolfram Sang resets = <&cpg 715>; 290*52478925SWolfram Sang status = "disabled"; 291*52478925SWolfram Sang }; 292*52478925SWolfram Sang 293*52478925SWolfram Sang tmu3: timer@e6fe0000 { 294*52478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 295*52478925SWolfram Sang reg = <0 0xe6fe0000 0 0x30>; 296*52478925SWolfram Sang interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 297*52478925SWolfram Sang <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 298*52478925SWolfram Sang <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>; 299*52478925SWolfram Sang clocks = <&cpg CPG_MOD 716>; 300*52478925SWolfram Sang clock-names = "fck"; 301*52478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 302*52478925SWolfram Sang resets = <&cpg 716>; 303*52478925SWolfram Sang status = "disabled"; 304*52478925SWolfram Sang }; 305*52478925SWolfram Sang 306*52478925SWolfram Sang tmu4: timer@ffc00000 { 307*52478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 308*52478925SWolfram Sang reg = <0 0xffc00000 0 0x30>; 309*52478925SWolfram Sang interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 310*52478925SWolfram Sang <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 311*52478925SWolfram Sang <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 312*52478925SWolfram Sang clocks = <&cpg CPG_MOD 717>; 313*52478925SWolfram Sang clock-names = "fck"; 314*52478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 315*52478925SWolfram Sang resets = <&cpg 717>; 316*52478925SWolfram Sang status = "disabled"; 317*52478925SWolfram Sang }; 318*52478925SWolfram Sang 319ff77ba05SGeert Uytterhoeven i2c0: i2c@e6500000 { 320ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 321ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 322ff77ba05SGeert Uytterhoeven reg = <0 0xe6500000 0 0x40>; 323ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 324ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 518>; 32508f28288SGeert Uytterhoeven dmas = <&dmac0 0x91>, <&dmac0 0x90>, 32608f28288SGeert Uytterhoeven <&dmac1 0x91>, <&dmac1 0x90>; 32708f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 328ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 329ff77ba05SGeert Uytterhoeven resets = <&cpg 518>; 330ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 331ff77ba05SGeert Uytterhoeven #address-cells = <1>; 332ff77ba05SGeert Uytterhoeven #size-cells = <0>; 333ff77ba05SGeert Uytterhoeven status = "disabled"; 334ff77ba05SGeert Uytterhoeven }; 335ff77ba05SGeert Uytterhoeven 336ff77ba05SGeert Uytterhoeven i2c1: i2c@e6508000 { 337ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 338ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 339ff77ba05SGeert Uytterhoeven reg = <0 0xe6508000 0 0x40>; 340ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 341ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 519>; 34208f28288SGeert Uytterhoeven dmas = <&dmac0 0x93>, <&dmac0 0x92>, 34308f28288SGeert Uytterhoeven <&dmac1 0x93>, <&dmac1 0x92>; 34408f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 345ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 346ff77ba05SGeert Uytterhoeven resets = <&cpg 519>; 347ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 348ff77ba05SGeert Uytterhoeven #address-cells = <1>; 349ff77ba05SGeert Uytterhoeven #size-cells = <0>; 350ff77ba05SGeert Uytterhoeven status = "disabled"; 351ff77ba05SGeert Uytterhoeven }; 352ff77ba05SGeert Uytterhoeven 353ff77ba05SGeert Uytterhoeven i2c2: i2c@e6510000 { 354ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 355ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 356ff77ba05SGeert Uytterhoeven reg = <0 0xe6510000 0 0x40>; 357ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 358ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 520>; 35908f28288SGeert Uytterhoeven dmas = <&dmac0 0x95>, <&dmac0 0x94>, 36008f28288SGeert Uytterhoeven <&dmac1 0x95>, <&dmac1 0x94>; 36108f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 362ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 363ff77ba05SGeert Uytterhoeven resets = <&cpg 520>; 364ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 365ff77ba05SGeert Uytterhoeven #address-cells = <1>; 366ff77ba05SGeert Uytterhoeven #size-cells = <0>; 367ff77ba05SGeert Uytterhoeven status = "disabled"; 368ff77ba05SGeert Uytterhoeven }; 369ff77ba05SGeert Uytterhoeven 370ff77ba05SGeert Uytterhoeven i2c3: i2c@e66d0000 { 371ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 372ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 373ff77ba05SGeert Uytterhoeven reg = <0 0xe66d0000 0 0x40>; 374ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 375ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 521>; 37608f28288SGeert Uytterhoeven dmas = <&dmac0 0x97>, <&dmac0 0x96>, 37708f28288SGeert Uytterhoeven <&dmac1 0x97>, <&dmac1 0x96>; 37808f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 379ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 380ff77ba05SGeert Uytterhoeven resets = <&cpg 521>; 381ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 382ff77ba05SGeert Uytterhoeven #address-cells = <1>; 383ff77ba05SGeert Uytterhoeven #size-cells = <0>; 384ff77ba05SGeert Uytterhoeven status = "disabled"; 385ff77ba05SGeert Uytterhoeven }; 386ff77ba05SGeert Uytterhoeven 387ff77ba05SGeert Uytterhoeven i2c4: i2c@e66d8000 { 388ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 389ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 390ff77ba05SGeert Uytterhoeven reg = <0 0xe66d8000 0 0x40>; 391ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 392ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 522>; 39308f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 39408f28288SGeert Uytterhoeven dmas = <&dmac0 0x99>, <&dmac0 0x98>, 39508f28288SGeert Uytterhoeven <&dmac1 0x99>, <&dmac1 0x98>; 396ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 397ff77ba05SGeert Uytterhoeven resets = <&cpg 522>; 398ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 399ff77ba05SGeert Uytterhoeven #address-cells = <1>; 400ff77ba05SGeert Uytterhoeven #size-cells = <0>; 401ff77ba05SGeert Uytterhoeven status = "disabled"; 402ff77ba05SGeert Uytterhoeven }; 403ff77ba05SGeert Uytterhoeven 404ff77ba05SGeert Uytterhoeven i2c5: i2c@e66e0000 { 405ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 406ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 407ff77ba05SGeert Uytterhoeven reg = <0 0xe66e0000 0 0x40>; 408ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 409ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 523>; 41008f28288SGeert Uytterhoeven dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 41108f28288SGeert Uytterhoeven <&dmac1 0x9b>, <&dmac1 0x9a>; 41208f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 413ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 414ff77ba05SGeert Uytterhoeven resets = <&cpg 523>; 415ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 416ff77ba05SGeert Uytterhoeven #address-cells = <1>; 417ff77ba05SGeert Uytterhoeven #size-cells = <0>; 418ff77ba05SGeert Uytterhoeven status = "disabled"; 419ff77ba05SGeert Uytterhoeven }; 420ff77ba05SGeert Uytterhoeven 421987da486SYoshihiro Shimoda hscif0: serial@e6540000 { 422987da486SYoshihiro Shimoda compatible = "renesas,hscif-r8a779g0", 42339d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 42439d9dfc6SGeert Uytterhoeven reg = <0 0xe6540000 0 0x60>; 425ab2866f1SGeert Uytterhoeven interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 426987da486SYoshihiro Shimoda clocks = <&cpg CPG_MOD 514>, 427a4290d40SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 428987da486SYoshihiro Shimoda <&scif_clk>; 429987da486SYoshihiro Shimoda clock-names = "fck", "brg_int", "scif_clk"; 43008f28288SGeert Uytterhoeven dmas = <&dmac0 0x31>, <&dmac0 0x30>, 43108f28288SGeert Uytterhoeven <&dmac1 0x31>, <&dmac1 0x30>; 43208f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 433987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 434987da486SYoshihiro Shimoda resets = <&cpg 514>; 435987da486SYoshihiro Shimoda status = "disabled"; 436987da486SYoshihiro Shimoda }; 437987da486SYoshihiro Shimoda 43839d9dfc6SGeert Uytterhoeven hscif1: serial@e6550000 { 43939d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 44039d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 44139d9dfc6SGeert Uytterhoeven reg = <0 0xe6550000 0 0x60>; 44239d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 44339d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 515>, 44439d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 44539d9dfc6SGeert Uytterhoeven <&scif_clk>; 44639d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 44739d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x33>, <&dmac0 0x32>, 44839d9dfc6SGeert Uytterhoeven <&dmac1 0x33>, <&dmac1 0x32>; 44939d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 45039d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 45139d9dfc6SGeert Uytterhoeven resets = <&cpg 515>; 45239d9dfc6SGeert Uytterhoeven status = "disabled"; 45339d9dfc6SGeert Uytterhoeven }; 45439d9dfc6SGeert Uytterhoeven 45539d9dfc6SGeert Uytterhoeven hscif2: serial@e6560000 { 45639d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 45739d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 45839d9dfc6SGeert Uytterhoeven reg = <0 0xe6560000 0 0x60>; 45939d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 46039d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 516>, 46139d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 46239d9dfc6SGeert Uytterhoeven <&scif_clk>; 46339d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 46439d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x35>, <&dmac0 0x34>, 46539d9dfc6SGeert Uytterhoeven <&dmac1 0x35>, <&dmac1 0x34>; 46639d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 46739d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 46839d9dfc6SGeert Uytterhoeven resets = <&cpg 516>; 46939d9dfc6SGeert Uytterhoeven status = "disabled"; 47039d9dfc6SGeert Uytterhoeven }; 47139d9dfc6SGeert Uytterhoeven 47239d9dfc6SGeert Uytterhoeven hscif3: serial@e66a0000 { 47339d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 47439d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 47539d9dfc6SGeert Uytterhoeven reg = <0 0xe66a0000 0 0x60>; 47639d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 47739d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 517>, 47839d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 47939d9dfc6SGeert Uytterhoeven <&scif_clk>; 48039d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 48139d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x37>, <&dmac0 0x36>, 48239d9dfc6SGeert Uytterhoeven <&dmac1 0x37>, <&dmac1 0x36>; 48339d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 48439d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 48539d9dfc6SGeert Uytterhoeven resets = <&cpg 517>; 48639d9dfc6SGeert Uytterhoeven status = "disabled"; 48739d9dfc6SGeert Uytterhoeven }; 48839d9dfc6SGeert Uytterhoeven 489848c82dbSGeert Uytterhoeven avb0: ethernet@e6800000 { 490848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 491848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 492848c82dbSGeert Uytterhoeven reg = <0 0xe6800000 0 0x800>; 493848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 494848c82dbSGeert Uytterhoeven <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 495848c82dbSGeert Uytterhoeven <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 496848c82dbSGeert Uytterhoeven <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 497848c82dbSGeert Uytterhoeven <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 498848c82dbSGeert Uytterhoeven <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 499848c82dbSGeert Uytterhoeven <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 500848c82dbSGeert Uytterhoeven <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 501848c82dbSGeert Uytterhoeven <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 502848c82dbSGeert Uytterhoeven <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 503848c82dbSGeert Uytterhoeven <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 504848c82dbSGeert Uytterhoeven <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 505848c82dbSGeert Uytterhoeven <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 506848c82dbSGeert Uytterhoeven <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 507848c82dbSGeert Uytterhoeven <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 508848c82dbSGeert Uytterhoeven <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 509848c82dbSGeert Uytterhoeven <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 510848c82dbSGeert Uytterhoeven <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 511848c82dbSGeert Uytterhoeven <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 512848c82dbSGeert Uytterhoeven <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 513848c82dbSGeert Uytterhoeven <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 514848c82dbSGeert Uytterhoeven <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 515848c82dbSGeert Uytterhoeven <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 516848c82dbSGeert Uytterhoeven <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 517848c82dbSGeert Uytterhoeven <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 518848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 519848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 520848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 521848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 522848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 523848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 524848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 211>; 525848c82dbSGeert Uytterhoeven clock-names = "fck"; 526848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 527848c82dbSGeert Uytterhoeven resets = <&cpg 211>; 528848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 529848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 530848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 531848c82dbSGeert Uytterhoeven #address-cells = <1>; 532848c82dbSGeert Uytterhoeven #size-cells = <0>; 533848c82dbSGeert Uytterhoeven status = "disabled"; 534848c82dbSGeert Uytterhoeven }; 535848c82dbSGeert Uytterhoeven 536848c82dbSGeert Uytterhoeven avb1: ethernet@e6810000 { 537848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 538848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 539848c82dbSGeert Uytterhoeven reg = <0 0xe6810000 0 0x800>; 540848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 541848c82dbSGeert Uytterhoeven <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 542848c82dbSGeert Uytterhoeven <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 543848c82dbSGeert Uytterhoeven <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 544848c82dbSGeert Uytterhoeven <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 545848c82dbSGeert Uytterhoeven <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 546848c82dbSGeert Uytterhoeven <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 547848c82dbSGeert Uytterhoeven <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 548848c82dbSGeert Uytterhoeven <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 549848c82dbSGeert Uytterhoeven <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 550848c82dbSGeert Uytterhoeven <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 551848c82dbSGeert Uytterhoeven <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 552848c82dbSGeert Uytterhoeven <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 553848c82dbSGeert Uytterhoeven <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 554848c82dbSGeert Uytterhoeven <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 555848c82dbSGeert Uytterhoeven <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 556848c82dbSGeert Uytterhoeven <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 557848c82dbSGeert Uytterhoeven <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 558848c82dbSGeert Uytterhoeven <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 559848c82dbSGeert Uytterhoeven <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 560848c82dbSGeert Uytterhoeven <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 561848c82dbSGeert Uytterhoeven <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 562848c82dbSGeert Uytterhoeven <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 563848c82dbSGeert Uytterhoeven <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 564848c82dbSGeert Uytterhoeven <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 565848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 566848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 567848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 568848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 569848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 570848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 571848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 212>; 572848c82dbSGeert Uytterhoeven clock-names = "fck"; 573848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 574848c82dbSGeert Uytterhoeven resets = <&cpg 212>; 575848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 576848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 577848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 578848c82dbSGeert Uytterhoeven #address-cells = <1>; 579848c82dbSGeert Uytterhoeven #size-cells = <0>; 580848c82dbSGeert Uytterhoeven status = "disabled"; 581848c82dbSGeert Uytterhoeven }; 582848c82dbSGeert Uytterhoeven 583848c82dbSGeert Uytterhoeven avb2: ethernet@e6820000 { 584848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 585848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 586848c82dbSGeert Uytterhoeven reg = <0 0xe6820000 0 0x1000>; 587848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 588848c82dbSGeert Uytterhoeven <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 589848c82dbSGeert Uytterhoeven <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 590848c82dbSGeert Uytterhoeven <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 591848c82dbSGeert Uytterhoeven <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 592848c82dbSGeert Uytterhoeven <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 593848c82dbSGeert Uytterhoeven <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 594848c82dbSGeert Uytterhoeven <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 595848c82dbSGeert Uytterhoeven <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 596848c82dbSGeert Uytterhoeven <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 597848c82dbSGeert Uytterhoeven <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 598848c82dbSGeert Uytterhoeven <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 599848c82dbSGeert Uytterhoeven <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 600848c82dbSGeert Uytterhoeven <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 601848c82dbSGeert Uytterhoeven <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 602848c82dbSGeert Uytterhoeven <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 603848c82dbSGeert Uytterhoeven <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 604848c82dbSGeert Uytterhoeven <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 605848c82dbSGeert Uytterhoeven <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 606848c82dbSGeert Uytterhoeven <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 607848c82dbSGeert Uytterhoeven <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 608848c82dbSGeert Uytterhoeven <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 609848c82dbSGeert Uytterhoeven <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 610848c82dbSGeert Uytterhoeven <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 611848c82dbSGeert Uytterhoeven <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 612848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 613848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 614848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 615848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 616848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 617848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 618848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 213>; 619848c82dbSGeert Uytterhoeven clock-names = "fck"; 620848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 621848c82dbSGeert Uytterhoeven resets = <&cpg 213>; 622848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 623848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 624848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 625848c82dbSGeert Uytterhoeven #address-cells = <1>; 626848c82dbSGeert Uytterhoeven #size-cells = <0>; 627848c82dbSGeert Uytterhoeven status = "disabled"; 628848c82dbSGeert Uytterhoeven }; 629848c82dbSGeert Uytterhoeven 6305b9d1306SCongDang pwm0: pwm@e6e30000 { 6315b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 6325b9d1306SCongDang reg = <0 0xe6e30000 0 0x10>; 6335b9d1306SCongDang #pwm-cells = <2>; 6345b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 6355b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6365b9d1306SCongDang resets = <&cpg 628>; 6375b9d1306SCongDang status = "disabled"; 6385b9d1306SCongDang }; 6395b9d1306SCongDang 6405b9d1306SCongDang pwm1: pwm@e6e31000 { 6415b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 6425b9d1306SCongDang reg = <0 0xe6e31000 0 0x10>; 6435b9d1306SCongDang #pwm-cells = <2>; 6445b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 6455b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6465b9d1306SCongDang resets = <&cpg 628>; 6475b9d1306SCongDang status = "disabled"; 6485b9d1306SCongDang }; 6495b9d1306SCongDang 6505b9d1306SCongDang pwm2: pwm@e6e32000 { 6515b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 6525b9d1306SCongDang reg = <0 0xe6e32000 0 0x10>; 6535b9d1306SCongDang #pwm-cells = <2>; 6545b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 6555b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6565b9d1306SCongDang resets = <&cpg 628>; 6575b9d1306SCongDang status = "disabled"; 6585b9d1306SCongDang }; 6595b9d1306SCongDang 6605b9d1306SCongDang pwm3: pwm@e6e33000 { 6615b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 6625b9d1306SCongDang reg = <0 0xe6e33000 0 0x10>; 6635b9d1306SCongDang #pwm-cells = <2>; 6645b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 6655b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6665b9d1306SCongDang resets = <&cpg 628>; 6675b9d1306SCongDang status = "disabled"; 6685b9d1306SCongDang }; 6695b9d1306SCongDang 6705b9d1306SCongDang pwm4: pwm@e6e34000 { 6715b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 6725b9d1306SCongDang reg = <0 0xe6e34000 0 0x10>; 6735b9d1306SCongDang #pwm-cells = <2>; 6745b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 6755b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6765b9d1306SCongDang resets = <&cpg 628>; 6775b9d1306SCongDang status = "disabled"; 6785b9d1306SCongDang }; 6795b9d1306SCongDang 6805b9d1306SCongDang pwm5: pwm@e6e35000 { 6815b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 6825b9d1306SCongDang reg = <0 0xe6e35000 0 0x10>; 6835b9d1306SCongDang #pwm-cells = <2>; 6845b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 6855b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6865b9d1306SCongDang resets = <&cpg 628>; 6875b9d1306SCongDang status = "disabled"; 6885b9d1306SCongDang }; 6895b9d1306SCongDang 6905b9d1306SCongDang pwm6: pwm@e6e36000 { 6915b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 6925b9d1306SCongDang reg = <0 0xe6e36000 0 0x10>; 6935b9d1306SCongDang #pwm-cells = <2>; 6945b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 6955b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 6965b9d1306SCongDang resets = <&cpg 628>; 6975b9d1306SCongDang status = "disabled"; 6985b9d1306SCongDang }; 6995b9d1306SCongDang 7005b9d1306SCongDang pwm7: pwm@e6e37000 { 7015b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7025b9d1306SCongDang reg = <0 0xe6e37000 0 0x10>; 7035b9d1306SCongDang #pwm-cells = <2>; 7045b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7055b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7065b9d1306SCongDang resets = <&cpg 628>; 7075b9d1306SCongDang status = "disabled"; 7085b9d1306SCongDang }; 7095b9d1306SCongDang 7105b9d1306SCongDang pwm8: pwm@e6e38000 { 7115b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7125b9d1306SCongDang reg = <0 0xe6e38000 0 0x10>; 7135b9d1306SCongDang #pwm-cells = <2>; 7145b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7155b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7165b9d1306SCongDang resets = <&cpg 628>; 7175b9d1306SCongDang status = "disabled"; 7185b9d1306SCongDang }; 7195b9d1306SCongDang 7205b9d1306SCongDang pwm9: pwm@e6e39000 { 7215b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7225b9d1306SCongDang reg = <0 0xe6e39000 0 0x10>; 7235b9d1306SCongDang #pwm-cells = <2>; 7245b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7255b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7265b9d1306SCongDang resets = <&cpg 628>; 7275b9d1306SCongDang status = "disabled"; 7285b9d1306SCongDang }; 7295b9d1306SCongDang 730a4c31c56SGeert Uytterhoeven scif0: serial@e6e60000 { 731a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 732a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 733a4c31c56SGeert Uytterhoeven reg = <0 0xe6e60000 0 64>; 734a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 735a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 702>, 736a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 737a4c31c56SGeert Uytterhoeven <&scif_clk>; 738a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 739a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x51>, <&dmac0 0x50>, 740a4c31c56SGeert Uytterhoeven <&dmac1 0x51>, <&dmac1 0x50>; 741a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 742a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 743a4c31c56SGeert Uytterhoeven resets = <&cpg 702>; 744a4c31c56SGeert Uytterhoeven status = "disabled"; 745a4c31c56SGeert Uytterhoeven }; 746a4c31c56SGeert Uytterhoeven 747a4c31c56SGeert Uytterhoeven scif1: serial@e6e68000 { 748a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 749a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 750a4c31c56SGeert Uytterhoeven reg = <0 0xe6e68000 0 64>; 751a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 752a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 703>, 753a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 754a4c31c56SGeert Uytterhoeven <&scif_clk>; 755a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 756a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x53>, <&dmac0 0x52>, 757a4c31c56SGeert Uytterhoeven <&dmac1 0x53>, <&dmac1 0x52>; 758a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 759a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 760a4c31c56SGeert Uytterhoeven resets = <&cpg 703>; 761a4c31c56SGeert Uytterhoeven status = "disabled"; 762a4c31c56SGeert Uytterhoeven }; 763a4c31c56SGeert Uytterhoeven 764a4c31c56SGeert Uytterhoeven scif3: serial@e6c50000 { 765a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 766a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 767a4c31c56SGeert Uytterhoeven reg = <0 0xe6c50000 0 64>; 768a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 769a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 704>, 770a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 771a4c31c56SGeert Uytterhoeven <&scif_clk>; 772a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 773a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x57>, <&dmac0 0x56>, 774a4c31c56SGeert Uytterhoeven <&dmac1 0x57>, <&dmac1 0x56>; 775a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 776a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 777a4c31c56SGeert Uytterhoeven resets = <&cpg 704>; 778a4c31c56SGeert Uytterhoeven status = "disabled"; 779a4c31c56SGeert Uytterhoeven }; 780a4c31c56SGeert Uytterhoeven 781a4c31c56SGeert Uytterhoeven scif4: serial@e6c40000 { 782a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 783a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 784a4c31c56SGeert Uytterhoeven reg = <0 0xe6c40000 0 64>; 785a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 786a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 705>, 787a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 788a4c31c56SGeert Uytterhoeven <&scif_clk>; 789a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 790a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x59>, <&dmac0 0x58>, 791a4c31c56SGeert Uytterhoeven <&dmac1 0x59>, <&dmac1 0x58>; 792a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 793a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 794a4c31c56SGeert Uytterhoeven resets = <&cpg 705>; 795a4c31c56SGeert Uytterhoeven status = "disabled"; 796a4c31c56SGeert Uytterhoeven }; 797a4c31c56SGeert Uytterhoeven 7984a76d4abSCongDang tpu: pwm@e6e80000 { 7994a76d4abSCongDang compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 8004a76d4abSCongDang reg = <0 0xe6e80000 0 0x148>; 8014a76d4abSCongDang interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 8024a76d4abSCongDang clocks = <&cpg CPG_MOD 718>; 8034a76d4abSCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8044a76d4abSCongDang resets = <&cpg 718>; 8054a76d4abSCongDang #pwm-cells = <3>; 8064a76d4abSCongDang status = "disabled"; 8074a76d4abSCongDang }; 8084a76d4abSCongDang 809e0768073SGeert Uytterhoeven msiof0: spi@e6e90000 { 810e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 811e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 812e0768073SGeert Uytterhoeven reg = <0 0xe6e90000 0 0x0064>; 813e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 814e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 618>; 815e0768073SGeert Uytterhoeven dmas = <&dmac0 0x41>, <&dmac0 0x40>, 816e0768073SGeert Uytterhoeven <&dmac1 0x41>, <&dmac1 0x40>; 817e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 818e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 819e0768073SGeert Uytterhoeven resets = <&cpg 618>; 820e0768073SGeert Uytterhoeven #address-cells = <1>; 821e0768073SGeert Uytterhoeven #size-cells = <0>; 822e0768073SGeert Uytterhoeven status = "disabled"; 823e0768073SGeert Uytterhoeven }; 824e0768073SGeert Uytterhoeven 825e0768073SGeert Uytterhoeven msiof1: spi@e6ea0000 { 826e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 827e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 828e0768073SGeert Uytterhoeven reg = <0 0xe6ea0000 0 0x0064>; 829e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 830e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 619>; 831e0768073SGeert Uytterhoeven dmas = <&dmac0 0x43>, <&dmac0 0x42>, 832e0768073SGeert Uytterhoeven <&dmac1 0x43>, <&dmac1 0x42>; 833e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 834e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 835e0768073SGeert Uytterhoeven resets = <&cpg 619>; 836e0768073SGeert Uytterhoeven #address-cells = <1>; 837e0768073SGeert Uytterhoeven #size-cells = <0>; 838e0768073SGeert Uytterhoeven status = "disabled"; 839e0768073SGeert Uytterhoeven }; 840e0768073SGeert Uytterhoeven 841e0768073SGeert Uytterhoeven msiof2: spi@e6c00000 { 842e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 843e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 844e0768073SGeert Uytterhoeven reg = <0 0xe6c00000 0 0x0064>; 845e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 846e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 620>; 847e0768073SGeert Uytterhoeven dmas = <&dmac0 0x45>, <&dmac0 0x44>, 848e0768073SGeert Uytterhoeven <&dmac1 0x45>, <&dmac1 0x44>; 849e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 850e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 851e0768073SGeert Uytterhoeven resets = <&cpg 620>; 852e0768073SGeert Uytterhoeven #address-cells = <1>; 853e0768073SGeert Uytterhoeven #size-cells = <0>; 854e0768073SGeert Uytterhoeven status = "disabled"; 855e0768073SGeert Uytterhoeven }; 856e0768073SGeert Uytterhoeven 857e0768073SGeert Uytterhoeven msiof3: spi@e6c10000 { 858e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 859e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 860e0768073SGeert Uytterhoeven reg = <0 0xe6c10000 0 0x0064>; 861e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 862e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 621>; 863e0768073SGeert Uytterhoeven dmas = <&dmac0 0x47>, <&dmac0 0x46>, 864e0768073SGeert Uytterhoeven <&dmac1 0x47>, <&dmac1 0x46>; 865e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 866e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 867e0768073SGeert Uytterhoeven resets = <&cpg 621>; 868e0768073SGeert Uytterhoeven #address-cells = <1>; 869e0768073SGeert Uytterhoeven #size-cells = <0>; 870e0768073SGeert Uytterhoeven status = "disabled"; 871e0768073SGeert Uytterhoeven }; 872e0768073SGeert Uytterhoeven 873e0768073SGeert Uytterhoeven msiof4: spi@e6c20000 { 874e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 875e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 876e0768073SGeert Uytterhoeven reg = <0 0xe6c20000 0 0x0064>; 877e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 878e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 622>; 879e0768073SGeert Uytterhoeven dmas = <&dmac0 0x49>, <&dmac0 0x48>, 880e0768073SGeert Uytterhoeven <&dmac1 0x49>, <&dmac1 0x48>; 881e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 882e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 883e0768073SGeert Uytterhoeven resets = <&cpg 622>; 884e0768073SGeert Uytterhoeven #address-cells = <1>; 885e0768073SGeert Uytterhoeven #size-cells = <0>; 886e0768073SGeert Uytterhoeven status = "disabled"; 887e0768073SGeert Uytterhoeven }; 888e0768073SGeert Uytterhoeven 889e0768073SGeert Uytterhoeven msiof5: spi@e6c28000 { 890e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 891e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 892e0768073SGeert Uytterhoeven reg = <0 0xe6c28000 0 0x0064>; 893e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 894e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 623>; 895e0768073SGeert Uytterhoeven dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 896e0768073SGeert Uytterhoeven <&dmac1 0x4b>, <&dmac1 0x4a>; 897e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 898e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 899e0768073SGeert Uytterhoeven resets = <&cpg 623>; 900e0768073SGeert Uytterhoeven #address-cells = <1>; 901e0768073SGeert Uytterhoeven #size-cells = <0>; 902e0768073SGeert Uytterhoeven status = "disabled"; 903e0768073SGeert Uytterhoeven }; 904e0768073SGeert Uytterhoeven 90508f28288SGeert Uytterhoeven dmac0: dma-controller@e7350000 { 90608f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 90708f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 90808f28288SGeert Uytterhoeven reg = <0 0xe7350000 0 0x1000>, 90908f28288SGeert Uytterhoeven <0 0xe7300000 0 0x10000>; 91008f28288SGeert Uytterhoeven interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 91108f28288SGeert Uytterhoeven <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 91208f28288SGeert Uytterhoeven <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 91308f28288SGeert Uytterhoeven <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 91408f28288SGeert Uytterhoeven <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 91508f28288SGeert Uytterhoeven <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 91608f28288SGeert Uytterhoeven <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 91708f28288SGeert Uytterhoeven <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 91808f28288SGeert Uytterhoeven <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 91908f28288SGeert Uytterhoeven <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 92008f28288SGeert Uytterhoeven <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 92108f28288SGeert Uytterhoeven <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 92208f28288SGeert Uytterhoeven <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 92308f28288SGeert Uytterhoeven <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 92408f28288SGeert Uytterhoeven <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 92508f28288SGeert Uytterhoeven <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 92608f28288SGeert Uytterhoeven <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 92708f28288SGeert Uytterhoeven interrupt-names = "error", 92808f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 92908f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 93008f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 93108f28288SGeert Uytterhoeven "ch14", "ch15"; 93208f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 709>; 93308f28288SGeert Uytterhoeven clock-names = "fck"; 93408f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 93508f28288SGeert Uytterhoeven resets = <&cpg 709>; 93608f28288SGeert Uytterhoeven #dma-cells = <1>; 93708f28288SGeert Uytterhoeven dma-channels = <16>; 93808f28288SGeert Uytterhoeven }; 93908f28288SGeert Uytterhoeven 94008f28288SGeert Uytterhoeven dmac1: dma-controller@e7351000 { 94108f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 94208f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 94308f28288SGeert Uytterhoeven reg = <0 0xe7351000 0 0x1000>, 94408f28288SGeert Uytterhoeven <0 0xe7310000 0 0x10000>; 94508f28288SGeert Uytterhoeven interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 94608f28288SGeert Uytterhoeven <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 94708f28288SGeert Uytterhoeven <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 94808f28288SGeert Uytterhoeven <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 94908f28288SGeert Uytterhoeven <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 95008f28288SGeert Uytterhoeven <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 95108f28288SGeert Uytterhoeven <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 95208f28288SGeert Uytterhoeven <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 95308f28288SGeert Uytterhoeven <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 95408f28288SGeert Uytterhoeven <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 95508f28288SGeert Uytterhoeven <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 95608f28288SGeert Uytterhoeven <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 95708f28288SGeert Uytterhoeven <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 95808f28288SGeert Uytterhoeven <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 95908f28288SGeert Uytterhoeven <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 96008f28288SGeert Uytterhoeven <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 96108f28288SGeert Uytterhoeven <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 96208f28288SGeert Uytterhoeven interrupt-names = "error", 96308f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 96408f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 96508f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 96608f28288SGeert Uytterhoeven "ch14", "ch15"; 96708f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 710>; 96808f28288SGeert Uytterhoeven clock-names = "fck"; 96908f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 97008f28288SGeert Uytterhoeven resets = <&cpg 710>; 97108f28288SGeert Uytterhoeven #dma-cells = <1>; 97208f28288SGeert Uytterhoeven dma-channels = <16>; 97308f28288SGeert Uytterhoeven }; 97408f28288SGeert Uytterhoeven 975bc7bf913SGeert Uytterhoeven mmc0: mmc@ee140000 { 976bc7bf913SGeert Uytterhoeven compatible = "renesas,sdhi-r8a779g0", 977bc7bf913SGeert Uytterhoeven "renesas,rcar-gen4-sdhi"; 978bc7bf913SGeert Uytterhoeven reg = <0 0xee140000 0 0x2000>; 979bc7bf913SGeert Uytterhoeven interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 980bc7bf913SGeert Uytterhoeven clocks = <&cpg CPG_MOD 706>, 981bc7bf913SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 982bc7bf913SGeert Uytterhoeven clock-names = "core", "clkh"; 983bc7bf913SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 984bc7bf913SGeert Uytterhoeven resets = <&cpg 706>; 985bc7bf913SGeert Uytterhoeven max-frequency = <200000000>; 986bc7bf913SGeert Uytterhoeven status = "disabled"; 987bc7bf913SGeert Uytterhoeven }; 988bc7bf913SGeert Uytterhoeven 989d5014bedSHai Pham rpc: spi@ee200000 { 990d5014bedSHai Pham compatible = "renesas,r8a779g0-rpc-if", 991d5014bedSHai Pham "renesas,rcar-gen4-rpc-if"; 992d5014bedSHai Pham reg = <0 0xee200000 0 0x200>, 993d5014bedSHai Pham <0 0x08000000 0 0x04000000>, 994d5014bedSHai Pham <0 0xee208000 0 0x100>; 995d5014bedSHai Pham reg-names = "regs", "dirmap", "wbuf"; 996d5014bedSHai Pham interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 997d5014bedSHai Pham clocks = <&cpg CPG_MOD 629>; 998d5014bedSHai Pham power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 999d5014bedSHai Pham resets = <&cpg 629>; 1000d5014bedSHai Pham #address-cells = <1>; 1001d5014bedSHai Pham #size-cells = <0>; 1002d5014bedSHai Pham status = "disabled"; 1003d5014bedSHai Pham }; 1004d5014bedSHai Pham 1005987da486SYoshihiro Shimoda gic: interrupt-controller@f1000000 { 1006987da486SYoshihiro Shimoda compatible = "arm,gic-v3"; 1007987da486SYoshihiro Shimoda #interrupt-cells = <3>; 1008987da486SYoshihiro Shimoda #address-cells = <0>; 1009987da486SYoshihiro Shimoda interrupt-controller; 1010987da486SYoshihiro Shimoda reg = <0x0 0xf1000000 0 0x20000>, 1011987da486SYoshihiro Shimoda <0x0 0xf1060000 0 0x110000>; 1012987da486SYoshihiro Shimoda interrupts = <GIC_PPI 9 1013987da486SYoshihiro Shimoda (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 1014987da486SYoshihiro Shimoda }; 1015987da486SYoshihiro Shimoda 1016987da486SYoshihiro Shimoda prr: chipid@fff00044 { 1017987da486SYoshihiro Shimoda compatible = "renesas,prr"; 1018987da486SYoshihiro Shimoda reg = <0 0xfff00044 0 4>; 1019987da486SYoshihiro Shimoda }; 1020987da486SYoshihiro Shimoda }; 1021987da486SYoshihiro Shimoda 1022987da486SYoshihiro Shimoda timer { 1023987da486SYoshihiro Shimoda compatible = "arm,armv8-timer"; 1024987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 1025987da486SYoshihiro Shimoda <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 1026987da486SYoshihiro Shimoda <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 1027987da486SYoshihiro Shimoda <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 1028987da486SYoshihiro Shimoda }; 1029987da486SYoshihiro Shimoda}; 1030