1987da486SYoshihiro Shimoda// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2987da486SYoshihiro Shimoda/* 3987da486SYoshihiro Shimoda * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4987da486SYoshihiro Shimoda * 5987da486SYoshihiro Shimoda * Copyright (C) 2022 Renesas Electronics Corp. 6987da486SYoshihiro Shimoda */ 7987da486SYoshihiro Shimoda 8987da486SYoshihiro Shimoda#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9987da486SYoshihiro Shimoda#include <dt-bindings/interrupt-controller/arm-gic.h> 10987da486SYoshihiro Shimoda#include <dt-bindings/power/r8a779g0-sysc.h> 11987da486SYoshihiro Shimoda 12987da486SYoshihiro Shimoda/ { 13987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0"; 14987da486SYoshihiro Shimoda #address-cells = <2>; 15987da486SYoshihiro Shimoda #size-cells = <2>; 16987da486SYoshihiro Shimoda 17987da486SYoshihiro Shimoda cpus { 18987da486SYoshihiro Shimoda #address-cells = <1>; 19987da486SYoshihiro Shimoda #size-cells = <0>; 20987da486SYoshihiro Shimoda 21987da486SYoshihiro Shimoda a76_0: cpu@0 { 22987da486SYoshihiro Shimoda compatible = "arm,cortex-a76"; 23987da486SYoshihiro Shimoda reg = <0>; 24987da486SYoshihiro Shimoda device_type = "cpu"; 25987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 26987da486SYoshihiro Shimoda }; 27987da486SYoshihiro Shimoda }; 28987da486SYoshihiro Shimoda 29987da486SYoshihiro Shimoda extal_clk: extal { 30987da486SYoshihiro Shimoda compatible = "fixed-clock"; 31987da486SYoshihiro Shimoda #clock-cells = <0>; 32987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 33987da486SYoshihiro Shimoda clock-frequency = <0>; 34987da486SYoshihiro Shimoda }; 35987da486SYoshihiro Shimoda 36987da486SYoshihiro Shimoda extalr_clk: extalr { 37987da486SYoshihiro Shimoda compatible = "fixed-clock"; 38987da486SYoshihiro Shimoda #clock-cells = <0>; 39987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 40987da486SYoshihiro Shimoda clock-frequency = <0>; 41987da486SYoshihiro Shimoda }; 42987da486SYoshihiro Shimoda 43987da486SYoshihiro Shimoda pmu_a76 { 44987da486SYoshihiro Shimoda compatible = "arm,cortex-a76-pmu"; 45987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 46987da486SYoshihiro Shimoda }; 47987da486SYoshihiro Shimoda 48987da486SYoshihiro Shimoda /* External SCIF clock - to be overridden by boards that provide it */ 49987da486SYoshihiro Shimoda scif_clk: scif { 50987da486SYoshihiro Shimoda compatible = "fixed-clock"; 51987da486SYoshihiro Shimoda #clock-cells = <0>; 52987da486SYoshihiro Shimoda clock-frequency = <0>; 53987da486SYoshihiro Shimoda }; 54987da486SYoshihiro Shimoda 55987da486SYoshihiro Shimoda soc: soc { 56987da486SYoshihiro Shimoda compatible = "simple-bus"; 57987da486SYoshihiro Shimoda interrupt-parent = <&gic>; 58987da486SYoshihiro Shimoda #address-cells = <2>; 59987da486SYoshihiro Shimoda #size-cells = <2>; 60987da486SYoshihiro Shimoda ranges; 61987da486SYoshihiro Shimoda 62a43306faSGeert Uytterhoeven rwdt: watchdog@e6020000 { 63a43306faSGeert Uytterhoeven compatible = "renesas,r8a779g0-wdt", 64a43306faSGeert Uytterhoeven "renesas,rcar-gen4-wdt"; 65a43306faSGeert Uytterhoeven reg = <0 0xe6020000 0 0x0c>; 66a43306faSGeert Uytterhoeven interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 67a43306faSGeert Uytterhoeven clocks = <&cpg CPG_MOD 907>; 68a43306faSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 69a43306faSGeert Uytterhoeven resets = <&cpg 907>; 70a43306faSGeert Uytterhoeven status = "disabled"; 71a43306faSGeert Uytterhoeven }; 72a43306faSGeert Uytterhoeven 734cebce25SGeert Uytterhoeven pfc: pinctrl@e6050000 { 744cebce25SGeert Uytterhoeven compatible = "renesas,pfc-r8a779g0"; 754cebce25SGeert Uytterhoeven reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 764cebce25SGeert Uytterhoeven <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 774cebce25SGeert Uytterhoeven <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 784cebce25SGeert Uytterhoeven <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 794cebce25SGeert Uytterhoeven <0 0xe6068000 0 0x16c>; 804cebce25SGeert Uytterhoeven }; 814cebce25SGeert Uytterhoeven 82120c7a58SGeert Uytterhoeven gpio0: gpio@e6050180 { 83120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 84120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 85120c7a58SGeert Uytterhoeven reg = <0 0xe6050180 0 0x54>; 86120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 87120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 88120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 89120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 90120c7a58SGeert Uytterhoeven gpio-controller; 91120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 92120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 0 19>; 93120c7a58SGeert Uytterhoeven interrupt-controller; 94120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 95120c7a58SGeert Uytterhoeven }; 96120c7a58SGeert Uytterhoeven 97120c7a58SGeert Uytterhoeven gpio1: gpio@e6050980 { 98120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 99120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 100120c7a58SGeert Uytterhoeven reg = <0 0xe6050980 0 0x54>; 101120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 102120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 103120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 104120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 105120c7a58SGeert Uytterhoeven gpio-controller; 106120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 107120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 32 29>; 108120c7a58SGeert Uytterhoeven interrupt-controller; 109120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 110120c7a58SGeert Uytterhoeven }; 111120c7a58SGeert Uytterhoeven 112120c7a58SGeert Uytterhoeven gpio2: gpio@e6058180 { 113120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 114120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 115120c7a58SGeert Uytterhoeven reg = <0 0xe6058180 0 0x54>; 116120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 117120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 118120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 119120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 120120c7a58SGeert Uytterhoeven gpio-controller; 121120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 122120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 64 20>; 123120c7a58SGeert Uytterhoeven interrupt-controller; 124120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 125120c7a58SGeert Uytterhoeven }; 126120c7a58SGeert Uytterhoeven 127120c7a58SGeert Uytterhoeven gpio3: gpio@e6058980 { 128120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 129120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 130120c7a58SGeert Uytterhoeven reg = <0 0xe6058980 0 0x54>; 131120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 132120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 133120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 134120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 135120c7a58SGeert Uytterhoeven gpio-controller; 136120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 137120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 96 30>; 138120c7a58SGeert Uytterhoeven interrupt-controller; 139120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 140120c7a58SGeert Uytterhoeven }; 141120c7a58SGeert Uytterhoeven 142120c7a58SGeert Uytterhoeven gpio4: gpio@e6060180 { 143120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 144120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 145120c7a58SGeert Uytterhoeven reg = <0 0xe6060180 0 0x54>; 146120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 147120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 148120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 149120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 150120c7a58SGeert Uytterhoeven gpio-controller; 151120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 152120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 128 25>; 153120c7a58SGeert Uytterhoeven interrupt-controller; 154120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 155120c7a58SGeert Uytterhoeven }; 156120c7a58SGeert Uytterhoeven 157120c7a58SGeert Uytterhoeven gpio5: gpio@e6060980 { 158120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 159120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 160120c7a58SGeert Uytterhoeven reg = <0 0xe6060980 0 0x54>; 161120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 162120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 163120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 164120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 165120c7a58SGeert Uytterhoeven gpio-controller; 166120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 167120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 160 21>; 168120c7a58SGeert Uytterhoeven interrupt-controller; 169120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 170120c7a58SGeert Uytterhoeven }; 171120c7a58SGeert Uytterhoeven 172120c7a58SGeert Uytterhoeven gpio6: gpio@e6061180 { 173120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 174120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 175120c7a58SGeert Uytterhoeven reg = <0 0xe6061180 0 0x54>; 176120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 177120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 178120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 179120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 180120c7a58SGeert Uytterhoeven gpio-controller; 181120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 182120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 192 21>; 183120c7a58SGeert Uytterhoeven interrupt-controller; 184120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 185120c7a58SGeert Uytterhoeven }; 186120c7a58SGeert Uytterhoeven 187120c7a58SGeert Uytterhoeven gpio7: gpio@e6061980 { 188120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 189120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 190120c7a58SGeert Uytterhoeven reg = <0 0xe6061980 0 0x54>; 191120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 192120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 193120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 194120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 195120c7a58SGeert Uytterhoeven gpio-controller; 196120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 197120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 224 21>; 198120c7a58SGeert Uytterhoeven interrupt-controller; 199120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 200120c7a58SGeert Uytterhoeven }; 201120c7a58SGeert Uytterhoeven 202120c7a58SGeert Uytterhoeven gpio8: gpio@e6068180 { 203120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 204120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 205120c7a58SGeert Uytterhoeven reg = <0 0xe6068180 0 0x54>; 206120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 207120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 918>; 208120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 209120c7a58SGeert Uytterhoeven resets = <&cpg 918>; 210120c7a58SGeert Uytterhoeven gpio-controller; 211120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 212120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 256 14>; 213120c7a58SGeert Uytterhoeven interrupt-controller; 214120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 215120c7a58SGeert Uytterhoeven }; 216120c7a58SGeert Uytterhoeven 217*40a6dd7bSThanh Quan cmt0: timer@e60f0000 { 218*40a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt0", 219*40a6dd7bSThanh Quan "renesas,rcar-gen4-cmt0"; 220*40a6dd7bSThanh Quan reg = <0 0xe60f0000 0 0x1004>; 221*40a6dd7bSThanh Quan interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 222*40a6dd7bSThanh Quan <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 223*40a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 910>; 224*40a6dd7bSThanh Quan clock-names = "fck"; 225*40a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 226*40a6dd7bSThanh Quan resets = <&cpg 910>; 227*40a6dd7bSThanh Quan status = "disabled"; 228*40a6dd7bSThanh Quan }; 229*40a6dd7bSThanh Quan 230*40a6dd7bSThanh Quan cmt1: timer@e6130000 { 231*40a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 232*40a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 233*40a6dd7bSThanh Quan reg = <0 0xe6130000 0 0x1004>; 234*40a6dd7bSThanh Quan interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 235*40a6dd7bSThanh Quan <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 236*40a6dd7bSThanh Quan <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 237*40a6dd7bSThanh Quan <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 238*40a6dd7bSThanh Quan <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 239*40a6dd7bSThanh Quan <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 240*40a6dd7bSThanh Quan <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 241*40a6dd7bSThanh Quan <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 242*40a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 911>; 243*40a6dd7bSThanh Quan clock-names = "fck"; 244*40a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 245*40a6dd7bSThanh Quan resets = <&cpg 911>; 246*40a6dd7bSThanh Quan status = "disabled"; 247*40a6dd7bSThanh Quan }; 248*40a6dd7bSThanh Quan 249*40a6dd7bSThanh Quan cmt2: timer@e6140000 { 250*40a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 251*40a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 252*40a6dd7bSThanh Quan reg = <0 0xe6140000 0 0x1004>; 253*40a6dd7bSThanh Quan interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 254*40a6dd7bSThanh Quan <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 255*40a6dd7bSThanh Quan <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 256*40a6dd7bSThanh Quan <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 257*40a6dd7bSThanh Quan <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 258*40a6dd7bSThanh Quan <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 259*40a6dd7bSThanh Quan <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 260*40a6dd7bSThanh Quan <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 261*40a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 912>; 262*40a6dd7bSThanh Quan clock-names = "fck"; 263*40a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 264*40a6dd7bSThanh Quan resets = <&cpg 912>; 265*40a6dd7bSThanh Quan status = "disabled"; 266*40a6dd7bSThanh Quan }; 267*40a6dd7bSThanh Quan 268*40a6dd7bSThanh Quan cmt3: timer@e6148000 { 269*40a6dd7bSThanh Quan compatible = "renesas,r8a779g0-cmt1", 270*40a6dd7bSThanh Quan "renesas,rcar-gen4-cmt1"; 271*40a6dd7bSThanh Quan reg = <0 0xe6148000 0 0x1004>; 272*40a6dd7bSThanh Quan interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 273*40a6dd7bSThanh Quan <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 274*40a6dd7bSThanh Quan <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 275*40a6dd7bSThanh Quan <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 276*40a6dd7bSThanh Quan <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 277*40a6dd7bSThanh Quan <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 278*40a6dd7bSThanh Quan <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 279*40a6dd7bSThanh Quan <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 280*40a6dd7bSThanh Quan clocks = <&cpg CPG_MOD 913>; 281*40a6dd7bSThanh Quan clock-names = "fck"; 282*40a6dd7bSThanh Quan power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 283*40a6dd7bSThanh Quan resets = <&cpg 913>; 284*40a6dd7bSThanh Quan status = "disabled"; 285*40a6dd7bSThanh Quan }; 286*40a6dd7bSThanh Quan 287987da486SYoshihiro Shimoda cpg: clock-controller@e6150000 { 288987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-cpg-mssr"; 289987da486SYoshihiro Shimoda reg = <0 0xe6150000 0 0x4000>; 290987da486SYoshihiro Shimoda clocks = <&extal_clk>, <&extalr_clk>; 291987da486SYoshihiro Shimoda clock-names = "extal", "extalr"; 292987da486SYoshihiro Shimoda #clock-cells = <2>; 293987da486SYoshihiro Shimoda #power-domain-cells = <0>; 294987da486SYoshihiro Shimoda #reset-cells = <1>; 295987da486SYoshihiro Shimoda }; 296987da486SYoshihiro Shimoda 297987da486SYoshihiro Shimoda rst: reset-controller@e6160000 { 298987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-rst"; 299987da486SYoshihiro Shimoda reg = <0 0xe6160000 0 0x4000>; 300987da486SYoshihiro Shimoda }; 301987da486SYoshihiro Shimoda 302987da486SYoshihiro Shimoda sysc: system-controller@e6180000 { 303987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-sysc"; 304987da486SYoshihiro Shimoda reg = <0 0xe6180000 0 0x4000>; 305987da486SYoshihiro Shimoda #power-domain-cells = <1>; 306987da486SYoshihiro Shimoda }; 307987da486SYoshihiro Shimoda 308b6ce840bSGeert Uytterhoeven intc_ex: interrupt-controller@e61c0000 { 309b6ce840bSGeert Uytterhoeven compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 310b6ce840bSGeert Uytterhoeven #interrupt-cells = <2>; 311b6ce840bSGeert Uytterhoeven interrupt-controller; 312b6ce840bSGeert Uytterhoeven reg = <0 0xe61c0000 0 0x200>; 313b6ce840bSGeert Uytterhoeven interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 314b6ce840bSGeert Uytterhoeven <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 315b6ce840bSGeert Uytterhoeven <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 316b6ce840bSGeert Uytterhoeven <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 317b6ce840bSGeert Uytterhoeven <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 318b6ce840bSGeert Uytterhoeven <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 319b6ce840bSGeert Uytterhoeven clocks = <&cpg CPG_MOD 611>; 320b6ce840bSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 321b6ce840bSGeert Uytterhoeven resets = <&cpg 611>; 322b6ce840bSGeert Uytterhoeven }; 323b6ce840bSGeert Uytterhoeven 32452478925SWolfram Sang tmu0: timer@e61e0000 { 32552478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 32652478925SWolfram Sang reg = <0 0xe61e0000 0 0x30>; 32752478925SWolfram Sang interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 32852478925SWolfram Sang <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 32952478925SWolfram Sang <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 33052478925SWolfram Sang clocks = <&cpg CPG_MOD 713>; 33152478925SWolfram Sang clock-names = "fck"; 33252478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 33352478925SWolfram Sang resets = <&cpg 713>; 33452478925SWolfram Sang status = "disabled"; 33552478925SWolfram Sang }; 33652478925SWolfram Sang 33752478925SWolfram Sang tmu1: timer@e6fc0000 { 33852478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 33952478925SWolfram Sang reg = <0 0xe6fc0000 0 0x30>; 34052478925SWolfram Sang interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 34152478925SWolfram Sang <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 34252478925SWolfram Sang <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>; 34352478925SWolfram Sang clocks = <&cpg CPG_MOD 714>; 34452478925SWolfram Sang clock-names = "fck"; 34552478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 34652478925SWolfram Sang resets = <&cpg 714>; 34752478925SWolfram Sang status = "disabled"; 34852478925SWolfram Sang }; 34952478925SWolfram Sang 35052478925SWolfram Sang tmu2: timer@e6fd0000 { 35152478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 35252478925SWolfram Sang reg = <0 0xe6fd0000 0 0x30>; 35352478925SWolfram Sang interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 35452478925SWolfram Sang <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 35552478925SWolfram Sang <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 35652478925SWolfram Sang clocks = <&cpg CPG_MOD 715>; 35752478925SWolfram Sang clock-names = "fck"; 35852478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 35952478925SWolfram Sang resets = <&cpg 715>; 36052478925SWolfram Sang status = "disabled"; 36152478925SWolfram Sang }; 36252478925SWolfram Sang 36352478925SWolfram Sang tmu3: timer@e6fe0000 { 36452478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 36552478925SWolfram Sang reg = <0 0xe6fe0000 0 0x30>; 36652478925SWolfram Sang interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 36752478925SWolfram Sang <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 36852478925SWolfram Sang <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>; 36952478925SWolfram Sang clocks = <&cpg CPG_MOD 716>; 37052478925SWolfram Sang clock-names = "fck"; 37152478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 37252478925SWolfram Sang resets = <&cpg 716>; 37352478925SWolfram Sang status = "disabled"; 37452478925SWolfram Sang }; 37552478925SWolfram Sang 37652478925SWolfram Sang tmu4: timer@ffc00000 { 37752478925SWolfram Sang compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 37852478925SWolfram Sang reg = <0 0xffc00000 0 0x30>; 37952478925SWolfram Sang interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 38052478925SWolfram Sang <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 38152478925SWolfram Sang <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 38252478925SWolfram Sang clocks = <&cpg CPG_MOD 717>; 38352478925SWolfram Sang clock-names = "fck"; 38452478925SWolfram Sang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 38552478925SWolfram Sang resets = <&cpg 717>; 38652478925SWolfram Sang status = "disabled"; 38752478925SWolfram Sang }; 38852478925SWolfram Sang 389ff77ba05SGeert Uytterhoeven i2c0: i2c@e6500000 { 390ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 391ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 392ff77ba05SGeert Uytterhoeven reg = <0 0xe6500000 0 0x40>; 393ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 394ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 518>; 39508f28288SGeert Uytterhoeven dmas = <&dmac0 0x91>, <&dmac0 0x90>, 39608f28288SGeert Uytterhoeven <&dmac1 0x91>, <&dmac1 0x90>; 39708f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 398ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 399ff77ba05SGeert Uytterhoeven resets = <&cpg 518>; 400ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 401ff77ba05SGeert Uytterhoeven #address-cells = <1>; 402ff77ba05SGeert Uytterhoeven #size-cells = <0>; 403ff77ba05SGeert Uytterhoeven status = "disabled"; 404ff77ba05SGeert Uytterhoeven }; 405ff77ba05SGeert Uytterhoeven 406ff77ba05SGeert Uytterhoeven i2c1: i2c@e6508000 { 407ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 408ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 409ff77ba05SGeert Uytterhoeven reg = <0 0xe6508000 0 0x40>; 410ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 411ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 519>; 41208f28288SGeert Uytterhoeven dmas = <&dmac0 0x93>, <&dmac0 0x92>, 41308f28288SGeert Uytterhoeven <&dmac1 0x93>, <&dmac1 0x92>; 41408f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 415ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 416ff77ba05SGeert Uytterhoeven resets = <&cpg 519>; 417ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 418ff77ba05SGeert Uytterhoeven #address-cells = <1>; 419ff77ba05SGeert Uytterhoeven #size-cells = <0>; 420ff77ba05SGeert Uytterhoeven status = "disabled"; 421ff77ba05SGeert Uytterhoeven }; 422ff77ba05SGeert Uytterhoeven 423ff77ba05SGeert Uytterhoeven i2c2: i2c@e6510000 { 424ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 425ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 426ff77ba05SGeert Uytterhoeven reg = <0 0xe6510000 0 0x40>; 427ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 428ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 520>; 42908f28288SGeert Uytterhoeven dmas = <&dmac0 0x95>, <&dmac0 0x94>, 43008f28288SGeert Uytterhoeven <&dmac1 0x95>, <&dmac1 0x94>; 43108f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 432ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 433ff77ba05SGeert Uytterhoeven resets = <&cpg 520>; 434ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 435ff77ba05SGeert Uytterhoeven #address-cells = <1>; 436ff77ba05SGeert Uytterhoeven #size-cells = <0>; 437ff77ba05SGeert Uytterhoeven status = "disabled"; 438ff77ba05SGeert Uytterhoeven }; 439ff77ba05SGeert Uytterhoeven 440ff77ba05SGeert Uytterhoeven i2c3: i2c@e66d0000 { 441ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 442ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 443ff77ba05SGeert Uytterhoeven reg = <0 0xe66d0000 0 0x40>; 444ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 445ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 521>; 44608f28288SGeert Uytterhoeven dmas = <&dmac0 0x97>, <&dmac0 0x96>, 44708f28288SGeert Uytterhoeven <&dmac1 0x97>, <&dmac1 0x96>; 44808f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 449ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 450ff77ba05SGeert Uytterhoeven resets = <&cpg 521>; 451ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 452ff77ba05SGeert Uytterhoeven #address-cells = <1>; 453ff77ba05SGeert Uytterhoeven #size-cells = <0>; 454ff77ba05SGeert Uytterhoeven status = "disabled"; 455ff77ba05SGeert Uytterhoeven }; 456ff77ba05SGeert Uytterhoeven 457ff77ba05SGeert Uytterhoeven i2c4: i2c@e66d8000 { 458ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 459ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 460ff77ba05SGeert Uytterhoeven reg = <0 0xe66d8000 0 0x40>; 461ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 462ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 522>; 46308f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 46408f28288SGeert Uytterhoeven dmas = <&dmac0 0x99>, <&dmac0 0x98>, 46508f28288SGeert Uytterhoeven <&dmac1 0x99>, <&dmac1 0x98>; 466ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 467ff77ba05SGeert Uytterhoeven resets = <&cpg 522>; 468ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 469ff77ba05SGeert Uytterhoeven #address-cells = <1>; 470ff77ba05SGeert Uytterhoeven #size-cells = <0>; 471ff77ba05SGeert Uytterhoeven status = "disabled"; 472ff77ba05SGeert Uytterhoeven }; 473ff77ba05SGeert Uytterhoeven 474ff77ba05SGeert Uytterhoeven i2c5: i2c@e66e0000 { 475ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 476ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 477ff77ba05SGeert Uytterhoeven reg = <0 0xe66e0000 0 0x40>; 478ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 479ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 523>; 48008f28288SGeert Uytterhoeven dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 48108f28288SGeert Uytterhoeven <&dmac1 0x9b>, <&dmac1 0x9a>; 48208f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 483ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 484ff77ba05SGeert Uytterhoeven resets = <&cpg 523>; 485ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 486ff77ba05SGeert Uytterhoeven #address-cells = <1>; 487ff77ba05SGeert Uytterhoeven #size-cells = <0>; 488ff77ba05SGeert Uytterhoeven status = "disabled"; 489ff77ba05SGeert Uytterhoeven }; 490ff77ba05SGeert Uytterhoeven 491987da486SYoshihiro Shimoda hscif0: serial@e6540000 { 492987da486SYoshihiro Shimoda compatible = "renesas,hscif-r8a779g0", 49339d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 49439d9dfc6SGeert Uytterhoeven reg = <0 0xe6540000 0 0x60>; 495ab2866f1SGeert Uytterhoeven interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 496987da486SYoshihiro Shimoda clocks = <&cpg CPG_MOD 514>, 497a4290d40SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 498987da486SYoshihiro Shimoda <&scif_clk>; 499987da486SYoshihiro Shimoda clock-names = "fck", "brg_int", "scif_clk"; 50008f28288SGeert Uytterhoeven dmas = <&dmac0 0x31>, <&dmac0 0x30>, 50108f28288SGeert Uytterhoeven <&dmac1 0x31>, <&dmac1 0x30>; 50208f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 503987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 504987da486SYoshihiro Shimoda resets = <&cpg 514>; 505987da486SYoshihiro Shimoda status = "disabled"; 506987da486SYoshihiro Shimoda }; 507987da486SYoshihiro Shimoda 50839d9dfc6SGeert Uytterhoeven hscif1: serial@e6550000 { 50939d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 51039d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 51139d9dfc6SGeert Uytterhoeven reg = <0 0xe6550000 0 0x60>; 51239d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 51339d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 515>, 51439d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 51539d9dfc6SGeert Uytterhoeven <&scif_clk>; 51639d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 51739d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x33>, <&dmac0 0x32>, 51839d9dfc6SGeert Uytterhoeven <&dmac1 0x33>, <&dmac1 0x32>; 51939d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 52039d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 52139d9dfc6SGeert Uytterhoeven resets = <&cpg 515>; 52239d9dfc6SGeert Uytterhoeven status = "disabled"; 52339d9dfc6SGeert Uytterhoeven }; 52439d9dfc6SGeert Uytterhoeven 52539d9dfc6SGeert Uytterhoeven hscif2: serial@e6560000 { 52639d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 52739d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 52839d9dfc6SGeert Uytterhoeven reg = <0 0xe6560000 0 0x60>; 52939d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 53039d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 516>, 53139d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 53239d9dfc6SGeert Uytterhoeven <&scif_clk>; 53339d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 53439d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x35>, <&dmac0 0x34>, 53539d9dfc6SGeert Uytterhoeven <&dmac1 0x35>, <&dmac1 0x34>; 53639d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 53739d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 53839d9dfc6SGeert Uytterhoeven resets = <&cpg 516>; 53939d9dfc6SGeert Uytterhoeven status = "disabled"; 54039d9dfc6SGeert Uytterhoeven }; 54139d9dfc6SGeert Uytterhoeven 54239d9dfc6SGeert Uytterhoeven hscif3: serial@e66a0000 { 54339d9dfc6SGeert Uytterhoeven compatible = "renesas,hscif-r8a779g0", 54439d9dfc6SGeert Uytterhoeven "renesas,rcar-gen4-hscif", "renesas,hscif"; 54539d9dfc6SGeert Uytterhoeven reg = <0 0xe66a0000 0 0x60>; 54639d9dfc6SGeert Uytterhoeven interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 54739d9dfc6SGeert Uytterhoeven clocks = <&cpg CPG_MOD 517>, 54839d9dfc6SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 54939d9dfc6SGeert Uytterhoeven <&scif_clk>; 55039d9dfc6SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 55139d9dfc6SGeert Uytterhoeven dmas = <&dmac0 0x37>, <&dmac0 0x36>, 55239d9dfc6SGeert Uytterhoeven <&dmac1 0x37>, <&dmac1 0x36>; 55339d9dfc6SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 55439d9dfc6SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 55539d9dfc6SGeert Uytterhoeven resets = <&cpg 517>; 55639d9dfc6SGeert Uytterhoeven status = "disabled"; 55739d9dfc6SGeert Uytterhoeven }; 55839d9dfc6SGeert Uytterhoeven 559848c82dbSGeert Uytterhoeven avb0: ethernet@e6800000 { 560848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 561848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 562848c82dbSGeert Uytterhoeven reg = <0 0xe6800000 0 0x800>; 563848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 564848c82dbSGeert Uytterhoeven <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 565848c82dbSGeert Uytterhoeven <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 566848c82dbSGeert Uytterhoeven <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 567848c82dbSGeert Uytterhoeven <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 568848c82dbSGeert Uytterhoeven <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 569848c82dbSGeert Uytterhoeven <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 570848c82dbSGeert Uytterhoeven <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 571848c82dbSGeert Uytterhoeven <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 572848c82dbSGeert Uytterhoeven <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 573848c82dbSGeert Uytterhoeven <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 574848c82dbSGeert Uytterhoeven <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 575848c82dbSGeert Uytterhoeven <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 576848c82dbSGeert Uytterhoeven <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 577848c82dbSGeert Uytterhoeven <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 578848c82dbSGeert Uytterhoeven <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 579848c82dbSGeert Uytterhoeven <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 580848c82dbSGeert Uytterhoeven <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 581848c82dbSGeert Uytterhoeven <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 582848c82dbSGeert Uytterhoeven <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 583848c82dbSGeert Uytterhoeven <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 584848c82dbSGeert Uytterhoeven <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 585848c82dbSGeert Uytterhoeven <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 586848c82dbSGeert Uytterhoeven <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 587848c82dbSGeert Uytterhoeven <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 588848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 589848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 590848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 591848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 592848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 593848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 594848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 211>; 595848c82dbSGeert Uytterhoeven clock-names = "fck"; 596848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 597848c82dbSGeert Uytterhoeven resets = <&cpg 211>; 598848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 599848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 600848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 601848c82dbSGeert Uytterhoeven #address-cells = <1>; 602848c82dbSGeert Uytterhoeven #size-cells = <0>; 603848c82dbSGeert Uytterhoeven status = "disabled"; 604848c82dbSGeert Uytterhoeven }; 605848c82dbSGeert Uytterhoeven 606848c82dbSGeert Uytterhoeven avb1: ethernet@e6810000 { 607848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 608848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 609848c82dbSGeert Uytterhoeven reg = <0 0xe6810000 0 0x800>; 610848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 611848c82dbSGeert Uytterhoeven <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 612848c82dbSGeert Uytterhoeven <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 613848c82dbSGeert Uytterhoeven <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 614848c82dbSGeert Uytterhoeven <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 615848c82dbSGeert Uytterhoeven <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 616848c82dbSGeert Uytterhoeven <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 617848c82dbSGeert Uytterhoeven <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 618848c82dbSGeert Uytterhoeven <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 619848c82dbSGeert Uytterhoeven <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 620848c82dbSGeert Uytterhoeven <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 621848c82dbSGeert Uytterhoeven <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 622848c82dbSGeert Uytterhoeven <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 623848c82dbSGeert Uytterhoeven <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 624848c82dbSGeert Uytterhoeven <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 625848c82dbSGeert Uytterhoeven <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 626848c82dbSGeert Uytterhoeven <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 627848c82dbSGeert Uytterhoeven <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 628848c82dbSGeert Uytterhoeven <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 629848c82dbSGeert Uytterhoeven <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 630848c82dbSGeert Uytterhoeven <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 631848c82dbSGeert Uytterhoeven <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 632848c82dbSGeert Uytterhoeven <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 633848c82dbSGeert Uytterhoeven <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 634848c82dbSGeert Uytterhoeven <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 635848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 636848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 637848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 638848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 639848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 640848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 641848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 212>; 642848c82dbSGeert Uytterhoeven clock-names = "fck"; 643848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 644848c82dbSGeert Uytterhoeven resets = <&cpg 212>; 645848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 646848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 647848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 648848c82dbSGeert Uytterhoeven #address-cells = <1>; 649848c82dbSGeert Uytterhoeven #size-cells = <0>; 650848c82dbSGeert Uytterhoeven status = "disabled"; 651848c82dbSGeert Uytterhoeven }; 652848c82dbSGeert Uytterhoeven 653848c82dbSGeert Uytterhoeven avb2: ethernet@e6820000 { 654848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 655848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 656848c82dbSGeert Uytterhoeven reg = <0 0xe6820000 0 0x1000>; 657848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 658848c82dbSGeert Uytterhoeven <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 659848c82dbSGeert Uytterhoeven <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 660848c82dbSGeert Uytterhoeven <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 661848c82dbSGeert Uytterhoeven <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 662848c82dbSGeert Uytterhoeven <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 663848c82dbSGeert Uytterhoeven <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 664848c82dbSGeert Uytterhoeven <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 665848c82dbSGeert Uytterhoeven <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 666848c82dbSGeert Uytterhoeven <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 667848c82dbSGeert Uytterhoeven <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 668848c82dbSGeert Uytterhoeven <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 669848c82dbSGeert Uytterhoeven <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 670848c82dbSGeert Uytterhoeven <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 671848c82dbSGeert Uytterhoeven <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 672848c82dbSGeert Uytterhoeven <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 673848c82dbSGeert Uytterhoeven <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 674848c82dbSGeert Uytterhoeven <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 675848c82dbSGeert Uytterhoeven <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 676848c82dbSGeert Uytterhoeven <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 677848c82dbSGeert Uytterhoeven <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 678848c82dbSGeert Uytterhoeven <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 679848c82dbSGeert Uytterhoeven <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 680848c82dbSGeert Uytterhoeven <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 681848c82dbSGeert Uytterhoeven <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 682848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 683848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 684848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 685848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 686848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 687848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 688848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 213>; 689848c82dbSGeert Uytterhoeven clock-names = "fck"; 690848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 691848c82dbSGeert Uytterhoeven resets = <&cpg 213>; 692848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 693848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 694848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 695848c82dbSGeert Uytterhoeven #address-cells = <1>; 696848c82dbSGeert Uytterhoeven #size-cells = <0>; 697848c82dbSGeert Uytterhoeven status = "disabled"; 698848c82dbSGeert Uytterhoeven }; 699848c82dbSGeert Uytterhoeven 7005b9d1306SCongDang pwm0: pwm@e6e30000 { 7015b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7025b9d1306SCongDang reg = <0 0xe6e30000 0 0x10>; 7035b9d1306SCongDang #pwm-cells = <2>; 7045b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7055b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7065b9d1306SCongDang resets = <&cpg 628>; 7075b9d1306SCongDang status = "disabled"; 7085b9d1306SCongDang }; 7095b9d1306SCongDang 7105b9d1306SCongDang pwm1: pwm@e6e31000 { 7115b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7125b9d1306SCongDang reg = <0 0xe6e31000 0 0x10>; 7135b9d1306SCongDang #pwm-cells = <2>; 7145b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7155b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7165b9d1306SCongDang resets = <&cpg 628>; 7175b9d1306SCongDang status = "disabled"; 7185b9d1306SCongDang }; 7195b9d1306SCongDang 7205b9d1306SCongDang pwm2: pwm@e6e32000 { 7215b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7225b9d1306SCongDang reg = <0 0xe6e32000 0 0x10>; 7235b9d1306SCongDang #pwm-cells = <2>; 7245b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7255b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7265b9d1306SCongDang resets = <&cpg 628>; 7275b9d1306SCongDang status = "disabled"; 7285b9d1306SCongDang }; 7295b9d1306SCongDang 7305b9d1306SCongDang pwm3: pwm@e6e33000 { 7315b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7325b9d1306SCongDang reg = <0 0xe6e33000 0 0x10>; 7335b9d1306SCongDang #pwm-cells = <2>; 7345b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7355b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7365b9d1306SCongDang resets = <&cpg 628>; 7375b9d1306SCongDang status = "disabled"; 7385b9d1306SCongDang }; 7395b9d1306SCongDang 7405b9d1306SCongDang pwm4: pwm@e6e34000 { 7415b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7425b9d1306SCongDang reg = <0 0xe6e34000 0 0x10>; 7435b9d1306SCongDang #pwm-cells = <2>; 7445b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7455b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7465b9d1306SCongDang resets = <&cpg 628>; 7475b9d1306SCongDang status = "disabled"; 7485b9d1306SCongDang }; 7495b9d1306SCongDang 7505b9d1306SCongDang pwm5: pwm@e6e35000 { 7515b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7525b9d1306SCongDang reg = <0 0xe6e35000 0 0x10>; 7535b9d1306SCongDang #pwm-cells = <2>; 7545b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7555b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7565b9d1306SCongDang resets = <&cpg 628>; 7575b9d1306SCongDang status = "disabled"; 7585b9d1306SCongDang }; 7595b9d1306SCongDang 7605b9d1306SCongDang pwm6: pwm@e6e36000 { 7615b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7625b9d1306SCongDang reg = <0 0xe6e36000 0 0x10>; 7635b9d1306SCongDang #pwm-cells = <2>; 7645b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7655b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7665b9d1306SCongDang resets = <&cpg 628>; 7675b9d1306SCongDang status = "disabled"; 7685b9d1306SCongDang }; 7695b9d1306SCongDang 7705b9d1306SCongDang pwm7: pwm@e6e37000 { 7715b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7725b9d1306SCongDang reg = <0 0xe6e37000 0 0x10>; 7735b9d1306SCongDang #pwm-cells = <2>; 7745b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7755b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7765b9d1306SCongDang resets = <&cpg 628>; 7775b9d1306SCongDang status = "disabled"; 7785b9d1306SCongDang }; 7795b9d1306SCongDang 7805b9d1306SCongDang pwm8: pwm@e6e38000 { 7815b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7825b9d1306SCongDang reg = <0 0xe6e38000 0 0x10>; 7835b9d1306SCongDang #pwm-cells = <2>; 7845b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7855b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7865b9d1306SCongDang resets = <&cpg 628>; 7875b9d1306SCongDang status = "disabled"; 7885b9d1306SCongDang }; 7895b9d1306SCongDang 7905b9d1306SCongDang pwm9: pwm@e6e39000 { 7915b9d1306SCongDang compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 7925b9d1306SCongDang reg = <0 0xe6e39000 0 0x10>; 7935b9d1306SCongDang #pwm-cells = <2>; 7945b9d1306SCongDang clocks = <&cpg CPG_MOD 628>; 7955b9d1306SCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 7965b9d1306SCongDang resets = <&cpg 628>; 7975b9d1306SCongDang status = "disabled"; 7985b9d1306SCongDang }; 7995b9d1306SCongDang 800a4c31c56SGeert Uytterhoeven scif0: serial@e6e60000 { 801a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 802a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 803a4c31c56SGeert Uytterhoeven reg = <0 0xe6e60000 0 64>; 804a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 805a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 702>, 806a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 807a4c31c56SGeert Uytterhoeven <&scif_clk>; 808a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 809a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x51>, <&dmac0 0x50>, 810a4c31c56SGeert Uytterhoeven <&dmac1 0x51>, <&dmac1 0x50>; 811a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 812a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 813a4c31c56SGeert Uytterhoeven resets = <&cpg 702>; 814a4c31c56SGeert Uytterhoeven status = "disabled"; 815a4c31c56SGeert Uytterhoeven }; 816a4c31c56SGeert Uytterhoeven 817a4c31c56SGeert Uytterhoeven scif1: serial@e6e68000 { 818a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 819a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 820a4c31c56SGeert Uytterhoeven reg = <0 0xe6e68000 0 64>; 821a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 822a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 703>, 823a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 824a4c31c56SGeert Uytterhoeven <&scif_clk>; 825a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 826a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x53>, <&dmac0 0x52>, 827a4c31c56SGeert Uytterhoeven <&dmac1 0x53>, <&dmac1 0x52>; 828a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 829a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 830a4c31c56SGeert Uytterhoeven resets = <&cpg 703>; 831a4c31c56SGeert Uytterhoeven status = "disabled"; 832a4c31c56SGeert Uytterhoeven }; 833a4c31c56SGeert Uytterhoeven 834a4c31c56SGeert Uytterhoeven scif3: serial@e6c50000 { 835a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 836a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 837a4c31c56SGeert Uytterhoeven reg = <0 0xe6c50000 0 64>; 838a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 839a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 704>, 840a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 841a4c31c56SGeert Uytterhoeven <&scif_clk>; 842a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 843a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x57>, <&dmac0 0x56>, 844a4c31c56SGeert Uytterhoeven <&dmac1 0x57>, <&dmac1 0x56>; 845a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 846a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 847a4c31c56SGeert Uytterhoeven resets = <&cpg 704>; 848a4c31c56SGeert Uytterhoeven status = "disabled"; 849a4c31c56SGeert Uytterhoeven }; 850a4c31c56SGeert Uytterhoeven 851a4c31c56SGeert Uytterhoeven scif4: serial@e6c40000 { 852a4c31c56SGeert Uytterhoeven compatible = "renesas,scif-r8a779g0", 853a4c31c56SGeert Uytterhoeven "renesas,rcar-gen4-scif", "renesas,scif"; 854a4c31c56SGeert Uytterhoeven reg = <0 0xe6c40000 0 64>; 855a4c31c56SGeert Uytterhoeven interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 856a4c31c56SGeert Uytterhoeven clocks = <&cpg CPG_MOD 705>, 857a4c31c56SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 858a4c31c56SGeert Uytterhoeven <&scif_clk>; 859a4c31c56SGeert Uytterhoeven clock-names = "fck", "brg_int", "scif_clk"; 860a4c31c56SGeert Uytterhoeven dmas = <&dmac0 0x59>, <&dmac0 0x58>, 861a4c31c56SGeert Uytterhoeven <&dmac1 0x59>, <&dmac1 0x58>; 862a4c31c56SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 863a4c31c56SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 864a4c31c56SGeert Uytterhoeven resets = <&cpg 705>; 865a4c31c56SGeert Uytterhoeven status = "disabled"; 866a4c31c56SGeert Uytterhoeven }; 867a4c31c56SGeert Uytterhoeven 8684a76d4abSCongDang tpu: pwm@e6e80000 { 8694a76d4abSCongDang compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 8704a76d4abSCongDang reg = <0 0xe6e80000 0 0x148>; 8714a76d4abSCongDang interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 8724a76d4abSCongDang clocks = <&cpg CPG_MOD 718>; 8734a76d4abSCongDang power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 8744a76d4abSCongDang resets = <&cpg 718>; 8754a76d4abSCongDang #pwm-cells = <3>; 8764a76d4abSCongDang status = "disabled"; 8774a76d4abSCongDang }; 8784a76d4abSCongDang 879e0768073SGeert Uytterhoeven msiof0: spi@e6e90000 { 880e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 881e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 882e0768073SGeert Uytterhoeven reg = <0 0xe6e90000 0 0x0064>; 883e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 884e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 618>; 885e0768073SGeert Uytterhoeven dmas = <&dmac0 0x41>, <&dmac0 0x40>, 886e0768073SGeert Uytterhoeven <&dmac1 0x41>, <&dmac1 0x40>; 887e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 888e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 889e0768073SGeert Uytterhoeven resets = <&cpg 618>; 890e0768073SGeert Uytterhoeven #address-cells = <1>; 891e0768073SGeert Uytterhoeven #size-cells = <0>; 892e0768073SGeert Uytterhoeven status = "disabled"; 893e0768073SGeert Uytterhoeven }; 894e0768073SGeert Uytterhoeven 895e0768073SGeert Uytterhoeven msiof1: spi@e6ea0000 { 896e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 897e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 898e0768073SGeert Uytterhoeven reg = <0 0xe6ea0000 0 0x0064>; 899e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 900e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 619>; 901e0768073SGeert Uytterhoeven dmas = <&dmac0 0x43>, <&dmac0 0x42>, 902e0768073SGeert Uytterhoeven <&dmac1 0x43>, <&dmac1 0x42>; 903e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 904e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 905e0768073SGeert Uytterhoeven resets = <&cpg 619>; 906e0768073SGeert Uytterhoeven #address-cells = <1>; 907e0768073SGeert Uytterhoeven #size-cells = <0>; 908e0768073SGeert Uytterhoeven status = "disabled"; 909e0768073SGeert Uytterhoeven }; 910e0768073SGeert Uytterhoeven 911e0768073SGeert Uytterhoeven msiof2: spi@e6c00000 { 912e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 913e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 914e0768073SGeert Uytterhoeven reg = <0 0xe6c00000 0 0x0064>; 915e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 916e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 620>; 917e0768073SGeert Uytterhoeven dmas = <&dmac0 0x45>, <&dmac0 0x44>, 918e0768073SGeert Uytterhoeven <&dmac1 0x45>, <&dmac1 0x44>; 919e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 920e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 921e0768073SGeert Uytterhoeven resets = <&cpg 620>; 922e0768073SGeert Uytterhoeven #address-cells = <1>; 923e0768073SGeert Uytterhoeven #size-cells = <0>; 924e0768073SGeert Uytterhoeven status = "disabled"; 925e0768073SGeert Uytterhoeven }; 926e0768073SGeert Uytterhoeven 927e0768073SGeert Uytterhoeven msiof3: spi@e6c10000 { 928e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 929e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 930e0768073SGeert Uytterhoeven reg = <0 0xe6c10000 0 0x0064>; 931e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 932e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 621>; 933e0768073SGeert Uytterhoeven dmas = <&dmac0 0x47>, <&dmac0 0x46>, 934e0768073SGeert Uytterhoeven <&dmac1 0x47>, <&dmac1 0x46>; 935e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 936e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 937e0768073SGeert Uytterhoeven resets = <&cpg 621>; 938e0768073SGeert Uytterhoeven #address-cells = <1>; 939e0768073SGeert Uytterhoeven #size-cells = <0>; 940e0768073SGeert Uytterhoeven status = "disabled"; 941e0768073SGeert Uytterhoeven }; 942e0768073SGeert Uytterhoeven 943e0768073SGeert Uytterhoeven msiof4: spi@e6c20000 { 944e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 945e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 946e0768073SGeert Uytterhoeven reg = <0 0xe6c20000 0 0x0064>; 947e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 948e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 622>; 949e0768073SGeert Uytterhoeven dmas = <&dmac0 0x49>, <&dmac0 0x48>, 950e0768073SGeert Uytterhoeven <&dmac1 0x49>, <&dmac1 0x48>; 951e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 952e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 953e0768073SGeert Uytterhoeven resets = <&cpg 622>; 954e0768073SGeert Uytterhoeven #address-cells = <1>; 955e0768073SGeert Uytterhoeven #size-cells = <0>; 956e0768073SGeert Uytterhoeven status = "disabled"; 957e0768073SGeert Uytterhoeven }; 958e0768073SGeert Uytterhoeven 959e0768073SGeert Uytterhoeven msiof5: spi@e6c28000 { 960e0768073SGeert Uytterhoeven compatible = "renesas,msiof-r8a779g0", 961e0768073SGeert Uytterhoeven "renesas,rcar-gen4-msiof"; 962e0768073SGeert Uytterhoeven reg = <0 0xe6c28000 0 0x0064>; 963e0768073SGeert Uytterhoeven interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 964e0768073SGeert Uytterhoeven clocks = <&cpg CPG_MOD 623>; 965e0768073SGeert Uytterhoeven dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 966e0768073SGeert Uytterhoeven <&dmac1 0x4b>, <&dmac1 0x4a>; 967e0768073SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 968e0768073SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 969e0768073SGeert Uytterhoeven resets = <&cpg 623>; 970e0768073SGeert Uytterhoeven #address-cells = <1>; 971e0768073SGeert Uytterhoeven #size-cells = <0>; 972e0768073SGeert Uytterhoeven status = "disabled"; 973e0768073SGeert Uytterhoeven }; 974e0768073SGeert Uytterhoeven 97508f28288SGeert Uytterhoeven dmac0: dma-controller@e7350000 { 97608f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 97708f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 97808f28288SGeert Uytterhoeven reg = <0 0xe7350000 0 0x1000>, 97908f28288SGeert Uytterhoeven <0 0xe7300000 0 0x10000>; 98008f28288SGeert Uytterhoeven interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 98108f28288SGeert Uytterhoeven <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 98208f28288SGeert Uytterhoeven <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 98308f28288SGeert Uytterhoeven <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 98408f28288SGeert Uytterhoeven <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 98508f28288SGeert Uytterhoeven <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 98608f28288SGeert Uytterhoeven <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 98708f28288SGeert Uytterhoeven <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 98808f28288SGeert Uytterhoeven <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 98908f28288SGeert Uytterhoeven <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 99008f28288SGeert Uytterhoeven <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 99108f28288SGeert Uytterhoeven <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 99208f28288SGeert Uytterhoeven <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 99308f28288SGeert Uytterhoeven <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 99408f28288SGeert Uytterhoeven <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 99508f28288SGeert Uytterhoeven <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 99608f28288SGeert Uytterhoeven <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 99708f28288SGeert Uytterhoeven interrupt-names = "error", 99808f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 99908f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 100008f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 100108f28288SGeert Uytterhoeven "ch14", "ch15"; 100208f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 709>; 100308f28288SGeert Uytterhoeven clock-names = "fck"; 100408f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 100508f28288SGeert Uytterhoeven resets = <&cpg 709>; 100608f28288SGeert Uytterhoeven #dma-cells = <1>; 100708f28288SGeert Uytterhoeven dma-channels = <16>; 100808f28288SGeert Uytterhoeven }; 100908f28288SGeert Uytterhoeven 101008f28288SGeert Uytterhoeven dmac1: dma-controller@e7351000 { 101108f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 101208f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 101308f28288SGeert Uytterhoeven reg = <0 0xe7351000 0 0x1000>, 101408f28288SGeert Uytterhoeven <0 0xe7310000 0 0x10000>; 101508f28288SGeert Uytterhoeven interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 101608f28288SGeert Uytterhoeven <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 101708f28288SGeert Uytterhoeven <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 101808f28288SGeert Uytterhoeven <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 101908f28288SGeert Uytterhoeven <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 102008f28288SGeert Uytterhoeven <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 102108f28288SGeert Uytterhoeven <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 102208f28288SGeert Uytterhoeven <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 102308f28288SGeert Uytterhoeven <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 102408f28288SGeert Uytterhoeven <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 102508f28288SGeert Uytterhoeven <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 102608f28288SGeert Uytterhoeven <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 102708f28288SGeert Uytterhoeven <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 102808f28288SGeert Uytterhoeven <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 102908f28288SGeert Uytterhoeven <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 103008f28288SGeert Uytterhoeven <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 103108f28288SGeert Uytterhoeven <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 103208f28288SGeert Uytterhoeven interrupt-names = "error", 103308f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 103408f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 103508f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 103608f28288SGeert Uytterhoeven "ch14", "ch15"; 103708f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 710>; 103808f28288SGeert Uytterhoeven clock-names = "fck"; 103908f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 104008f28288SGeert Uytterhoeven resets = <&cpg 710>; 104108f28288SGeert Uytterhoeven #dma-cells = <1>; 104208f28288SGeert Uytterhoeven dma-channels = <16>; 104308f28288SGeert Uytterhoeven }; 104408f28288SGeert Uytterhoeven 1045bc7bf913SGeert Uytterhoeven mmc0: mmc@ee140000 { 1046bc7bf913SGeert Uytterhoeven compatible = "renesas,sdhi-r8a779g0", 1047bc7bf913SGeert Uytterhoeven "renesas,rcar-gen4-sdhi"; 1048bc7bf913SGeert Uytterhoeven reg = <0 0xee140000 0 0x2000>; 1049bc7bf913SGeert Uytterhoeven interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1050bc7bf913SGeert Uytterhoeven clocks = <&cpg CPG_MOD 706>, 1051bc7bf913SGeert Uytterhoeven <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1052bc7bf913SGeert Uytterhoeven clock-names = "core", "clkh"; 1053bc7bf913SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1054bc7bf913SGeert Uytterhoeven resets = <&cpg 706>; 1055bc7bf913SGeert Uytterhoeven max-frequency = <200000000>; 1056bc7bf913SGeert Uytterhoeven status = "disabled"; 1057bc7bf913SGeert Uytterhoeven }; 1058bc7bf913SGeert Uytterhoeven 1059d5014bedSHai Pham rpc: spi@ee200000 { 1060d5014bedSHai Pham compatible = "renesas,r8a779g0-rpc-if", 1061d5014bedSHai Pham "renesas,rcar-gen4-rpc-if"; 1062d5014bedSHai Pham reg = <0 0xee200000 0 0x200>, 1063d5014bedSHai Pham <0 0x08000000 0 0x04000000>, 1064d5014bedSHai Pham <0 0xee208000 0 0x100>; 1065d5014bedSHai Pham reg-names = "regs", "dirmap", "wbuf"; 1066d5014bedSHai Pham interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1067d5014bedSHai Pham clocks = <&cpg CPG_MOD 629>; 1068d5014bedSHai Pham power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1069d5014bedSHai Pham resets = <&cpg 629>; 1070d5014bedSHai Pham #address-cells = <1>; 1071d5014bedSHai Pham #size-cells = <0>; 1072d5014bedSHai Pham status = "disabled"; 1073d5014bedSHai Pham }; 1074d5014bedSHai Pham 1075987da486SYoshihiro Shimoda gic: interrupt-controller@f1000000 { 1076987da486SYoshihiro Shimoda compatible = "arm,gic-v3"; 1077987da486SYoshihiro Shimoda #interrupt-cells = <3>; 1078987da486SYoshihiro Shimoda #address-cells = <0>; 1079987da486SYoshihiro Shimoda interrupt-controller; 1080987da486SYoshihiro Shimoda reg = <0x0 0xf1000000 0 0x20000>, 1081987da486SYoshihiro Shimoda <0x0 0xf1060000 0 0x110000>; 1082987da486SYoshihiro Shimoda interrupts = <GIC_PPI 9 1083987da486SYoshihiro Shimoda (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 1084987da486SYoshihiro Shimoda }; 1085987da486SYoshihiro Shimoda 1086987da486SYoshihiro Shimoda prr: chipid@fff00044 { 1087987da486SYoshihiro Shimoda compatible = "renesas,prr"; 1088987da486SYoshihiro Shimoda reg = <0 0xfff00044 0 4>; 1089987da486SYoshihiro Shimoda }; 1090987da486SYoshihiro Shimoda }; 1091987da486SYoshihiro Shimoda 1092987da486SYoshihiro Shimoda timer { 1093987da486SYoshihiro Shimoda compatible = "arm,armv8-timer"; 1094987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 1095987da486SYoshihiro Shimoda <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 1096987da486SYoshihiro Shimoda <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 1097987da486SYoshihiro Shimoda <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 1098987da486SYoshihiro Shimoda }; 1099987da486SYoshihiro Shimoda}; 1100