1987da486SYoshihiro Shimoda// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2987da486SYoshihiro Shimoda/* 3987da486SYoshihiro Shimoda * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4987da486SYoshihiro Shimoda * 5987da486SYoshihiro Shimoda * Copyright (C) 2022 Renesas Electronics Corp. 6987da486SYoshihiro Shimoda */ 7987da486SYoshihiro Shimoda 8987da486SYoshihiro Shimoda#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9987da486SYoshihiro Shimoda#include <dt-bindings/interrupt-controller/arm-gic.h> 10987da486SYoshihiro Shimoda#include <dt-bindings/power/r8a779g0-sysc.h> 11987da486SYoshihiro Shimoda 12987da486SYoshihiro Shimoda/ { 13987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0"; 14987da486SYoshihiro Shimoda #address-cells = <2>; 15987da486SYoshihiro Shimoda #size-cells = <2>; 16987da486SYoshihiro Shimoda 17987da486SYoshihiro Shimoda cpus { 18987da486SYoshihiro Shimoda #address-cells = <1>; 19987da486SYoshihiro Shimoda #size-cells = <0>; 20987da486SYoshihiro Shimoda 21987da486SYoshihiro Shimoda a76_0: cpu@0 { 22987da486SYoshihiro Shimoda compatible = "arm,cortex-a76"; 23987da486SYoshihiro Shimoda reg = <0>; 24987da486SYoshihiro Shimoda device_type = "cpu"; 25987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 26987da486SYoshihiro Shimoda }; 27987da486SYoshihiro Shimoda }; 28987da486SYoshihiro Shimoda 29987da486SYoshihiro Shimoda extal_clk: extal { 30987da486SYoshihiro Shimoda compatible = "fixed-clock"; 31987da486SYoshihiro Shimoda #clock-cells = <0>; 32987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 33987da486SYoshihiro Shimoda clock-frequency = <0>; 34987da486SYoshihiro Shimoda }; 35987da486SYoshihiro Shimoda 36987da486SYoshihiro Shimoda extalr_clk: extalr { 37987da486SYoshihiro Shimoda compatible = "fixed-clock"; 38987da486SYoshihiro Shimoda #clock-cells = <0>; 39987da486SYoshihiro Shimoda /* This value must be overridden by the board */ 40987da486SYoshihiro Shimoda clock-frequency = <0>; 41987da486SYoshihiro Shimoda }; 42987da486SYoshihiro Shimoda 43987da486SYoshihiro Shimoda pmu_a76 { 44987da486SYoshihiro Shimoda compatible = "arm,cortex-a76-pmu"; 45987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 46987da486SYoshihiro Shimoda }; 47987da486SYoshihiro Shimoda 48987da486SYoshihiro Shimoda /* External SCIF clock - to be overridden by boards that provide it */ 49987da486SYoshihiro Shimoda scif_clk: scif { 50987da486SYoshihiro Shimoda compatible = "fixed-clock"; 51987da486SYoshihiro Shimoda #clock-cells = <0>; 52987da486SYoshihiro Shimoda clock-frequency = <0>; 53987da486SYoshihiro Shimoda }; 54987da486SYoshihiro Shimoda 55987da486SYoshihiro Shimoda soc: soc { 56987da486SYoshihiro Shimoda compatible = "simple-bus"; 57987da486SYoshihiro Shimoda interrupt-parent = <&gic>; 58987da486SYoshihiro Shimoda #address-cells = <2>; 59987da486SYoshihiro Shimoda #size-cells = <2>; 60987da486SYoshihiro Shimoda ranges; 61987da486SYoshihiro Shimoda 62a43306faSGeert Uytterhoeven rwdt: watchdog@e6020000 { 63a43306faSGeert Uytterhoeven compatible = "renesas,r8a779g0-wdt", 64a43306faSGeert Uytterhoeven "renesas,rcar-gen4-wdt"; 65a43306faSGeert Uytterhoeven reg = <0 0xe6020000 0 0x0c>; 66a43306faSGeert Uytterhoeven interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 67a43306faSGeert Uytterhoeven clocks = <&cpg CPG_MOD 907>; 68a43306faSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 69a43306faSGeert Uytterhoeven resets = <&cpg 907>; 70a43306faSGeert Uytterhoeven status = "disabled"; 71a43306faSGeert Uytterhoeven }; 72a43306faSGeert Uytterhoeven 734cebce25SGeert Uytterhoeven pfc: pinctrl@e6050000 { 744cebce25SGeert Uytterhoeven compatible = "renesas,pfc-r8a779g0"; 754cebce25SGeert Uytterhoeven reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 764cebce25SGeert Uytterhoeven <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 774cebce25SGeert Uytterhoeven <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 784cebce25SGeert Uytterhoeven <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 794cebce25SGeert Uytterhoeven <0 0xe6068000 0 0x16c>; 804cebce25SGeert Uytterhoeven }; 814cebce25SGeert Uytterhoeven 82120c7a58SGeert Uytterhoeven gpio0: gpio@e6050180 { 83120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 84120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 85120c7a58SGeert Uytterhoeven reg = <0 0xe6050180 0 0x54>; 86120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 87120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 88120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 89120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 90120c7a58SGeert Uytterhoeven gpio-controller; 91120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 92120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 0 19>; 93120c7a58SGeert Uytterhoeven interrupt-controller; 94120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 95120c7a58SGeert Uytterhoeven }; 96120c7a58SGeert Uytterhoeven 97120c7a58SGeert Uytterhoeven gpio1: gpio@e6050980 { 98120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 99120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 100120c7a58SGeert Uytterhoeven reg = <0 0xe6050980 0 0x54>; 101120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 102120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 915>; 103120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 104120c7a58SGeert Uytterhoeven resets = <&cpg 915>; 105120c7a58SGeert Uytterhoeven gpio-controller; 106120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 107120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 32 29>; 108120c7a58SGeert Uytterhoeven interrupt-controller; 109120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 110120c7a58SGeert Uytterhoeven }; 111120c7a58SGeert Uytterhoeven 112120c7a58SGeert Uytterhoeven gpio2: gpio@e6058180 { 113120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 114120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 115120c7a58SGeert Uytterhoeven reg = <0 0xe6058180 0 0x54>; 116120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 117120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 118120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 119120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 120120c7a58SGeert Uytterhoeven gpio-controller; 121120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 122120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 64 20>; 123120c7a58SGeert Uytterhoeven interrupt-controller; 124120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 125120c7a58SGeert Uytterhoeven }; 126120c7a58SGeert Uytterhoeven 127120c7a58SGeert Uytterhoeven gpio3: gpio@e6058980 { 128120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 129120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 130120c7a58SGeert Uytterhoeven reg = <0 0xe6058980 0 0x54>; 131120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 132120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 916>; 133120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 134120c7a58SGeert Uytterhoeven resets = <&cpg 916>; 135120c7a58SGeert Uytterhoeven gpio-controller; 136120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 137120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 96 30>; 138120c7a58SGeert Uytterhoeven interrupt-controller; 139120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 140120c7a58SGeert Uytterhoeven }; 141120c7a58SGeert Uytterhoeven 142120c7a58SGeert Uytterhoeven gpio4: gpio@e6060180 { 143120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 144120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 145120c7a58SGeert Uytterhoeven reg = <0 0xe6060180 0 0x54>; 146120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 147120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 148120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 149120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 150120c7a58SGeert Uytterhoeven gpio-controller; 151120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 152120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 128 25>; 153120c7a58SGeert Uytterhoeven interrupt-controller; 154120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 155120c7a58SGeert Uytterhoeven }; 156120c7a58SGeert Uytterhoeven 157120c7a58SGeert Uytterhoeven gpio5: gpio@e6060980 { 158120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 159120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 160120c7a58SGeert Uytterhoeven reg = <0 0xe6060980 0 0x54>; 161120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 162120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 163120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 164120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 165120c7a58SGeert Uytterhoeven gpio-controller; 166120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 167120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 160 21>; 168120c7a58SGeert Uytterhoeven interrupt-controller; 169120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 170120c7a58SGeert Uytterhoeven }; 171120c7a58SGeert Uytterhoeven 172120c7a58SGeert Uytterhoeven gpio6: gpio@e6061180 { 173120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 174120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 175120c7a58SGeert Uytterhoeven reg = <0 0xe6061180 0 0x54>; 176120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 177120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 178120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 179120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 180120c7a58SGeert Uytterhoeven gpio-controller; 181120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 182120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 192 21>; 183120c7a58SGeert Uytterhoeven interrupt-controller; 184120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 185120c7a58SGeert Uytterhoeven }; 186120c7a58SGeert Uytterhoeven 187120c7a58SGeert Uytterhoeven gpio7: gpio@e6061980 { 188120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 189120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 190120c7a58SGeert Uytterhoeven reg = <0 0xe6061980 0 0x54>; 191120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 192120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 917>; 193120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 194120c7a58SGeert Uytterhoeven resets = <&cpg 917>; 195120c7a58SGeert Uytterhoeven gpio-controller; 196120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 197120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 224 21>; 198120c7a58SGeert Uytterhoeven interrupt-controller; 199120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 200120c7a58SGeert Uytterhoeven }; 201120c7a58SGeert Uytterhoeven 202120c7a58SGeert Uytterhoeven gpio8: gpio@e6068180 { 203120c7a58SGeert Uytterhoeven compatible = "renesas,gpio-r8a779g0", 204120c7a58SGeert Uytterhoeven "renesas,rcar-gen4-gpio"; 205120c7a58SGeert Uytterhoeven reg = <0 0xe6068180 0 0x54>; 206120c7a58SGeert Uytterhoeven interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 207120c7a58SGeert Uytterhoeven clocks = <&cpg CPG_MOD 918>; 208120c7a58SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 209120c7a58SGeert Uytterhoeven resets = <&cpg 918>; 210120c7a58SGeert Uytterhoeven gpio-controller; 211120c7a58SGeert Uytterhoeven #gpio-cells = <2>; 212120c7a58SGeert Uytterhoeven gpio-ranges = <&pfc 0 256 14>; 213120c7a58SGeert Uytterhoeven interrupt-controller; 214120c7a58SGeert Uytterhoeven #interrupt-cells = <2>; 215120c7a58SGeert Uytterhoeven }; 216120c7a58SGeert Uytterhoeven 217987da486SYoshihiro Shimoda cpg: clock-controller@e6150000 { 218987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-cpg-mssr"; 219987da486SYoshihiro Shimoda reg = <0 0xe6150000 0 0x4000>; 220987da486SYoshihiro Shimoda clocks = <&extal_clk>, <&extalr_clk>; 221987da486SYoshihiro Shimoda clock-names = "extal", "extalr"; 222987da486SYoshihiro Shimoda #clock-cells = <2>; 223987da486SYoshihiro Shimoda #power-domain-cells = <0>; 224987da486SYoshihiro Shimoda #reset-cells = <1>; 225987da486SYoshihiro Shimoda }; 226987da486SYoshihiro Shimoda 227987da486SYoshihiro Shimoda rst: reset-controller@e6160000 { 228987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-rst"; 229987da486SYoshihiro Shimoda reg = <0 0xe6160000 0 0x4000>; 230987da486SYoshihiro Shimoda }; 231987da486SYoshihiro Shimoda 232987da486SYoshihiro Shimoda sysc: system-controller@e6180000 { 233987da486SYoshihiro Shimoda compatible = "renesas,r8a779g0-sysc"; 234987da486SYoshihiro Shimoda reg = <0 0xe6180000 0 0x4000>; 235987da486SYoshihiro Shimoda #power-domain-cells = <1>; 236987da486SYoshihiro Shimoda }; 237987da486SYoshihiro Shimoda 238ff77ba05SGeert Uytterhoeven i2c0: i2c@e6500000 { 239ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 240ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 241ff77ba05SGeert Uytterhoeven reg = <0 0xe6500000 0 0x40>; 242ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 243ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 518>; 244*08f28288SGeert Uytterhoeven dmas = <&dmac0 0x91>, <&dmac0 0x90>, 245*08f28288SGeert Uytterhoeven <&dmac1 0x91>, <&dmac1 0x90>; 246*08f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 247ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 248ff77ba05SGeert Uytterhoeven resets = <&cpg 518>; 249ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 250ff77ba05SGeert Uytterhoeven #address-cells = <1>; 251ff77ba05SGeert Uytterhoeven #size-cells = <0>; 252ff77ba05SGeert Uytterhoeven status = "disabled"; 253ff77ba05SGeert Uytterhoeven }; 254ff77ba05SGeert Uytterhoeven 255ff77ba05SGeert Uytterhoeven i2c1: i2c@e6508000 { 256ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 257ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 258ff77ba05SGeert Uytterhoeven reg = <0 0xe6508000 0 0x40>; 259ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 260ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 519>; 261*08f28288SGeert Uytterhoeven dmas = <&dmac0 0x93>, <&dmac0 0x92>, 262*08f28288SGeert Uytterhoeven <&dmac1 0x93>, <&dmac1 0x92>; 263*08f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 264ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 265ff77ba05SGeert Uytterhoeven resets = <&cpg 519>; 266ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 267ff77ba05SGeert Uytterhoeven #address-cells = <1>; 268ff77ba05SGeert Uytterhoeven #size-cells = <0>; 269ff77ba05SGeert Uytterhoeven status = "disabled"; 270ff77ba05SGeert Uytterhoeven }; 271ff77ba05SGeert Uytterhoeven 272ff77ba05SGeert Uytterhoeven i2c2: i2c@e6510000 { 273ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 274ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 275ff77ba05SGeert Uytterhoeven reg = <0 0xe6510000 0 0x40>; 276ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 277ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 520>; 278*08f28288SGeert Uytterhoeven dmas = <&dmac0 0x95>, <&dmac0 0x94>, 279*08f28288SGeert Uytterhoeven <&dmac1 0x95>, <&dmac1 0x94>; 280*08f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 281ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 282ff77ba05SGeert Uytterhoeven resets = <&cpg 520>; 283ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 284ff77ba05SGeert Uytterhoeven #address-cells = <1>; 285ff77ba05SGeert Uytterhoeven #size-cells = <0>; 286ff77ba05SGeert Uytterhoeven status = "disabled"; 287ff77ba05SGeert Uytterhoeven }; 288ff77ba05SGeert Uytterhoeven 289ff77ba05SGeert Uytterhoeven i2c3: i2c@e66d0000 { 290ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 291ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 292ff77ba05SGeert Uytterhoeven reg = <0 0xe66d0000 0 0x40>; 293ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 294ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 521>; 295*08f28288SGeert Uytterhoeven dmas = <&dmac0 0x97>, <&dmac0 0x96>, 296*08f28288SGeert Uytterhoeven <&dmac1 0x97>, <&dmac1 0x96>; 297*08f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 298ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 299ff77ba05SGeert Uytterhoeven resets = <&cpg 521>; 300ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 301ff77ba05SGeert Uytterhoeven #address-cells = <1>; 302ff77ba05SGeert Uytterhoeven #size-cells = <0>; 303ff77ba05SGeert Uytterhoeven status = "disabled"; 304ff77ba05SGeert Uytterhoeven }; 305ff77ba05SGeert Uytterhoeven 306ff77ba05SGeert Uytterhoeven i2c4: i2c@e66d8000 { 307ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 308ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 309ff77ba05SGeert Uytterhoeven reg = <0 0xe66d8000 0 0x40>; 310ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 311ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 522>; 312*08f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 313*08f28288SGeert Uytterhoeven dmas = <&dmac0 0x99>, <&dmac0 0x98>, 314*08f28288SGeert Uytterhoeven <&dmac1 0x99>, <&dmac1 0x98>; 315ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 316ff77ba05SGeert Uytterhoeven resets = <&cpg 522>; 317ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 318ff77ba05SGeert Uytterhoeven #address-cells = <1>; 319ff77ba05SGeert Uytterhoeven #size-cells = <0>; 320ff77ba05SGeert Uytterhoeven status = "disabled"; 321ff77ba05SGeert Uytterhoeven }; 322ff77ba05SGeert Uytterhoeven 323ff77ba05SGeert Uytterhoeven i2c5: i2c@e66e0000 { 324ff77ba05SGeert Uytterhoeven compatible = "renesas,i2c-r8a779g0", 325ff77ba05SGeert Uytterhoeven "renesas,rcar-gen4-i2c"; 326ff77ba05SGeert Uytterhoeven reg = <0 0xe66e0000 0 0x40>; 327ff77ba05SGeert Uytterhoeven interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 328ff77ba05SGeert Uytterhoeven clocks = <&cpg CPG_MOD 523>; 329*08f28288SGeert Uytterhoeven dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 330*08f28288SGeert Uytterhoeven <&dmac1 0x9b>, <&dmac1 0x9a>; 331*08f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 332ff77ba05SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 333ff77ba05SGeert Uytterhoeven resets = <&cpg 523>; 334ff77ba05SGeert Uytterhoeven i2c-scl-internal-delay-ns = <110>; 335ff77ba05SGeert Uytterhoeven #address-cells = <1>; 336ff77ba05SGeert Uytterhoeven #size-cells = <0>; 337ff77ba05SGeert Uytterhoeven status = "disabled"; 338ff77ba05SGeert Uytterhoeven }; 339ff77ba05SGeert Uytterhoeven 340987da486SYoshihiro Shimoda hscif0: serial@e6540000 { 341987da486SYoshihiro Shimoda compatible = "renesas,hscif-r8a779g0", 342987da486SYoshihiro Shimoda "renesas,rcar-gen4-hscif", 343987da486SYoshihiro Shimoda "renesas,hscif"; 344987da486SYoshihiro Shimoda reg = <0 0xe6540000 0 96>; 345ab2866f1SGeert Uytterhoeven interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 346987da486SYoshihiro Shimoda clocks = <&cpg CPG_MOD 514>, 347987da486SYoshihiro Shimoda <&cpg CPG_CORE R8A779G0_CLK_S0D3_PER>, 348987da486SYoshihiro Shimoda <&scif_clk>; 349987da486SYoshihiro Shimoda clock-names = "fck", "brg_int", "scif_clk"; 350*08f28288SGeert Uytterhoeven dmas = <&dmac0 0x31>, <&dmac0 0x30>, 351*08f28288SGeert Uytterhoeven <&dmac1 0x31>, <&dmac1 0x30>; 352*08f28288SGeert Uytterhoeven dma-names = "tx", "rx", "tx", "rx"; 353987da486SYoshihiro Shimoda power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 354987da486SYoshihiro Shimoda resets = <&cpg 514>; 355987da486SYoshihiro Shimoda status = "disabled"; 356987da486SYoshihiro Shimoda }; 357987da486SYoshihiro Shimoda 358848c82dbSGeert Uytterhoeven avb0: ethernet@e6800000 { 359848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 360848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 361848c82dbSGeert Uytterhoeven reg = <0 0xe6800000 0 0x800>; 362848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 363848c82dbSGeert Uytterhoeven <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 364848c82dbSGeert Uytterhoeven <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 365848c82dbSGeert Uytterhoeven <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 366848c82dbSGeert Uytterhoeven <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 367848c82dbSGeert Uytterhoeven <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 368848c82dbSGeert Uytterhoeven <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 369848c82dbSGeert Uytterhoeven <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 370848c82dbSGeert Uytterhoeven <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 371848c82dbSGeert Uytterhoeven <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 372848c82dbSGeert Uytterhoeven <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 373848c82dbSGeert Uytterhoeven <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 374848c82dbSGeert Uytterhoeven <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 375848c82dbSGeert Uytterhoeven <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 376848c82dbSGeert Uytterhoeven <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 377848c82dbSGeert Uytterhoeven <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 378848c82dbSGeert Uytterhoeven <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 379848c82dbSGeert Uytterhoeven <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 380848c82dbSGeert Uytterhoeven <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 381848c82dbSGeert Uytterhoeven <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 382848c82dbSGeert Uytterhoeven <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 383848c82dbSGeert Uytterhoeven <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 384848c82dbSGeert Uytterhoeven <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 385848c82dbSGeert Uytterhoeven <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 386848c82dbSGeert Uytterhoeven <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 387848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 388848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 389848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 390848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 391848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 392848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 393848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 211>; 394848c82dbSGeert Uytterhoeven clock-names = "fck"; 395848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 396848c82dbSGeert Uytterhoeven resets = <&cpg 211>; 397848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 398848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 399848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 400848c82dbSGeert Uytterhoeven #address-cells = <1>; 401848c82dbSGeert Uytterhoeven #size-cells = <0>; 402848c82dbSGeert Uytterhoeven status = "disabled"; 403848c82dbSGeert Uytterhoeven }; 404848c82dbSGeert Uytterhoeven 405848c82dbSGeert Uytterhoeven avb1: ethernet@e6810000 { 406848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 407848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 408848c82dbSGeert Uytterhoeven reg = <0 0xe6810000 0 0x800>; 409848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 410848c82dbSGeert Uytterhoeven <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 411848c82dbSGeert Uytterhoeven <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 412848c82dbSGeert Uytterhoeven <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 413848c82dbSGeert Uytterhoeven <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 414848c82dbSGeert Uytterhoeven <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 415848c82dbSGeert Uytterhoeven <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 416848c82dbSGeert Uytterhoeven <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 417848c82dbSGeert Uytterhoeven <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 418848c82dbSGeert Uytterhoeven <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 419848c82dbSGeert Uytterhoeven <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 420848c82dbSGeert Uytterhoeven <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 421848c82dbSGeert Uytterhoeven <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 422848c82dbSGeert Uytterhoeven <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 423848c82dbSGeert Uytterhoeven <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 424848c82dbSGeert Uytterhoeven <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 425848c82dbSGeert Uytterhoeven <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 426848c82dbSGeert Uytterhoeven <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 427848c82dbSGeert Uytterhoeven <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 428848c82dbSGeert Uytterhoeven <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 429848c82dbSGeert Uytterhoeven <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 430848c82dbSGeert Uytterhoeven <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 431848c82dbSGeert Uytterhoeven <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 432848c82dbSGeert Uytterhoeven <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 433848c82dbSGeert Uytterhoeven <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 434848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 435848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 436848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 437848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 438848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 439848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 440848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 212>; 441848c82dbSGeert Uytterhoeven clock-names = "fck"; 442848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 443848c82dbSGeert Uytterhoeven resets = <&cpg 212>; 444848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 445848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 446848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 447848c82dbSGeert Uytterhoeven #address-cells = <1>; 448848c82dbSGeert Uytterhoeven #size-cells = <0>; 449848c82dbSGeert Uytterhoeven status = "disabled"; 450848c82dbSGeert Uytterhoeven }; 451848c82dbSGeert Uytterhoeven 452848c82dbSGeert Uytterhoeven avb2: ethernet@e6820000 { 453848c82dbSGeert Uytterhoeven compatible = "renesas,etheravb-r8a779g0", 454848c82dbSGeert Uytterhoeven "renesas,etheravb-rcar-gen4"; 455848c82dbSGeert Uytterhoeven reg = <0 0xe6820000 0 0x1000>; 456848c82dbSGeert Uytterhoeven interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 457848c82dbSGeert Uytterhoeven <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 458848c82dbSGeert Uytterhoeven <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 459848c82dbSGeert Uytterhoeven <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 460848c82dbSGeert Uytterhoeven <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 461848c82dbSGeert Uytterhoeven <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 462848c82dbSGeert Uytterhoeven <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 463848c82dbSGeert Uytterhoeven <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 464848c82dbSGeert Uytterhoeven <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 465848c82dbSGeert Uytterhoeven <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 466848c82dbSGeert Uytterhoeven <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 467848c82dbSGeert Uytterhoeven <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 468848c82dbSGeert Uytterhoeven <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 469848c82dbSGeert Uytterhoeven <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 470848c82dbSGeert Uytterhoeven <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 471848c82dbSGeert Uytterhoeven <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 472848c82dbSGeert Uytterhoeven <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 473848c82dbSGeert Uytterhoeven <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 474848c82dbSGeert Uytterhoeven <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 475848c82dbSGeert Uytterhoeven <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 476848c82dbSGeert Uytterhoeven <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 477848c82dbSGeert Uytterhoeven <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 478848c82dbSGeert Uytterhoeven <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 479848c82dbSGeert Uytterhoeven <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 480848c82dbSGeert Uytterhoeven <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 481848c82dbSGeert Uytterhoeven interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 482848c82dbSGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 483848c82dbSGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 484848c82dbSGeert Uytterhoeven "ch14", "ch15", "ch16", "ch17", 485848c82dbSGeert Uytterhoeven "ch18", "ch19", "ch20", "ch21", 486848c82dbSGeert Uytterhoeven "ch22", "ch23", "ch24"; 487848c82dbSGeert Uytterhoeven clocks = <&cpg CPG_MOD 213>; 488848c82dbSGeert Uytterhoeven clock-names = "fck"; 489848c82dbSGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 490848c82dbSGeert Uytterhoeven resets = <&cpg 213>; 491848c82dbSGeert Uytterhoeven phy-mode = "rgmii"; 492848c82dbSGeert Uytterhoeven rx-internal-delay-ps = <0>; 493848c82dbSGeert Uytterhoeven tx-internal-delay-ps = <0>; 494848c82dbSGeert Uytterhoeven #address-cells = <1>; 495848c82dbSGeert Uytterhoeven #size-cells = <0>; 496848c82dbSGeert Uytterhoeven status = "disabled"; 497848c82dbSGeert Uytterhoeven }; 498848c82dbSGeert Uytterhoeven 499*08f28288SGeert Uytterhoeven dmac0: dma-controller@e7350000 { 500*08f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 501*08f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 502*08f28288SGeert Uytterhoeven reg = <0 0xe7350000 0 0x1000>, 503*08f28288SGeert Uytterhoeven <0 0xe7300000 0 0x10000>; 504*08f28288SGeert Uytterhoeven interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 505*08f28288SGeert Uytterhoeven <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 506*08f28288SGeert Uytterhoeven <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 507*08f28288SGeert Uytterhoeven <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 508*08f28288SGeert Uytterhoeven <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 509*08f28288SGeert Uytterhoeven <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 510*08f28288SGeert Uytterhoeven <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 511*08f28288SGeert Uytterhoeven <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 512*08f28288SGeert Uytterhoeven <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 513*08f28288SGeert Uytterhoeven <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 514*08f28288SGeert Uytterhoeven <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 515*08f28288SGeert Uytterhoeven <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 516*08f28288SGeert Uytterhoeven <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 517*08f28288SGeert Uytterhoeven <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 518*08f28288SGeert Uytterhoeven <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 519*08f28288SGeert Uytterhoeven <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 520*08f28288SGeert Uytterhoeven <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 521*08f28288SGeert Uytterhoeven interrupt-names = "error", 522*08f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 523*08f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 524*08f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 525*08f28288SGeert Uytterhoeven "ch14", "ch15"; 526*08f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 709>; 527*08f28288SGeert Uytterhoeven clock-names = "fck"; 528*08f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 529*08f28288SGeert Uytterhoeven resets = <&cpg 709>; 530*08f28288SGeert Uytterhoeven #dma-cells = <1>; 531*08f28288SGeert Uytterhoeven dma-channels = <16>; 532*08f28288SGeert Uytterhoeven }; 533*08f28288SGeert Uytterhoeven 534*08f28288SGeert Uytterhoeven dmac1: dma-controller@e7351000 { 535*08f28288SGeert Uytterhoeven compatible = "renesas,dmac-r8a779g0", 536*08f28288SGeert Uytterhoeven "renesas,rcar-gen4-dmac"; 537*08f28288SGeert Uytterhoeven reg = <0 0xe7351000 0 0x1000>, 538*08f28288SGeert Uytterhoeven <0 0xe7310000 0 0x10000>; 539*08f28288SGeert Uytterhoeven interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 540*08f28288SGeert Uytterhoeven <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 541*08f28288SGeert Uytterhoeven <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 542*08f28288SGeert Uytterhoeven <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 543*08f28288SGeert Uytterhoeven <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 544*08f28288SGeert Uytterhoeven <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 545*08f28288SGeert Uytterhoeven <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 546*08f28288SGeert Uytterhoeven <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 547*08f28288SGeert Uytterhoeven <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 548*08f28288SGeert Uytterhoeven <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 549*08f28288SGeert Uytterhoeven <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 550*08f28288SGeert Uytterhoeven <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 551*08f28288SGeert Uytterhoeven <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 552*08f28288SGeert Uytterhoeven <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 553*08f28288SGeert Uytterhoeven <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 554*08f28288SGeert Uytterhoeven <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 555*08f28288SGeert Uytterhoeven <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 556*08f28288SGeert Uytterhoeven interrupt-names = "error", 557*08f28288SGeert Uytterhoeven "ch0", "ch1", "ch2", "ch3", "ch4", 558*08f28288SGeert Uytterhoeven "ch5", "ch6", "ch7", "ch8", "ch9", 559*08f28288SGeert Uytterhoeven "ch10", "ch11", "ch12", "ch13", 560*08f28288SGeert Uytterhoeven "ch14", "ch15"; 561*08f28288SGeert Uytterhoeven clocks = <&cpg CPG_MOD 710>; 562*08f28288SGeert Uytterhoeven clock-names = "fck"; 563*08f28288SGeert Uytterhoeven power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 564*08f28288SGeert Uytterhoeven resets = <&cpg 710>; 565*08f28288SGeert Uytterhoeven #dma-cells = <1>; 566*08f28288SGeert Uytterhoeven dma-channels = <16>; 567*08f28288SGeert Uytterhoeven }; 568*08f28288SGeert Uytterhoeven 569987da486SYoshihiro Shimoda gic: interrupt-controller@f1000000 { 570987da486SYoshihiro Shimoda compatible = "arm,gic-v3"; 571987da486SYoshihiro Shimoda #interrupt-cells = <3>; 572987da486SYoshihiro Shimoda #address-cells = <0>; 573987da486SYoshihiro Shimoda interrupt-controller; 574987da486SYoshihiro Shimoda reg = <0x0 0xf1000000 0 0x20000>, 575987da486SYoshihiro Shimoda <0x0 0xf1060000 0 0x110000>; 576987da486SYoshihiro Shimoda interrupts = <GIC_PPI 9 577987da486SYoshihiro Shimoda (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 578987da486SYoshihiro Shimoda }; 579987da486SYoshihiro Shimoda 580987da486SYoshihiro Shimoda prr: chipid@fff00044 { 581987da486SYoshihiro Shimoda compatible = "renesas,prr"; 582987da486SYoshihiro Shimoda reg = <0 0xfff00044 0 4>; 583987da486SYoshihiro Shimoda }; 584987da486SYoshihiro Shimoda }; 585987da486SYoshihiro Shimoda 586987da486SYoshihiro Shimoda timer { 587987da486SYoshihiro Shimoda compatible = "arm,armv8-timer"; 588987da486SYoshihiro Shimoda interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 589987da486SYoshihiro Shimoda <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 590987da486SYoshihiro Shimoda <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 591987da486SYoshihiro Shimoda <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 592987da486SYoshihiro Shimoda }; 593987da486SYoshihiro Shimoda}; 594