1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779a0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779a0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779a0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 }; 26 27 cpus { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 31 a76_0: cpu@0 { 32 compatible = "arm,cortex-a76"; 33 reg = <0>; 34 device_type = "cpu"; 35 power-domains = <&sysc R8A779A0_PD_A1E0D0C0>; 36 next-level-cache = <&L3_CA76_0>; 37 }; 38 39 L3_CA76_0: cache-controller-0 { 40 compatible = "cache"; 41 power-domains = <&sysc R8A779A0_PD_A2E0D0>; 42 cache-unified; 43 cache-level = <3>; 44 }; 45 }; 46 47 extal_clk: extal { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 /* This value must be overridden by the board */ 51 clock-frequency = <0>; 52 }; 53 54 extalr_clk: extalr { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 /* This value must be overridden by the board */ 58 clock-frequency = <0>; 59 }; 60 61 pmu_a76 { 62 compatible = "arm,cortex-a76-pmu"; 63 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 64 }; 65 66 /* External SCIF clock - to be overridden by boards that provide it */ 67 scif_clk: scif { 68 compatible = "fixed-clock"; 69 #clock-cells = <0>; 70 clock-frequency = <0>; 71 }; 72 73 soc: soc { 74 compatible = "simple-bus"; 75 interrupt-parent = <&gic>; 76 #address-cells = <2>; 77 #size-cells = <2>; 78 ranges; 79 80 rwdt: watchdog@e6020000 { 81 compatible = "renesas,r8a779a0-wdt", 82 "renesas,rcar-gen3-wdt"; 83 reg = <0 0xe6020000 0 0x0c>; 84 clocks = <&cpg CPG_MOD 907>; 85 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 86 resets = <&cpg 907>; 87 status = "disabled"; 88 }; 89 90 pfc: pinctrl@e6050000 { 91 compatible = "renesas,pfc-r8a779a0"; 92 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 93 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 94 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 95 <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>, 96 <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>; 97 }; 98 99 gpio0: gpio@e6058180 { 100 compatible = "renesas,gpio-r8a779a0"; 101 reg = <0 0xe6058180 0 0x54>; 102 interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>; 103 clocks = <&cpg CPG_MOD 916>; 104 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 105 resets = <&cpg 916>; 106 gpio-controller; 107 #gpio-cells = <2>; 108 gpio-ranges = <&pfc 0 0 28>; 109 interrupt-controller; 110 #interrupt-cells = <2>; 111 }; 112 113 gpio1: gpio@e6050180 { 114 compatible = "renesas,gpio-r8a779a0"; 115 reg = <0 0xe6050180 0 0x54>; 116 interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>; 117 clocks = <&cpg CPG_MOD 915>; 118 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 119 resets = <&cpg 915>; 120 gpio-controller; 121 #gpio-cells = <2>; 122 gpio-ranges = <&pfc 0 32 31>; 123 interrupt-controller; 124 #interrupt-cells = <2>; 125 }; 126 127 gpio2: gpio@e6050980 { 128 compatible = "renesas,gpio-r8a779a0"; 129 reg = <0 0xe6050980 0 0x54>; 130 interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; 131 clocks = <&cpg CPG_MOD 915>; 132 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 133 resets = <&cpg 915>; 134 gpio-controller; 135 #gpio-cells = <2>; 136 gpio-ranges = <&pfc 0 64 25>; 137 interrupt-controller; 138 #interrupt-cells = <2>; 139 }; 140 141 gpio3: gpio@e6058980 { 142 compatible = "renesas,gpio-r8a779a0"; 143 reg = <0 0xe6058980 0 0x54>; 144 interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>; 145 clocks = <&cpg CPG_MOD 916>; 146 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 147 resets = <&cpg 916>; 148 gpio-controller; 149 #gpio-cells = <2>; 150 gpio-ranges = <&pfc 0 96 17>; 151 interrupt-controller; 152 #interrupt-cells = <2>; 153 }; 154 155 gpio4: gpio@e6060180 { 156 compatible = "renesas,gpio-r8a779a0"; 157 reg = <0 0xe6060180 0 0x54>; 158 interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; 159 clocks = <&cpg CPG_MOD 917>; 160 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 161 resets = <&cpg 917>; 162 gpio-controller; 163 #gpio-cells = <2>; 164 gpio-ranges = <&pfc 0 128 27>; 165 interrupt-controller; 166 #interrupt-cells = <2>; 167 }; 168 169 gpio5: gpio@e6060980 { 170 compatible = "renesas,gpio-r8a779a0"; 171 reg = <0 0xe6060980 0 0x54>; 172 interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; 173 clocks = <&cpg CPG_MOD 917>; 174 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 175 resets = <&cpg 917>; 176 gpio-controller; 177 #gpio-cells = <2>; 178 gpio-ranges = <&pfc 0 160 21>; 179 interrupt-controller; 180 #interrupt-cells = <2>; 181 }; 182 183 gpio6: gpio@e6068180 { 184 compatible = "renesas,gpio-r8a779a0"; 185 reg = <0 0xe6068180 0 0x54>; 186 interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>; 187 clocks = <&cpg CPG_MOD 918>; 188 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 189 resets = <&cpg 918>; 190 gpio-controller; 191 #gpio-cells = <2>; 192 gpio-ranges = <&pfc 0 192 21>; 193 interrupt-controller; 194 #interrupt-cells = <2>; 195 }; 196 197 gpio7: gpio@e6068980 { 198 compatible = "renesas,gpio-r8a779a0"; 199 reg = <0 0xe6068980 0 0x54>; 200 interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; 201 clocks = <&cpg CPG_MOD 918>; 202 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 203 resets = <&cpg 918>; 204 gpio-controller; 205 #gpio-cells = <2>; 206 gpio-ranges = <&pfc 0 224 21>; 207 interrupt-controller; 208 #interrupt-cells = <2>; 209 }; 210 211 gpio8: gpio@e6069180 { 212 compatible = "renesas,gpio-r8a779a0"; 213 reg = <0 0xe6069180 0 0x54>; 214 interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>; 215 clocks = <&cpg CPG_MOD 918>; 216 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 217 resets = <&cpg 918>; 218 gpio-controller; 219 #gpio-cells = <2>; 220 gpio-ranges = <&pfc 0 256 21>; 221 interrupt-controller; 222 #interrupt-cells = <2>; 223 }; 224 225 gpio9: gpio@e6069980 { 226 compatible = "renesas,gpio-r8a779a0"; 227 reg = <0 0xe6069980 0 0x54>; 228 interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>; 229 clocks = <&cpg CPG_MOD 918>; 230 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 231 resets = <&cpg 918>; 232 gpio-controller; 233 #gpio-cells = <2>; 234 gpio-ranges = <&pfc 0 288 21>; 235 interrupt-controller; 236 #interrupt-cells = <2>; 237 }; 238 239 cmt0: timer@e60f0000 { 240 compatible = "renesas,r8a779a0-cmt0", 241 "renesas,rcar-gen3-cmt0"; 242 reg = <0 0xe60f0000 0 0x1004>; 243 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>, 244 <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>; 245 clocks = <&cpg CPG_MOD 910>; 246 clock-names = "fck"; 247 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 248 resets = <&cpg 910>; 249 status = "disabled"; 250 }; 251 252 cmt1: timer@e6130000 { 253 compatible = "renesas,r8a779a0-cmt1", 254 "renesas,rcar-gen3-cmt1"; 255 reg = <0 0xe6130000 0 0x1004>; 256 interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 257 <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 258 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 259 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 260 <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, 261 <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, 262 <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, 263 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 264 clocks = <&cpg CPG_MOD 911>; 265 clock-names = "fck"; 266 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 267 resets = <&cpg 911>; 268 status = "disabled"; 269 }; 270 271 cmt2: timer@e6140000 { 272 compatible = "renesas,r8a779a0-cmt1", 273 "renesas,rcar-gen3-cmt1"; 274 reg = <0 0xe6140000 0 0x1004>; 275 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 276 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 277 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 278 <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, 279 <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, 280 <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, 281 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, 282 <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>; 283 clocks = <&cpg CPG_MOD 912>; 284 clock-names = "fck"; 285 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 286 resets = <&cpg 912>; 287 status = "disabled"; 288 }; 289 290 cmt3: timer@e6148000 { 291 compatible = "renesas,r8a779a0-cmt1", 292 "renesas,rcar-gen3-cmt1"; 293 reg = <0 0xe6148000 0 0x1004>; 294 interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, 295 <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, 296 <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, 297 <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 301 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>; 302 clocks = <&cpg CPG_MOD 913>; 303 clock-names = "fck"; 304 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 305 resets = <&cpg 913>; 306 status = "disabled"; 307 }; 308 309 cpg: clock-controller@e6150000 { 310 compatible = "renesas,r8a779a0-cpg-mssr"; 311 reg = <0 0xe6150000 0 0x4000>; 312 clocks = <&extal_clk>, <&extalr_clk>; 313 clock-names = "extal", "extalr"; 314 #clock-cells = <2>; 315 #power-domain-cells = <0>; 316 #reset-cells = <1>; 317 }; 318 319 rst: reset-controller@e6160000 { 320 compatible = "renesas,r8a779a0-rst"; 321 reg = <0 0xe6160000 0 0x4000>; 322 }; 323 324 sysc: system-controller@e6180000 { 325 compatible = "renesas,r8a779a0-sysc"; 326 reg = <0 0xe6180000 0 0x4000>; 327 #power-domain-cells = <1>; 328 }; 329 330 tsc: thermal@e6190000 { 331 compatible = "renesas,r8a779a0-thermal"; 332 reg = <0 0xe6190000 0 0x200>, 333 <0 0xe6198000 0 0x200>, 334 <0 0xe61a0000 0 0x200>, 335 <0 0xe61a8000 0 0x200>, 336 <0 0xe61b0000 0 0x200>; 337 clocks = <&cpg CPG_MOD 919>; 338 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 339 resets = <&cpg 919>; 340 #thermal-sensor-cells = <1>; 341 }; 342 343 tmu0: timer@e61e0000 { 344 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 345 reg = <0 0xe61e0000 0 0x30>; 346 interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>; 349 clocks = <&cpg CPG_MOD 713>; 350 clock-names = "fck"; 351 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 352 resets = <&cpg 713>; 353 status = "disabled"; 354 }; 355 356 tmu1: timer@e6fc0000 { 357 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 358 reg = <0 0xe6fc0000 0 0x30>; 359 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 362 clocks = <&cpg CPG_MOD 714>; 363 clock-names = "fck"; 364 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 365 resets = <&cpg 714>; 366 status = "disabled"; 367 }; 368 369 tmu2: timer@e6fd0000 { 370 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 371 reg = <0 0xe6fd0000 0 0x30>; 372 interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>, 373 <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>, 374 <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>; 375 clocks = <&cpg CPG_MOD 715>; 376 clock-names = "fck"; 377 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 378 resets = <&cpg 715>; 379 status = "disabled"; 380 }; 381 382 tmu3: timer@e6fe0000 { 383 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 384 reg = <0 0xe6fe0000 0 0x30>; 385 interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; 388 clocks = <&cpg CPG_MOD 716>; 389 clock-names = "fck"; 390 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 391 resets = <&cpg 716>; 392 status = "disabled"; 393 }; 394 395 tmu4: timer@ffc00000 { 396 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 397 reg = <0 0xffc00000 0 0x30>; 398 interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>; 401 clocks = <&cpg CPG_MOD 717>; 402 clock-names = "fck"; 403 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 404 resets = <&cpg 717>; 405 status = "disabled"; 406 }; 407 408 i2c0: i2c@e6500000 { 409 compatible = "renesas,i2c-r8a779a0", 410 "renesas,rcar-gen3-i2c"; 411 reg = <0 0xe6500000 0 0x40>; 412 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 413 clocks = <&cpg CPG_MOD 518>; 414 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 415 resets = <&cpg 518>; 416 dmas = <&dmac1 0x91>, <&dmac1 0x90>; 417 dma-names = "tx", "rx"; 418 i2c-scl-internal-delay-ns = <110>; 419 #address-cells = <1>; 420 #size-cells = <0>; 421 status = "disabled"; 422 }; 423 424 i2c1: i2c@e6508000 { 425 compatible = "renesas,i2c-r8a779a0", 426 "renesas,rcar-gen3-i2c"; 427 reg = <0 0xe6508000 0 0x40>; 428 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 429 clocks = <&cpg CPG_MOD 519>; 430 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 431 resets = <&cpg 519>; 432 dmas = <&dmac1 0x93>, <&dmac1 0x92>; 433 dma-names = "tx", "rx"; 434 i2c-scl-internal-delay-ns = <110>; 435 #address-cells = <1>; 436 #size-cells = <0>; 437 status = "disabled"; 438 }; 439 440 i2c2: i2c@e6510000 { 441 compatible = "renesas,i2c-r8a779a0", 442 "renesas,rcar-gen3-i2c"; 443 reg = <0 0xe6510000 0 0x40>; 444 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 520>; 446 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 447 resets = <&cpg 520>; 448 dmas = <&dmac1 0x95>, <&dmac1 0x94>; 449 dma-names = "tx", "rx"; 450 i2c-scl-internal-delay-ns = <110>; 451 #address-cells = <1>; 452 #size-cells = <0>; 453 status = "disabled"; 454 }; 455 456 i2c3: i2c@e66d0000 { 457 compatible = "renesas,i2c-r8a779a0", 458 "renesas,rcar-gen3-i2c"; 459 reg = <0 0xe66d0000 0 0x40>; 460 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 461 clocks = <&cpg CPG_MOD 521>; 462 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 463 resets = <&cpg 521>; 464 dmas = <&dmac1 0x97>, <&dmac1 0x96>; 465 dma-names = "tx", "rx"; 466 i2c-scl-internal-delay-ns = <110>; 467 #address-cells = <1>; 468 #size-cells = <0>; 469 status = "disabled"; 470 }; 471 472 i2c4: i2c@e66d8000 { 473 compatible = "renesas,i2c-r8a779a0", 474 "renesas,rcar-gen3-i2c"; 475 reg = <0 0xe66d8000 0 0x40>; 476 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 477 clocks = <&cpg CPG_MOD 522>; 478 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 479 resets = <&cpg 522>; 480 dmas = <&dmac1 0x99>, <&dmac1 0x98>; 481 dma-names = "tx", "rx"; 482 i2c-scl-internal-delay-ns = <110>; 483 #address-cells = <1>; 484 #size-cells = <0>; 485 status = "disabled"; 486 }; 487 488 i2c5: i2c@e66e0000 { 489 compatible = "renesas,i2c-r8a779a0", 490 "renesas,rcar-gen3-i2c"; 491 reg = <0 0xe66e0000 0 0x40>; 492 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 493 clocks = <&cpg CPG_MOD 523>; 494 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 495 resets = <&cpg 523>; 496 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>; 497 dma-names = "tx", "rx"; 498 i2c-scl-internal-delay-ns = <110>; 499 #address-cells = <1>; 500 #size-cells = <0>; 501 status = "disabled"; 502 }; 503 504 i2c6: i2c@e66e8000 { 505 compatible = "renesas,i2c-r8a779a0", 506 "renesas,rcar-gen3-i2c"; 507 reg = <0 0xe66e8000 0 0x40>; 508 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 509 clocks = <&cpg CPG_MOD 524>; 510 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 511 resets = <&cpg 524>; 512 dmas = <&dmac1 0x9d>, <&dmac1 0x9c>; 513 dma-names = "tx", "rx"; 514 i2c-scl-internal-delay-ns = <110>; 515 #address-cells = <1>; 516 #size-cells = <0>; 517 status = "disabled"; 518 }; 519 520 hscif0: serial@e6540000 { 521 compatible = "renesas,hscif-r8a779a0", 522 "renesas,rcar-gen3-hscif", "renesas,hscif"; 523 reg = <0 0xe6540000 0 0x60>; 524 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 525 clocks = <&cpg CPG_MOD 514>, 526 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 527 <&scif_clk>; 528 clock-names = "fck", "brg_int", "scif_clk"; 529 dmas = <&dmac1 0x31>, <&dmac1 0x30>; 530 dma-names = "tx", "rx"; 531 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 532 resets = <&cpg 514>; 533 status = "disabled"; 534 }; 535 536 hscif1: serial@e6550000 { 537 compatible = "renesas,hscif-r8a779a0", 538 "renesas,rcar-gen3-hscif", "renesas,hscif"; 539 reg = <0 0xe6550000 0 0x60>; 540 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 541 clocks = <&cpg CPG_MOD 515>, 542 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 543 <&scif_clk>; 544 clock-names = "fck", "brg_int", "scif_clk"; 545 dmas = <&dmac1 0x33>, <&dmac1 0x32>; 546 dma-names = "tx", "rx"; 547 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 548 resets = <&cpg 515>; 549 status = "disabled"; 550 }; 551 552 hscif2: serial@e6560000 { 553 compatible = "renesas,hscif-r8a779a0", 554 "renesas,rcar-gen3-hscif", "renesas,hscif"; 555 reg = <0 0xe6560000 0 0x60>; 556 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 557 clocks = <&cpg CPG_MOD 516>, 558 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 559 <&scif_clk>; 560 clock-names = "fck", "brg_int", "scif_clk"; 561 dmas = <&dmac1 0x35>, <&dmac1 0x34>; 562 dma-names = "tx", "rx"; 563 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 564 resets = <&cpg 516>; 565 status = "disabled"; 566 }; 567 568 hscif3: serial@e66a0000 { 569 compatible = "renesas,hscif-r8a779a0", 570 "renesas,rcar-gen3-hscif", "renesas,hscif"; 571 reg = <0 0xe66a0000 0 0x60>; 572 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 573 clocks = <&cpg CPG_MOD 517>, 574 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 575 <&scif_clk>; 576 clock-names = "fck", "brg_int", "scif_clk"; 577 dmas = <&dmac1 0x37>, <&dmac1 0x36>; 578 dma-names = "tx", "rx"; 579 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 580 resets = <&cpg 517>; 581 status = "disabled"; 582 }; 583 584 avb0: ethernet@e6800000 { 585 compatible = "renesas,etheravb-r8a779a0", 586 "renesas,etheravb-rcar-gen3"; 587 reg = <0 0xe6800000 0 0x800>; 588 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 589 <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, 590 <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, 591 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, 592 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 593 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, 594 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 595 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 596 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 597 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 598 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 599 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 600 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 601 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 602 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 603 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 604 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 605 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 606 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 607 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 608 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 609 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, 610 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 611 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 612 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; 613 interrupt-names = "ch0", "ch1", "ch2", "ch3", 614 "ch4", "ch5", "ch6", "ch7", 615 "ch8", "ch9", "ch10", "ch11", 616 "ch12", "ch13", "ch14", "ch15", 617 "ch16", "ch17", "ch18", "ch19", 618 "ch20", "ch21", "ch22", "ch23", 619 "ch24"; 620 clocks = <&cpg CPG_MOD 211>; 621 clock-names = "fck"; 622 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 623 resets = <&cpg 211>; 624 phy-mode = "rgmii"; 625 rx-internal-delay-ps = <0>; 626 tx-internal-delay-ps = <0>; 627 #address-cells = <1>; 628 #size-cells = <0>; 629 status = "disabled"; 630 }; 631 632 avb1: ethernet@e6810000 { 633 compatible = "renesas,etheravb-r8a779a0", 634 "renesas,etheravb-rcar-gen3"; 635 reg = <0 0xe6810000 0 0x800>; 636 interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 637 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 638 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 639 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 648 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 649 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 650 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, 651 <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 652 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 653 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 654 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 656 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 657 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 658 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 659 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 660 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 661 interrupt-names = "ch0", "ch1", "ch2", "ch3", 662 "ch4", "ch5", "ch6", "ch7", 663 "ch8", "ch9", "ch10", "ch11", 664 "ch12", "ch13", "ch14", "ch15", 665 "ch16", "ch17", "ch18", "ch19", 666 "ch20", "ch21", "ch22", "ch23", 667 "ch24"; 668 clocks = <&cpg CPG_MOD 212>; 669 clock-names = "fck"; 670 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 671 resets = <&cpg 212>; 672 phy-mode = "rgmii"; 673 rx-internal-delay-ps = <0>; 674 tx-internal-delay-ps = <0>; 675 #address-cells = <1>; 676 #size-cells = <0>; 677 status = "disabled"; 678 }; 679 680 avb2: ethernet@e6820000 { 681 compatible = "renesas,etheravb-r8a779a0", 682 "renesas,etheravb-rcar-gen3"; 683 reg = <0 0xe6820000 0 0x1000>; 684 interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 685 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, 686 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 687 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 688 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 689 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 690 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 691 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 692 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 693 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 694 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 695 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 696 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 697 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 698 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 699 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 700 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 701 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 702 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 703 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 704 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 705 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 706 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 707 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 708 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 709 interrupt-names = "ch0", "ch1", "ch2", "ch3", 710 "ch4", "ch5", "ch6", "ch7", 711 "ch8", "ch9", "ch10", "ch11", 712 "ch12", "ch13", "ch14", "ch15", 713 "ch16", "ch17", "ch18", "ch19", 714 "ch20", "ch21", "ch22", "ch23", 715 "ch24"; 716 clocks = <&cpg CPG_MOD 213>; 717 clock-names = "fck"; 718 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 719 resets = <&cpg 213>; 720 phy-mode = "rgmii"; 721 rx-internal-delay-ps = <0>; 722 tx-internal-delay-ps = <0>; 723 #address-cells = <1>; 724 #size-cells = <0>; 725 status = "disabled"; 726 }; 727 728 avb3: ethernet@e6830000 { 729 compatible = "renesas,etheravb-r8a779a0", 730 "renesas,etheravb-rcar-gen3"; 731 reg = <0 0xe6830000 0 0x1000>; 732 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 734 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 735 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 736 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 737 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 738 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 739 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 740 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 742 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 743 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 744 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 745 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 746 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 747 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 748 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 749 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 750 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 751 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 752 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 753 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 754 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 755 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 756 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 757 interrupt-names = "ch0", "ch1", "ch2", "ch3", 758 "ch4", "ch5", "ch6", "ch7", 759 "ch8", "ch9", "ch10", "ch11", 760 "ch12", "ch13", "ch14", "ch15", 761 "ch16", "ch17", "ch18", "ch19", 762 "ch20", "ch21", "ch22", "ch23", 763 "ch24"; 764 clocks = <&cpg CPG_MOD 214>; 765 clock-names = "fck"; 766 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 767 resets = <&cpg 214>; 768 phy-mode = "rgmii"; 769 rx-internal-delay-ps = <0>; 770 tx-internal-delay-ps = <0>; 771 #address-cells = <1>; 772 #size-cells = <0>; 773 status = "disabled"; 774 }; 775 776 avb4: ethernet@e6840000 { 777 compatible = "renesas,etheravb-r8a779a0", 778 "renesas,etheravb-rcar-gen3"; 779 reg = <0 0xe6840000 0 0x1000>; 780 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 797 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 798 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 799 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 801 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 802 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 803 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 804 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>; 805 interrupt-names = "ch0", "ch1", "ch2", "ch3", 806 "ch4", "ch5", "ch6", "ch7", 807 "ch8", "ch9", "ch10", "ch11", 808 "ch12", "ch13", "ch14", "ch15", 809 "ch16", "ch17", "ch18", "ch19", 810 "ch20", "ch21", "ch22", "ch23", 811 "ch24"; 812 clocks = <&cpg CPG_MOD 215>; 813 clock-names = "fck"; 814 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 815 resets = <&cpg 215>; 816 phy-mode = "rgmii"; 817 rx-internal-delay-ps = <0>; 818 tx-internal-delay-ps = <0>; 819 #address-cells = <1>; 820 #size-cells = <0>; 821 status = "disabled"; 822 }; 823 824 avb5: ethernet@e6850000 { 825 compatible = "renesas,etheravb-r8a779a0", 826 "renesas,etheravb-rcar-gen3"; 827 reg = <0 0xe6850000 0 0x1000>; 828 interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 839 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 840 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 841 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 842 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 843 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 844 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 845 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 846 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 847 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 848 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 849 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 850 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 852 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 853 interrupt-names = "ch0", "ch1", "ch2", "ch3", 854 "ch4", "ch5", "ch6", "ch7", 855 "ch8", "ch9", "ch10", "ch11", 856 "ch12", "ch13", "ch14", "ch15", 857 "ch16", "ch17", "ch18", "ch19", 858 "ch20", "ch21", "ch22", "ch23", 859 "ch24"; 860 clocks = <&cpg CPG_MOD 216>; 861 clock-names = "fck"; 862 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 863 resets = <&cpg 216>; 864 phy-mode = "rgmii"; 865 rx-internal-delay-ps = <0>; 866 tx-internal-delay-ps = <0>; 867 #address-cells = <1>; 868 #size-cells = <0>; 869 status = "disabled"; 870 }; 871 872 scif0: serial@e6e60000 { 873 compatible = "renesas,scif-r8a779a0", 874 "renesas,rcar-gen3-scif", "renesas,scif"; 875 reg = <0 0xe6e60000 0 64>; 876 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 877 clocks = <&cpg CPG_MOD 702>, 878 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 879 <&scif_clk>; 880 clock-names = "fck", "brg_int", "scif_clk"; 881 dmas = <&dmac1 0x51>, <&dmac1 0x50>; 882 dma-names = "tx", "rx"; 883 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 884 resets = <&cpg 702>; 885 status = "disabled"; 886 }; 887 888 scif1: serial@e6e68000 { 889 compatible = "renesas,scif-r8a779a0", 890 "renesas,rcar-gen3-scif", "renesas,scif"; 891 reg = <0 0xe6e68000 0 64>; 892 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 893 clocks = <&cpg CPG_MOD 703>, 894 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 895 <&scif_clk>; 896 clock-names = "fck", "brg_int", "scif_clk"; 897 dmas = <&dmac1 0x53>, <&dmac1 0x52>; 898 dma-names = "tx", "rx"; 899 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 900 resets = <&cpg 703>; 901 status = "disabled"; 902 }; 903 904 scif3: serial@e6c50000 { 905 compatible = "renesas,scif-r8a779a0", 906 "renesas,rcar-gen3-scif", "renesas,scif"; 907 reg = <0 0xe6c50000 0 64>; 908 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 909 clocks = <&cpg CPG_MOD 704>, 910 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 911 <&scif_clk>; 912 clock-names = "fck", "brg_int", "scif_clk"; 913 dmas = <&dmac1 0x57>, <&dmac1 0x56>; 914 dma-names = "tx", "rx"; 915 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 916 resets = <&cpg 704>; 917 status = "disabled"; 918 }; 919 920 scif4: serial@e6c40000 { 921 compatible = "renesas,scif-r8a779a0", 922 "renesas,rcar-gen3-scif", "renesas,scif"; 923 reg = <0 0xe6c40000 0 64>; 924 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 925 clocks = <&cpg CPG_MOD 705>, 926 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 927 <&scif_clk>; 928 clock-names = "fck", "brg_int", "scif_clk"; 929 dmas = <&dmac1 0x59>, <&dmac1 0x58>; 930 dma-names = "tx", "rx"; 931 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 932 resets = <&cpg 705>; 933 status = "disabled"; 934 }; 935 936 tpu: pwm@e6e80000 { 937 compatible = "renesas,tpu-r8a779a0", "renesas,tpu"; 938 reg = <0 0xe6e80000 0 0x148>; 939 interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>; 940 clocks = <&cpg CPG_MOD 718>; 941 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 942 resets = <&cpg 718>; 943 #pwm-cells = <3>; 944 status = "disabled"; 945 }; 946 947 msiof0: spi@e6e90000 { 948 compatible = "renesas,msiof-r8a779a0", 949 "renesas,rcar-gen3-msiof"; 950 reg = <0 0xe6e90000 0 0x0064>; 951 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; 952 clocks = <&cpg CPG_MOD 618>; 953 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 954 resets = <&cpg 618>; 955 dmas = <&dmac1 0x41>, <&dmac1 0x40>; 956 dma-names = "tx", "rx"; 957 #address-cells = <1>; 958 #size-cells = <0>; 959 status = "disabled"; 960 }; 961 962 msiof1: spi@e6ea0000 { 963 compatible = "renesas,msiof-r8a779a0", 964 "renesas,rcar-gen3-msiof"; 965 reg = <0 0xe6ea0000 0 0x0064>; 966 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 967 clocks = <&cpg CPG_MOD 619>; 968 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 969 resets = <&cpg 619>; 970 dmas = <&dmac1 0x43>, <&dmac1 0x42>; 971 dma-names = "tx", "rx"; 972 #address-cells = <1>; 973 #size-cells = <0>; 974 status = "disabled"; 975 }; 976 977 msiof2: spi@e6c00000 { 978 compatible = "renesas,msiof-r8a779a0", 979 "renesas,rcar-gen3-msiof"; 980 reg = <0 0xe6c00000 0 0x0064>; 981 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 982 clocks = <&cpg CPG_MOD 620>; 983 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 984 resets = <&cpg 620>; 985 dmas = <&dmac1 0x45>, <&dmac1 0x44>; 986 dma-names = "tx", "rx"; 987 #address-cells = <1>; 988 #size-cells = <0>; 989 status = "disabled"; 990 }; 991 992 msiof3: spi@e6c10000 { 993 compatible = "renesas,msiof-r8a779a0", 994 "renesas,rcar-gen3-msiof"; 995 reg = <0 0xe6c10000 0 0x0064>; 996 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 997 clocks = <&cpg CPG_MOD 621>; 998 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 999 resets = <&cpg 621>; 1000 dmas = <&dmac1 0x47>, <&dmac1 0x46>; 1001 dma-names = "tx", "rx"; 1002 #address-cells = <1>; 1003 #size-cells = <0>; 1004 status = "disabled"; 1005 }; 1006 1007 msiof4: spi@e6c20000 { 1008 compatible = "renesas,msiof-r8a779a0", 1009 "renesas,rcar-gen3-msiof"; 1010 reg = <0 0xe6c20000 0 0x0064>; 1011 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 1012 clocks = <&cpg CPG_MOD 622>; 1013 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1014 resets = <&cpg 622>; 1015 dmas = <&dmac1 0x49>, <&dmac1 0x48>; 1016 dma-names = "tx", "rx"; 1017 #address-cells = <1>; 1018 #size-cells = <0>; 1019 status = "disabled"; 1020 }; 1021 1022 msiof5: spi@e6c28000 { 1023 compatible = "renesas,msiof-r8a779a0", 1024 "renesas,rcar-gen3-msiof"; 1025 reg = <0 0xe6c28000 0 0x0064>; 1026 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; 1027 clocks = <&cpg CPG_MOD 623>; 1028 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1029 resets = <&cpg 623>; 1030 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>; 1031 dma-names = "tx", "rx"; 1032 #address-cells = <1>; 1033 #size-cells = <0>; 1034 status = "disabled"; 1035 }; 1036 1037 vin00: video@e6ef0000 { 1038 compatible = "renesas,vin-r8a779a0"; 1039 reg = <0 0xe6ef0000 0 0x1000>; 1040 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 1041 clocks = <&cpg CPG_MOD 730>; 1042 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1043 resets = <&cpg 730>; 1044 renesas,id = <0>; 1045 status = "disabled"; 1046 1047 ports { 1048 #address-cells = <1>; 1049 #size-cells = <0>; 1050 1051 port@2 { 1052 #address-cells = <1>; 1053 #size-cells = <0>; 1054 1055 reg = <2>; 1056 1057 vin00isp0: endpoint@0 { 1058 reg = <0>; 1059 remote-endpoint = <&isp0vin00>; 1060 }; 1061 }; 1062 }; 1063 }; 1064 1065 vin01: video@e6ef1000 { 1066 compatible = "renesas,vin-r8a779a0"; 1067 reg = <0 0xe6ef1000 0 0x1000>; 1068 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 1069 clocks = <&cpg CPG_MOD 731>; 1070 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1071 resets = <&cpg 731>; 1072 renesas,id = <1>; 1073 status = "disabled"; 1074 1075 ports { 1076 #address-cells = <1>; 1077 #size-cells = <0>; 1078 1079 port@2 { 1080 #address-cells = <1>; 1081 #size-cells = <0>; 1082 1083 reg = <2>; 1084 1085 vin01isp0: endpoint@0 { 1086 reg = <0>; 1087 remote-endpoint = <&isp0vin01>; 1088 }; 1089 }; 1090 }; 1091 }; 1092 1093 vin02: video@e6ef2000 { 1094 compatible = "renesas,vin-r8a779a0"; 1095 reg = <0 0xe6ef2000 0 0x1000>; 1096 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1097 clocks = <&cpg CPG_MOD 800>; 1098 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1099 resets = <&cpg 800>; 1100 renesas,id = <2>; 1101 status = "disabled"; 1102 1103 ports { 1104 #address-cells = <1>; 1105 #size-cells = <0>; 1106 1107 port@2 { 1108 #address-cells = <1>; 1109 #size-cells = <0>; 1110 1111 reg = <2>; 1112 1113 vin02isp0: endpoint@0 { 1114 reg = <0>; 1115 remote-endpoint = <&isp0vin02>; 1116 }; 1117 }; 1118 }; 1119 }; 1120 1121 vin03: video@e6ef3000 { 1122 compatible = "renesas,vin-r8a779a0"; 1123 reg = <0 0xe6ef3000 0 0x1000>; 1124 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 1125 clocks = <&cpg CPG_MOD 801>; 1126 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1127 resets = <&cpg 801>; 1128 renesas,id = <3>; 1129 status = "disabled"; 1130 1131 ports { 1132 #address-cells = <1>; 1133 #size-cells = <0>; 1134 1135 port@2 { 1136 #address-cells = <1>; 1137 #size-cells = <0>; 1138 1139 reg = <2>; 1140 1141 vin03isp0: endpoint@0 { 1142 reg = <0>; 1143 remote-endpoint = <&isp0vin03>; 1144 }; 1145 }; 1146 }; 1147 }; 1148 1149 vin04: video@e6ef4000 { 1150 compatible = "renesas,vin-r8a779a0"; 1151 reg = <0 0xe6ef4000 0 0x1000>; 1152 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1153 clocks = <&cpg CPG_MOD 802>; 1154 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1155 resets = <&cpg 802>; 1156 renesas,id = <4>; 1157 status = "disabled"; 1158 1159 ports { 1160 #address-cells = <1>; 1161 #size-cells = <0>; 1162 1163 port@2 { 1164 #address-cells = <1>; 1165 #size-cells = <0>; 1166 1167 reg = <2>; 1168 1169 vin04isp0: endpoint@0 { 1170 reg = <0>; 1171 remote-endpoint = <&isp0vin04>; 1172 }; 1173 }; 1174 }; 1175 }; 1176 1177 vin05: video@e6ef5000 { 1178 compatible = "renesas,vin-r8a779a0"; 1179 reg = <0 0xe6ef5000 0 0x1000>; 1180 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1181 clocks = <&cpg CPG_MOD 803>; 1182 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1183 resets = <&cpg 803>; 1184 renesas,id = <5>; 1185 status = "disabled"; 1186 1187 ports { 1188 #address-cells = <1>; 1189 #size-cells = <0>; 1190 1191 port@2 { 1192 #address-cells = <1>; 1193 #size-cells = <0>; 1194 1195 reg = <2>; 1196 1197 vin05isp0: endpoint@0 { 1198 reg = <0>; 1199 remote-endpoint = <&isp0vin05>; 1200 }; 1201 }; 1202 }; 1203 }; 1204 1205 vin06: video@e6ef6000 { 1206 compatible = "renesas,vin-r8a779a0"; 1207 reg = <0 0xe6ef6000 0 0x1000>; 1208 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1209 clocks = <&cpg CPG_MOD 804>; 1210 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1211 resets = <&cpg 804>; 1212 renesas,id = <6>; 1213 status = "disabled"; 1214 1215 ports { 1216 #address-cells = <1>; 1217 #size-cells = <0>; 1218 1219 port@2 { 1220 #address-cells = <1>; 1221 #size-cells = <0>; 1222 1223 reg = <2>; 1224 1225 vin06isp0: endpoint@0 { 1226 reg = <0>; 1227 remote-endpoint = <&isp0vin06>; 1228 }; 1229 }; 1230 }; 1231 }; 1232 1233 vin07: video@e6ef7000 { 1234 compatible = "renesas,vin-r8a779a0"; 1235 reg = <0 0xe6ef7000 0 0x1000>; 1236 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1237 clocks = <&cpg CPG_MOD 805>; 1238 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1239 resets = <&cpg 805>; 1240 renesas,id = <7>; 1241 status = "disabled"; 1242 1243 ports { 1244 #address-cells = <1>; 1245 #size-cells = <0>; 1246 1247 port@2 { 1248 #address-cells = <1>; 1249 #size-cells = <0>; 1250 1251 reg = <2>; 1252 1253 vin07isp0: endpoint@0 { 1254 reg = <0>; 1255 remote-endpoint = <&isp0vin07>; 1256 }; 1257 }; 1258 }; 1259 }; 1260 1261 vin08: video@e6ef8000 { 1262 compatible = "renesas,vin-r8a779a0"; 1263 reg = <0 0xe6ef8000 0 0x1000>; 1264 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1265 clocks = <&cpg CPG_MOD 806>; 1266 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1267 resets = <&cpg 806>; 1268 renesas,id = <8>; 1269 status = "disabled"; 1270 1271 ports { 1272 #address-cells = <1>; 1273 #size-cells = <0>; 1274 1275 port@2 { 1276 #address-cells = <1>; 1277 #size-cells = <0>; 1278 1279 reg = <2>; 1280 1281 vin08isp1: endpoint@1 { 1282 reg = <1>; 1283 remote-endpoint = <&isp1vin08>; 1284 }; 1285 }; 1286 }; 1287 }; 1288 1289 vin09: video@e6ef9000 { 1290 compatible = "renesas,vin-r8a779a0"; 1291 reg = <0 0xe6ef9000 0 0x1000>; 1292 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1293 clocks = <&cpg CPG_MOD 807>; 1294 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1295 resets = <&cpg 807>; 1296 renesas,id = <9>; 1297 status = "disabled"; 1298 1299 ports { 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 1303 port@2 { 1304 #address-cells = <1>; 1305 #size-cells = <0>; 1306 1307 reg = <2>; 1308 1309 vin09isp1: endpoint@1 { 1310 reg = <1>; 1311 remote-endpoint = <&isp1vin09>; 1312 }; 1313 }; 1314 }; 1315 }; 1316 1317 vin10: video@e6efa000 { 1318 compatible = "renesas,vin-r8a779a0"; 1319 reg = <0 0xe6efa000 0 0x1000>; 1320 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 1321 clocks = <&cpg CPG_MOD 808>; 1322 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1323 resets = <&cpg 808>; 1324 renesas,id = <10>; 1325 status = "disabled"; 1326 1327 ports { 1328 #address-cells = <1>; 1329 #size-cells = <0>; 1330 1331 port@2 { 1332 #address-cells = <1>; 1333 #size-cells = <0>; 1334 1335 reg = <2>; 1336 1337 vin10isp1: endpoint@1 { 1338 reg = <1>; 1339 remote-endpoint = <&isp1vin10>; 1340 }; 1341 }; 1342 }; 1343 }; 1344 1345 vin11: video@e6efb000 { 1346 compatible = "renesas,vin-r8a779a0"; 1347 reg = <0 0xe6efb000 0 0x1000>; 1348 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1349 clocks = <&cpg CPG_MOD 809>; 1350 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1351 resets = <&cpg 809>; 1352 renesas,id = <11>; 1353 status = "disabled"; 1354 1355 ports { 1356 #address-cells = <1>; 1357 #size-cells = <0>; 1358 1359 port@2 { 1360 #address-cells = <1>; 1361 #size-cells = <0>; 1362 1363 reg = <2>; 1364 1365 vin11isp1: endpoint@1 { 1366 reg = <1>; 1367 remote-endpoint = <&isp1vin11>; 1368 }; 1369 }; 1370 }; 1371 }; 1372 1373 vin12: video@e6efc000 { 1374 compatible = "renesas,vin-r8a779a0"; 1375 reg = <0 0xe6efc000 0 0x1000>; 1376 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1377 clocks = <&cpg CPG_MOD 810>; 1378 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1379 resets = <&cpg 810>; 1380 renesas,id = <12>; 1381 status = "disabled"; 1382 1383 ports { 1384 #address-cells = <1>; 1385 #size-cells = <0>; 1386 1387 port@2 { 1388 #address-cells = <1>; 1389 #size-cells = <0>; 1390 1391 reg = <2>; 1392 1393 vin12isp1: endpoint@1 { 1394 reg = <1>; 1395 remote-endpoint = <&isp1vin12>; 1396 }; 1397 }; 1398 }; 1399 }; 1400 1401 vin13: video@e6efd000 { 1402 compatible = "renesas,vin-r8a779a0"; 1403 reg = <0 0xe6efd000 0 0x1000>; 1404 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 1405 clocks = <&cpg CPG_MOD 811>; 1406 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1407 resets = <&cpg 811>; 1408 renesas,id = <13>; 1409 status = "disabled"; 1410 1411 ports { 1412 #address-cells = <1>; 1413 #size-cells = <0>; 1414 1415 port@2 { 1416 #address-cells = <1>; 1417 #size-cells = <0>; 1418 1419 reg = <2>; 1420 1421 vin13isp1: endpoint@1 { 1422 reg = <1>; 1423 remote-endpoint = <&isp1vin13>; 1424 }; 1425 }; 1426 }; 1427 }; 1428 1429 vin14: video@e6efe000 { 1430 compatible = "renesas,vin-r8a779a0"; 1431 reg = <0 0xe6efe000 0 0x1000>; 1432 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1433 clocks = <&cpg CPG_MOD 812>; 1434 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1435 resets = <&cpg 812>; 1436 renesas,id = <14>; 1437 status = "disabled"; 1438 1439 ports { 1440 #address-cells = <1>; 1441 #size-cells = <0>; 1442 1443 port@2 { 1444 #address-cells = <1>; 1445 #size-cells = <0>; 1446 1447 reg = <2>; 1448 1449 vin14isp1: endpoint@1 { 1450 reg = <1>; 1451 remote-endpoint = <&isp1vin14>; 1452 }; 1453 }; 1454 }; 1455 }; 1456 1457 vin15: video@e6eff000 { 1458 compatible = "renesas,vin-r8a779a0"; 1459 reg = <0 0xe6eff000 0 0x1000>; 1460 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1461 clocks = <&cpg CPG_MOD 813>; 1462 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1463 resets = <&cpg 813>; 1464 renesas,id = <15>; 1465 status = "disabled"; 1466 1467 ports { 1468 #address-cells = <1>; 1469 #size-cells = <0>; 1470 1471 port@2 { 1472 #address-cells = <1>; 1473 #size-cells = <0>; 1474 1475 reg = <2>; 1476 1477 vin15isp1: endpoint@1 { 1478 reg = <1>; 1479 remote-endpoint = <&isp1vin15>; 1480 }; 1481 }; 1482 }; 1483 }; 1484 1485 vin16: video@e6ed0000 { 1486 compatible = "renesas,vin-r8a779a0"; 1487 reg = <0 0xe6ed0000 0 0x1000>; 1488 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1489 clocks = <&cpg CPG_MOD 814>; 1490 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1491 resets = <&cpg 814>; 1492 renesas,id = <16>; 1493 status = "disabled"; 1494 1495 ports { 1496 #address-cells = <1>; 1497 #size-cells = <0>; 1498 1499 port@2 { 1500 #address-cells = <1>; 1501 #size-cells = <0>; 1502 1503 reg = <2>; 1504 1505 vin16isp2: endpoint@2 { 1506 reg = <2>; 1507 remote-endpoint = <&isp2vin16>; 1508 }; 1509 }; 1510 }; 1511 }; 1512 1513 vin17: video@e6ed1000 { 1514 compatible = "renesas,vin-r8a779a0"; 1515 reg = <0 0xe6ed1000 0 0x1000>; 1516 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 1517 clocks = <&cpg CPG_MOD 815>; 1518 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1519 resets = <&cpg 815>; 1520 renesas,id = <17>; 1521 status = "disabled"; 1522 1523 ports { 1524 #address-cells = <1>; 1525 #size-cells = <0>; 1526 1527 port@2 { 1528 #address-cells = <1>; 1529 #size-cells = <0>; 1530 1531 reg = <2>; 1532 1533 vin17isp2: endpoint@2 { 1534 reg = <2>; 1535 remote-endpoint = <&isp2vin17>; 1536 }; 1537 }; 1538 }; 1539 }; 1540 1541 vin18: video@e6ed2000 { 1542 compatible = "renesas,vin-r8a779a0"; 1543 reg = <0 0xe6ed2000 0 0x1000>; 1544 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 1545 clocks = <&cpg CPG_MOD 816>; 1546 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1547 resets = <&cpg 816>; 1548 renesas,id = <18>; 1549 status = "disabled"; 1550 1551 ports { 1552 #address-cells = <1>; 1553 #size-cells = <0>; 1554 1555 port@2 { 1556 #address-cells = <1>; 1557 #size-cells = <0>; 1558 1559 reg = <2>; 1560 1561 vin18isp2: endpoint@2 { 1562 reg = <2>; 1563 remote-endpoint = <&isp2vin18>; 1564 }; 1565 }; 1566 }; 1567 }; 1568 1569 vin19: video@e6ed3000 { 1570 compatible = "renesas,vin-r8a779a0"; 1571 reg = <0 0xe6ed3000 0 0x1000>; 1572 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; 1573 clocks = <&cpg CPG_MOD 817>; 1574 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1575 resets = <&cpg 817>; 1576 renesas,id = <19>; 1577 status = "disabled"; 1578 1579 ports { 1580 #address-cells = <1>; 1581 #size-cells = <0>; 1582 1583 port@2 { 1584 #address-cells = <1>; 1585 #size-cells = <0>; 1586 1587 reg = <2>; 1588 1589 vin19isp2: endpoint@2 { 1590 reg = <2>; 1591 remote-endpoint = <&isp2vin19>; 1592 }; 1593 }; 1594 }; 1595 }; 1596 1597 vin20: video@e6ed4000 { 1598 compatible = "renesas,vin-r8a779a0"; 1599 reg = <0 0xe6ed4000 0 0x1000>; 1600 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 1601 clocks = <&cpg CPG_MOD 818>; 1602 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1603 resets = <&cpg 818>; 1604 renesas,id = <20>; 1605 status = "disabled"; 1606 1607 ports { 1608 #address-cells = <1>; 1609 #size-cells = <0>; 1610 1611 port@2 { 1612 #address-cells = <1>; 1613 #size-cells = <0>; 1614 1615 reg = <2>; 1616 1617 vin20isp2: endpoint@2 { 1618 reg = <2>; 1619 remote-endpoint = <&isp2vin20>; 1620 }; 1621 }; 1622 }; 1623 }; 1624 1625 vin21: video@e6ed5000 { 1626 compatible = "renesas,vin-r8a779a0"; 1627 reg = <0 0xe6ed5000 0 0x1000>; 1628 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 1629 clocks = <&cpg CPG_MOD 819>; 1630 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1631 resets = <&cpg 819>; 1632 renesas,id = <21>; 1633 status = "disabled"; 1634 1635 ports { 1636 #address-cells = <1>; 1637 #size-cells = <0>; 1638 1639 port@2 { 1640 #address-cells = <1>; 1641 #size-cells = <0>; 1642 1643 reg = <2>; 1644 1645 vin21isp2: endpoint@2 { 1646 reg = <2>; 1647 remote-endpoint = <&isp2vin21>; 1648 }; 1649 }; 1650 }; 1651 }; 1652 1653 vin22: video@e6ed6000 { 1654 compatible = "renesas,vin-r8a779a0"; 1655 reg = <0 0xe6ed6000 0 0x1000>; 1656 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; 1657 clocks = <&cpg CPG_MOD 820>; 1658 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1659 resets = <&cpg 820>; 1660 renesas,id = <22>; 1661 status = "disabled"; 1662 1663 ports { 1664 #address-cells = <1>; 1665 #size-cells = <0>; 1666 1667 port@2 { 1668 #address-cells = <1>; 1669 #size-cells = <0>; 1670 1671 reg = <2>; 1672 1673 vin22isp2: endpoint@2 { 1674 reg = <2>; 1675 remote-endpoint = <&isp2vin22>; 1676 }; 1677 }; 1678 }; 1679 }; 1680 1681 vin23: video@e6ed7000 { 1682 compatible = "renesas,vin-r8a779a0"; 1683 reg = <0 0xe6ed7000 0 0x1000>; 1684 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; 1685 clocks = <&cpg CPG_MOD 821>; 1686 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1687 resets = <&cpg 821>; 1688 renesas,id = <23>; 1689 status = "disabled"; 1690 1691 ports { 1692 #address-cells = <1>; 1693 #size-cells = <0>; 1694 1695 port@2 { 1696 #address-cells = <1>; 1697 #size-cells = <0>; 1698 1699 reg = <2>; 1700 1701 vin23isp2: endpoint@2 { 1702 reg = <2>; 1703 remote-endpoint = <&isp2vin23>; 1704 }; 1705 }; 1706 }; 1707 }; 1708 1709 vin24: video@e6ed8000 { 1710 compatible = "renesas,vin-r8a779a0"; 1711 reg = <0 0xe6ed8000 0 0x1000>; 1712 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1713 clocks = <&cpg CPG_MOD 822>; 1714 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1715 resets = <&cpg 822>; 1716 renesas,id = <24>; 1717 status = "disabled"; 1718 1719 ports { 1720 #address-cells = <1>; 1721 #size-cells = <0>; 1722 1723 port@2 { 1724 #address-cells = <1>; 1725 #size-cells = <0>; 1726 1727 reg = <2>; 1728 1729 vin24isp3: endpoint@3 { 1730 reg = <3>; 1731 remote-endpoint = <&isp3vin24>; 1732 }; 1733 }; 1734 }; 1735 }; 1736 1737 vin25: video@e6ed9000 { 1738 compatible = "renesas,vin-r8a779a0"; 1739 reg = <0 0xe6ed9000 0 0x1000>; 1740 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; 1741 clocks = <&cpg CPG_MOD 823>; 1742 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1743 resets = <&cpg 823>; 1744 renesas,id = <25>; 1745 status = "disabled"; 1746 1747 ports { 1748 #address-cells = <1>; 1749 #size-cells = <0>; 1750 1751 port@2 { 1752 #address-cells = <1>; 1753 #size-cells = <0>; 1754 1755 reg = <2>; 1756 1757 vin25isp3: endpoint@3 { 1758 reg = <3>; 1759 remote-endpoint = <&isp3vin25>; 1760 }; 1761 }; 1762 }; 1763 }; 1764 1765 vin26: video@e6eda000 { 1766 compatible = "renesas,vin-r8a779a0"; 1767 reg = <0 0xe6eda000 0 0x1000>; 1768 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1769 clocks = <&cpg CPG_MOD 824>; 1770 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1771 resets = <&cpg 824>; 1772 renesas,id = <26>; 1773 status = "disabled"; 1774 1775 ports { 1776 #address-cells = <1>; 1777 #size-cells = <0>; 1778 1779 port@2 { 1780 #address-cells = <1>; 1781 #size-cells = <0>; 1782 1783 reg = <2>; 1784 1785 vin26isp3: endpoint@3 { 1786 reg = <3>; 1787 remote-endpoint = <&isp3vin26>; 1788 }; 1789 }; 1790 }; 1791 }; 1792 1793 vin27: video@e6edb000 { 1794 compatible = "renesas,vin-r8a779a0"; 1795 reg = <0 0xe6edb000 0 0x1000>; 1796 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1797 clocks = <&cpg CPG_MOD 825>; 1798 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1799 resets = <&cpg 825>; 1800 renesas,id = <27>; 1801 status = "disabled"; 1802 1803 ports { 1804 #address-cells = <1>; 1805 #size-cells = <0>; 1806 1807 port@2 { 1808 #address-cells = <1>; 1809 #size-cells = <0>; 1810 1811 reg = <2>; 1812 1813 vin27isp3: endpoint@3 { 1814 reg = <3>; 1815 remote-endpoint = <&isp3vin27>; 1816 }; 1817 }; 1818 }; 1819 }; 1820 1821 vin28: video@e6edc000 { 1822 compatible = "renesas,vin-r8a779a0"; 1823 reg = <0 0xe6edc000 0 0x1000>; 1824 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1825 clocks = <&cpg CPG_MOD 826>; 1826 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1827 resets = <&cpg 826>; 1828 renesas,id = <28>; 1829 status = "disabled"; 1830 1831 ports { 1832 #address-cells = <1>; 1833 #size-cells = <0>; 1834 1835 port@2 { 1836 #address-cells = <1>; 1837 #size-cells = <0>; 1838 1839 reg = <2>; 1840 1841 vin28isp3: endpoint@3 { 1842 reg = <3>; 1843 remote-endpoint = <&isp3vin28>; 1844 }; 1845 }; 1846 }; 1847 }; 1848 1849 vin29: video@e6edd000 { 1850 compatible = "renesas,vin-r8a779a0"; 1851 reg = <0 0xe6edd000 0 0x1000>; 1852 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1853 clocks = <&cpg CPG_MOD 827>; 1854 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1855 resets = <&cpg 827>; 1856 renesas,id = <29>; 1857 status = "disabled"; 1858 1859 ports { 1860 #address-cells = <1>; 1861 #size-cells = <0>; 1862 1863 port@2 { 1864 #address-cells = <1>; 1865 #size-cells = <0>; 1866 1867 reg = <2>; 1868 1869 vin29isp3: endpoint@3 { 1870 reg = <3>; 1871 remote-endpoint = <&isp3vin29>; 1872 }; 1873 }; 1874 }; 1875 }; 1876 1877 vin30: video@e6ede000 { 1878 compatible = "renesas,vin-r8a779a0"; 1879 reg = <0 0xe6ede000 0 0x1000>; 1880 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1881 clocks = <&cpg CPG_MOD 828>; 1882 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1883 resets = <&cpg 828>; 1884 renesas,id = <30>; 1885 status = "disabled"; 1886 1887 ports { 1888 #address-cells = <1>; 1889 #size-cells = <0>; 1890 1891 port@2 { 1892 #address-cells = <1>; 1893 #size-cells = <0>; 1894 1895 reg = <2>; 1896 1897 vin30isp3: endpoint@3 { 1898 reg = <3>; 1899 remote-endpoint = <&isp3vin30>; 1900 }; 1901 }; 1902 }; 1903 }; 1904 1905 vin31: video@e6edf000 { 1906 compatible = "renesas,vin-r8a779a0"; 1907 reg = <0 0xe6edf000 0 0x1000>; 1908 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1909 clocks = <&cpg CPG_MOD 829>; 1910 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1911 resets = <&cpg 829>; 1912 renesas,id = <31>; 1913 status = "disabled"; 1914 1915 ports { 1916 #address-cells = <1>; 1917 #size-cells = <0>; 1918 1919 port@2 { 1920 #address-cells = <1>; 1921 #size-cells = <0>; 1922 1923 reg = <2>; 1924 1925 vin31isp3: endpoint@3 { 1926 reg = <3>; 1927 remote-endpoint = <&isp3vin31>; 1928 }; 1929 }; 1930 }; 1931 }; 1932 1933 dmac1: dma-controller@e7350000 { 1934 compatible = "renesas,dmac-r8a779a0"; 1935 reg = <0 0xe7350000 0 0x1000>, 1936 <0 0xe7300000 0 0x10000>; 1937 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 1938 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 1939 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 1940 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 1941 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 1942 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 1943 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 1944 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 1945 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1946 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1947 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1948 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1949 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1950 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1951 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1952 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1953 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 1954 interrupt-names = "error", 1955 "ch0", "ch1", "ch2", "ch3", "ch4", 1956 "ch5", "ch6", "ch7", "ch8", "ch9", 1957 "ch10", "ch11", "ch12", "ch13", 1958 "ch14", "ch15"; 1959 clocks = <&cpg CPG_MOD 709>; 1960 clock-names = "fck"; 1961 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1962 resets = <&cpg 709>; 1963 #dma-cells = <1>; 1964 dma-channels = <16>; 1965 }; 1966 1967 dmac2: dma-controller@e7351000 { 1968 compatible = "renesas,dmac-r8a779a0"; 1969 reg = <0 0xe7351000 0 0x1000>, 1970 <0 0xe7310000 0 0x10000>; 1971 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 1972 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1973 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1974 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1975 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1976 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1977 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1978 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1979 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 1980 interrupt-names = "error", 1981 "ch0", "ch1", "ch2", "ch3", "ch4", 1982 "ch5", "ch6", "ch7"; 1983 clocks = <&cpg CPG_MOD 710>; 1984 clock-names = "fck"; 1985 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1986 resets = <&cpg 710>; 1987 #dma-cells = <1>; 1988 dma-channels = <8>; 1989 }; 1990 1991 mmc0: mmc@ee140000 { 1992 compatible = "renesas,sdhi-r8a779a0", 1993 "renesas,rcar-gen3-sdhi"; 1994 reg = <0 0xee140000 0 0x2000>; 1995 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>; 1996 clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>; 1997 clock-names = "core", "clkh"; 1998 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1999 resets = <&cpg 706>; 2000 max-frequency = <200000000>; 2001 iommus = <&ipmmu_ds0 32>; 2002 status = "disabled"; 2003 }; 2004 2005 rpc: spi@ee200000 { 2006 compatible = "renesas,r8a779a0-rpc-if", 2007 "renesas,rcar-gen3-rpc-if"; 2008 reg = <0 0xee200000 0 0x200>, 2009 <0 0x08000000 0 0x04000000>, 2010 <0 0xee208000 0 0x100>; 2011 reg-names = "regs", "dirmap", "wbuf"; 2012 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 2013 clocks = <&cpg CPG_MOD 629>; 2014 clock-names = "rpc"; 2015 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2016 resets = <&cpg 629>; 2017 #address-cells = <1>; 2018 #size-cells = <0>; 2019 status = "disabled"; 2020 }; 2021 2022 ipmmu_rt0: iommu@ee480000 { 2023 compatible = "renesas,ipmmu-r8a779a0"; 2024 reg = <0 0xee480000 0 0x20000>; 2025 renesas,ipmmu-main = <&ipmmu_mm 10>; 2026 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2027 #iommu-cells = <1>; 2028 }; 2029 2030 ipmmu_rt1: iommu@ee4c0000 { 2031 compatible = "renesas,ipmmu-r8a779a0"; 2032 reg = <0 0xee4c0000 0 0x20000>; 2033 renesas,ipmmu-main = <&ipmmu_mm 19>; 2034 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2035 #iommu-cells = <1>; 2036 }; 2037 2038 ipmmu_ds0: iommu@eed00000 { 2039 compatible = "renesas,ipmmu-r8a779a0"; 2040 reg = <0 0xeed00000 0 0x20000>; 2041 renesas,ipmmu-main = <&ipmmu_mm 0>; 2042 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2043 #iommu-cells = <1>; 2044 }; 2045 2046 ipmmu_ds1: iommu@eed40000 { 2047 compatible = "renesas,ipmmu-r8a779a0"; 2048 reg = <0 0xeed40000 0 0x20000>; 2049 renesas,ipmmu-main = <&ipmmu_mm 1>; 2050 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2051 #iommu-cells = <1>; 2052 }; 2053 2054 ipmmu_ir: iommu@eed80000 { 2055 compatible = "renesas,ipmmu-r8a779a0"; 2056 reg = <0 0xeed80000 0 0x20000>; 2057 renesas,ipmmu-main = <&ipmmu_mm 3>; 2058 power-domains = <&sysc R8A779A0_PD_A3IR>; 2059 #iommu-cells = <1>; 2060 }; 2061 2062 ipmmu_vc0: iommu@eedc0000 { 2063 compatible = "renesas,ipmmu-r8a779a0"; 2064 reg = <0 0xeedc0000 0 0x20000>; 2065 renesas,ipmmu-main = <&ipmmu_mm 12>; 2066 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2067 #iommu-cells = <1>; 2068 }; 2069 2070 ipmmu_vi0: iommu@eee80000 { 2071 compatible = "renesas,ipmmu-r8a779a0"; 2072 reg = <0 0xeee80000 0 0x20000>; 2073 renesas,ipmmu-main = <&ipmmu_mm 14>; 2074 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2075 #iommu-cells = <1>; 2076 }; 2077 2078 ipmmu_vi1: iommu@eeec0000 { 2079 compatible = "renesas,ipmmu-r8a779a0"; 2080 reg = <0 0xeeec0000 0 0x20000>; 2081 renesas,ipmmu-main = <&ipmmu_mm 15>; 2082 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2083 #iommu-cells = <1>; 2084 }; 2085 2086 ipmmu_3dg: iommu@eee00000 { 2087 compatible = "renesas,ipmmu-r8a779a0"; 2088 reg = <0 0xeee00000 0 0x20000>; 2089 renesas,ipmmu-main = <&ipmmu_mm 6>; 2090 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2091 #iommu-cells = <1>; 2092 }; 2093 2094 ipmmu_vip0: iommu@eef00000 { 2095 compatible = "renesas,ipmmu-r8a779a0"; 2096 reg = <0 0xeef00000 0 0x20000>; 2097 renesas,ipmmu-main = <&ipmmu_mm 5>; 2098 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2099 #iommu-cells = <1>; 2100 }; 2101 2102 ipmmu_vip1: iommu@eef40000 { 2103 compatible = "renesas,ipmmu-r8a779a0"; 2104 reg = <0 0xeef40000 0 0x20000>; 2105 renesas,ipmmu-main = <&ipmmu_mm 11>; 2106 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2107 #iommu-cells = <1>; 2108 }; 2109 2110 ipmmu_mm: iommu@eefc0000 { 2111 compatible = "renesas,ipmmu-r8a779a0"; 2112 reg = <0 0xeefc0000 0 0x20000>; 2113 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 2114 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 2115 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2116 #iommu-cells = <1>; 2117 }; 2118 2119 gic: interrupt-controller@f1000000 { 2120 compatible = "arm,gic-v3"; 2121 #interrupt-cells = <3>; 2122 #address-cells = <0>; 2123 interrupt-controller; 2124 reg = <0x0 0xf1000000 0 0x20000>, 2125 <0x0 0xf1060000 0 0x110000>; 2126 interrupts = <GIC_PPI 9 2127 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 2128 }; 2129 2130 fcpvd0: fcp@fea10000 { 2131 compatible = "renesas,fcpv"; 2132 reg = <0 0xfea10000 0 0x200>; 2133 clocks = <&cpg CPG_MOD 508>; 2134 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2135 resets = <&cpg 508>; 2136 }; 2137 2138 fcpvd1: fcp@fea11000 { 2139 compatible = "renesas,fcpv"; 2140 reg = <0 0xfea11000 0 0x200>; 2141 clocks = <&cpg CPG_MOD 509>; 2142 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2143 resets = <&cpg 509>; 2144 }; 2145 2146 vspd0: vsp@fea20000 { 2147 compatible = "renesas,vsp2"; 2148 reg = <0 0xfea20000 0 0x5000>; 2149 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; 2150 clocks = <&cpg CPG_MOD 830>; 2151 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2152 resets = <&cpg 830>; 2153 2154 renesas,fcp = <&fcpvd0>; 2155 }; 2156 2157 vspd1: vsp@fea28000 { 2158 compatible = "renesas,vsp2"; 2159 reg = <0 0xfea28000 0 0x5000>; 2160 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; 2161 clocks = <&cpg CPG_MOD 831>; 2162 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2163 resets = <&cpg 831>; 2164 2165 renesas,fcp = <&fcpvd1>; 2166 }; 2167 2168 csi40: csi2@feaa0000 { 2169 compatible = "renesas,r8a779a0-csi2"; 2170 reg = <0 0xfeaa0000 0 0x10000>; 2171 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2172 clocks = <&cpg CPG_MOD 331>; 2173 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2174 resets = <&cpg 331>; 2175 status = "disabled"; 2176 2177 ports { 2178 #address-cells = <1>; 2179 #size-cells = <0>; 2180 2181 port@0 { 2182 reg = <0>; 2183 }; 2184 2185 port@1 { 2186 reg = <1>; 2187 csi40isp0: endpoint { 2188 remote-endpoint = <&isp0csi40>; 2189 }; 2190 }; 2191 }; 2192 }; 2193 2194 csi41: csi2@feab0000 { 2195 compatible = "renesas,r8a779a0-csi2"; 2196 reg = <0 0xfeab0000 0 0x10000>; 2197 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2198 clocks = <&cpg CPG_MOD 400>; 2199 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2200 resets = <&cpg 400>; 2201 status = "disabled"; 2202 2203 ports { 2204 #address-cells = <1>; 2205 #size-cells = <0>; 2206 2207 port@0 { 2208 reg = <0>; 2209 }; 2210 2211 port@1 { 2212 reg = <1>; 2213 csi41isp1: endpoint { 2214 remote-endpoint = <&isp1csi41>; 2215 }; 2216 }; 2217 }; 2218 }; 2219 2220 csi42: csi2@fed60000 { 2221 compatible = "renesas,r8a779a0-csi2"; 2222 reg = <0 0xfed60000 0 0x10000>; 2223 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 2224 clocks = <&cpg CPG_MOD 401>; 2225 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2226 resets = <&cpg 401>; 2227 status = "disabled"; 2228 2229 ports { 2230 #address-cells = <1>; 2231 #size-cells = <0>; 2232 2233 port@0 { 2234 reg = <0>; 2235 }; 2236 2237 port@1 { 2238 reg = <1>; 2239 csi42isp2: endpoint { 2240 remote-endpoint = <&isp2csi42>; 2241 }; 2242 }; 2243 }; 2244 }; 2245 2246 csi43: csi2@fed70000 { 2247 compatible = "renesas,r8a779a0-csi2"; 2248 reg = <0 0xfed70000 0 0x10000>; 2249 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 2250 clocks = <&cpg CPG_MOD 402>; 2251 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2252 resets = <&cpg 402>; 2253 status = "disabled"; 2254 2255 ports { 2256 #address-cells = <1>; 2257 #size-cells = <0>; 2258 2259 port@0 { 2260 reg = <0>; 2261 }; 2262 2263 port@1 { 2264 reg = <1>; 2265 csi43isp3: endpoint { 2266 remote-endpoint = <&isp3csi43>; 2267 }; 2268 }; 2269 }; 2270 }; 2271 2272 du: display@feb00000 { 2273 compatible = "renesas,du-r8a779a0"; 2274 reg = <0 0xfeb00000 0 0x40000>; 2275 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 2276 <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 2277 clocks = <&cpg CPG_MOD 411>; 2278 clock-names = "du.0"; 2279 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2280 resets = <&cpg 411>; 2281 reset-names = "du.0"; 2282 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2283 2284 status = "disabled"; 2285 2286 ports { 2287 #address-cells = <1>; 2288 #size-cells = <0>; 2289 2290 port@0 { 2291 reg = <0>; 2292 du_out_dsi0: endpoint { 2293 remote-endpoint = <&dsi0_in>; 2294 }; 2295 }; 2296 2297 port@1 { 2298 reg = <1>; 2299 du_out_dsi1: endpoint { 2300 remote-endpoint = <&dsi1_in>; 2301 }; 2302 }; 2303 }; 2304 }; 2305 2306 isp0: isp@fed00000 { 2307 compatible = "renesas,r8a779a0-isp"; 2308 reg = <0 0xfed00000 0 0x10000>; 2309 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 2310 clocks = <&cpg CPG_MOD 612>; 2311 power-domains = <&sysc R8A779A0_PD_A3ISP01>; 2312 resets = <&cpg 612>; 2313 status = "disabled"; 2314 2315 ports { 2316 #address-cells = <1>; 2317 #size-cells = <0>; 2318 2319 port@0 { 2320 #address-cells = <1>; 2321 #size-cells = <0>; 2322 2323 reg = <0>; 2324 2325 isp0csi40: endpoint@0 { 2326 reg = <0>; 2327 remote-endpoint = <&csi40isp0>; 2328 }; 2329 }; 2330 2331 port@1 { 2332 reg = <1>; 2333 isp0vin00: endpoint { 2334 remote-endpoint = <&vin00isp0>; 2335 }; 2336 }; 2337 2338 port@2 { 2339 reg = <2>; 2340 isp0vin01: endpoint { 2341 remote-endpoint = <&vin01isp0>; 2342 }; 2343 }; 2344 2345 port@3 { 2346 reg = <3>; 2347 isp0vin02: endpoint { 2348 remote-endpoint = <&vin02isp0>; 2349 }; 2350 }; 2351 2352 port@4 { 2353 reg = <4>; 2354 isp0vin03: endpoint { 2355 remote-endpoint = <&vin03isp0>; 2356 }; 2357 }; 2358 2359 port@5 { 2360 reg = <5>; 2361 isp0vin04: endpoint { 2362 remote-endpoint = <&vin04isp0>; 2363 }; 2364 }; 2365 2366 port@6 { 2367 reg = <6>; 2368 isp0vin05: endpoint { 2369 remote-endpoint = <&vin05isp0>; 2370 }; 2371 }; 2372 2373 port@7 { 2374 reg = <7>; 2375 isp0vin06: endpoint { 2376 remote-endpoint = <&vin06isp0>; 2377 }; 2378 }; 2379 2380 port@8 { 2381 reg = <8>; 2382 isp0vin07: endpoint { 2383 remote-endpoint = <&vin07isp0>; 2384 }; 2385 }; 2386 }; 2387 }; 2388 2389 isp1: isp@fed20000 { 2390 compatible = "renesas,r8a779a0-isp"; 2391 reg = <0 0xfed20000 0 0x10000>; 2392 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 2393 clocks = <&cpg CPG_MOD 613>; 2394 power-domains = <&sysc R8A779A0_PD_A3ISP01>; 2395 resets = <&cpg 613>; 2396 status = "disabled"; 2397 2398 ports { 2399 #address-cells = <1>; 2400 #size-cells = <0>; 2401 2402 port@0 { 2403 #address-cells = <1>; 2404 #size-cells = <0>; 2405 2406 reg = <0>; 2407 2408 isp1csi41: endpoint@1 { 2409 reg = <1>; 2410 remote-endpoint = <&csi41isp1>; 2411 }; 2412 }; 2413 2414 port@1 { 2415 reg = <1>; 2416 isp1vin08: endpoint { 2417 remote-endpoint = <&vin08isp1>; 2418 }; 2419 }; 2420 2421 port@2 { 2422 reg = <2>; 2423 isp1vin09: endpoint { 2424 remote-endpoint = <&vin09isp1>; 2425 }; 2426 }; 2427 2428 port@3 { 2429 reg = <3>; 2430 isp1vin10: endpoint { 2431 remote-endpoint = <&vin10isp1>; 2432 }; 2433 }; 2434 2435 port@4 { 2436 reg = <4>; 2437 isp1vin11: endpoint { 2438 remote-endpoint = <&vin11isp1>; 2439 }; 2440 }; 2441 2442 port@5 { 2443 reg = <5>; 2444 isp1vin12: endpoint { 2445 remote-endpoint = <&vin12isp1>; 2446 }; 2447 }; 2448 2449 port@6 { 2450 reg = <6>; 2451 isp1vin13: endpoint { 2452 remote-endpoint = <&vin13isp1>; 2453 }; 2454 }; 2455 2456 port@7 { 2457 reg = <7>; 2458 isp1vin14: endpoint { 2459 remote-endpoint = <&vin14isp1>; 2460 }; 2461 }; 2462 2463 port@8 { 2464 reg = <8>; 2465 isp1vin15: endpoint { 2466 remote-endpoint = <&vin15isp1>; 2467 }; 2468 }; 2469 }; 2470 }; 2471 2472 isp2: isp@fed30000 { 2473 compatible = "renesas,r8a779a0-isp"; 2474 reg = <0 0xfed30000 0 0x10000>; 2475 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 2476 clocks = <&cpg CPG_MOD 614>; 2477 power-domains = <&sysc R8A779A0_PD_A3ISP23>; 2478 resets = <&cpg 614>; 2479 status = "disabled"; 2480 2481 ports { 2482 #address-cells = <1>; 2483 #size-cells = <0>; 2484 2485 port@0 { 2486 #address-cells = <1>; 2487 #size-cells = <0>; 2488 2489 reg = <0>; 2490 2491 isp2csi42: endpoint@0 { 2492 reg = <0>; 2493 remote-endpoint = <&csi42isp2>; 2494 }; 2495 }; 2496 2497 port@1 { 2498 reg = <1>; 2499 isp2vin16: endpoint { 2500 remote-endpoint = <&vin16isp2>; 2501 }; 2502 }; 2503 2504 port@2 { 2505 reg = <2>; 2506 isp2vin17: endpoint { 2507 remote-endpoint = <&vin17isp2>; 2508 }; 2509 }; 2510 2511 port@3 { 2512 reg = <3>; 2513 isp2vin18: endpoint { 2514 remote-endpoint = <&vin18isp2>; 2515 }; 2516 }; 2517 2518 port@4 { 2519 reg = <4>; 2520 isp2vin19: endpoint { 2521 remote-endpoint = <&vin19isp2>; 2522 }; 2523 }; 2524 2525 port@5 { 2526 reg = <5>; 2527 isp2vin20: endpoint { 2528 remote-endpoint = <&vin20isp2>; 2529 }; 2530 }; 2531 2532 port@6 { 2533 reg = <6>; 2534 isp2vin21: endpoint { 2535 remote-endpoint = <&vin21isp2>; 2536 }; 2537 }; 2538 2539 port@7 { 2540 reg = <7>; 2541 isp2vin22: endpoint { 2542 remote-endpoint = <&vin22isp2>; 2543 }; 2544 }; 2545 2546 port@8 { 2547 reg = <8>; 2548 isp2vin23: endpoint { 2549 remote-endpoint = <&vin23isp2>; 2550 }; 2551 }; 2552 }; 2553 }; 2554 2555 isp3: isp@fed40000 { 2556 compatible = "renesas,r8a779a0-isp"; 2557 reg = <0 0xfed40000 0 0x10000>; 2558 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 2559 clocks = <&cpg CPG_MOD 615>; 2560 power-domains = <&sysc R8A779A0_PD_A3ISP23>; 2561 resets = <&cpg 615>; 2562 status = "disabled"; 2563 2564 ports { 2565 #address-cells = <1>; 2566 #size-cells = <0>; 2567 2568 port@0 { 2569 #address-cells = <1>; 2570 #size-cells = <0>; 2571 2572 reg = <0>; 2573 2574 isp3csi43: endpoint@1 { 2575 reg = <1>; 2576 remote-endpoint = <&csi43isp3>; 2577 }; 2578 }; 2579 2580 port@1 { 2581 reg = <1>; 2582 isp3vin24: endpoint { 2583 remote-endpoint = <&vin24isp3>; 2584 }; 2585 }; 2586 2587 port@2 { 2588 reg = <2>; 2589 isp3vin25: endpoint { 2590 remote-endpoint = <&vin25isp3>; 2591 }; 2592 }; 2593 2594 port@3 { 2595 reg = <3>; 2596 isp3vin26: endpoint { 2597 remote-endpoint = <&vin26isp3>; 2598 }; 2599 }; 2600 2601 port@4 { 2602 reg = <4>; 2603 isp3vin27: endpoint { 2604 remote-endpoint = <&vin27isp3>; 2605 }; 2606 }; 2607 2608 port@5 { 2609 reg = <5>; 2610 isp3vin28: endpoint { 2611 remote-endpoint = <&vin28isp3>; 2612 }; 2613 }; 2614 2615 port@6 { 2616 reg = <6>; 2617 isp3vin29: endpoint { 2618 remote-endpoint = <&vin29isp3>; 2619 }; 2620 }; 2621 2622 port@7 { 2623 reg = <7>; 2624 isp3vin30: endpoint { 2625 remote-endpoint = <&vin30isp3>; 2626 }; 2627 }; 2628 2629 port@8 { 2630 reg = <8>; 2631 isp3vin31: endpoint { 2632 remote-endpoint = <&vin31isp3>; 2633 }; 2634 }; 2635 }; 2636 }; 2637 2638 dsi0: dsi-encoder@fed80000 { 2639 compatible = "renesas,r8a779a0-dsi-csi2-tx"; 2640 reg = <0 0xfed80000 0 0x10000>; 2641 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2642 clocks = <&cpg CPG_MOD 415>, 2643 <&cpg CPG_CORE R8A779A0_CLK_DSI>, 2644 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; 2645 clock-names = "fck", "dsi", "pll"; 2646 resets = <&cpg 415>; 2647 status = "disabled"; 2648 2649 ports { 2650 #address-cells = <1>; 2651 #size-cells = <0>; 2652 2653 port@0 { 2654 reg = <0>; 2655 dsi0_in: endpoint { 2656 remote-endpoint = <&du_out_dsi0>; 2657 }; 2658 }; 2659 2660 port@1 { 2661 reg = <1>; 2662 }; 2663 }; 2664 }; 2665 2666 dsi1: dsi-encoder@fed90000 { 2667 compatible = "renesas,r8a779a0-dsi-csi2-tx"; 2668 reg = <0 0xfed90000 0 0x10000>; 2669 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2670 clocks = <&cpg CPG_MOD 416>, 2671 <&cpg CPG_CORE R8A779A0_CLK_DSI>, 2672 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; 2673 clock-names = "fck", "dsi", "pll"; 2674 resets = <&cpg 416>; 2675 status = "disabled"; 2676 2677 ports { 2678 #address-cells = <1>; 2679 #size-cells = <0>; 2680 2681 port@0 { 2682 reg = <0>; 2683 dsi1_in: endpoint { 2684 remote-endpoint = <&du_out_dsi1>; 2685 }; 2686 }; 2687 2688 port@1 { 2689 reg = <1>; 2690 }; 2691 }; 2692 }; 2693 2694 prr: chipid@fff00044 { 2695 compatible = "renesas,prr"; 2696 reg = <0 0xfff00044 0 4>; 2697 }; 2698 }; 2699 2700 thermal-zones { 2701 sensor1_thermal: sensor1-thermal { 2702 polling-delay-passive = <250>; 2703 polling-delay = <1000>; 2704 thermal-sensors = <&tsc 0>; 2705 2706 trips { 2707 sensor1_crit: sensor1-crit { 2708 temperature = <120000>; 2709 hysteresis = <1000>; 2710 type = "critical"; 2711 }; 2712 }; 2713 }; 2714 2715 sensor2_thermal: sensor2-thermal { 2716 polling-delay-passive = <250>; 2717 polling-delay = <1000>; 2718 thermal-sensors = <&tsc 1>; 2719 2720 trips { 2721 sensor2_crit: sensor2-crit { 2722 temperature = <120000>; 2723 hysteresis = <1000>; 2724 type = "critical"; 2725 }; 2726 }; 2727 }; 2728 2729 sensor3_thermal: sensor3-thermal { 2730 polling-delay-passive = <250>; 2731 polling-delay = <1000>; 2732 thermal-sensors = <&tsc 2>; 2733 2734 trips { 2735 sensor3_crit: sensor3-crit { 2736 temperature = <120000>; 2737 hysteresis = <1000>; 2738 type = "critical"; 2739 }; 2740 }; 2741 }; 2742 2743 sensor4_thermal: sensor4-thermal { 2744 polling-delay-passive = <250>; 2745 polling-delay = <1000>; 2746 thermal-sensors = <&tsc 3>; 2747 2748 trips { 2749 sensor4_crit: sensor4-crit { 2750 temperature = <120000>; 2751 hysteresis = <1000>; 2752 type = "critical"; 2753 }; 2754 }; 2755 }; 2756 2757 sensor5_thermal: sensor5-thermal { 2758 polling-delay-passive = <250>; 2759 polling-delay = <1000>; 2760 thermal-sensors = <&tsc 4>; 2761 2762 trips { 2763 sensor5_crit: sensor5-crit { 2764 temperature = <120000>; 2765 hysteresis = <1000>; 2766 type = "critical"; 2767 }; 2768 }; 2769 }; 2770 }; 2771 2772 timer { 2773 compatible = "arm,armv8-timer"; 2774 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2775 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2776 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2777 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 2778 }; 2779}; 2780