1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a77990-sysc.h>
11
12/ {
13	compatible = "renesas,r8a77990";
14	#address-cells = <2>;
15	#size-cells = <2>;
16
17	/*
18	 * The external audio clocks are configured as 0 Hz fixed frequency
19	 * clocks by default.
20	 * Boards that provide audio clocks should override them.
21	 */
22	audio_clk_a: audio_clk_a {
23		compatible = "fixed-clock";
24		#clock-cells = <0>;
25		clock-frequency = <0>;
26	};
27
28	audio_clk_b: audio_clk_b {
29		compatible = "fixed-clock";
30		#clock-cells = <0>;
31		clock-frequency = <0>;
32	};
33
34	audio_clk_c: audio_clk_c {
35		compatible = "fixed-clock";
36		#clock-cells = <0>;
37		clock-frequency = <0>;
38	};
39
40	/* External CAN clock - to be overridden by boards that provide it */
41	can_clk: can {
42		compatible = "fixed-clock";
43		#clock-cells = <0>;
44		clock-frequency = <0>;
45	};
46
47	cluster1_opp: opp-table-1 {
48		compatible = "operating-points-v2";
49		opp-shared;
50		opp-800000000 {
51			opp-hz = /bits/ 64 <800000000>;
52			opp-microvolt = <820000>;
53			clock-latency-ns = <300000>;
54		};
55		opp-1000000000 {
56			opp-hz = /bits/ 64 <1000000000>;
57			opp-microvolt = <820000>;
58			clock-latency-ns = <300000>;
59		};
60		opp-1200000000 {
61			opp-hz = /bits/ 64 <1200000000>;
62			opp-microvolt = <820000>;
63			clock-latency-ns = <300000>;
64			opp-suspend;
65		};
66	};
67
68	cpus {
69		#address-cells = <1>;
70		#size-cells = <0>;
71
72		a53_0: cpu@0 {
73			compatible = "arm,cortex-a53";
74			reg = <0>;
75			device_type = "cpu";
76			#cooling-cells = <2>;
77			power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
78			next-level-cache = <&L2_CA53>;
79			enable-method = "psci";
80			cpu-idle-states = <&CPU_SLEEP_0>;
81			dynamic-power-coefficient = <277>;
82			clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
83			operating-points-v2 = <&cluster1_opp>;
84		};
85
86		a53_1: cpu@1 {
87			compatible = "arm,cortex-a53";
88			reg = <1>;
89			device_type = "cpu";
90			power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
91			next-level-cache = <&L2_CA53>;
92			enable-method = "psci";
93			cpu-idle-states = <&CPU_SLEEP_0>;
94			clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
95			operating-points-v2 = <&cluster1_opp>;
96		};
97
98		L2_CA53: cache-controller-0 {
99			compatible = "cache";
100			power-domains = <&sysc R8A77990_PD_CA53_SCU>;
101			cache-unified;
102			cache-level = <2>;
103		};
104
105		idle-states {
106			entry-method = "psci";
107
108			CPU_SLEEP_0: cpu-sleep-0 {
109				compatible = "arm,idle-state";
110				arm,psci-suspend-param = <0x0010000>;
111				local-timer-stop;
112				entry-latency-us = <700>;
113				exit-latency-us = <700>;
114				min-residency-us = <5000>;
115			};
116		};
117	};
118
119	extal_clk: extal {
120		compatible = "fixed-clock";
121		#clock-cells = <0>;
122		/* This value must be overridden by the board */
123		clock-frequency = <0>;
124	};
125
126	/* External PCIe clock - can be overridden by the board */
127	pcie_bus_clk: pcie_bus {
128		compatible = "fixed-clock";
129		#clock-cells = <0>;
130		clock-frequency = <0>;
131	};
132
133	pmu_a53 {
134		compatible = "arm,cortex-a53-pmu";
135		interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
136				      <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
137		interrupt-affinity = <&a53_0>, <&a53_1>;
138	};
139
140	psci {
141		compatible = "arm,psci-1.0", "arm,psci-0.2";
142		method = "smc";
143	};
144
145	/* External SCIF clock - to be overridden by boards that provide it */
146	scif_clk: scif {
147		compatible = "fixed-clock";
148		#clock-cells = <0>;
149		clock-frequency = <0>;
150	};
151
152	soc: soc {
153		compatible = "simple-bus";
154		interrupt-parent = <&gic>;
155		#address-cells = <2>;
156		#size-cells = <2>;
157		ranges;
158
159		rwdt: watchdog@e6020000 {
160			compatible = "renesas,r8a77990-wdt",
161				     "renesas,rcar-gen3-wdt";
162			reg = <0 0xe6020000 0 0x0c>;
163			interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
164			clocks = <&cpg CPG_MOD 402>;
165			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
166			resets = <&cpg 402>;
167			status = "disabled";
168		};
169
170		gpio0: gpio@e6050000 {
171			compatible = "renesas,gpio-r8a77990",
172				     "renesas,rcar-gen3-gpio";
173			reg = <0 0xe6050000 0 0x50>;
174			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
175			#gpio-cells = <2>;
176			gpio-controller;
177			gpio-ranges = <&pfc 0 0 18>;
178			#interrupt-cells = <2>;
179			interrupt-controller;
180			clocks = <&cpg CPG_MOD 912>;
181			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
182			resets = <&cpg 912>;
183		};
184
185		gpio1: gpio@e6051000 {
186			compatible = "renesas,gpio-r8a77990",
187				     "renesas,rcar-gen3-gpio";
188			reg = <0 0xe6051000 0 0x50>;
189			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
190			#gpio-cells = <2>;
191			gpio-controller;
192			gpio-ranges = <&pfc 0 32 23>;
193			#interrupt-cells = <2>;
194			interrupt-controller;
195			clocks = <&cpg CPG_MOD 911>;
196			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
197			resets = <&cpg 911>;
198		};
199
200		gpio2: gpio@e6052000 {
201			compatible = "renesas,gpio-r8a77990",
202				     "renesas,rcar-gen3-gpio";
203			reg = <0 0xe6052000 0 0x50>;
204			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
205			#gpio-cells = <2>;
206			gpio-controller;
207			gpio-ranges = <&pfc 0 64 26>;
208			#interrupt-cells = <2>;
209			interrupt-controller;
210			clocks = <&cpg CPG_MOD 910>;
211			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
212			resets = <&cpg 910>;
213		};
214
215		gpio3: gpio@e6053000 {
216			compatible = "renesas,gpio-r8a77990",
217				     "renesas,rcar-gen3-gpio";
218			reg = <0 0xe6053000 0 0x50>;
219			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
220			#gpio-cells = <2>;
221			gpio-controller;
222			gpio-ranges = <&pfc 0 96 16>;
223			#interrupt-cells = <2>;
224			interrupt-controller;
225			clocks = <&cpg CPG_MOD 909>;
226			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
227			resets = <&cpg 909>;
228		};
229
230		gpio4: gpio@e6054000 {
231			compatible = "renesas,gpio-r8a77990",
232				     "renesas,rcar-gen3-gpio";
233			reg = <0 0xe6054000 0 0x50>;
234			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
235			#gpio-cells = <2>;
236			gpio-controller;
237			gpio-ranges = <&pfc 0 128 11>;
238			#interrupt-cells = <2>;
239			interrupt-controller;
240			clocks = <&cpg CPG_MOD 908>;
241			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
242			resets = <&cpg 908>;
243		};
244
245		gpio5: gpio@e6055000 {
246			compatible = "renesas,gpio-r8a77990",
247				     "renesas,rcar-gen3-gpio";
248			reg = <0 0xe6055000 0 0x50>;
249			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
250			#gpio-cells = <2>;
251			gpio-controller;
252			gpio-ranges = <&pfc 0 160 20>;
253			#interrupt-cells = <2>;
254			interrupt-controller;
255			clocks = <&cpg CPG_MOD 907>;
256			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
257			resets = <&cpg 907>;
258		};
259
260		gpio6: gpio@e6055400 {
261			compatible = "renesas,gpio-r8a77990",
262				     "renesas,rcar-gen3-gpio";
263			reg = <0 0xe6055400 0 0x50>;
264			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
265			#gpio-cells = <2>;
266			gpio-controller;
267			gpio-ranges = <&pfc 0 192 18>;
268			#interrupt-cells = <2>;
269			interrupt-controller;
270			clocks = <&cpg CPG_MOD 906>;
271			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
272			resets = <&cpg 906>;
273		};
274
275		pfc: pinctrl@e6060000 {
276			compatible = "renesas,pfc-r8a77990";
277			reg = <0 0xe6060000 0 0x508>;
278		};
279
280		i2c_dvfs: i2c@e60b0000 {
281			#address-cells = <1>;
282			#size-cells = <0>;
283			compatible = "renesas,iic-r8a77990",
284				     "renesas,rcar-gen3-iic",
285				     "renesas,rmobile-iic";
286			reg = <0 0xe60b0000 0 0x425>;
287			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
288			clocks = <&cpg CPG_MOD 926>;
289			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
290			resets = <&cpg 926>;
291			dmas = <&dmac0 0x11>, <&dmac0 0x10>;
292			dma-names = "tx", "rx";
293			status = "disabled";
294		};
295
296		cmt0: timer@e60f0000 {
297			compatible = "renesas,r8a77990-cmt0",
298				     "renesas,rcar-gen3-cmt0";
299			reg = <0 0xe60f0000 0 0x1004>;
300			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
301				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
302			clocks = <&cpg CPG_MOD 303>;
303			clock-names = "fck";
304			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
305			resets = <&cpg 303>;
306			status = "disabled";
307		};
308
309		cmt1: timer@e6130000 {
310			compatible = "renesas,r8a77990-cmt1",
311				     "renesas,rcar-gen3-cmt1";
312			reg = <0 0xe6130000 0 0x1004>;
313			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
314				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
315				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
316				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
317				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
318				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
319				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
320				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
321			clocks = <&cpg CPG_MOD 302>;
322			clock-names = "fck";
323			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
324			resets = <&cpg 302>;
325			status = "disabled";
326		};
327
328		cmt2: timer@e6140000 {
329			compatible = "renesas,r8a77990-cmt1",
330				     "renesas,rcar-gen3-cmt1";
331			reg = <0 0xe6140000 0 0x1004>;
332			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
333				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
334				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
335				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
336				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
337				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
338				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
339				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
340			clocks = <&cpg CPG_MOD 301>;
341			clock-names = "fck";
342			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
343			resets = <&cpg 301>;
344			status = "disabled";
345		};
346
347		cmt3: timer@e6148000 {
348			compatible = "renesas,r8a77990-cmt1",
349				     "renesas,rcar-gen3-cmt1";
350			reg = <0 0xe6148000 0 0x1004>;
351			interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
352				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
353				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
354				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
355				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
356				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
357				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
358				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
359			clocks = <&cpg CPG_MOD 300>;
360			clock-names = "fck";
361			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
362			resets = <&cpg 300>;
363			status = "disabled";
364		};
365
366		cpg: clock-controller@e6150000 {
367			compatible = "renesas,r8a77990-cpg-mssr";
368			reg = <0 0xe6150000 0 0x1000>;
369			clocks = <&extal_clk>;
370			clock-names = "extal";
371			#clock-cells = <2>;
372			#power-domain-cells = <0>;
373			#reset-cells = <1>;
374		};
375
376		rst: reset-controller@e6160000 {
377			compatible = "renesas,r8a77990-rst";
378			reg = <0 0xe6160000 0 0x0200>;
379		};
380
381		sysc: system-controller@e6180000 {
382			compatible = "renesas,r8a77990-sysc";
383			reg = <0 0xe6180000 0 0x0400>;
384			#power-domain-cells = <1>;
385		};
386
387		thermal: thermal@e6190000 {
388			compatible = "renesas,thermal-r8a77990";
389			reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
390			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
391				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
392				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
393			clocks = <&cpg CPG_MOD 522>;
394			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
395			resets = <&cpg 522>;
396			#thermal-sensor-cells = <0>;
397		};
398
399		intc_ex: interrupt-controller@e61c0000 {
400			compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
401			#interrupt-cells = <2>;
402			interrupt-controller;
403			reg = <0 0xe61c0000 0 0x200>;
404			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
405				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
406				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
407				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
408				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
409				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
410			clocks = <&cpg CPG_MOD 407>;
411			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
412			resets = <&cpg 407>;
413		};
414
415		tmu0: timer@e61e0000 {
416			compatible = "renesas,tmu-r8a77990", "renesas,tmu";
417			reg = <0 0xe61e0000 0 0x30>;
418			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
419				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
420				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
421			clocks = <&cpg CPG_MOD 125>;
422			clock-names = "fck";
423			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
424			resets = <&cpg 125>;
425			status = "disabled";
426		};
427
428		tmu1: timer@e6fc0000 {
429			compatible = "renesas,tmu-r8a77990", "renesas,tmu";
430			reg = <0 0xe6fc0000 0 0x30>;
431			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
432				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
433				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
434			clocks = <&cpg CPG_MOD 124>;
435			clock-names = "fck";
436			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
437			resets = <&cpg 124>;
438			status = "disabled";
439		};
440
441		tmu2: timer@e6fd0000 {
442			compatible = "renesas,tmu-r8a77990", "renesas,tmu";
443			reg = <0 0xe6fd0000 0 0x30>;
444			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
445				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
446				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
447			clocks = <&cpg CPG_MOD 123>;
448			clock-names = "fck";
449			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
450			resets = <&cpg 123>;
451			status = "disabled";
452		};
453
454		tmu3: timer@e6fe0000 {
455			compatible = "renesas,tmu-r8a77990", "renesas,tmu";
456			reg = <0 0xe6fe0000 0 0x30>;
457			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
458				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
459				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
460			clocks = <&cpg CPG_MOD 122>;
461			clock-names = "fck";
462			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
463			resets = <&cpg 122>;
464			status = "disabled";
465		};
466
467		tmu4: timer@ffc00000 {
468			compatible = "renesas,tmu-r8a77990", "renesas,tmu";
469			reg = <0 0xffc00000 0 0x30>;
470			interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
471				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
472				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
473			clocks = <&cpg CPG_MOD 121>;
474			clock-names = "fck";
475			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
476			resets = <&cpg 121>;
477			status = "disabled";
478		};
479
480		i2c0: i2c@e6500000 {
481			#address-cells = <1>;
482			#size-cells = <0>;
483			compatible = "renesas,i2c-r8a77990",
484				     "renesas,rcar-gen3-i2c";
485			reg = <0 0xe6500000 0 0x40>;
486			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
487			clocks = <&cpg CPG_MOD 931>;
488			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
489			resets = <&cpg 931>;
490			dmas = <&dmac1 0x91>, <&dmac1 0x90>,
491			       <&dmac2 0x91>, <&dmac2 0x90>;
492			dma-names = "tx", "rx", "tx", "rx";
493			i2c-scl-internal-delay-ns = <110>;
494			status = "disabled";
495		};
496
497		i2c1: i2c@e6508000 {
498			#address-cells = <1>;
499			#size-cells = <0>;
500			compatible = "renesas,i2c-r8a77990",
501				     "renesas,rcar-gen3-i2c";
502			reg = <0 0xe6508000 0 0x40>;
503			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
504			clocks = <&cpg CPG_MOD 930>;
505			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
506			resets = <&cpg 930>;
507			dmas = <&dmac1 0x93>, <&dmac1 0x92>,
508			       <&dmac2 0x93>, <&dmac2 0x92>;
509			dma-names = "tx", "rx", "tx", "rx";
510			i2c-scl-internal-delay-ns = <6>;
511			status = "disabled";
512		};
513
514		i2c2: i2c@e6510000 {
515			#address-cells = <1>;
516			#size-cells = <0>;
517			compatible = "renesas,i2c-r8a77990",
518				     "renesas,rcar-gen3-i2c";
519			reg = <0 0xe6510000 0 0x40>;
520			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
521			clocks = <&cpg CPG_MOD 929>;
522			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
523			resets = <&cpg 929>;
524			dmas = <&dmac1 0x95>, <&dmac1 0x94>,
525			       <&dmac2 0x95>, <&dmac2 0x94>;
526			dma-names = "tx", "rx", "tx", "rx";
527			i2c-scl-internal-delay-ns = <6>;
528			status = "disabled";
529		};
530
531		i2c3: i2c@e66d0000 {
532			#address-cells = <1>;
533			#size-cells = <0>;
534			compatible = "renesas,i2c-r8a77990",
535				     "renesas,rcar-gen3-i2c";
536			reg = <0 0xe66d0000 0 0x40>;
537			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
538			clocks = <&cpg CPG_MOD 928>;
539			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
540			resets = <&cpg 928>;
541			dmas = <&dmac0 0x97>, <&dmac0 0x96>;
542			dma-names = "tx", "rx";
543			i2c-scl-internal-delay-ns = <110>;
544			status = "disabled";
545		};
546
547		i2c4: i2c@e66d8000 {
548			#address-cells = <1>;
549			#size-cells = <0>;
550			compatible = "renesas,i2c-r8a77990",
551				     "renesas,rcar-gen3-i2c";
552			reg = <0 0xe66d8000 0 0x40>;
553			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
554			clocks = <&cpg CPG_MOD 927>;
555			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
556			resets = <&cpg 927>;
557			dmas = <&dmac0 0x99>, <&dmac0 0x98>;
558			dma-names = "tx", "rx";
559			i2c-scl-internal-delay-ns = <6>;
560			status = "disabled";
561		};
562
563		i2c5: i2c@e66e0000 {
564			#address-cells = <1>;
565			#size-cells = <0>;
566			compatible = "renesas,i2c-r8a77990",
567				     "renesas,rcar-gen3-i2c";
568			reg = <0 0xe66e0000 0 0x40>;
569			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
570			clocks = <&cpg CPG_MOD 919>;
571			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
572			resets = <&cpg 919>;
573			dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
574			dma-names = "tx", "rx";
575			i2c-scl-internal-delay-ns = <6>;
576			status = "disabled";
577		};
578
579		i2c6: i2c@e66e8000 {
580			#address-cells = <1>;
581			#size-cells = <0>;
582			compatible = "renesas,i2c-r8a77990",
583				     "renesas,rcar-gen3-i2c";
584			reg = <0 0xe66e8000 0 0x40>;
585			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
586			clocks = <&cpg CPG_MOD 918>;
587			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
588			resets = <&cpg 918>;
589			dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
590			dma-names = "tx", "rx";
591			i2c-scl-internal-delay-ns = <6>;
592			status = "disabled";
593		};
594
595		i2c7: i2c@e6690000 {
596			#address-cells = <1>;
597			#size-cells = <0>;
598			compatible = "renesas,i2c-r8a77990",
599				     "renesas,rcar-gen3-i2c";
600			reg = <0 0xe6690000 0 0x40>;
601			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
602			clocks = <&cpg CPG_MOD 1003>;
603			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
604			resets = <&cpg 1003>;
605			i2c-scl-internal-delay-ns = <6>;
606			status = "disabled";
607		};
608
609		hscif0: serial@e6540000 {
610			compatible = "renesas,hscif-r8a77990",
611				     "renesas,rcar-gen3-hscif",
612				     "renesas,hscif";
613			reg = <0 0xe6540000 0 0x60>;
614			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
615			clocks = <&cpg CPG_MOD 520>,
616				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
617				 <&scif_clk>;
618			clock-names = "fck", "brg_int", "scif_clk";
619			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
620			       <&dmac2 0x31>, <&dmac2 0x30>;
621			dma-names = "tx", "rx", "tx", "rx";
622			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
623			resets = <&cpg 520>;
624			status = "disabled";
625		};
626
627		hscif1: serial@e6550000 {
628			compatible = "renesas,hscif-r8a77990",
629				     "renesas,rcar-gen3-hscif",
630				     "renesas,hscif";
631			reg = <0 0xe6550000 0 0x60>;
632			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
633			clocks = <&cpg CPG_MOD 519>,
634				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
635				 <&scif_clk>;
636			clock-names = "fck", "brg_int", "scif_clk";
637			dmas = <&dmac1 0x33>, <&dmac1 0x32>,
638			       <&dmac2 0x33>, <&dmac2 0x32>;
639			dma-names = "tx", "rx", "tx", "rx";
640			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
641			resets = <&cpg 519>;
642			status = "disabled";
643		};
644
645		hscif2: serial@e6560000 {
646			compatible = "renesas,hscif-r8a77990",
647				     "renesas,rcar-gen3-hscif",
648				     "renesas,hscif";
649			reg = <0 0xe6560000 0 0x60>;
650			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
651			clocks = <&cpg CPG_MOD 518>,
652				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
653				 <&scif_clk>;
654			clock-names = "fck", "brg_int", "scif_clk";
655			dmas = <&dmac1 0x35>, <&dmac1 0x34>,
656			       <&dmac2 0x35>, <&dmac2 0x34>;
657			dma-names = "tx", "rx", "tx", "rx";
658			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
659			resets = <&cpg 518>;
660			status = "disabled";
661		};
662
663		hscif3: serial@e66a0000 {
664			compatible = "renesas,hscif-r8a77990",
665				     "renesas,rcar-gen3-hscif",
666				     "renesas,hscif";
667			reg = <0 0xe66a0000 0 0x60>;
668			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
669			clocks = <&cpg CPG_MOD 517>,
670				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
671				 <&scif_clk>;
672			clock-names = "fck", "brg_int", "scif_clk";
673			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
674			dma-names = "tx", "rx";
675			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
676			resets = <&cpg 517>;
677			status = "disabled";
678		};
679
680		hscif4: serial@e66b0000 {
681			compatible = "renesas,hscif-r8a77990",
682				     "renesas,rcar-gen3-hscif",
683				     "renesas,hscif";
684			reg = <0 0xe66b0000 0 0x60>;
685			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
686			clocks = <&cpg CPG_MOD 516>,
687				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
688				 <&scif_clk>;
689			clock-names = "fck", "brg_int", "scif_clk";
690			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
691			dma-names = "tx", "rx";
692			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
693			resets = <&cpg 516>;
694			status = "disabled";
695		};
696
697		hsusb: usb@e6590000 {
698			compatible = "renesas,usbhs-r8a77990",
699				     "renesas,rcar-gen3-usbhs";
700			reg = <0 0xe6590000 0 0x200>;
701			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
702			clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
703			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
704			       <&usb_dmac1 0>, <&usb_dmac1 1>;
705			dma-names = "ch0", "ch1", "ch2", "ch3";
706			renesas,buswait = <11>;
707			phys = <&usb2_phy0 3>;
708			phy-names = "usb";
709			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
710			resets = <&cpg 704>, <&cpg 703>;
711			status = "disabled";
712		};
713
714		usb_dmac0: dma-controller@e65a0000 {
715			compatible = "renesas,r8a77990-usb-dmac",
716				     "renesas,usb-dmac";
717			reg = <0 0xe65a0000 0 0x100>;
718			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
719				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
720			interrupt-names = "ch0", "ch1";
721			clocks = <&cpg CPG_MOD 330>;
722			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
723			resets = <&cpg 330>;
724			#dma-cells = <1>;
725			dma-channels = <2>;
726		};
727
728		usb_dmac1: dma-controller@e65b0000 {
729			compatible = "renesas,r8a77990-usb-dmac",
730				     "renesas,usb-dmac";
731			reg = <0 0xe65b0000 0 0x100>;
732			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
733				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
734			interrupt-names = "ch0", "ch1";
735			clocks = <&cpg CPG_MOD 331>;
736			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
737			resets = <&cpg 331>;
738			#dma-cells = <1>;
739			dma-channels = <2>;
740		};
741
742		arm_cc630p: crypto@e6601000 {
743			compatible = "arm,cryptocell-630p-ree";
744			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
745			reg = <0x0 0xe6601000 0 0x1000>;
746			clocks = <&cpg CPG_MOD 229>;
747			resets = <&cpg 229>;
748			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
749		};
750
751		dmac0: dma-controller@e6700000 {
752			compatible = "renesas,dmac-r8a77990",
753				     "renesas,rcar-dmac";
754			reg = <0 0xe6700000 0 0x10000>;
755			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
756				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
757				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
758				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
759				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
760				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
761				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
762				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
763				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
764				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
765				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
766				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
767				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
768				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
769				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
770				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
771				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
772			interrupt-names = "error",
773					"ch0", "ch1", "ch2", "ch3",
774					"ch4", "ch5", "ch6", "ch7",
775					"ch8", "ch9", "ch10", "ch11",
776					"ch12", "ch13", "ch14", "ch15";
777			clocks = <&cpg CPG_MOD 219>;
778			clock-names = "fck";
779			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
780			resets = <&cpg 219>;
781			#dma-cells = <1>;
782			dma-channels = <16>;
783			iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
784			       <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
785			       <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
786			       <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
787			       <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
788			       <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
789			       <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
790			       <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
791		};
792
793		dmac1: dma-controller@e7300000 {
794			compatible = "renesas,dmac-r8a77990",
795				     "renesas,rcar-dmac";
796			reg = <0 0xe7300000 0 0x10000>;
797			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
798				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
799				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
800				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
801				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
802				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
803				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
804				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
805				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
806				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
807				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
808				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
809				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
810				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
811				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
812				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
813				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
814			interrupt-names = "error",
815					"ch0", "ch1", "ch2", "ch3",
816					"ch4", "ch5", "ch6", "ch7",
817					"ch8", "ch9", "ch10", "ch11",
818					"ch12", "ch13", "ch14", "ch15";
819			clocks = <&cpg CPG_MOD 218>;
820			clock-names = "fck";
821			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
822			resets = <&cpg 218>;
823			#dma-cells = <1>;
824			dma-channels = <16>;
825			iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
826			       <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
827			       <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
828			       <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
829			       <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
830			       <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
831			       <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
832			       <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
833		};
834
835		dmac2: dma-controller@e7310000 {
836			compatible = "renesas,dmac-r8a77990",
837				     "renesas,rcar-dmac";
838			reg = <0 0xe7310000 0 0x10000>;
839			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
840				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
841				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
842				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
843				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
844				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
845				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
846				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
847				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
848				     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
849				     <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
850				     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
851				     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
852				     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
853				     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
854				     <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
855				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
856			interrupt-names = "error",
857					"ch0", "ch1", "ch2", "ch3",
858					"ch4", "ch5", "ch6", "ch7",
859					"ch8", "ch9", "ch10", "ch11",
860					"ch12", "ch13", "ch14", "ch15";
861			clocks = <&cpg CPG_MOD 217>;
862			clock-names = "fck";
863			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
864			resets = <&cpg 217>;
865			#dma-cells = <1>;
866			dma-channels = <16>;
867			iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
868			       <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
869			       <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
870			       <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
871			       <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
872			       <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
873			       <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
874			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
875		};
876
877		ipmmu_ds0: iommu@e6740000 {
878			compatible = "renesas,ipmmu-r8a77990";
879			reg = <0 0xe6740000 0 0x1000>;
880			renesas,ipmmu-main = <&ipmmu_mm 0>;
881			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
882			#iommu-cells = <1>;
883		};
884
885		ipmmu_ds1: iommu@e7740000 {
886			compatible = "renesas,ipmmu-r8a77990";
887			reg = <0 0xe7740000 0 0x1000>;
888			renesas,ipmmu-main = <&ipmmu_mm 1>;
889			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
890			#iommu-cells = <1>;
891		};
892
893		ipmmu_hc: iommu@e6570000 {
894			compatible = "renesas,ipmmu-r8a77990";
895			reg = <0 0xe6570000 0 0x1000>;
896			renesas,ipmmu-main = <&ipmmu_mm 2>;
897			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
898			#iommu-cells = <1>;
899		};
900
901		ipmmu_mm: iommu@e67b0000 {
902			compatible = "renesas,ipmmu-r8a77990";
903			reg = <0 0xe67b0000 0 0x1000>;
904			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
905				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
906			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
907			#iommu-cells = <1>;
908		};
909
910		ipmmu_mp: iommu@ec670000 {
911			compatible = "renesas,ipmmu-r8a77990";
912			reg = <0 0xec670000 0 0x1000>;
913			renesas,ipmmu-main = <&ipmmu_mm 4>;
914			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
915			#iommu-cells = <1>;
916		};
917
918		ipmmu_pv0: iommu@fd800000 {
919			compatible = "renesas,ipmmu-r8a77990";
920			reg = <0 0xfd800000 0 0x1000>;
921			renesas,ipmmu-main = <&ipmmu_mm 6>;
922			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
923			#iommu-cells = <1>;
924		};
925
926		ipmmu_rt: iommu@ffc80000 {
927			compatible = "renesas,ipmmu-r8a77990";
928			reg = <0 0xffc80000 0 0x1000>;
929			renesas,ipmmu-main = <&ipmmu_mm 10>;
930			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
931			#iommu-cells = <1>;
932		};
933
934		ipmmu_vc0: iommu@fe6b0000 {
935			compatible = "renesas,ipmmu-r8a77990";
936			reg = <0 0xfe6b0000 0 0x1000>;
937			renesas,ipmmu-main = <&ipmmu_mm 12>;
938			power-domains = <&sysc R8A77990_PD_A3VC>;
939			#iommu-cells = <1>;
940		};
941
942		ipmmu_vi0: iommu@febd0000 {
943			compatible = "renesas,ipmmu-r8a77990";
944			reg = <0 0xfebd0000 0 0x1000>;
945			renesas,ipmmu-main = <&ipmmu_mm 14>;
946			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
947			#iommu-cells = <1>;
948		};
949
950		ipmmu_vp0: iommu@fe990000 {
951			compatible = "renesas,ipmmu-r8a77990";
952			reg = <0 0xfe990000 0 0x1000>;
953			renesas,ipmmu-main = <&ipmmu_mm 16>;
954			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
955			#iommu-cells = <1>;
956		};
957
958		avb: ethernet@e6800000 {
959			compatible = "renesas,etheravb-r8a77990",
960				     "renesas,etheravb-rcar-gen3";
961			reg = <0 0xe6800000 0 0x800>;
962			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
963				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
964				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
965				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
966				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
967				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
968				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
969				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
970				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
971				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
972				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
973				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
974				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
975				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
976				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
977				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
978				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
979				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
980				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
981				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
982				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
983				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
984				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
985				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
986				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
987			interrupt-names = "ch0", "ch1", "ch2", "ch3",
988					  "ch4", "ch5", "ch6", "ch7",
989					  "ch8", "ch9", "ch10", "ch11",
990					  "ch12", "ch13", "ch14", "ch15",
991					  "ch16", "ch17", "ch18", "ch19",
992					  "ch20", "ch21", "ch22", "ch23",
993					  "ch24";
994			clocks = <&cpg CPG_MOD 812>;
995			clock-names = "fck";
996			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
997			resets = <&cpg 812>;
998			phy-mode = "rgmii";
999			rx-internal-delay-ps = <0>;
1000			iommus = <&ipmmu_ds0 16>;
1001			#address-cells = <1>;
1002			#size-cells = <0>;
1003			status = "disabled";
1004		};
1005
1006		can0: can@e6c30000 {
1007			compatible = "renesas,can-r8a77990",
1008				     "renesas,rcar-gen3-can";
1009			reg = <0 0xe6c30000 0 0x1000>;
1010			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1011			clocks = <&cpg CPG_MOD 916>,
1012			       <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1013			       <&can_clk>;
1014			clock-names = "clkp1", "clkp2", "can_clk";
1015			assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1016			assigned-clock-rates = <40000000>;
1017			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1018			resets = <&cpg 916>;
1019			status = "disabled";
1020		};
1021
1022		can1: can@e6c38000 {
1023			compatible = "renesas,can-r8a77990",
1024				     "renesas,rcar-gen3-can";
1025			reg = <0 0xe6c38000 0 0x1000>;
1026			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1027			clocks = <&cpg CPG_MOD 915>,
1028			       <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1029			       <&can_clk>;
1030			clock-names = "clkp1", "clkp2", "can_clk";
1031			assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1032			assigned-clock-rates = <40000000>;
1033			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1034			resets = <&cpg 915>;
1035			status = "disabled";
1036		};
1037
1038		canfd: can@e66c0000 {
1039			compatible = "renesas,r8a77990-canfd",
1040				     "renesas,rcar-gen3-canfd";
1041			reg = <0 0xe66c0000 0 0x8000>;
1042			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1043				   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1044			interrupt-names = "ch_int", "g_int";
1045			clocks = <&cpg CPG_MOD 914>,
1046			       <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1047			       <&can_clk>;
1048			clock-names = "fck", "canfd", "can_clk";
1049			assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1050			assigned-clock-rates = <40000000>;
1051			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1052			resets = <&cpg 914>;
1053			status = "disabled";
1054
1055			channel0 {
1056				status = "disabled";
1057			};
1058
1059			channel1 {
1060				status = "disabled";
1061			};
1062		};
1063
1064		pwm0: pwm@e6e30000 {
1065			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1066			reg = <0 0xe6e30000 0 0x8>;
1067			clocks = <&cpg CPG_MOD 523>;
1068			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1069			resets = <&cpg 523>;
1070			#pwm-cells = <2>;
1071			status = "disabled";
1072		};
1073
1074		pwm1: pwm@e6e31000 {
1075			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1076			reg = <0 0xe6e31000 0 0x8>;
1077			clocks = <&cpg CPG_MOD 523>;
1078			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1079			resets = <&cpg 523>;
1080			#pwm-cells = <2>;
1081			status = "disabled";
1082		};
1083
1084		pwm2: pwm@e6e32000 {
1085			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1086			reg = <0 0xe6e32000 0 0x8>;
1087			clocks = <&cpg CPG_MOD 523>;
1088			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1089			resets = <&cpg 523>;
1090			#pwm-cells = <2>;
1091			status = "disabled";
1092		};
1093
1094		pwm3: pwm@e6e33000 {
1095			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1096			reg = <0 0xe6e33000 0 0x8>;
1097			clocks = <&cpg CPG_MOD 523>;
1098			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1099			resets = <&cpg 523>;
1100			#pwm-cells = <2>;
1101			status = "disabled";
1102		};
1103
1104		pwm4: pwm@e6e34000 {
1105			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1106			reg = <0 0xe6e34000 0 0x8>;
1107			clocks = <&cpg CPG_MOD 523>;
1108			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1109			resets = <&cpg 523>;
1110			#pwm-cells = <2>;
1111			status = "disabled";
1112		};
1113
1114		pwm5: pwm@e6e35000 {
1115			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1116			reg = <0 0xe6e35000 0 0x8>;
1117			clocks = <&cpg CPG_MOD 523>;
1118			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1119			resets = <&cpg 523>;
1120			#pwm-cells = <2>;
1121			status = "disabled";
1122		};
1123
1124		pwm6: pwm@e6e36000 {
1125			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1126			reg = <0 0xe6e36000 0 0x8>;
1127			clocks = <&cpg CPG_MOD 523>;
1128			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1129			resets = <&cpg 523>;
1130			#pwm-cells = <2>;
1131			status = "disabled";
1132		};
1133
1134		scif0: serial@e6e60000 {
1135			compatible = "renesas,scif-r8a77990",
1136				     "renesas,rcar-gen3-scif", "renesas,scif";
1137			reg = <0 0xe6e60000 0 64>;
1138			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1139			clocks = <&cpg CPG_MOD 207>,
1140				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1141				 <&scif_clk>;
1142			clock-names = "fck", "brg_int", "scif_clk";
1143			dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1144			       <&dmac2 0x51>, <&dmac2 0x50>;
1145			dma-names = "tx", "rx", "tx", "rx";
1146			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1147			resets = <&cpg 207>;
1148			status = "disabled";
1149		};
1150
1151		scif1: serial@e6e68000 {
1152			compatible = "renesas,scif-r8a77990",
1153				     "renesas,rcar-gen3-scif", "renesas,scif";
1154			reg = <0 0xe6e68000 0 64>;
1155			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1156			clocks = <&cpg CPG_MOD 206>,
1157				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1158				 <&scif_clk>;
1159			clock-names = "fck", "brg_int", "scif_clk";
1160			dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1161			       <&dmac2 0x53>, <&dmac2 0x52>;
1162			dma-names = "tx", "rx", "tx", "rx";
1163			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1164			resets = <&cpg 206>;
1165			status = "disabled";
1166		};
1167
1168		scif2: serial@e6e88000 {
1169			compatible = "renesas,scif-r8a77990",
1170				     "renesas,rcar-gen3-scif", "renesas,scif";
1171			reg = <0 0xe6e88000 0 64>;
1172			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1173			clocks = <&cpg CPG_MOD 310>,
1174				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1175				 <&scif_clk>;
1176			clock-names = "fck", "brg_int", "scif_clk";
1177			dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1178			       <&dmac2 0x13>, <&dmac2 0x12>;
1179			dma-names = "tx", "rx", "tx", "rx";
1180			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1181			resets = <&cpg 310>;
1182			status = "disabled";
1183		};
1184
1185		scif3: serial@e6c50000 {
1186			compatible = "renesas,scif-r8a77990",
1187				     "renesas,rcar-gen3-scif", "renesas,scif";
1188			reg = <0 0xe6c50000 0 64>;
1189			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1190			clocks = <&cpg CPG_MOD 204>,
1191				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1192				 <&scif_clk>;
1193			clock-names = "fck", "brg_int", "scif_clk";
1194			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1195			dma-names = "tx", "rx";
1196			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1197			resets = <&cpg 204>;
1198			status = "disabled";
1199		};
1200
1201		scif4: serial@e6c40000 {
1202			compatible = "renesas,scif-r8a77990",
1203				     "renesas,rcar-gen3-scif", "renesas,scif";
1204			reg = <0 0xe6c40000 0 64>;
1205			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1206			clocks = <&cpg CPG_MOD 203>,
1207				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1208				 <&scif_clk>;
1209			clock-names = "fck", "brg_int", "scif_clk";
1210			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1211			dma-names = "tx", "rx";
1212			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1213			resets = <&cpg 203>;
1214			status = "disabled";
1215		};
1216
1217		scif5: serial@e6f30000 {
1218			compatible = "renesas,scif-r8a77990",
1219				     "renesas,rcar-gen3-scif", "renesas,scif";
1220			reg = <0 0xe6f30000 0 64>;
1221			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1222			clocks = <&cpg CPG_MOD 202>,
1223				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1224				 <&scif_clk>;
1225			clock-names = "fck", "brg_int", "scif_clk";
1226			dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1227			dma-names = "tx", "rx";
1228			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1229			resets = <&cpg 202>;
1230			status = "disabled";
1231		};
1232
1233		msiof0: spi@e6e90000 {
1234			compatible = "renesas,msiof-r8a77990",
1235				     "renesas,rcar-gen3-msiof";
1236			reg = <0 0xe6e90000 0 0x0064>;
1237			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1238			clocks = <&cpg CPG_MOD 211>;
1239			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1240			       <&dmac2 0x41>, <&dmac2 0x40>;
1241			dma-names = "tx", "rx", "tx", "rx";
1242			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1243			resets = <&cpg 211>;
1244			#address-cells = <1>;
1245			#size-cells = <0>;
1246			status = "disabled";
1247		};
1248
1249		msiof1: spi@e6ea0000 {
1250			compatible = "renesas,msiof-r8a77990",
1251				     "renesas,rcar-gen3-msiof";
1252			reg = <0 0xe6ea0000 0 0x0064>;
1253			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1254			clocks = <&cpg CPG_MOD 210>;
1255			dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1256			dma-names = "tx", "rx";
1257			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1258			resets = <&cpg 210>;
1259			#address-cells = <1>;
1260			#size-cells = <0>;
1261			status = "disabled";
1262		};
1263
1264		msiof2: spi@e6c00000 {
1265			compatible = "renesas,msiof-r8a77990",
1266				     "renesas,rcar-gen3-msiof";
1267			reg = <0 0xe6c00000 0 0x0064>;
1268			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1269			clocks = <&cpg CPG_MOD 209>;
1270			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1271			dma-names = "tx", "rx";
1272			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1273			resets = <&cpg 209>;
1274			#address-cells = <1>;
1275			#size-cells = <0>;
1276			status = "disabled";
1277		};
1278
1279		msiof3: spi@e6c10000 {
1280			compatible = "renesas,msiof-r8a77990",
1281				     "renesas,rcar-gen3-msiof";
1282			reg = <0 0xe6c10000 0 0x0064>;
1283			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1284			clocks = <&cpg CPG_MOD 208>;
1285			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1286			dma-names = "tx", "rx";
1287			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1288			resets = <&cpg 208>;
1289			#address-cells = <1>;
1290			#size-cells = <0>;
1291			status = "disabled";
1292		};
1293
1294		vin4: video@e6ef4000 {
1295			compatible = "renesas,vin-r8a77990";
1296			reg = <0 0xe6ef4000 0 0x1000>;
1297			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1298			clocks = <&cpg CPG_MOD 807>;
1299			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1300			resets = <&cpg 807>;
1301			renesas,id = <4>;
1302			status = "disabled";
1303
1304			ports {
1305				#address-cells = <1>;
1306				#size-cells = <0>;
1307
1308				port@1 {
1309					#address-cells = <1>;
1310					#size-cells = <0>;
1311
1312					reg = <1>;
1313
1314					vin4csi40: endpoint@2 {
1315						reg = <2>;
1316						remote-endpoint = <&csi40vin4>;
1317					};
1318				};
1319			};
1320		};
1321
1322		vin5: video@e6ef5000 {
1323			compatible = "renesas,vin-r8a77990";
1324			reg = <0 0xe6ef5000 0 0x1000>;
1325			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1326			clocks = <&cpg CPG_MOD 806>;
1327			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1328			resets = <&cpg 806>;
1329			renesas,id = <5>;
1330			status = "disabled";
1331
1332			ports {
1333				#address-cells = <1>;
1334				#size-cells = <0>;
1335
1336				port@1 {
1337					#address-cells = <1>;
1338					#size-cells = <0>;
1339
1340					reg = <1>;
1341
1342					vin5csi40: endpoint@2 {
1343						reg = <2>;
1344						remote-endpoint = <&csi40vin5>;
1345					};
1346				};
1347			};
1348		};
1349
1350		drif00: rif@e6f40000 {
1351			compatible = "renesas,r8a77990-drif",
1352				     "renesas,rcar-gen3-drif";
1353			reg = <0 0xe6f40000 0 0x84>;
1354			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1355			clocks = <&cpg CPG_MOD 515>;
1356			clock-names = "fck";
1357			dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1358			dma-names = "rx", "rx";
1359			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1360			resets = <&cpg 515>;
1361			renesas,bonding = <&drif01>;
1362			status = "disabled";
1363		};
1364
1365		drif01: rif@e6f50000 {
1366			compatible = "renesas,r8a77990-drif",
1367				     "renesas,rcar-gen3-drif";
1368			reg = <0 0xe6f50000 0 0x84>;
1369			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1370			clocks = <&cpg CPG_MOD 514>;
1371			clock-names = "fck";
1372			dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1373			dma-names = "rx", "rx";
1374			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1375			resets = <&cpg 514>;
1376			renesas,bonding = <&drif00>;
1377			status = "disabled";
1378		};
1379
1380		drif10: rif@e6f60000 {
1381			compatible = "renesas,r8a77990-drif",
1382				     "renesas,rcar-gen3-drif";
1383			reg = <0 0xe6f60000 0 0x84>;
1384			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1385			clocks = <&cpg CPG_MOD 513>;
1386			clock-names = "fck";
1387			dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1388			dma-names = "rx", "rx";
1389			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1390			resets = <&cpg 513>;
1391			renesas,bonding = <&drif11>;
1392			status = "disabled";
1393		};
1394
1395		drif11: rif@e6f70000 {
1396			compatible = "renesas,r8a77990-drif",
1397				     "renesas,rcar-gen3-drif";
1398			reg = <0 0xe6f70000 0 0x84>;
1399			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1400			clocks = <&cpg CPG_MOD 512>;
1401			clock-names = "fck";
1402			dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1403			dma-names = "rx", "rx";
1404			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1405			resets = <&cpg 512>;
1406			renesas,bonding = <&drif10>;
1407			status = "disabled";
1408		};
1409
1410		drif20: rif@e6f80000 {
1411			compatible = "renesas,r8a77990-drif",
1412				     "renesas,rcar-gen3-drif";
1413			reg = <0 0xe6f80000 0 0x84>;
1414			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1415			clocks = <&cpg CPG_MOD 511>;
1416			clock-names = "fck";
1417			dmas = <&dmac0 0x28>;
1418			dma-names = "rx";
1419			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1420			resets = <&cpg 511>;
1421			renesas,bonding = <&drif21>;
1422			status = "disabled";
1423		};
1424
1425		drif21: rif@e6f90000 {
1426			compatible = "renesas,r8a77990-drif",
1427				     "renesas,rcar-gen3-drif";
1428			reg = <0 0xe6f90000 0 0x84>;
1429			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1430			clocks = <&cpg CPG_MOD 510>;
1431			clock-names = "fck";
1432			dmas = <&dmac0 0x2a>;
1433			dma-names = "rx";
1434			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1435			resets = <&cpg 510>;
1436			renesas,bonding = <&drif20>;
1437			status = "disabled";
1438		};
1439
1440		drif30: rif@e6fa0000 {
1441			compatible = "renesas,r8a77990-drif",
1442				     "renesas,rcar-gen3-drif";
1443			reg = <0 0xe6fa0000 0 0x84>;
1444			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1445			clocks = <&cpg CPG_MOD 509>;
1446			clock-names = "fck";
1447			dmas = <&dmac0 0x2c>;
1448			dma-names = "rx";
1449			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1450			resets = <&cpg 509>;
1451			renesas,bonding = <&drif31>;
1452			status = "disabled";
1453		};
1454
1455		drif31: rif@e6fb0000 {
1456			compatible = "renesas,r8a77990-drif",
1457				     "renesas,rcar-gen3-drif";
1458			reg = <0 0xe6fb0000 0 0x84>;
1459			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1460			clocks = <&cpg CPG_MOD 508>;
1461			clock-names = "fck";
1462			dmas = <&dmac0 0x2e>;
1463			dma-names = "rx";
1464			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1465			resets = <&cpg 508>;
1466			renesas,bonding = <&drif30>;
1467			status = "disabled";
1468		};
1469
1470		rcar_sound: sound@ec500000 {
1471			/*
1472			 * #sound-dai-cells is required
1473			 *
1474			 * Single DAI : #sound-dai-cells = <0>;	<&rcar_sound>;
1475			 * Multi  DAI : #sound-dai-cells = <1>;	<&rcar_sound N>;
1476			 */
1477			/*
1478			 * #clock-cells is required for audio_clkout0/1/2/3
1479			 *
1480			 * clkout	: #clock-cells = <0>;	<&rcar_sound>;
1481			 * clkout0/1/2/3: #clock-cells = <1>;	<&rcar_sound N>;
1482			 */
1483			compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1484			reg = <0 0xec500000 0 0x1000>, /* SCU */
1485			      <0 0xec5a0000 0 0x100>,  /* ADG */
1486			      <0 0xec540000 0 0x1000>, /* SSIU */
1487			      <0 0xec541000 0 0x280>,  /* SSI */
1488			      <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1489			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1490
1491			clocks = <&cpg CPG_MOD 1005>,
1492				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1493				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1494				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1495				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1496				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1497				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1498				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1499				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1500				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1501				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1502				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1503				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1504				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1505				 <&audio_clk_a>, <&audio_clk_b>,
1506				 <&audio_clk_c>,
1507				 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1508			clock-names = "ssi-all",
1509				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1510				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1511				      "ssi.1", "ssi.0",
1512				      "src.9", "src.8", "src.7", "src.6",
1513				      "src.5", "src.4", "src.3", "src.2",
1514				      "src.1", "src.0",
1515				      "mix.1", "mix.0",
1516				      "ctu.1", "ctu.0",
1517				      "dvc.0", "dvc.1",
1518				      "clk_a", "clk_b", "clk_c", "clk_i";
1519			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1520			resets = <&cpg 1005>,
1521				 <&cpg 1006>, <&cpg 1007>,
1522				 <&cpg 1008>, <&cpg 1009>,
1523				 <&cpg 1010>, <&cpg 1011>,
1524				 <&cpg 1012>, <&cpg 1013>,
1525				 <&cpg 1014>, <&cpg 1015>;
1526			reset-names = "ssi-all",
1527				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1528				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1529				      "ssi.1", "ssi.0";
1530			status = "disabled";
1531
1532			rcar_sound,ctu {
1533				ctu00: ctu-0 { };
1534				ctu01: ctu-1 { };
1535				ctu02: ctu-2 { };
1536				ctu03: ctu-3 { };
1537				ctu10: ctu-4 { };
1538				ctu11: ctu-5 { };
1539				ctu12: ctu-6 { };
1540				ctu13: ctu-7 { };
1541			};
1542
1543			rcar_sound,dvc {
1544				dvc0: dvc-0 {
1545					dmas = <&audma0 0xbc>;
1546					dma-names = "tx";
1547				};
1548				dvc1: dvc-1 {
1549					dmas = <&audma0 0xbe>;
1550					dma-names = "tx";
1551				};
1552			};
1553
1554			rcar_sound,mix {
1555				mix0: mix-0 { };
1556				mix1: mix-1 { };
1557			};
1558
1559			rcar_sound,src {
1560				src0: src-0 {
1561					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1562					dmas = <&audma0 0x85>, <&audma0 0x9a>;
1563					dma-names = "rx", "tx";
1564				};
1565				src1: src-1 {
1566					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1567					dmas = <&audma0 0x87>, <&audma0 0x9c>;
1568					dma-names = "rx", "tx";
1569				};
1570				src2: src-2 {
1571					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1572					dmas = <&audma0 0x89>, <&audma0 0x9e>;
1573					dma-names = "rx", "tx";
1574				};
1575				src3: src-3 {
1576					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1577					dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1578					dma-names = "rx", "tx";
1579				};
1580				src4: src-4 {
1581					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1582					dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1583					dma-names = "rx", "tx";
1584				};
1585				src5: src-5 {
1586					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1587					dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1588					dma-names = "rx", "tx";
1589				};
1590				src6: src-6 {
1591					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1592					dmas = <&audma0 0x91>, <&audma0 0xb4>;
1593					dma-names = "rx", "tx";
1594				};
1595				src7: src-7 {
1596					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1597					dmas = <&audma0 0x93>, <&audma0 0xb6>;
1598					dma-names = "rx", "tx";
1599				};
1600				src8: src-8 {
1601					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1602					dmas = <&audma0 0x95>, <&audma0 0xb8>;
1603					dma-names = "rx", "tx";
1604				};
1605				src9: src-9 {
1606					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1607					dmas = <&audma0 0x97>, <&audma0 0xba>;
1608					dma-names = "rx", "tx";
1609				};
1610			};
1611
1612			rcar_sound,ssi {
1613				ssi0: ssi-0 {
1614					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1615					dmas = <&audma0 0x01>, <&audma0 0x02>,
1616					       <&audma0 0x15>, <&audma0 0x16>;
1617					dma-names = "rx", "tx", "rxu", "txu";
1618				};
1619				ssi1: ssi-1 {
1620					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1621					dmas = <&audma0 0x03>, <&audma0 0x04>,
1622					       <&audma0 0x49>, <&audma0 0x4a>;
1623					dma-names = "rx", "tx", "rxu", "txu";
1624				};
1625				ssi2: ssi-2 {
1626					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1627					dmas = <&audma0 0x05>, <&audma0 0x06>,
1628					       <&audma0 0x63>, <&audma0 0x64>;
1629					dma-names = "rx", "tx", "rxu", "txu";
1630				};
1631				ssi3: ssi-3 {
1632					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1633					dmas = <&audma0 0x07>, <&audma0 0x08>,
1634					       <&audma0 0x6f>, <&audma0 0x70>;
1635					dma-names = "rx", "tx", "rxu", "txu";
1636				};
1637				ssi4: ssi-4 {
1638					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1639					dmas = <&audma0 0x09>, <&audma0 0x0a>,
1640					       <&audma0 0x71>, <&audma0 0x72>;
1641					dma-names = "rx", "tx", "rxu", "txu";
1642				};
1643				ssi5: ssi-5 {
1644					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1645					dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1646					       <&audma0 0x73>, <&audma0 0x74>;
1647					dma-names = "rx", "tx", "rxu", "txu";
1648				};
1649				ssi6: ssi-6 {
1650					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1651					dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1652					       <&audma0 0x75>, <&audma0 0x76>;
1653					dma-names = "rx", "tx", "rxu", "txu";
1654				};
1655				ssi7: ssi-7 {
1656					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1657					dmas = <&audma0 0x0f>, <&audma0 0x10>,
1658					       <&audma0 0x79>, <&audma0 0x7a>;
1659					dma-names = "rx", "tx", "rxu", "txu";
1660				};
1661				ssi8: ssi-8 {
1662					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1663					dmas = <&audma0 0x11>, <&audma0 0x12>,
1664					       <&audma0 0x7b>, <&audma0 0x7c>;
1665					dma-names = "rx", "tx", "rxu", "txu";
1666				};
1667				ssi9: ssi-9 {
1668					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1669					dmas = <&audma0 0x13>, <&audma0 0x14>,
1670					       <&audma0 0x7d>, <&audma0 0x7e>;
1671					dma-names = "rx", "tx", "rxu", "txu";
1672				};
1673			};
1674		};
1675
1676		mlp: mlp@ec520000 {
1677			compatible = "renesas,r8a77990-mlp",
1678				     "renesas,rcar-gen3-mlp";
1679			reg = <0 0xec520000 0 0x800>;
1680			interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
1681				<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
1682			clocks = <&cpg CPG_MOD 802>;
1683			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1684			resets = <&cpg 802>;
1685			status = "disabled";
1686		};
1687
1688		audma0: dma-controller@ec700000 {
1689			compatible = "renesas,dmac-r8a77990",
1690				     "renesas,rcar-dmac";
1691			reg = <0 0xec700000 0 0x10000>;
1692			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1693				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1694				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1695				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1696				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1697				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1698				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1699				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1700				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1701				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1702				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1703				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1704				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1705				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1706				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1707				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1708				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1709			interrupt-names = "error",
1710					"ch0", "ch1", "ch2", "ch3",
1711					"ch4", "ch5", "ch6", "ch7",
1712					"ch8", "ch9", "ch10", "ch11",
1713					"ch12", "ch13", "ch14", "ch15";
1714			clocks = <&cpg CPG_MOD 502>;
1715			clock-names = "fck";
1716			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1717			resets = <&cpg 502>;
1718			#dma-cells = <1>;
1719			dma-channels = <16>;
1720			iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1721				 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1722				 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1723				 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1724				 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1725				 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1726				 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1727				 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1728		};
1729
1730		xhci0: usb@ee000000 {
1731			compatible = "renesas,xhci-r8a77990",
1732				     "renesas,rcar-gen3-xhci";
1733			reg = <0 0xee000000 0 0xc00>;
1734			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1735			clocks = <&cpg CPG_MOD 328>;
1736			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1737			resets = <&cpg 328>;
1738			status = "disabled";
1739		};
1740
1741		usb3_peri0: usb@ee020000 {
1742			compatible = "renesas,r8a77990-usb3-peri",
1743				     "renesas,rcar-gen3-usb3-peri";
1744			reg = <0 0xee020000 0 0x400>;
1745			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1746			clocks = <&cpg CPG_MOD 328>;
1747			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1748			resets = <&cpg 328>;
1749			status = "disabled";
1750		};
1751
1752		ohci0: usb@ee080000 {
1753			compatible = "generic-ohci";
1754			reg = <0 0xee080000 0 0x100>;
1755			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1756			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1757			phys = <&usb2_phy0 1>;
1758			phy-names = "usb";
1759			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1760			resets = <&cpg 703>, <&cpg 704>;
1761			status = "disabled";
1762		};
1763
1764		ehci0: usb@ee080100 {
1765			compatible = "generic-ehci";
1766			reg = <0 0xee080100 0 0x100>;
1767			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1768			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1769			phys = <&usb2_phy0 2>;
1770			phy-names = "usb";
1771			companion = <&ohci0>;
1772			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1773			resets = <&cpg 703>, <&cpg 704>;
1774			status = "disabled";
1775		};
1776
1777		usb2_phy0: usb-phy@ee080200 {
1778			compatible = "renesas,usb2-phy-r8a77990",
1779				     "renesas,rcar-gen3-usb2-phy";
1780			reg = <0 0xee080200 0 0x700>;
1781			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1782			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1783			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1784			resets = <&cpg 703>, <&cpg 704>;
1785			#phy-cells = <1>;
1786			status = "disabled";
1787		};
1788
1789		sdhi0: mmc@ee100000 {
1790			compatible = "renesas,sdhi-r8a77990",
1791				     "renesas,rcar-gen3-sdhi";
1792			reg = <0 0xee100000 0 0x2000>;
1793			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1794			clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>;
1795			clock-names = "core", "clkh";
1796			max-frequency = <200000000>;
1797			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1798			resets = <&cpg 314>;
1799			iommus = <&ipmmu_ds1 32>;
1800			status = "disabled";
1801		};
1802
1803		sdhi1: mmc@ee120000 {
1804			compatible = "renesas,sdhi-r8a77990",
1805				     "renesas,rcar-gen3-sdhi";
1806			reg = <0 0xee120000 0 0x2000>;
1807			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1808			clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>;
1809			clock-names = "core", "clkh";
1810			max-frequency = <200000000>;
1811			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1812			resets = <&cpg 313>;
1813			iommus = <&ipmmu_ds1 33>;
1814			status = "disabled";
1815		};
1816
1817		sdhi3: mmc@ee160000 {
1818			compatible = "renesas,sdhi-r8a77990",
1819				     "renesas,rcar-gen3-sdhi";
1820			reg = <0 0xee160000 0 0x2000>;
1821			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1822			clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>;
1823			clock-names = "core", "clkh";
1824			max-frequency = <200000000>;
1825			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1826			resets = <&cpg 311>;
1827			iommus = <&ipmmu_ds1 35>;
1828			status = "disabled";
1829		};
1830
1831		rpc: spi@ee200000 {
1832			compatible = "renesas,r8a77990-rpc-if",
1833				     "renesas,rcar-gen3-rpc-if";
1834			reg = <0 0xee200000 0 0x200>,
1835			      <0 0x08000000 0 0x04000000>,
1836			      <0 0xee208000 0 0x100>;
1837			reg-names = "regs", "dirmap", "wbuf";
1838			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1839			clocks = <&cpg CPG_MOD 917>;
1840			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1841			resets = <&cpg 917>;
1842			#address-cells = <1>;
1843			#size-cells = <0>;
1844			status = "disabled";
1845		};
1846
1847		gic: interrupt-controller@f1010000 {
1848			compatible = "arm,gic-400";
1849			#interrupt-cells = <3>;
1850			#address-cells = <0>;
1851			interrupt-controller;
1852			reg = <0x0 0xf1010000 0 0x1000>,
1853			      <0x0 0xf1020000 0 0x20000>,
1854			      <0x0 0xf1040000 0 0x20000>,
1855			      <0x0 0xf1060000 0 0x20000>;
1856			interrupts = <GIC_PPI 9
1857					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1858			clocks = <&cpg CPG_MOD 408>;
1859			clock-names = "clk";
1860			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1861			resets = <&cpg 408>;
1862		};
1863
1864		pciec0: pcie@fe000000 {
1865			compatible = "renesas,pcie-r8a77990",
1866				     "renesas,pcie-rcar-gen3";
1867			reg = <0 0xfe000000 0 0x80000>;
1868			#address-cells = <3>;
1869			#size-cells = <2>;
1870			bus-range = <0x00 0xff>;
1871			device_type = "pci";
1872			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1873				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1874				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1875				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1876			/* Map all possible DDR as inbound ranges */
1877			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1878			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1879				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1880				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1881			#interrupt-cells = <1>;
1882			interrupt-map-mask = <0 0 0 0>;
1883			interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1884			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1885			clock-names = "pcie", "pcie_bus";
1886			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1887			resets = <&cpg 319>;
1888			status = "disabled";
1889		};
1890
1891		vspb0: vsp@fe960000 {
1892			compatible = "renesas,vsp2";
1893			reg = <0 0xfe960000 0 0x8000>;
1894			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1895			clocks = <&cpg CPG_MOD 626>;
1896			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1897			resets = <&cpg 626>;
1898			renesas,fcp = <&fcpvb0>;
1899		};
1900
1901		fcpvb0: fcp@fe96f000 {
1902			compatible = "renesas,fcpv";
1903			reg = <0 0xfe96f000 0 0x200>;
1904			clocks = <&cpg CPG_MOD 607>;
1905			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1906			resets = <&cpg 607>;
1907			iommus = <&ipmmu_vp0 5>;
1908		};
1909
1910		vspi0: vsp@fe9a0000 {
1911			compatible = "renesas,vsp2";
1912			reg = <0 0xfe9a0000 0 0x8000>;
1913			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1914			clocks = <&cpg CPG_MOD 631>;
1915			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1916			resets = <&cpg 631>;
1917			renesas,fcp = <&fcpvi0>;
1918		};
1919
1920		fcpvi0: fcp@fe9af000 {
1921			compatible = "renesas,fcpv";
1922			reg = <0 0xfe9af000 0 0x200>;
1923			clocks = <&cpg CPG_MOD 611>;
1924			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1925			resets = <&cpg 611>;
1926			iommus = <&ipmmu_vp0 8>;
1927		};
1928
1929		vspd0: vsp@fea20000 {
1930			compatible = "renesas,vsp2";
1931			reg = <0 0xfea20000 0 0x7000>;
1932			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1933			clocks = <&cpg CPG_MOD 623>;
1934			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1935			resets = <&cpg 623>;
1936			renesas,fcp = <&fcpvd0>;
1937		};
1938
1939		fcpvd0: fcp@fea27000 {
1940			compatible = "renesas,fcpv";
1941			reg = <0 0xfea27000 0 0x200>;
1942			clocks = <&cpg CPG_MOD 603>;
1943			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1944			resets = <&cpg 603>;
1945			iommus = <&ipmmu_vi0 8>;
1946		};
1947
1948		vspd1: vsp@fea28000 {
1949			compatible = "renesas,vsp2";
1950			reg = <0 0xfea28000 0 0x7000>;
1951			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1952			clocks = <&cpg CPG_MOD 622>;
1953			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1954			resets = <&cpg 622>;
1955			renesas,fcp = <&fcpvd1>;
1956		};
1957
1958		fcpvd1: fcp@fea2f000 {
1959			compatible = "renesas,fcpv";
1960			reg = <0 0xfea2f000 0 0x200>;
1961			clocks = <&cpg CPG_MOD 602>;
1962			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1963			resets = <&cpg 602>;
1964			iommus = <&ipmmu_vi0 9>;
1965		};
1966
1967		cmm0: cmm@fea40000 {
1968			compatible = "renesas,r8a77990-cmm",
1969				     "renesas,rcar-gen3-cmm";
1970			reg = <0 0xfea40000 0 0x1000>;
1971			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1972			clocks = <&cpg CPG_MOD 711>;
1973			resets = <&cpg 711>;
1974		};
1975
1976		cmm1: cmm@fea50000 {
1977			compatible = "renesas,r8a77990-cmm",
1978				     "renesas,rcar-gen3-cmm";
1979			reg = <0 0xfea50000 0 0x1000>;
1980			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1981			clocks = <&cpg CPG_MOD 710>;
1982			resets = <&cpg 710>;
1983		};
1984
1985		csi40: csi2@feaa0000 {
1986			compatible = "renesas,r8a77990-csi2";
1987			reg = <0 0xfeaa0000 0 0x10000>;
1988			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1989			clocks = <&cpg CPG_MOD 716>;
1990			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1991			resets = <&cpg 716>;
1992			status = "disabled";
1993
1994			ports {
1995				#address-cells = <1>;
1996				#size-cells = <0>;
1997
1998				port@0 {
1999					reg = <0>;
2000				};
2001
2002				port@1 {
2003					#address-cells = <1>;
2004					#size-cells = <0>;
2005
2006					reg = <1>;
2007
2008					csi40vin4: endpoint@0 {
2009						reg = <0>;
2010						remote-endpoint = <&vin4csi40>;
2011					};
2012					csi40vin5: endpoint@1 {
2013						reg = <1>;
2014						remote-endpoint = <&vin5csi40>;
2015					};
2016				};
2017			};
2018		};
2019
2020		du: display@feb00000 {
2021			compatible = "renesas,du-r8a77990";
2022			reg = <0 0xfeb00000 0 0x40000>;
2023			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2024				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
2025			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2026			clock-names = "du.0", "du.1";
2027			resets = <&cpg 724>;
2028			reset-names = "du.0";
2029
2030			renesas,cmms = <&cmm0>, <&cmm1>;
2031			renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2032
2033			status = "disabled";
2034
2035			ports {
2036				#address-cells = <1>;
2037				#size-cells = <0>;
2038
2039				port@0 {
2040					reg = <0>;
2041				};
2042
2043				port@1 {
2044					reg = <1>;
2045					du_out_lvds0: endpoint {
2046						remote-endpoint = <&lvds0_in>;
2047					};
2048				};
2049
2050				port@2 {
2051					reg = <2>;
2052					du_out_lvds1: endpoint {
2053						remote-endpoint = <&lvds1_in>;
2054					};
2055				};
2056			};
2057		};
2058
2059		lvds0: lvds-encoder@feb90000 {
2060			compatible = "renesas,r8a77990-lvds";
2061			reg = <0 0xfeb90000 0 0x20>;
2062			clocks = <&cpg CPG_MOD 727>;
2063			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2064			resets = <&cpg 727>;
2065			status = "disabled";
2066
2067			renesas,companion = <&lvds1>;
2068
2069			ports {
2070				#address-cells = <1>;
2071				#size-cells = <0>;
2072
2073				port@0 {
2074					reg = <0>;
2075					lvds0_in: endpoint {
2076						remote-endpoint = <&du_out_lvds0>;
2077					};
2078				};
2079
2080				port@1 {
2081					reg = <1>;
2082				};
2083			};
2084		};
2085
2086		lvds1: lvds-encoder@feb90100 {
2087			compatible = "renesas,r8a77990-lvds";
2088			reg = <0 0xfeb90100 0 0x20>;
2089			clocks = <&cpg CPG_MOD 727>;
2090			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2091			resets = <&cpg 726>;
2092			status = "disabled";
2093
2094			ports {
2095				#address-cells = <1>;
2096				#size-cells = <0>;
2097
2098				port@0 {
2099					reg = <0>;
2100					lvds1_in: endpoint {
2101						remote-endpoint = <&du_out_lvds1>;
2102					};
2103				};
2104
2105				port@1 {
2106					reg = <1>;
2107				};
2108			};
2109		};
2110
2111		prr: chipid@fff00044 {
2112			compatible = "renesas,prr";
2113			reg = <0 0xfff00044 0 4>;
2114		};
2115	};
2116
2117	thermal-zones {
2118		cpu-thermal {
2119			polling-delay-passive = <250>;
2120			polling-delay = <0>;
2121			thermal-sensors = <&thermal>;
2122			sustainable-power = <717>;
2123
2124			cooling-maps {
2125				map0 {
2126					trip = <&target>;
2127					cooling-device = <&a53_0 0 2>;
2128					contribution = <1024>;
2129				};
2130			};
2131
2132			trips {
2133				sensor1_crit: sensor1-crit {
2134					temperature = <120000>;
2135					hysteresis = <2000>;
2136					type = "critical";
2137				};
2138
2139				target: trip-point1 {
2140					temperature = <100000>;
2141					hysteresis = <2000>;
2142					type = "passive";
2143				};
2144			};
2145		};
2146	};
2147
2148	timer {
2149		compatible = "arm,armv8-timer";
2150		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2151				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2152				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2153				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2154	};
2155};
2156