1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 /* External CAN clock - to be overridden by boards that provide it */ 52 can_clk: can { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 cluster1_opp: opp_table10 { 59 compatible = "operating-points-v2"; 60 opp-shared; 61 opp-800000000 { 62 opp-hz = /bits/ 64 <800000000>; 63 opp-microvolt = <820000>; 64 clock-latency-ns = <300000>; 65 }; 66 opp-1000000000 { 67 opp-hz = /bits/ 64 <1000000000>; 68 opp-microvolt = <820000>; 69 clock-latency-ns = <300000>; 70 }; 71 opp-1200000000 { 72 opp-hz = /bits/ 64 <1200000000>; 73 opp-microvolt = <820000>; 74 clock-latency-ns = <300000>; 75 opp-suspend; 76 }; 77 }; 78 79 cpus { 80 #address-cells = <1>; 81 #size-cells = <0>; 82 83 a53_0: cpu@0 { 84 compatible = "arm,cortex-a53"; 85 reg = <0>; 86 device_type = "cpu"; 87 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 88 next-level-cache = <&L2_CA53>; 89 enable-method = "psci"; 90 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 91 operating-points-v2 = <&cluster1_opp>; 92 }; 93 94 a53_1: cpu@1 { 95 compatible = "arm,cortex-a53"; 96 reg = <1>; 97 device_type = "cpu"; 98 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 99 next-level-cache = <&L2_CA53>; 100 enable-method = "psci"; 101 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 102 operating-points-v2 = <&cluster1_opp>; 103 }; 104 105 L2_CA53: cache-controller-0 { 106 compatible = "cache"; 107 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 108 cache-unified; 109 cache-level = <2>; 110 }; 111 }; 112 113 extal_clk: extal { 114 compatible = "fixed-clock"; 115 #clock-cells = <0>; 116 /* This value must be overridden by the board */ 117 clock-frequency = <0>; 118 }; 119 120 /* External PCIe clock - can be overridden by the board */ 121 pcie_bus_clk: pcie_bus { 122 compatible = "fixed-clock"; 123 #clock-cells = <0>; 124 clock-frequency = <0>; 125 }; 126 127 pmu_a53 { 128 compatible = "arm,cortex-a53-pmu"; 129 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 130 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 131 interrupt-affinity = <&a53_0>, <&a53_1>; 132 }; 133 134 psci { 135 compatible = "arm,psci-1.0", "arm,psci-0.2"; 136 method = "smc"; 137 }; 138 139 /* External SCIF clock - to be overridden by boards that provide it */ 140 scif_clk: scif { 141 compatible = "fixed-clock"; 142 #clock-cells = <0>; 143 clock-frequency = <0>; 144 }; 145 146 soc: soc { 147 compatible = "simple-bus"; 148 interrupt-parent = <&gic>; 149 #address-cells = <2>; 150 #size-cells = <2>; 151 ranges; 152 153 rwdt: watchdog@e6020000 { 154 compatible = "renesas,r8a77990-wdt", 155 "renesas,rcar-gen3-wdt"; 156 reg = <0 0xe6020000 0 0x0c>; 157 clocks = <&cpg CPG_MOD 402>; 158 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 159 resets = <&cpg 402>; 160 status = "disabled"; 161 }; 162 163 gpio0: gpio@e6050000 { 164 compatible = "renesas,gpio-r8a77990", 165 "renesas,rcar-gen3-gpio"; 166 reg = <0 0xe6050000 0 0x50>; 167 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 168 #gpio-cells = <2>; 169 gpio-controller; 170 gpio-ranges = <&pfc 0 0 18>; 171 #interrupt-cells = <2>; 172 interrupt-controller; 173 clocks = <&cpg CPG_MOD 912>; 174 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 175 resets = <&cpg 912>; 176 }; 177 178 gpio1: gpio@e6051000 { 179 compatible = "renesas,gpio-r8a77990", 180 "renesas,rcar-gen3-gpio"; 181 reg = <0 0xe6051000 0 0x50>; 182 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 183 #gpio-cells = <2>; 184 gpio-controller; 185 gpio-ranges = <&pfc 0 32 23>; 186 #interrupt-cells = <2>; 187 interrupt-controller; 188 clocks = <&cpg CPG_MOD 911>; 189 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 190 resets = <&cpg 911>; 191 }; 192 193 gpio2: gpio@e6052000 { 194 compatible = "renesas,gpio-r8a77990", 195 "renesas,rcar-gen3-gpio"; 196 reg = <0 0xe6052000 0 0x50>; 197 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 198 #gpio-cells = <2>; 199 gpio-controller; 200 gpio-ranges = <&pfc 0 64 26>; 201 #interrupt-cells = <2>; 202 interrupt-controller; 203 clocks = <&cpg CPG_MOD 910>; 204 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 205 resets = <&cpg 910>; 206 }; 207 208 gpio3: gpio@e6053000 { 209 compatible = "renesas,gpio-r8a77990", 210 "renesas,rcar-gen3-gpio"; 211 reg = <0 0xe6053000 0 0x50>; 212 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 213 #gpio-cells = <2>; 214 gpio-controller; 215 gpio-ranges = <&pfc 0 96 16>; 216 #interrupt-cells = <2>; 217 interrupt-controller; 218 clocks = <&cpg CPG_MOD 909>; 219 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 220 resets = <&cpg 909>; 221 }; 222 223 gpio4: gpio@e6054000 { 224 compatible = "renesas,gpio-r8a77990", 225 "renesas,rcar-gen3-gpio"; 226 reg = <0 0xe6054000 0 0x50>; 227 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 228 #gpio-cells = <2>; 229 gpio-controller; 230 gpio-ranges = <&pfc 0 128 11>; 231 #interrupt-cells = <2>; 232 interrupt-controller; 233 clocks = <&cpg CPG_MOD 908>; 234 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 235 resets = <&cpg 908>; 236 }; 237 238 gpio5: gpio@e6055000 { 239 compatible = "renesas,gpio-r8a77990", 240 "renesas,rcar-gen3-gpio"; 241 reg = <0 0xe6055000 0 0x50>; 242 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 243 #gpio-cells = <2>; 244 gpio-controller; 245 gpio-ranges = <&pfc 0 160 20>; 246 #interrupt-cells = <2>; 247 interrupt-controller; 248 clocks = <&cpg CPG_MOD 907>; 249 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 250 resets = <&cpg 907>; 251 }; 252 253 gpio6: gpio@e6055400 { 254 compatible = "renesas,gpio-r8a77990", 255 "renesas,rcar-gen3-gpio"; 256 reg = <0 0xe6055400 0 0x50>; 257 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 258 #gpio-cells = <2>; 259 gpio-controller; 260 gpio-ranges = <&pfc 0 192 18>; 261 #interrupt-cells = <2>; 262 interrupt-controller; 263 clocks = <&cpg CPG_MOD 906>; 264 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 265 resets = <&cpg 906>; 266 }; 267 268 pfc: pin-controller@e6060000 { 269 compatible = "renesas,pfc-r8a77990"; 270 reg = <0 0xe6060000 0 0x508>; 271 }; 272 273 i2c_dvfs: i2c@e60b0000 { 274 #address-cells = <1>; 275 #size-cells = <0>; 276 compatible = "renesas,iic-r8a77990"; 277 reg = <0 0xe60b0000 0 0x15>; 278 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 279 clocks = <&cpg CPG_MOD 926>; 280 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 281 resets = <&cpg 926>; 282 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 283 dma-names = "tx", "rx"; 284 status = "disabled"; 285 }; 286 287 cmt0: timer@e60f0000 { 288 compatible = "renesas,r8a77990-cmt0", 289 "renesas,rcar-gen3-cmt0"; 290 reg = <0 0xe60f0000 0 0x1004>; 291 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 292 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 293 clocks = <&cpg CPG_MOD 303>; 294 clock-names = "fck"; 295 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 296 resets = <&cpg 303>; 297 status = "disabled"; 298 }; 299 300 cmt1: timer@e6130000 { 301 compatible = "renesas,r8a77990-cmt1", 302 "renesas,rcar-gen3-cmt1"; 303 reg = <0 0xe6130000 0 0x1004>; 304 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 305 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 306 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 307 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 312 clocks = <&cpg CPG_MOD 302>; 313 clock-names = "fck"; 314 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 315 resets = <&cpg 302>; 316 status = "disabled"; 317 }; 318 319 cmt2: timer@e6140000 { 320 compatible = "renesas,r8a77990-cmt1", 321 "renesas,rcar-gen3-cmt1"; 322 reg = <0 0xe6140000 0 0x1004>; 323 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 331 clocks = <&cpg CPG_MOD 301>; 332 clock-names = "fck"; 333 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 334 resets = <&cpg 301>; 335 status = "disabled"; 336 }; 337 338 cmt3: timer@e6148000 { 339 compatible = "renesas,r8a77990-cmt1", 340 "renesas,rcar-gen3-cmt1"; 341 reg = <0 0xe6148000 0 0x1004>; 342 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 350 clocks = <&cpg CPG_MOD 300>; 351 clock-names = "fck"; 352 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 353 resets = <&cpg 300>; 354 status = "disabled"; 355 }; 356 357 cpg: clock-controller@e6150000 { 358 compatible = "renesas,r8a77990-cpg-mssr"; 359 reg = <0 0xe6150000 0 0x1000>; 360 clocks = <&extal_clk>; 361 clock-names = "extal"; 362 #clock-cells = <2>; 363 #power-domain-cells = <0>; 364 #reset-cells = <1>; 365 }; 366 367 rst: reset-controller@e6160000 { 368 compatible = "renesas,r8a77990-rst"; 369 reg = <0 0xe6160000 0 0x0200>; 370 }; 371 372 sysc: system-controller@e6180000 { 373 compatible = "renesas,r8a77990-sysc"; 374 reg = <0 0xe6180000 0 0x0400>; 375 #power-domain-cells = <1>; 376 }; 377 378 thermal: thermal@e6190000 { 379 compatible = "renesas,thermal-r8a77990"; 380 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 381 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 383 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 384 clocks = <&cpg CPG_MOD 522>; 385 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 386 resets = <&cpg 522>; 387 #thermal-sensor-cells = <0>; 388 }; 389 390 intc_ex: interrupt-controller@e61c0000 { 391 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 392 #interrupt-cells = <2>; 393 interrupt-controller; 394 reg = <0 0xe61c0000 0 0x200>; 395 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 396 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 397 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 398 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 399 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 400 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 401 clocks = <&cpg CPG_MOD 407>; 402 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 403 resets = <&cpg 407>; 404 }; 405 406 i2c0: i2c@e6500000 { 407 #address-cells = <1>; 408 #size-cells = <0>; 409 compatible = "renesas,i2c-r8a77990", 410 "renesas,rcar-gen3-i2c"; 411 reg = <0 0xe6500000 0 0x40>; 412 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 413 clocks = <&cpg CPG_MOD 931>; 414 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 415 resets = <&cpg 931>; 416 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 417 <&dmac2 0x91>, <&dmac2 0x90>; 418 dma-names = "tx", "rx", "tx", "rx"; 419 i2c-scl-internal-delay-ns = <110>; 420 status = "disabled"; 421 }; 422 423 i2c1: i2c@e6508000 { 424 #address-cells = <1>; 425 #size-cells = <0>; 426 compatible = "renesas,i2c-r8a77990", 427 "renesas,rcar-gen3-i2c"; 428 reg = <0 0xe6508000 0 0x40>; 429 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 430 clocks = <&cpg CPG_MOD 930>; 431 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 432 resets = <&cpg 930>; 433 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 434 <&dmac2 0x93>, <&dmac2 0x92>; 435 dma-names = "tx", "rx", "tx", "rx"; 436 i2c-scl-internal-delay-ns = <6>; 437 status = "disabled"; 438 }; 439 440 i2c2: i2c@e6510000 { 441 #address-cells = <1>; 442 #size-cells = <0>; 443 compatible = "renesas,i2c-r8a77990", 444 "renesas,rcar-gen3-i2c"; 445 reg = <0 0xe6510000 0 0x40>; 446 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 447 clocks = <&cpg CPG_MOD 929>; 448 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 449 resets = <&cpg 929>; 450 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 451 <&dmac2 0x95>, <&dmac2 0x94>; 452 dma-names = "tx", "rx", "tx", "rx"; 453 i2c-scl-internal-delay-ns = <6>; 454 status = "disabled"; 455 }; 456 457 i2c3: i2c@e66d0000 { 458 #address-cells = <1>; 459 #size-cells = <0>; 460 compatible = "renesas,i2c-r8a77990", 461 "renesas,rcar-gen3-i2c"; 462 reg = <0 0xe66d0000 0 0x40>; 463 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 464 clocks = <&cpg CPG_MOD 928>; 465 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 466 resets = <&cpg 928>; 467 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 468 dma-names = "tx", "rx"; 469 i2c-scl-internal-delay-ns = <110>; 470 status = "disabled"; 471 }; 472 473 i2c4: i2c@e66d8000 { 474 #address-cells = <1>; 475 #size-cells = <0>; 476 compatible = "renesas,i2c-r8a77990", 477 "renesas,rcar-gen3-i2c"; 478 reg = <0 0xe66d8000 0 0x40>; 479 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 480 clocks = <&cpg CPG_MOD 927>; 481 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 482 resets = <&cpg 927>; 483 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 484 dma-names = "tx", "rx"; 485 i2c-scl-internal-delay-ns = <6>; 486 status = "disabled"; 487 }; 488 489 i2c5: i2c@e66e0000 { 490 #address-cells = <1>; 491 #size-cells = <0>; 492 compatible = "renesas,i2c-r8a77990", 493 "renesas,rcar-gen3-i2c"; 494 reg = <0 0xe66e0000 0 0x40>; 495 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 496 clocks = <&cpg CPG_MOD 919>; 497 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 498 resets = <&cpg 919>; 499 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 500 dma-names = "tx", "rx"; 501 i2c-scl-internal-delay-ns = <6>; 502 status = "disabled"; 503 }; 504 505 i2c6: i2c@e66e8000 { 506 #address-cells = <1>; 507 #size-cells = <0>; 508 compatible = "renesas,i2c-r8a77990", 509 "renesas,rcar-gen3-i2c"; 510 reg = <0 0xe66e8000 0 0x40>; 511 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 512 clocks = <&cpg CPG_MOD 918>; 513 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 514 resets = <&cpg 918>; 515 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 516 dma-names = "tx", "rx"; 517 i2c-scl-internal-delay-ns = <6>; 518 status = "disabled"; 519 }; 520 521 i2c7: i2c@e6690000 { 522 #address-cells = <1>; 523 #size-cells = <0>; 524 compatible = "renesas,i2c-r8a77990", 525 "renesas,rcar-gen3-i2c"; 526 reg = <0 0xe6690000 0 0x40>; 527 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 528 clocks = <&cpg CPG_MOD 1003>; 529 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 530 resets = <&cpg 1003>; 531 i2c-scl-internal-delay-ns = <6>; 532 status = "disabled"; 533 }; 534 535 hscif0: serial@e6540000 { 536 compatible = "renesas,hscif-r8a77990", 537 "renesas,rcar-gen3-hscif", 538 "renesas,hscif"; 539 reg = <0 0xe6540000 0 0x60>; 540 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 541 clocks = <&cpg CPG_MOD 520>, 542 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 543 <&scif_clk>; 544 clock-names = "fck", "brg_int", "scif_clk"; 545 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 546 <&dmac2 0x31>, <&dmac2 0x30>; 547 dma-names = "tx", "rx", "tx", "rx"; 548 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 549 resets = <&cpg 520>; 550 status = "disabled"; 551 }; 552 553 hscif1: serial@e6550000 { 554 compatible = "renesas,hscif-r8a77990", 555 "renesas,rcar-gen3-hscif", 556 "renesas,hscif"; 557 reg = <0 0xe6550000 0 0x60>; 558 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 559 clocks = <&cpg CPG_MOD 519>, 560 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 561 <&scif_clk>; 562 clock-names = "fck", "brg_int", "scif_clk"; 563 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 564 <&dmac2 0x33>, <&dmac2 0x32>; 565 dma-names = "tx", "rx", "tx", "rx"; 566 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 567 resets = <&cpg 519>; 568 status = "disabled"; 569 }; 570 571 hscif2: serial@e6560000 { 572 compatible = "renesas,hscif-r8a77990", 573 "renesas,rcar-gen3-hscif", 574 "renesas,hscif"; 575 reg = <0 0xe6560000 0 0x60>; 576 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 577 clocks = <&cpg CPG_MOD 518>, 578 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 579 <&scif_clk>; 580 clock-names = "fck", "brg_int", "scif_clk"; 581 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 582 <&dmac2 0x35>, <&dmac2 0x34>; 583 dma-names = "tx", "rx", "tx", "rx"; 584 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 585 resets = <&cpg 518>; 586 status = "disabled"; 587 }; 588 589 hscif3: serial@e66a0000 { 590 compatible = "renesas,hscif-r8a77990", 591 "renesas,rcar-gen3-hscif", 592 "renesas,hscif"; 593 reg = <0 0xe66a0000 0 0x60>; 594 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 517>, 596 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 597 <&scif_clk>; 598 clock-names = "fck", "brg_int", "scif_clk"; 599 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 600 dma-names = "tx", "rx"; 601 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 602 resets = <&cpg 517>; 603 status = "disabled"; 604 }; 605 606 hscif4: serial@e66b0000 { 607 compatible = "renesas,hscif-r8a77990", 608 "renesas,rcar-gen3-hscif", 609 "renesas,hscif"; 610 reg = <0 0xe66b0000 0 0x60>; 611 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 516>, 613 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 614 <&scif_clk>; 615 clock-names = "fck", "brg_int", "scif_clk"; 616 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 617 dma-names = "tx", "rx"; 618 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 619 resets = <&cpg 516>; 620 status = "disabled"; 621 }; 622 623 hsusb: usb@e6590000 { 624 compatible = "renesas,usbhs-r8a77990", 625 "renesas,rcar-gen3-usbhs"; 626 reg = <0 0xe6590000 0 0x200>; 627 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 628 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 629 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 630 <&usb_dmac1 0>, <&usb_dmac1 1>; 631 dma-names = "ch0", "ch1", "ch2", "ch3"; 632 renesas,buswait = <11>; 633 phys = <&usb2_phy0>; 634 phy-names = "usb"; 635 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 636 resets = <&cpg 704>, <&cpg 703>; 637 status = "disabled"; 638 }; 639 640 usb_dmac0: dma-controller@e65a0000 { 641 compatible = "renesas,r8a77990-usb-dmac", 642 "renesas,usb-dmac"; 643 reg = <0 0xe65a0000 0 0x100>; 644 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 645 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 646 interrupt-names = "ch0", "ch1"; 647 clocks = <&cpg CPG_MOD 330>; 648 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 649 resets = <&cpg 330>; 650 #dma-cells = <1>; 651 dma-channels = <2>; 652 }; 653 654 usb_dmac1: dma-controller@e65b0000 { 655 compatible = "renesas,r8a77990-usb-dmac", 656 "renesas,usb-dmac"; 657 reg = <0 0xe65b0000 0 0x100>; 658 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 660 interrupt-names = "ch0", "ch1"; 661 clocks = <&cpg CPG_MOD 331>; 662 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 663 resets = <&cpg 331>; 664 #dma-cells = <1>; 665 dma-channels = <2>; 666 }; 667 668 dmac0: dma-controller@e6700000 { 669 compatible = "renesas,dmac-r8a77990", 670 "renesas,rcar-dmac"; 671 reg = <0 0xe6700000 0 0x10000>; 672 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 673 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 674 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 675 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 676 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 677 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 678 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 679 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 680 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 681 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 682 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 683 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 684 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 685 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 686 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 687 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 688 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 689 interrupt-names = "error", 690 "ch0", "ch1", "ch2", "ch3", 691 "ch4", "ch5", "ch6", "ch7", 692 "ch8", "ch9", "ch10", "ch11", 693 "ch12", "ch13", "ch14", "ch15"; 694 clocks = <&cpg CPG_MOD 219>; 695 clock-names = "fck"; 696 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 697 resets = <&cpg 219>; 698 #dma-cells = <1>; 699 dma-channels = <16>; 700 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 701 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 702 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 703 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 704 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 705 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 706 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 707 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 708 }; 709 710 dmac1: dma-controller@e7300000 { 711 compatible = "renesas,dmac-r8a77990", 712 "renesas,rcar-dmac"; 713 reg = <0 0xe7300000 0 0x10000>; 714 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 715 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 716 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 717 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 718 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 719 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 720 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 721 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 722 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 723 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 724 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 725 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 726 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 727 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 728 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 729 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 730 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 731 interrupt-names = "error", 732 "ch0", "ch1", "ch2", "ch3", 733 "ch4", "ch5", "ch6", "ch7", 734 "ch8", "ch9", "ch10", "ch11", 735 "ch12", "ch13", "ch14", "ch15"; 736 clocks = <&cpg CPG_MOD 218>; 737 clock-names = "fck"; 738 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 739 resets = <&cpg 218>; 740 #dma-cells = <1>; 741 dma-channels = <16>; 742 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 743 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 744 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 745 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 746 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 747 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 748 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 749 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 750 }; 751 752 dmac2: dma-controller@e7310000 { 753 compatible = "renesas,dmac-r8a77990", 754 "renesas,rcar-dmac"; 755 reg = <0 0xe7310000 0 0x10000>; 756 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 757 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 758 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 759 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 760 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 761 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 762 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 763 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 764 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 765 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 766 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 767 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 768 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 769 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 770 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 771 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 772 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 773 interrupt-names = "error", 774 "ch0", "ch1", "ch2", "ch3", 775 "ch4", "ch5", "ch6", "ch7", 776 "ch8", "ch9", "ch10", "ch11", 777 "ch12", "ch13", "ch14", "ch15"; 778 clocks = <&cpg CPG_MOD 217>; 779 clock-names = "fck"; 780 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 781 resets = <&cpg 217>; 782 #dma-cells = <1>; 783 dma-channels = <16>; 784 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 785 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 786 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 787 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 788 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 789 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 790 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 791 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 792 }; 793 794 ipmmu_ds0: mmu@e6740000 { 795 compatible = "renesas,ipmmu-r8a77990"; 796 reg = <0 0xe6740000 0 0x1000>; 797 renesas,ipmmu-main = <&ipmmu_mm 0>; 798 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 799 #iommu-cells = <1>; 800 }; 801 802 ipmmu_ds1: mmu@e7740000 { 803 compatible = "renesas,ipmmu-r8a77990"; 804 reg = <0 0xe7740000 0 0x1000>; 805 renesas,ipmmu-main = <&ipmmu_mm 1>; 806 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 807 #iommu-cells = <1>; 808 }; 809 810 ipmmu_hc: mmu@e6570000 { 811 compatible = "renesas,ipmmu-r8a77990"; 812 reg = <0 0xe6570000 0 0x1000>; 813 renesas,ipmmu-main = <&ipmmu_mm 2>; 814 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 815 #iommu-cells = <1>; 816 }; 817 818 ipmmu_mm: mmu@e67b0000 { 819 compatible = "renesas,ipmmu-r8a77990"; 820 reg = <0 0xe67b0000 0 0x1000>; 821 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 823 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 824 #iommu-cells = <1>; 825 }; 826 827 ipmmu_mp: mmu@ec670000 { 828 compatible = "renesas,ipmmu-r8a77990"; 829 reg = <0 0xec670000 0 0x1000>; 830 renesas,ipmmu-main = <&ipmmu_mm 4>; 831 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 832 #iommu-cells = <1>; 833 }; 834 835 ipmmu_pv0: mmu@fd800000 { 836 compatible = "renesas,ipmmu-r8a77990"; 837 reg = <0 0xfd800000 0 0x1000>; 838 renesas,ipmmu-main = <&ipmmu_mm 6>; 839 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 840 #iommu-cells = <1>; 841 }; 842 843 ipmmu_rt: mmu@ffc80000 { 844 compatible = "renesas,ipmmu-r8a77990"; 845 reg = <0 0xffc80000 0 0x1000>; 846 renesas,ipmmu-main = <&ipmmu_mm 10>; 847 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 848 #iommu-cells = <1>; 849 }; 850 851 ipmmu_vc0: mmu@fe6b0000 { 852 compatible = "renesas,ipmmu-r8a77990"; 853 reg = <0 0xfe6b0000 0 0x1000>; 854 renesas,ipmmu-main = <&ipmmu_mm 12>; 855 power-domains = <&sysc R8A77990_PD_A3VC>; 856 #iommu-cells = <1>; 857 }; 858 859 ipmmu_vi0: mmu@febd0000 { 860 compatible = "renesas,ipmmu-r8a77990"; 861 reg = <0 0xfebd0000 0 0x1000>; 862 renesas,ipmmu-main = <&ipmmu_mm 14>; 863 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 864 #iommu-cells = <1>; 865 }; 866 867 ipmmu_vp0: mmu@fe990000 { 868 compatible = "renesas,ipmmu-r8a77990"; 869 reg = <0 0xfe990000 0 0x1000>; 870 renesas,ipmmu-main = <&ipmmu_mm 16>; 871 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 872 #iommu-cells = <1>; 873 }; 874 875 avb: ethernet@e6800000 { 876 compatible = "renesas,etheravb-r8a77990", 877 "renesas,etheravb-rcar-gen3"; 878 reg = <0 0xe6800000 0 0x800>; 879 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 896 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 897 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 898 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 899 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 904 interrupt-names = "ch0", "ch1", "ch2", "ch3", 905 "ch4", "ch5", "ch6", "ch7", 906 "ch8", "ch9", "ch10", "ch11", 907 "ch12", "ch13", "ch14", "ch15", 908 "ch16", "ch17", "ch18", "ch19", 909 "ch20", "ch21", "ch22", "ch23", 910 "ch24"; 911 clocks = <&cpg CPG_MOD 812>; 912 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 913 resets = <&cpg 812>; 914 phy-mode = "rgmii"; 915 iommus = <&ipmmu_ds0 16>; 916 #address-cells = <1>; 917 #size-cells = <0>; 918 status = "disabled"; 919 }; 920 921 can0: can@e6c30000 { 922 compatible = "renesas,can-r8a77990", 923 "renesas,rcar-gen3-can"; 924 reg = <0 0xe6c30000 0 0x1000>; 925 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 926 clocks = <&cpg CPG_MOD 916>, 927 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 928 <&can_clk>; 929 clock-names = "clkp1", "clkp2", "can_clk"; 930 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 931 assigned-clock-rates = <40000000>; 932 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 933 resets = <&cpg 916>; 934 status = "disabled"; 935 }; 936 937 can1: can@e6c38000 { 938 compatible = "renesas,can-r8a77990", 939 "renesas,rcar-gen3-can"; 940 reg = <0 0xe6c38000 0 0x1000>; 941 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 942 clocks = <&cpg CPG_MOD 915>, 943 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 944 <&can_clk>; 945 clock-names = "clkp1", "clkp2", "can_clk"; 946 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 947 assigned-clock-rates = <40000000>; 948 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 949 resets = <&cpg 915>; 950 status = "disabled"; 951 }; 952 953 canfd: can@e66c0000 { 954 compatible = "renesas,r8a77990-canfd", 955 "renesas,rcar-gen3-canfd"; 956 reg = <0 0xe66c0000 0 0x8000>; 957 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 959 clocks = <&cpg CPG_MOD 914>, 960 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 961 <&can_clk>; 962 clock-names = "fck", "canfd", "can_clk"; 963 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 964 assigned-clock-rates = <40000000>; 965 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 966 resets = <&cpg 914>; 967 status = "disabled"; 968 969 channel0 { 970 status = "disabled"; 971 }; 972 973 channel1 { 974 status = "disabled"; 975 }; 976 }; 977 978 pwm0: pwm@e6e30000 { 979 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 980 reg = <0 0xe6e30000 0 0x8>; 981 clocks = <&cpg CPG_MOD 523>; 982 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 983 resets = <&cpg 523>; 984 #pwm-cells = <2>; 985 status = "disabled"; 986 }; 987 988 pwm1: pwm@e6e31000 { 989 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 990 reg = <0 0xe6e31000 0 0x8>; 991 clocks = <&cpg CPG_MOD 523>; 992 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 993 resets = <&cpg 523>; 994 #pwm-cells = <2>; 995 status = "disabled"; 996 }; 997 998 pwm2: pwm@e6e32000 { 999 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1000 reg = <0 0xe6e32000 0 0x8>; 1001 clocks = <&cpg CPG_MOD 523>; 1002 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1003 resets = <&cpg 523>; 1004 #pwm-cells = <2>; 1005 status = "disabled"; 1006 }; 1007 1008 pwm3: pwm@e6e33000 { 1009 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1010 reg = <0 0xe6e33000 0 0x8>; 1011 clocks = <&cpg CPG_MOD 523>; 1012 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1013 resets = <&cpg 523>; 1014 #pwm-cells = <2>; 1015 status = "disabled"; 1016 }; 1017 1018 pwm4: pwm@e6e34000 { 1019 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1020 reg = <0 0xe6e34000 0 0x8>; 1021 clocks = <&cpg CPG_MOD 523>; 1022 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1023 resets = <&cpg 523>; 1024 #pwm-cells = <2>; 1025 status = "disabled"; 1026 }; 1027 1028 pwm5: pwm@e6e35000 { 1029 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1030 reg = <0 0xe6e35000 0 0x8>; 1031 clocks = <&cpg CPG_MOD 523>; 1032 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1033 resets = <&cpg 523>; 1034 #pwm-cells = <2>; 1035 status = "disabled"; 1036 }; 1037 1038 pwm6: pwm@e6e36000 { 1039 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1040 reg = <0 0xe6e36000 0 0x8>; 1041 clocks = <&cpg CPG_MOD 523>; 1042 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1043 resets = <&cpg 523>; 1044 #pwm-cells = <2>; 1045 status = "disabled"; 1046 }; 1047 1048 scif0: serial@e6e60000 { 1049 compatible = "renesas,scif-r8a77990", 1050 "renesas,rcar-gen3-scif", "renesas,scif"; 1051 reg = <0 0xe6e60000 0 64>; 1052 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1053 clocks = <&cpg CPG_MOD 207>, 1054 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1055 <&scif_clk>; 1056 clock-names = "fck", "brg_int", "scif_clk"; 1057 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1058 <&dmac2 0x51>, <&dmac2 0x50>; 1059 dma-names = "tx", "rx", "tx", "rx"; 1060 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1061 resets = <&cpg 207>; 1062 status = "disabled"; 1063 }; 1064 1065 scif1: serial@e6e68000 { 1066 compatible = "renesas,scif-r8a77990", 1067 "renesas,rcar-gen3-scif", "renesas,scif"; 1068 reg = <0 0xe6e68000 0 64>; 1069 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1070 clocks = <&cpg CPG_MOD 206>, 1071 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1072 <&scif_clk>; 1073 clock-names = "fck", "brg_int", "scif_clk"; 1074 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1075 <&dmac2 0x53>, <&dmac2 0x52>; 1076 dma-names = "tx", "rx", "tx", "rx"; 1077 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1078 resets = <&cpg 206>; 1079 status = "disabled"; 1080 }; 1081 1082 scif2: serial@e6e88000 { 1083 compatible = "renesas,scif-r8a77990", 1084 "renesas,rcar-gen3-scif", "renesas,scif"; 1085 reg = <0 0xe6e88000 0 64>; 1086 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1087 clocks = <&cpg CPG_MOD 310>, 1088 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1089 <&scif_clk>; 1090 clock-names = "fck", "brg_int", "scif_clk"; 1091 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1092 <&dmac2 0x13>, <&dmac2 0x12>; 1093 dma-names = "tx", "rx", "tx", "rx"; 1094 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1095 resets = <&cpg 310>; 1096 status = "disabled"; 1097 }; 1098 1099 scif3: serial@e6c50000 { 1100 compatible = "renesas,scif-r8a77990", 1101 "renesas,rcar-gen3-scif", "renesas,scif"; 1102 reg = <0 0xe6c50000 0 64>; 1103 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1104 clocks = <&cpg CPG_MOD 204>, 1105 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1106 <&scif_clk>; 1107 clock-names = "fck", "brg_int", "scif_clk"; 1108 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1109 dma-names = "tx", "rx"; 1110 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1111 resets = <&cpg 204>; 1112 status = "disabled"; 1113 }; 1114 1115 scif4: serial@e6c40000 { 1116 compatible = "renesas,scif-r8a77990", 1117 "renesas,rcar-gen3-scif", "renesas,scif"; 1118 reg = <0 0xe6c40000 0 64>; 1119 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1120 clocks = <&cpg CPG_MOD 203>, 1121 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1122 <&scif_clk>; 1123 clock-names = "fck", "brg_int", "scif_clk"; 1124 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1125 dma-names = "tx", "rx"; 1126 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1127 resets = <&cpg 203>; 1128 status = "disabled"; 1129 }; 1130 1131 scif5: serial@e6f30000 { 1132 compatible = "renesas,scif-r8a77990", 1133 "renesas,rcar-gen3-scif", "renesas,scif"; 1134 reg = <0 0xe6f30000 0 64>; 1135 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1136 clocks = <&cpg CPG_MOD 202>, 1137 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1138 <&scif_clk>; 1139 clock-names = "fck", "brg_int", "scif_clk"; 1140 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1141 dma-names = "tx", "rx"; 1142 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1143 resets = <&cpg 202>; 1144 status = "disabled"; 1145 }; 1146 1147 msiof0: spi@e6e90000 { 1148 compatible = "renesas,msiof-r8a77990", 1149 "renesas,rcar-gen3-msiof"; 1150 reg = <0 0xe6e90000 0 0x0064>; 1151 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1152 clocks = <&cpg CPG_MOD 211>; 1153 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1154 <&dmac2 0x41>, <&dmac2 0x40>; 1155 dma-names = "tx", "rx", "tx", "rx"; 1156 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1157 resets = <&cpg 211>; 1158 #address-cells = <1>; 1159 #size-cells = <0>; 1160 status = "disabled"; 1161 }; 1162 1163 msiof1: spi@e6ea0000 { 1164 compatible = "renesas,msiof-r8a77990", 1165 "renesas,rcar-gen3-msiof"; 1166 reg = <0 0xe6ea0000 0 0x0064>; 1167 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1168 clocks = <&cpg CPG_MOD 210>; 1169 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1170 <&dmac2 0x43>, <&dmac2 0x42>; 1171 dma-names = "tx", "rx", "tx", "rx"; 1172 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1173 resets = <&cpg 210>; 1174 #address-cells = <1>; 1175 #size-cells = <0>; 1176 status = "disabled"; 1177 }; 1178 1179 msiof2: spi@e6c00000 { 1180 compatible = "renesas,msiof-r8a77990", 1181 "renesas,rcar-gen3-msiof"; 1182 reg = <0 0xe6c00000 0 0x0064>; 1183 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1184 clocks = <&cpg CPG_MOD 209>; 1185 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1186 dma-names = "tx", "rx"; 1187 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1188 resets = <&cpg 209>; 1189 #address-cells = <1>; 1190 #size-cells = <0>; 1191 status = "disabled"; 1192 }; 1193 1194 msiof3: spi@e6c10000 { 1195 compatible = "renesas,msiof-r8a77990", 1196 "renesas,rcar-gen3-msiof"; 1197 reg = <0 0xe6c10000 0 0x0064>; 1198 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1199 clocks = <&cpg CPG_MOD 208>; 1200 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1201 dma-names = "tx", "rx"; 1202 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1203 resets = <&cpg 208>; 1204 #address-cells = <1>; 1205 #size-cells = <0>; 1206 status = "disabled"; 1207 }; 1208 1209 vin4: video@e6ef4000 { 1210 compatible = "renesas,vin-r8a77990"; 1211 reg = <0 0xe6ef4000 0 0x1000>; 1212 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1213 clocks = <&cpg CPG_MOD 807>; 1214 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1215 resets = <&cpg 807>; 1216 renesas,id = <4>; 1217 status = "disabled"; 1218 1219 ports { 1220 #address-cells = <1>; 1221 #size-cells = <0>; 1222 1223 port@1 { 1224 #address-cells = <1>; 1225 #size-cells = <0>; 1226 1227 reg = <1>; 1228 1229 vin4csi40: endpoint@2 { 1230 reg = <2>; 1231 remote-endpoint= <&csi40vin4>; 1232 }; 1233 }; 1234 }; 1235 }; 1236 1237 vin5: video@e6ef5000 { 1238 compatible = "renesas,vin-r8a77990"; 1239 reg = <0 0xe6ef5000 0 0x1000>; 1240 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1241 clocks = <&cpg CPG_MOD 806>; 1242 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1243 resets = <&cpg 806>; 1244 renesas,id = <5>; 1245 status = "disabled"; 1246 1247 ports { 1248 #address-cells = <1>; 1249 #size-cells = <0>; 1250 1251 port@1 { 1252 #address-cells = <1>; 1253 #size-cells = <0>; 1254 1255 reg = <1>; 1256 1257 vin5csi40: endpoint@2 { 1258 reg = <2>; 1259 remote-endpoint= <&csi40vin5>; 1260 }; 1261 }; 1262 }; 1263 }; 1264 1265 rcar_sound: sound@ec500000 { 1266 /* 1267 * #sound-dai-cells is required 1268 * 1269 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1270 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1271 */ 1272 /* 1273 * #clock-cells is required for audio_clkout0/1/2/3 1274 * 1275 * clkout : #clock-cells = <0>; <&rcar_sound>; 1276 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1277 */ 1278 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1279 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1280 <0 0xec5a0000 0 0x100>, /* ADG */ 1281 <0 0xec540000 0 0x1000>, /* SSIU */ 1282 <0 0xec541000 0 0x280>, /* SSI */ 1283 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1284 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1285 1286 clocks = <&cpg CPG_MOD 1005>, 1287 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1288 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1289 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1290 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1291 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1292 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1293 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1294 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1295 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1296 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1297 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1298 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1299 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1300 <&audio_clk_a>, <&audio_clk_b>, 1301 <&audio_clk_c>, 1302 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1303 clock-names = "ssi-all", 1304 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1305 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1306 "ssi.1", "ssi.0", 1307 "src.9", "src.8", "src.7", "src.6", 1308 "src.5", "src.4", "src.3", "src.2", 1309 "src.1", "src.0", 1310 "mix.1", "mix.0", 1311 "ctu.1", "ctu.0", 1312 "dvc.0", "dvc.1", 1313 "clk_a", "clk_b", "clk_c", "clk_i"; 1314 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1315 resets = <&cpg 1005>, 1316 <&cpg 1006>, <&cpg 1007>, 1317 <&cpg 1008>, <&cpg 1009>, 1318 <&cpg 1010>, <&cpg 1011>, 1319 <&cpg 1012>, <&cpg 1013>, 1320 <&cpg 1014>, <&cpg 1015>; 1321 reset-names = "ssi-all", 1322 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1323 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1324 "ssi.1", "ssi.0"; 1325 status = "disabled"; 1326 1327 rcar_sound,dvc { 1328 dvc0: dvc-0 { 1329 dmas = <&audma0 0xbc>; 1330 dma-names = "tx"; 1331 }; 1332 dvc1: dvc-1 { 1333 dmas = <&audma0 0xbe>; 1334 dma-names = "tx"; 1335 }; 1336 }; 1337 1338 rcar_sound,mix { 1339 mix0: mix-0 { }; 1340 mix1: mix-1 { }; 1341 }; 1342 1343 rcar_sound,ctu { 1344 ctu00: ctu-0 { }; 1345 ctu01: ctu-1 { }; 1346 ctu02: ctu-2 { }; 1347 ctu03: ctu-3 { }; 1348 ctu10: ctu-4 { }; 1349 ctu11: ctu-5 { }; 1350 ctu12: ctu-6 { }; 1351 ctu13: ctu-7 { }; 1352 }; 1353 1354 rcar_sound,src { 1355 src0: src-0 { 1356 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1357 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1358 dma-names = "rx", "tx"; 1359 }; 1360 src1: src-1 { 1361 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1362 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1363 dma-names = "rx", "tx"; 1364 }; 1365 src2: src-2 { 1366 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1367 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1368 dma-names = "rx", "tx"; 1369 }; 1370 src3: src-3 { 1371 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1372 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1373 dma-names = "rx", "tx"; 1374 }; 1375 src4: src-4 { 1376 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1377 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1378 dma-names = "rx", "tx"; 1379 }; 1380 src5: src-5 { 1381 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1382 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1383 dma-names = "rx", "tx"; 1384 }; 1385 src6: src-6 { 1386 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1387 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1388 dma-names = "rx", "tx"; 1389 }; 1390 src7: src-7 { 1391 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1392 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1393 dma-names = "rx", "tx"; 1394 }; 1395 src8: src-8 { 1396 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1397 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1398 dma-names = "rx", "tx"; 1399 }; 1400 src9: src-9 { 1401 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1402 dmas = <&audma0 0x97>, <&audma0 0xba>; 1403 dma-names = "rx", "tx"; 1404 }; 1405 }; 1406 1407 rcar_sound,ssi { 1408 ssi0: ssi-0 { 1409 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1410 dmas = <&audma0 0x01>, <&audma0 0x02>, 1411 <&audma0 0x15>, <&audma0 0x16>; 1412 dma-names = "rx", "tx", "rxu", "txu"; 1413 }; 1414 ssi1: ssi-1 { 1415 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1416 dmas = <&audma0 0x03>, <&audma0 0x04>, 1417 <&audma0 0x49>, <&audma0 0x4a>; 1418 dma-names = "rx", "tx", "rxu", "txu"; 1419 }; 1420 ssi2: ssi-2 { 1421 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1422 dmas = <&audma0 0x05>, <&audma0 0x06>, 1423 <&audma0 0x63>, <&audma0 0x64>; 1424 dma-names = "rx", "tx", "rxu", "txu"; 1425 }; 1426 ssi3: ssi-3 { 1427 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1428 dmas = <&audma0 0x07>, <&audma0 0x08>, 1429 <&audma0 0x6f>, <&audma0 0x70>; 1430 dma-names = "rx", "tx", "rxu", "txu"; 1431 }; 1432 ssi4: ssi-4 { 1433 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1434 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1435 <&audma0 0x71>, <&audma0 0x72>; 1436 dma-names = "rx", "tx", "rxu", "txu"; 1437 }; 1438 ssi5: ssi-5 { 1439 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1440 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1441 <&audma0 0x73>, <&audma0 0x74>; 1442 dma-names = "rx", "tx", "rxu", "txu"; 1443 }; 1444 ssi6: ssi-6 { 1445 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1446 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1447 <&audma0 0x75>, <&audma0 0x76>; 1448 dma-names = "rx", "tx", "rxu", "txu"; 1449 }; 1450 ssi7: ssi-7 { 1451 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1452 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1453 <&audma0 0x79>, <&audma0 0x7a>; 1454 dma-names = "rx", "tx", "rxu", "txu"; 1455 }; 1456 ssi8: ssi-8 { 1457 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1458 dmas = <&audma0 0x11>, <&audma0 0x12>, 1459 <&audma0 0x7b>, <&audma0 0x7c>; 1460 dma-names = "rx", "tx", "rxu", "txu"; 1461 }; 1462 ssi9: ssi-9 { 1463 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1464 dmas = <&audma0 0x13>, <&audma0 0x14>, 1465 <&audma0 0x7d>, <&audma0 0x7e>; 1466 dma-names = "rx", "tx", "rxu", "txu"; 1467 }; 1468 }; 1469 }; 1470 1471 audma0: dma-controller@ec700000 { 1472 compatible = "renesas,dmac-r8a77990", 1473 "renesas,rcar-dmac"; 1474 reg = <0 0xec700000 0 0x10000>; 1475 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1476 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1477 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1478 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1479 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1480 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1481 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1482 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1483 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1484 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1485 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1486 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1487 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1488 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1489 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1490 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1491 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1492 interrupt-names = "error", 1493 "ch0", "ch1", "ch2", "ch3", 1494 "ch4", "ch5", "ch6", "ch7", 1495 "ch8", "ch9", "ch10", "ch11", 1496 "ch12", "ch13", "ch14", "ch15"; 1497 clocks = <&cpg CPG_MOD 502>; 1498 clock-names = "fck"; 1499 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1500 resets = <&cpg 502>; 1501 #dma-cells = <1>; 1502 dma-channels = <16>; 1503 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1504 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1505 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1506 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1507 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1508 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1509 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1510 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1511 }; 1512 1513 xhci0: usb@ee000000 { 1514 compatible = "renesas,xhci-r8a77990", 1515 "renesas,rcar-gen3-xhci"; 1516 reg = <0 0xee000000 0 0xc00>; 1517 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1518 clocks = <&cpg CPG_MOD 328>; 1519 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1520 resets = <&cpg 328>; 1521 status = "disabled"; 1522 }; 1523 1524 usb3_peri0: usb@ee020000 { 1525 compatible = "renesas,r8a77990-usb3-peri", 1526 "renesas,rcar-gen3-usb3-peri"; 1527 reg = <0 0xee020000 0 0x400>; 1528 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1529 clocks = <&cpg CPG_MOD 328>; 1530 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1531 resets = <&cpg 328>; 1532 status = "disabled"; 1533 }; 1534 1535 ohci0: usb@ee080000 { 1536 compatible = "generic-ohci"; 1537 reg = <0 0xee080000 0 0x100>; 1538 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1539 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1540 phys = <&usb2_phy0>; 1541 phy-names = "usb"; 1542 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1543 resets = <&cpg 703>, <&cpg 704>; 1544 status = "disabled"; 1545 }; 1546 1547 ehci0: usb@ee080100 { 1548 compatible = "generic-ehci"; 1549 reg = <0 0xee080100 0 0x100>; 1550 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1551 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1552 phys = <&usb2_phy0>; 1553 phy-names = "usb"; 1554 companion = <&ohci0>; 1555 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1556 resets = <&cpg 703>, <&cpg 704>; 1557 status = "disabled"; 1558 }; 1559 1560 usb2_phy0: usb-phy@ee080200 { 1561 compatible = "renesas,usb2-phy-r8a77990", 1562 "renesas,rcar-gen3-usb2-phy"; 1563 reg = <0 0xee080200 0 0x700>; 1564 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1565 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1566 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1567 resets = <&cpg 703>, <&cpg 704>; 1568 #phy-cells = <0>; 1569 status = "disabled"; 1570 }; 1571 1572 sdhi0: sd@ee100000 { 1573 compatible = "renesas,sdhi-r8a77990", 1574 "renesas,rcar-gen3-sdhi"; 1575 reg = <0 0xee100000 0 0x2000>; 1576 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1577 clocks = <&cpg CPG_MOD 314>; 1578 max-frequency = <200000000>; 1579 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1580 resets = <&cpg 314>; 1581 status = "disabled"; 1582 }; 1583 1584 sdhi1: sd@ee120000 { 1585 compatible = "renesas,sdhi-r8a77990", 1586 "renesas,rcar-gen3-sdhi"; 1587 reg = <0 0xee120000 0 0x2000>; 1588 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1589 clocks = <&cpg CPG_MOD 313>; 1590 max-frequency = <200000000>; 1591 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1592 resets = <&cpg 313>; 1593 status = "disabled"; 1594 }; 1595 1596 sdhi3: sd@ee160000 { 1597 compatible = "renesas,sdhi-r8a77990", 1598 "renesas,rcar-gen3-sdhi"; 1599 reg = <0 0xee160000 0 0x2000>; 1600 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1601 clocks = <&cpg CPG_MOD 311>; 1602 max-frequency = <200000000>; 1603 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1604 resets = <&cpg 311>; 1605 status = "disabled"; 1606 }; 1607 1608 gic: interrupt-controller@f1010000 { 1609 compatible = "arm,gic-400"; 1610 #interrupt-cells = <3>; 1611 #address-cells = <0>; 1612 interrupt-controller; 1613 reg = <0x0 0xf1010000 0 0x1000>, 1614 <0x0 0xf1020000 0 0x20000>, 1615 <0x0 0xf1040000 0 0x20000>, 1616 <0x0 0xf1060000 0 0x20000>; 1617 interrupts = <GIC_PPI 9 1618 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1619 clocks = <&cpg CPG_MOD 408>; 1620 clock-names = "clk"; 1621 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1622 resets = <&cpg 408>; 1623 }; 1624 1625 pciec0: pcie@fe000000 { 1626 compatible = "renesas,pcie-r8a77990", 1627 "renesas,pcie-rcar-gen3"; 1628 reg = <0 0xfe000000 0 0x80000>; 1629 #address-cells = <3>; 1630 #size-cells = <2>; 1631 bus-range = <0x00 0xff>; 1632 device_type = "pci"; 1633 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1634 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1635 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1636 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1637 /* Map all possible DDR as inbound ranges */ 1638 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1639 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1640 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1641 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1642 #interrupt-cells = <1>; 1643 interrupt-map-mask = <0 0 0 0>; 1644 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1645 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1646 clock-names = "pcie", "pcie_bus"; 1647 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1648 resets = <&cpg 319>; 1649 status = "disabled"; 1650 }; 1651 1652 vspb0: vsp@fe960000 { 1653 compatible = "renesas,vsp2"; 1654 reg = <0 0xfe960000 0 0x8000>; 1655 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1656 clocks = <&cpg CPG_MOD 626>; 1657 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1658 resets = <&cpg 626>; 1659 renesas,fcp = <&fcpvb0>; 1660 }; 1661 1662 fcpvb0: fcp@fe96f000 { 1663 compatible = "renesas,fcpv"; 1664 reg = <0 0xfe96f000 0 0x200>; 1665 clocks = <&cpg CPG_MOD 607>; 1666 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1667 resets = <&cpg 607>; 1668 iommus = <&ipmmu_vp0 5>; 1669 }; 1670 1671 vspi0: vsp@fe9a0000 { 1672 compatible = "renesas,vsp2"; 1673 reg = <0 0xfe9a0000 0 0x8000>; 1674 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1675 clocks = <&cpg CPG_MOD 631>; 1676 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1677 resets = <&cpg 631>; 1678 renesas,fcp = <&fcpvi0>; 1679 }; 1680 1681 fcpvi0: fcp@fe9af000 { 1682 compatible = "renesas,fcpv"; 1683 reg = <0 0xfe9af000 0 0x200>; 1684 clocks = <&cpg CPG_MOD 611>; 1685 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1686 resets = <&cpg 611>; 1687 iommus = <&ipmmu_vp0 8>; 1688 }; 1689 1690 vspd0: vsp@fea20000 { 1691 compatible = "renesas,vsp2"; 1692 reg = <0 0xfea20000 0 0x7000>; 1693 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1694 clocks = <&cpg CPG_MOD 623>; 1695 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1696 resets = <&cpg 623>; 1697 renesas,fcp = <&fcpvd0>; 1698 }; 1699 1700 fcpvd0: fcp@fea27000 { 1701 compatible = "renesas,fcpv"; 1702 reg = <0 0xfea27000 0 0x200>; 1703 clocks = <&cpg CPG_MOD 603>; 1704 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1705 resets = <&cpg 603>; 1706 iommus = <&ipmmu_vi0 8>; 1707 }; 1708 1709 vspd1: vsp@fea28000 { 1710 compatible = "renesas,vsp2"; 1711 reg = <0 0xfea28000 0 0x7000>; 1712 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1713 clocks = <&cpg CPG_MOD 622>; 1714 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1715 resets = <&cpg 622>; 1716 renesas,fcp = <&fcpvd1>; 1717 }; 1718 1719 fcpvd1: fcp@fea2f000 { 1720 compatible = "renesas,fcpv"; 1721 reg = <0 0xfea2f000 0 0x200>; 1722 clocks = <&cpg CPG_MOD 602>; 1723 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1724 resets = <&cpg 602>; 1725 iommus = <&ipmmu_vi0 9>; 1726 }; 1727 1728 csi40: csi2@feaa0000 { 1729 compatible = "renesas,r8a77990-csi2"; 1730 reg = <0 0xfeaa0000 0 0x10000>; 1731 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1732 clocks = <&cpg CPG_MOD 716>; 1733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1734 resets = <&cpg 716>; 1735 status = "disabled"; 1736 1737 ports { 1738 #address-cells = <1>; 1739 #size-cells = <0>; 1740 1741 port@1 { 1742 #address-cells = <1>; 1743 #size-cells = <0>; 1744 1745 reg = <1>; 1746 1747 csi40vin4: endpoint@0 { 1748 reg = <0>; 1749 remote-endpoint = <&vin4csi40>; 1750 }; 1751 csi40vin5: endpoint@1 { 1752 reg = <1>; 1753 remote-endpoint = <&vin5csi40>; 1754 }; 1755 }; 1756 }; 1757 }; 1758 1759 du: display@feb00000 { 1760 compatible = "renesas,du-r8a77990"; 1761 reg = <0 0xfeb00000 0 0x80000>; 1762 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1763 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1764 clocks = <&cpg CPG_MOD 724>, 1765 <&cpg CPG_MOD 723>; 1766 clock-names = "du.0", "du.1"; 1767 vsps = <&vspd0 0 &vspd1 0>; 1768 status = "disabled"; 1769 1770 ports { 1771 #address-cells = <1>; 1772 #size-cells = <0>; 1773 1774 port@0 { 1775 reg = <0>; 1776 du_out_rgb: endpoint { 1777 }; 1778 }; 1779 1780 port@1 { 1781 reg = <1>; 1782 du_out_lvds0: endpoint { 1783 remote-endpoint = <&lvds0_in>; 1784 }; 1785 }; 1786 1787 port@2 { 1788 reg = <2>; 1789 du_out_lvds1: endpoint { 1790 remote-endpoint = <&lvds1_in>; 1791 }; 1792 }; 1793 }; 1794 }; 1795 1796 lvds0: lvds-encoder@feb90000 { 1797 compatible = "renesas,r8a77990-lvds"; 1798 reg = <0 0xfeb90000 0 0x20>; 1799 clocks = <&cpg CPG_MOD 727>; 1800 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1801 resets = <&cpg 727>; 1802 status = "disabled"; 1803 1804 ports { 1805 #address-cells = <1>; 1806 #size-cells = <0>; 1807 1808 port@0 { 1809 reg = <0>; 1810 lvds0_in: endpoint { 1811 remote-endpoint = <&du_out_lvds0>; 1812 }; 1813 }; 1814 1815 port@1 { 1816 reg = <1>; 1817 lvds0_out: endpoint { 1818 }; 1819 }; 1820 }; 1821 }; 1822 1823 lvds1: lvds-encoder@feb90100 { 1824 compatible = "renesas,r8a77990-lvds"; 1825 reg = <0 0xfeb90100 0 0x20>; 1826 clocks = <&cpg CPG_MOD 727>; 1827 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1828 resets = <&cpg 726>; 1829 status = "disabled"; 1830 1831 ports { 1832 #address-cells = <1>; 1833 #size-cells = <0>; 1834 1835 port@0 { 1836 reg = <0>; 1837 lvds1_in: endpoint { 1838 remote-endpoint = <&du_out_lvds1>; 1839 }; 1840 }; 1841 1842 port@1 { 1843 reg = <1>; 1844 lvds1_out: endpoint { 1845 }; 1846 }; 1847 }; 1848 }; 1849 1850 prr: chipid@fff00044 { 1851 compatible = "renesas,prr"; 1852 reg = <0 0xfff00044 0 4>; 1853 }; 1854 }; 1855 1856 thermal-zones { 1857 cpu-thermal { 1858 polling-delay-passive = <250>; 1859 polling-delay = <1000>; 1860 thermal-sensors = <&thermal>; 1861 1862 trips { 1863 cpu-crit { 1864 temperature = <120000>; 1865 hysteresis = <2000>; 1866 type = "critical"; 1867 }; 1868 }; 1869 1870 cooling-maps { 1871 }; 1872 }; 1873 }; 1874 1875 timer { 1876 compatible = "arm,armv8-timer"; 1877 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1878 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1879 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1880 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1881 }; 1882}; 1883