1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* 18 * The external audio clocks are configured as 0 Hz fixed frequency 19 * clocks by default. 20 * Boards that provide audio clocks should override them. 21 */ 22 audio_clk_a: audio_clk_a { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; 26 }; 27 28 audio_clk_b: audio_clk_b { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_c: audio_clk_c { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 /* External CAN clock - to be overridden by boards that provide it */ 41 can_clk: can { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 cluster1_opp: opp-table-1 { 48 compatible = "operating-points-v2"; 49 opp-shared; 50 opp-800000000 { 51 opp-hz = /bits/ 64 <800000000>; 52 clock-latency-ns = <300000>; 53 }; 54 opp-1000000000 { 55 opp-hz = /bits/ 64 <1000000000>; 56 clock-latency-ns = <300000>; 57 }; 58 opp-1200000000 { 59 opp-hz = /bits/ 64 <1200000000>; 60 clock-latency-ns = <300000>; 61 opp-suspend; 62 }; 63 }; 64 65 cpus { 66 #address-cells = <1>; 67 #size-cells = <0>; 68 69 a53_0: cpu@0 { 70 compatible = "arm,cortex-a53"; 71 reg = <0>; 72 device_type = "cpu"; 73 #cooling-cells = <2>; 74 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 75 next-level-cache = <&L2_CA53>; 76 enable-method = "psci"; 77 cpu-idle-states = <&CPU_SLEEP_0>; 78 dynamic-power-coefficient = <277>; 79 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 80 operating-points-v2 = <&cluster1_opp>; 81 }; 82 83 a53_1: cpu@1 { 84 compatible = "arm,cortex-a53"; 85 reg = <1>; 86 device_type = "cpu"; 87 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 88 next-level-cache = <&L2_CA53>; 89 enable-method = "psci"; 90 cpu-idle-states = <&CPU_SLEEP_0>; 91 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 92 operating-points-v2 = <&cluster1_opp>; 93 }; 94 95 L2_CA53: cache-controller-0 { 96 compatible = "cache"; 97 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 98 cache-unified; 99 cache-level = <2>; 100 }; 101 102 idle-states { 103 entry-method = "psci"; 104 105 CPU_SLEEP_0: cpu-sleep-0 { 106 compatible = "arm,idle-state"; 107 arm,psci-suspend-param = <0x0010000>; 108 local-timer-stop; 109 entry-latency-us = <700>; 110 exit-latency-us = <700>; 111 min-residency-us = <5000>; 112 }; 113 }; 114 }; 115 116 extal_clk: extal { 117 compatible = "fixed-clock"; 118 #clock-cells = <0>; 119 /* This value must be overridden by the board */ 120 clock-frequency = <0>; 121 }; 122 123 /* External PCIe clock - can be overridden by the board */ 124 pcie_bus_clk: pcie_bus { 125 compatible = "fixed-clock"; 126 #clock-cells = <0>; 127 clock-frequency = <0>; 128 }; 129 130 pmu_a53 { 131 compatible = "arm,cortex-a53-pmu"; 132 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 133 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 134 interrupt-affinity = <&a53_0>, <&a53_1>; 135 }; 136 137 psci { 138 compatible = "arm,psci-1.0", "arm,psci-0.2"; 139 method = "smc"; 140 }; 141 142 /* External SCIF clock - to be overridden by boards that provide it */ 143 scif_clk: scif { 144 compatible = "fixed-clock"; 145 #clock-cells = <0>; 146 clock-frequency = <0>; 147 }; 148 149 soc: soc { 150 compatible = "simple-bus"; 151 interrupt-parent = <&gic>; 152 #address-cells = <2>; 153 #size-cells = <2>; 154 ranges; 155 156 rwdt: watchdog@e6020000 { 157 compatible = "renesas,r8a77990-wdt", 158 "renesas,rcar-gen3-wdt"; 159 reg = <0 0xe6020000 0 0x0c>; 160 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 161 clocks = <&cpg CPG_MOD 402>; 162 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 163 resets = <&cpg 402>; 164 status = "disabled"; 165 }; 166 167 gpio0: gpio@e6050000 { 168 compatible = "renesas,gpio-r8a77990", 169 "renesas,rcar-gen3-gpio"; 170 reg = <0 0xe6050000 0 0x50>; 171 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 172 #gpio-cells = <2>; 173 gpio-controller; 174 gpio-ranges = <&pfc 0 0 18>; 175 #interrupt-cells = <2>; 176 interrupt-controller; 177 clocks = <&cpg CPG_MOD 912>; 178 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 179 resets = <&cpg 912>; 180 }; 181 182 gpio1: gpio@e6051000 { 183 compatible = "renesas,gpio-r8a77990", 184 "renesas,rcar-gen3-gpio"; 185 reg = <0 0xe6051000 0 0x50>; 186 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 187 #gpio-cells = <2>; 188 gpio-controller; 189 gpio-ranges = <&pfc 0 32 23>; 190 #interrupt-cells = <2>; 191 interrupt-controller; 192 clocks = <&cpg CPG_MOD 911>; 193 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 194 resets = <&cpg 911>; 195 }; 196 197 gpio2: gpio@e6052000 { 198 compatible = "renesas,gpio-r8a77990", 199 "renesas,rcar-gen3-gpio"; 200 reg = <0 0xe6052000 0 0x50>; 201 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 202 #gpio-cells = <2>; 203 gpio-controller; 204 gpio-ranges = <&pfc 0 64 26>; 205 #interrupt-cells = <2>; 206 interrupt-controller; 207 clocks = <&cpg CPG_MOD 910>; 208 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 209 resets = <&cpg 910>; 210 }; 211 212 gpio3: gpio@e6053000 { 213 compatible = "renesas,gpio-r8a77990", 214 "renesas,rcar-gen3-gpio"; 215 reg = <0 0xe6053000 0 0x50>; 216 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 217 #gpio-cells = <2>; 218 gpio-controller; 219 gpio-ranges = <&pfc 0 96 16>; 220 #interrupt-cells = <2>; 221 interrupt-controller; 222 clocks = <&cpg CPG_MOD 909>; 223 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 224 resets = <&cpg 909>; 225 }; 226 227 gpio4: gpio@e6054000 { 228 compatible = "renesas,gpio-r8a77990", 229 "renesas,rcar-gen3-gpio"; 230 reg = <0 0xe6054000 0 0x50>; 231 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 232 #gpio-cells = <2>; 233 gpio-controller; 234 gpio-ranges = <&pfc 0 128 11>; 235 #interrupt-cells = <2>; 236 interrupt-controller; 237 clocks = <&cpg CPG_MOD 908>; 238 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 239 resets = <&cpg 908>; 240 }; 241 242 gpio5: gpio@e6055000 { 243 compatible = "renesas,gpio-r8a77990", 244 "renesas,rcar-gen3-gpio"; 245 reg = <0 0xe6055000 0 0x50>; 246 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 247 #gpio-cells = <2>; 248 gpio-controller; 249 gpio-ranges = <&pfc 0 160 20>; 250 #interrupt-cells = <2>; 251 interrupt-controller; 252 clocks = <&cpg CPG_MOD 907>; 253 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 254 resets = <&cpg 907>; 255 }; 256 257 gpio6: gpio@e6055400 { 258 compatible = "renesas,gpio-r8a77990", 259 "renesas,rcar-gen3-gpio"; 260 reg = <0 0xe6055400 0 0x50>; 261 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 262 #gpio-cells = <2>; 263 gpio-controller; 264 gpio-ranges = <&pfc 0 192 18>; 265 #interrupt-cells = <2>; 266 interrupt-controller; 267 clocks = <&cpg CPG_MOD 906>; 268 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 269 resets = <&cpg 906>; 270 }; 271 272 pfc: pinctrl@e6060000 { 273 compatible = "renesas,pfc-r8a77990"; 274 reg = <0 0xe6060000 0 0x508>; 275 }; 276 277 i2c_dvfs: i2c@e60b0000 { 278 #address-cells = <1>; 279 #size-cells = <0>; 280 compatible = "renesas,iic-r8a77990", 281 "renesas,rcar-gen3-iic", 282 "renesas,rmobile-iic"; 283 reg = <0 0xe60b0000 0 0x425>; 284 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 285 clocks = <&cpg CPG_MOD 926>; 286 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 287 resets = <&cpg 926>; 288 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 289 dma-names = "tx", "rx"; 290 status = "disabled"; 291 }; 292 293 cmt0: timer@e60f0000 { 294 compatible = "renesas,r8a77990-cmt0", 295 "renesas,rcar-gen3-cmt0"; 296 reg = <0 0xe60f0000 0 0x1004>; 297 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 299 clocks = <&cpg CPG_MOD 303>; 300 clock-names = "fck"; 301 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 302 resets = <&cpg 303>; 303 status = "disabled"; 304 }; 305 306 cmt1: timer@e6130000 { 307 compatible = "renesas,r8a77990-cmt1", 308 "renesas,rcar-gen3-cmt1"; 309 reg = <0 0xe6130000 0 0x1004>; 310 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 314 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 315 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 316 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 317 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 318 clocks = <&cpg CPG_MOD 302>; 319 clock-names = "fck"; 320 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 321 resets = <&cpg 302>; 322 status = "disabled"; 323 }; 324 325 cmt2: timer@e6140000 { 326 compatible = "renesas,r8a77990-cmt1", 327 "renesas,rcar-gen3-cmt1"; 328 reg = <0 0xe6140000 0 0x1004>; 329 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 333 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 334 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 335 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 336 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 337 clocks = <&cpg CPG_MOD 301>; 338 clock-names = "fck"; 339 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 340 resets = <&cpg 301>; 341 status = "disabled"; 342 }; 343 344 cmt3: timer@e6148000 { 345 compatible = "renesas,r8a77990-cmt1", 346 "renesas,rcar-gen3-cmt1"; 347 reg = <0 0xe6148000 0 0x1004>; 348 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 354 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 355 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 356 clocks = <&cpg CPG_MOD 300>; 357 clock-names = "fck"; 358 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 359 resets = <&cpg 300>; 360 status = "disabled"; 361 }; 362 363 cpg: clock-controller@e6150000 { 364 compatible = "renesas,r8a77990-cpg-mssr"; 365 reg = <0 0xe6150000 0 0x1000>; 366 clocks = <&extal_clk>; 367 clock-names = "extal"; 368 #clock-cells = <2>; 369 #power-domain-cells = <0>; 370 #reset-cells = <1>; 371 }; 372 373 rst: reset-controller@e6160000 { 374 compatible = "renesas,r8a77990-rst"; 375 reg = <0 0xe6160000 0 0x0200>; 376 }; 377 378 sysc: system-controller@e6180000 { 379 compatible = "renesas,r8a77990-sysc"; 380 reg = <0 0xe6180000 0 0x0400>; 381 #power-domain-cells = <1>; 382 }; 383 384 thermal: thermal@e6190000 { 385 compatible = "renesas,thermal-r8a77990"; 386 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 387 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 388 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 390 clocks = <&cpg CPG_MOD 522>; 391 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 392 resets = <&cpg 522>; 393 #thermal-sensor-cells = <0>; 394 }; 395 396 intc_ex: interrupt-controller@e61c0000 { 397 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 398 #interrupt-cells = <2>; 399 interrupt-controller; 400 reg = <0 0xe61c0000 0 0x200>; 401 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 404 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 405 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 406 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 407 clocks = <&cpg CPG_MOD 407>; 408 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 409 resets = <&cpg 407>; 410 }; 411 412 tmu0: timer@e61e0000 { 413 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 414 reg = <0 0xe61e0000 0 0x30>; 415 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 416 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 417 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 418 clocks = <&cpg CPG_MOD 125>; 419 clock-names = "fck"; 420 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 421 resets = <&cpg 125>; 422 status = "disabled"; 423 }; 424 425 tmu1: timer@e6fc0000 { 426 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 427 reg = <0 0xe6fc0000 0 0x30>; 428 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 429 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 430 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 431 clocks = <&cpg CPG_MOD 124>; 432 clock-names = "fck"; 433 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 434 resets = <&cpg 124>; 435 status = "disabled"; 436 }; 437 438 tmu2: timer@e6fd0000 { 439 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 440 reg = <0 0xe6fd0000 0 0x30>; 441 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 442 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 443 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 444 clocks = <&cpg CPG_MOD 123>; 445 clock-names = "fck"; 446 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 447 resets = <&cpg 123>; 448 status = "disabled"; 449 }; 450 451 tmu3: timer@e6fe0000 { 452 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 453 reg = <0 0xe6fe0000 0 0x30>; 454 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 455 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 456 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 457 clocks = <&cpg CPG_MOD 122>; 458 clock-names = "fck"; 459 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 460 resets = <&cpg 122>; 461 status = "disabled"; 462 }; 463 464 tmu4: timer@ffc00000 { 465 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 466 reg = <0 0xffc00000 0 0x30>; 467 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 468 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 469 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 470 clocks = <&cpg CPG_MOD 121>; 471 clock-names = "fck"; 472 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 473 resets = <&cpg 121>; 474 status = "disabled"; 475 }; 476 477 i2c0: i2c@e6500000 { 478 #address-cells = <1>; 479 #size-cells = <0>; 480 compatible = "renesas,i2c-r8a77990", 481 "renesas,rcar-gen3-i2c"; 482 reg = <0 0xe6500000 0 0x40>; 483 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 484 clocks = <&cpg CPG_MOD 931>; 485 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 486 resets = <&cpg 931>; 487 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 488 <&dmac2 0x91>, <&dmac2 0x90>; 489 dma-names = "tx", "rx", "tx", "rx"; 490 i2c-scl-internal-delay-ns = <110>; 491 status = "disabled"; 492 }; 493 494 i2c1: i2c@e6508000 { 495 #address-cells = <1>; 496 #size-cells = <0>; 497 compatible = "renesas,i2c-r8a77990", 498 "renesas,rcar-gen3-i2c"; 499 reg = <0 0xe6508000 0 0x40>; 500 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 930>; 502 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 503 resets = <&cpg 930>; 504 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 505 <&dmac2 0x93>, <&dmac2 0x92>; 506 dma-names = "tx", "rx", "tx", "rx"; 507 i2c-scl-internal-delay-ns = <6>; 508 status = "disabled"; 509 }; 510 511 i2c2: i2c@e6510000 { 512 #address-cells = <1>; 513 #size-cells = <0>; 514 compatible = "renesas,i2c-r8a77990", 515 "renesas,rcar-gen3-i2c"; 516 reg = <0 0xe6510000 0 0x40>; 517 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 518 clocks = <&cpg CPG_MOD 929>; 519 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 520 resets = <&cpg 929>; 521 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 522 <&dmac2 0x95>, <&dmac2 0x94>; 523 dma-names = "tx", "rx", "tx", "rx"; 524 i2c-scl-internal-delay-ns = <6>; 525 status = "disabled"; 526 }; 527 528 i2c3: i2c@e66d0000 { 529 #address-cells = <1>; 530 #size-cells = <0>; 531 compatible = "renesas,i2c-r8a77990", 532 "renesas,rcar-gen3-i2c"; 533 reg = <0 0xe66d0000 0 0x40>; 534 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 535 clocks = <&cpg CPG_MOD 928>; 536 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 537 resets = <&cpg 928>; 538 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 539 dma-names = "tx", "rx"; 540 i2c-scl-internal-delay-ns = <110>; 541 status = "disabled"; 542 }; 543 544 i2c4: i2c@e66d8000 { 545 #address-cells = <1>; 546 #size-cells = <0>; 547 compatible = "renesas,i2c-r8a77990", 548 "renesas,rcar-gen3-i2c"; 549 reg = <0 0xe66d8000 0 0x40>; 550 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 551 clocks = <&cpg CPG_MOD 927>; 552 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 553 resets = <&cpg 927>; 554 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 555 dma-names = "tx", "rx"; 556 i2c-scl-internal-delay-ns = <6>; 557 status = "disabled"; 558 }; 559 560 i2c5: i2c@e66e0000 { 561 #address-cells = <1>; 562 #size-cells = <0>; 563 compatible = "renesas,i2c-r8a77990", 564 "renesas,rcar-gen3-i2c"; 565 reg = <0 0xe66e0000 0 0x40>; 566 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&cpg CPG_MOD 919>; 568 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 569 resets = <&cpg 919>; 570 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 571 dma-names = "tx", "rx"; 572 i2c-scl-internal-delay-ns = <6>; 573 status = "disabled"; 574 }; 575 576 i2c6: i2c@e66e8000 { 577 #address-cells = <1>; 578 #size-cells = <0>; 579 compatible = "renesas,i2c-r8a77990", 580 "renesas,rcar-gen3-i2c"; 581 reg = <0 0xe66e8000 0 0x40>; 582 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&cpg CPG_MOD 918>; 584 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 585 resets = <&cpg 918>; 586 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 587 dma-names = "tx", "rx"; 588 i2c-scl-internal-delay-ns = <6>; 589 status = "disabled"; 590 }; 591 592 i2c7: i2c@e6690000 { 593 #address-cells = <1>; 594 #size-cells = <0>; 595 compatible = "renesas,i2c-r8a77990", 596 "renesas,rcar-gen3-i2c"; 597 reg = <0 0xe6690000 0 0x40>; 598 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 599 clocks = <&cpg CPG_MOD 1003>; 600 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 601 resets = <&cpg 1003>; 602 i2c-scl-internal-delay-ns = <6>; 603 status = "disabled"; 604 }; 605 606 hscif0: serial@e6540000 { 607 compatible = "renesas,hscif-r8a77990", 608 "renesas,rcar-gen3-hscif", 609 "renesas,hscif"; 610 reg = <0 0xe6540000 0 0x60>; 611 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 520>, 613 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 614 <&scif_clk>; 615 clock-names = "fck", "brg_int", "scif_clk"; 616 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 617 <&dmac2 0x31>, <&dmac2 0x30>; 618 dma-names = "tx", "rx", "tx", "rx"; 619 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 620 resets = <&cpg 520>; 621 status = "disabled"; 622 }; 623 624 hscif1: serial@e6550000 { 625 compatible = "renesas,hscif-r8a77990", 626 "renesas,rcar-gen3-hscif", 627 "renesas,hscif"; 628 reg = <0 0xe6550000 0 0x60>; 629 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 630 clocks = <&cpg CPG_MOD 519>, 631 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 632 <&scif_clk>; 633 clock-names = "fck", "brg_int", "scif_clk"; 634 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 635 <&dmac2 0x33>, <&dmac2 0x32>; 636 dma-names = "tx", "rx", "tx", "rx"; 637 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 638 resets = <&cpg 519>; 639 status = "disabled"; 640 }; 641 642 hscif2: serial@e6560000 { 643 compatible = "renesas,hscif-r8a77990", 644 "renesas,rcar-gen3-hscif", 645 "renesas,hscif"; 646 reg = <0 0xe6560000 0 0x60>; 647 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 648 clocks = <&cpg CPG_MOD 518>, 649 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 650 <&scif_clk>; 651 clock-names = "fck", "brg_int", "scif_clk"; 652 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 653 <&dmac2 0x35>, <&dmac2 0x34>; 654 dma-names = "tx", "rx", "tx", "rx"; 655 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 656 resets = <&cpg 518>; 657 status = "disabled"; 658 }; 659 660 hscif3: serial@e66a0000 { 661 compatible = "renesas,hscif-r8a77990", 662 "renesas,rcar-gen3-hscif", 663 "renesas,hscif"; 664 reg = <0 0xe66a0000 0 0x60>; 665 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 666 clocks = <&cpg CPG_MOD 517>, 667 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 668 <&scif_clk>; 669 clock-names = "fck", "brg_int", "scif_clk"; 670 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 671 dma-names = "tx", "rx"; 672 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 673 resets = <&cpg 517>; 674 status = "disabled"; 675 }; 676 677 hscif4: serial@e66b0000 { 678 compatible = "renesas,hscif-r8a77990", 679 "renesas,rcar-gen3-hscif", 680 "renesas,hscif"; 681 reg = <0 0xe66b0000 0 0x60>; 682 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 683 clocks = <&cpg CPG_MOD 516>, 684 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 685 <&scif_clk>; 686 clock-names = "fck", "brg_int", "scif_clk"; 687 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 688 dma-names = "tx", "rx"; 689 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 690 resets = <&cpg 516>; 691 status = "disabled"; 692 }; 693 694 hsusb: usb@e6590000 { 695 compatible = "renesas,usbhs-r8a77990", 696 "renesas,rcar-gen3-usbhs"; 697 reg = <0 0xe6590000 0 0x200>; 698 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 699 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 700 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 701 <&usb_dmac1 0>, <&usb_dmac1 1>; 702 dma-names = "ch0", "ch1", "ch2", "ch3"; 703 renesas,buswait = <11>; 704 phys = <&usb2_phy0 3>; 705 phy-names = "usb"; 706 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 707 resets = <&cpg 704>, <&cpg 703>; 708 status = "disabled"; 709 }; 710 711 usb_dmac0: dma-controller@e65a0000 { 712 compatible = "renesas,r8a77990-usb-dmac", 713 "renesas,usb-dmac"; 714 reg = <0 0xe65a0000 0 0x100>; 715 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 716 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 717 interrupt-names = "ch0", "ch1"; 718 clocks = <&cpg CPG_MOD 330>; 719 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 720 resets = <&cpg 330>; 721 #dma-cells = <1>; 722 dma-channels = <2>; 723 }; 724 725 usb_dmac1: dma-controller@e65b0000 { 726 compatible = "renesas,r8a77990-usb-dmac", 727 "renesas,usb-dmac"; 728 reg = <0 0xe65b0000 0 0x100>; 729 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 731 interrupt-names = "ch0", "ch1"; 732 clocks = <&cpg CPG_MOD 331>; 733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 734 resets = <&cpg 331>; 735 #dma-cells = <1>; 736 dma-channels = <2>; 737 }; 738 739 arm_cc630p: crypto@e6601000 { 740 compatible = "arm,cryptocell-630p-ree"; 741 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 742 reg = <0x0 0xe6601000 0 0x1000>; 743 clocks = <&cpg CPG_MOD 229>; 744 resets = <&cpg 229>; 745 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 746 }; 747 748 dmac0: dma-controller@e6700000 { 749 compatible = "renesas,dmac-r8a77990", 750 "renesas,rcar-dmac"; 751 reg = <0 0xe6700000 0 0x10000>; 752 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 753 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 754 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 755 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 756 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 757 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 760 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 761 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 769 interrupt-names = "error", 770 "ch0", "ch1", "ch2", "ch3", 771 "ch4", "ch5", "ch6", "ch7", 772 "ch8", "ch9", "ch10", "ch11", 773 "ch12", "ch13", "ch14", "ch15"; 774 clocks = <&cpg CPG_MOD 219>; 775 clock-names = "fck"; 776 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 777 resets = <&cpg 219>; 778 #dma-cells = <1>; 779 dma-channels = <16>; 780 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 781 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 782 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 783 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 784 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 785 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 786 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 787 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 788 }; 789 790 dmac1: dma-controller@e7300000 { 791 compatible = "renesas,dmac-r8a77990", 792 "renesas,rcar-dmac"; 793 reg = <0 0xe7300000 0 0x10000>; 794 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 797 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 798 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 799 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 801 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 802 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 803 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 804 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 805 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 808 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 811 interrupt-names = "error", 812 "ch0", "ch1", "ch2", "ch3", 813 "ch4", "ch5", "ch6", "ch7", 814 "ch8", "ch9", "ch10", "ch11", 815 "ch12", "ch13", "ch14", "ch15"; 816 clocks = <&cpg CPG_MOD 218>; 817 clock-names = "fck"; 818 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 819 resets = <&cpg 218>; 820 #dma-cells = <1>; 821 dma-channels = <16>; 822 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 823 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 824 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 825 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 826 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 827 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 828 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 829 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 830 }; 831 832 dmac2: dma-controller@e7310000 { 833 compatible = "renesas,dmac-r8a77990", 834 "renesas,rcar-dmac"; 835 reg = <0 0xe7310000 0 0x10000>; 836 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 839 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 840 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 841 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 842 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 843 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 844 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 845 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 846 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 847 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 848 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 849 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 850 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 852 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 853 interrupt-names = "error", 854 "ch0", "ch1", "ch2", "ch3", 855 "ch4", "ch5", "ch6", "ch7", 856 "ch8", "ch9", "ch10", "ch11", 857 "ch12", "ch13", "ch14", "ch15"; 858 clocks = <&cpg CPG_MOD 217>; 859 clock-names = "fck"; 860 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 861 resets = <&cpg 217>; 862 #dma-cells = <1>; 863 dma-channels = <16>; 864 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 865 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 866 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 867 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 868 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 869 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 870 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 871 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 872 }; 873 874 ipmmu_ds0: iommu@e6740000 { 875 compatible = "renesas,ipmmu-r8a77990"; 876 reg = <0 0xe6740000 0 0x1000>; 877 renesas,ipmmu-main = <&ipmmu_mm 0>; 878 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 879 #iommu-cells = <1>; 880 }; 881 882 ipmmu_ds1: iommu@e7740000 { 883 compatible = "renesas,ipmmu-r8a77990"; 884 reg = <0 0xe7740000 0 0x1000>; 885 renesas,ipmmu-main = <&ipmmu_mm 1>; 886 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 887 #iommu-cells = <1>; 888 }; 889 890 ipmmu_hc: iommu@e6570000 { 891 compatible = "renesas,ipmmu-r8a77990"; 892 reg = <0 0xe6570000 0 0x1000>; 893 renesas,ipmmu-main = <&ipmmu_mm 2>; 894 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 895 #iommu-cells = <1>; 896 }; 897 898 ipmmu_mm: iommu@e67b0000 { 899 compatible = "renesas,ipmmu-r8a77990"; 900 reg = <0 0xe67b0000 0 0x1000>; 901 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 903 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 904 #iommu-cells = <1>; 905 }; 906 907 ipmmu_mp: iommu@ec670000 { 908 compatible = "renesas,ipmmu-r8a77990"; 909 reg = <0 0xec670000 0 0x1000>; 910 renesas,ipmmu-main = <&ipmmu_mm 4>; 911 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 912 #iommu-cells = <1>; 913 }; 914 915 ipmmu_pv0: iommu@fd800000 { 916 compatible = "renesas,ipmmu-r8a77990"; 917 reg = <0 0xfd800000 0 0x1000>; 918 renesas,ipmmu-main = <&ipmmu_mm 6>; 919 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 920 #iommu-cells = <1>; 921 }; 922 923 ipmmu_rt: iommu@ffc80000 { 924 compatible = "renesas,ipmmu-r8a77990"; 925 reg = <0 0xffc80000 0 0x1000>; 926 renesas,ipmmu-main = <&ipmmu_mm 10>; 927 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 928 #iommu-cells = <1>; 929 }; 930 931 ipmmu_vc0: iommu@fe6b0000 { 932 compatible = "renesas,ipmmu-r8a77990"; 933 reg = <0 0xfe6b0000 0 0x1000>; 934 renesas,ipmmu-main = <&ipmmu_mm 12>; 935 power-domains = <&sysc R8A77990_PD_A3VC>; 936 #iommu-cells = <1>; 937 }; 938 939 ipmmu_vi0: iommu@febd0000 { 940 compatible = "renesas,ipmmu-r8a77990"; 941 reg = <0 0xfebd0000 0 0x1000>; 942 renesas,ipmmu-main = <&ipmmu_mm 14>; 943 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 944 #iommu-cells = <1>; 945 }; 946 947 ipmmu_vp0: iommu@fe990000 { 948 compatible = "renesas,ipmmu-r8a77990"; 949 reg = <0 0xfe990000 0 0x1000>; 950 renesas,ipmmu-main = <&ipmmu_mm 16>; 951 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 952 #iommu-cells = <1>; 953 }; 954 955 avb: ethernet@e6800000 { 956 compatible = "renesas,etheravb-r8a77990", 957 "renesas,etheravb-rcar-gen3"; 958 reg = <0 0xe6800000 0 0x800>; 959 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 984 interrupt-names = "ch0", "ch1", "ch2", "ch3", 985 "ch4", "ch5", "ch6", "ch7", 986 "ch8", "ch9", "ch10", "ch11", 987 "ch12", "ch13", "ch14", "ch15", 988 "ch16", "ch17", "ch18", "ch19", 989 "ch20", "ch21", "ch22", "ch23", 990 "ch24"; 991 clocks = <&cpg CPG_MOD 812>; 992 clock-names = "fck"; 993 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 994 resets = <&cpg 812>; 995 phy-mode = "rgmii"; 996 rx-internal-delay-ps = <0>; 997 iommus = <&ipmmu_ds0 16>; 998 #address-cells = <1>; 999 #size-cells = <0>; 1000 status = "disabled"; 1001 }; 1002 1003 can0: can@e6c30000 { 1004 compatible = "renesas,can-r8a77990", 1005 "renesas,rcar-gen3-can"; 1006 reg = <0 0xe6c30000 0 0x1000>; 1007 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1008 clocks = <&cpg CPG_MOD 916>, 1009 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1010 <&can_clk>; 1011 clock-names = "clkp1", "clkp2", "can_clk"; 1012 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1013 assigned-clock-rates = <40000000>; 1014 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1015 resets = <&cpg 916>; 1016 status = "disabled"; 1017 }; 1018 1019 can1: can@e6c38000 { 1020 compatible = "renesas,can-r8a77990", 1021 "renesas,rcar-gen3-can"; 1022 reg = <0 0xe6c38000 0 0x1000>; 1023 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1024 clocks = <&cpg CPG_MOD 915>, 1025 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1026 <&can_clk>; 1027 clock-names = "clkp1", "clkp2", "can_clk"; 1028 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1029 assigned-clock-rates = <40000000>; 1030 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1031 resets = <&cpg 915>; 1032 status = "disabled"; 1033 }; 1034 1035 canfd: can@e66c0000 { 1036 compatible = "renesas,r8a77990-canfd", 1037 "renesas,rcar-gen3-canfd"; 1038 reg = <0 0xe66c0000 0 0x8000>; 1039 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1041 interrupt-names = "ch_int", "g_int"; 1042 clocks = <&cpg CPG_MOD 914>, 1043 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1044 <&can_clk>; 1045 clock-names = "fck", "canfd", "can_clk"; 1046 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1047 assigned-clock-rates = <40000000>; 1048 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1049 resets = <&cpg 914>; 1050 status = "disabled"; 1051 1052 channel0 { 1053 status = "disabled"; 1054 }; 1055 1056 channel1 { 1057 status = "disabled"; 1058 }; 1059 }; 1060 1061 pwm0: pwm@e6e30000 { 1062 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1063 reg = <0 0xe6e30000 0 0x8>; 1064 clocks = <&cpg CPG_MOD 523>; 1065 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1066 resets = <&cpg 523>; 1067 #pwm-cells = <2>; 1068 status = "disabled"; 1069 }; 1070 1071 pwm1: pwm@e6e31000 { 1072 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1073 reg = <0 0xe6e31000 0 0x8>; 1074 clocks = <&cpg CPG_MOD 523>; 1075 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1076 resets = <&cpg 523>; 1077 #pwm-cells = <2>; 1078 status = "disabled"; 1079 }; 1080 1081 pwm2: pwm@e6e32000 { 1082 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1083 reg = <0 0xe6e32000 0 0x8>; 1084 clocks = <&cpg CPG_MOD 523>; 1085 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1086 resets = <&cpg 523>; 1087 #pwm-cells = <2>; 1088 status = "disabled"; 1089 }; 1090 1091 pwm3: pwm@e6e33000 { 1092 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1093 reg = <0 0xe6e33000 0 0x8>; 1094 clocks = <&cpg CPG_MOD 523>; 1095 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1096 resets = <&cpg 523>; 1097 #pwm-cells = <2>; 1098 status = "disabled"; 1099 }; 1100 1101 pwm4: pwm@e6e34000 { 1102 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1103 reg = <0 0xe6e34000 0 0x8>; 1104 clocks = <&cpg CPG_MOD 523>; 1105 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1106 resets = <&cpg 523>; 1107 #pwm-cells = <2>; 1108 status = "disabled"; 1109 }; 1110 1111 pwm5: pwm@e6e35000 { 1112 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1113 reg = <0 0xe6e35000 0 0x8>; 1114 clocks = <&cpg CPG_MOD 523>; 1115 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1116 resets = <&cpg 523>; 1117 #pwm-cells = <2>; 1118 status = "disabled"; 1119 }; 1120 1121 pwm6: pwm@e6e36000 { 1122 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1123 reg = <0 0xe6e36000 0 0x8>; 1124 clocks = <&cpg CPG_MOD 523>; 1125 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1126 resets = <&cpg 523>; 1127 #pwm-cells = <2>; 1128 status = "disabled"; 1129 }; 1130 1131 scif0: serial@e6e60000 { 1132 compatible = "renesas,scif-r8a77990", 1133 "renesas,rcar-gen3-scif", "renesas,scif"; 1134 reg = <0 0xe6e60000 0 64>; 1135 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1136 clocks = <&cpg CPG_MOD 207>, 1137 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1138 <&scif_clk>; 1139 clock-names = "fck", "brg_int", "scif_clk"; 1140 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1141 <&dmac2 0x51>, <&dmac2 0x50>; 1142 dma-names = "tx", "rx", "tx", "rx"; 1143 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1144 resets = <&cpg 207>; 1145 status = "disabled"; 1146 }; 1147 1148 scif1: serial@e6e68000 { 1149 compatible = "renesas,scif-r8a77990", 1150 "renesas,rcar-gen3-scif", "renesas,scif"; 1151 reg = <0 0xe6e68000 0 64>; 1152 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1153 clocks = <&cpg CPG_MOD 206>, 1154 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1155 <&scif_clk>; 1156 clock-names = "fck", "brg_int", "scif_clk"; 1157 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1158 <&dmac2 0x53>, <&dmac2 0x52>; 1159 dma-names = "tx", "rx", "tx", "rx"; 1160 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1161 resets = <&cpg 206>; 1162 status = "disabled"; 1163 }; 1164 1165 scif2: serial@e6e88000 { 1166 compatible = "renesas,scif-r8a77990", 1167 "renesas,rcar-gen3-scif", "renesas,scif"; 1168 reg = <0 0xe6e88000 0 64>; 1169 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1170 clocks = <&cpg CPG_MOD 310>, 1171 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1172 <&scif_clk>; 1173 clock-names = "fck", "brg_int", "scif_clk"; 1174 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1175 <&dmac2 0x13>, <&dmac2 0x12>; 1176 dma-names = "tx", "rx", "tx", "rx"; 1177 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1178 resets = <&cpg 310>; 1179 status = "disabled"; 1180 }; 1181 1182 scif3: serial@e6c50000 { 1183 compatible = "renesas,scif-r8a77990", 1184 "renesas,rcar-gen3-scif", "renesas,scif"; 1185 reg = <0 0xe6c50000 0 64>; 1186 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1187 clocks = <&cpg CPG_MOD 204>, 1188 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1189 <&scif_clk>; 1190 clock-names = "fck", "brg_int", "scif_clk"; 1191 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1192 dma-names = "tx", "rx"; 1193 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1194 resets = <&cpg 204>; 1195 status = "disabled"; 1196 }; 1197 1198 scif4: serial@e6c40000 { 1199 compatible = "renesas,scif-r8a77990", 1200 "renesas,rcar-gen3-scif", "renesas,scif"; 1201 reg = <0 0xe6c40000 0 64>; 1202 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1203 clocks = <&cpg CPG_MOD 203>, 1204 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1205 <&scif_clk>; 1206 clock-names = "fck", "brg_int", "scif_clk"; 1207 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1208 dma-names = "tx", "rx"; 1209 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1210 resets = <&cpg 203>; 1211 status = "disabled"; 1212 }; 1213 1214 scif5: serial@e6f30000 { 1215 compatible = "renesas,scif-r8a77990", 1216 "renesas,rcar-gen3-scif", "renesas,scif"; 1217 reg = <0 0xe6f30000 0 64>; 1218 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1219 clocks = <&cpg CPG_MOD 202>, 1220 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1221 <&scif_clk>; 1222 clock-names = "fck", "brg_int", "scif_clk"; 1223 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1224 dma-names = "tx", "rx"; 1225 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1226 resets = <&cpg 202>; 1227 status = "disabled"; 1228 }; 1229 1230 msiof0: spi@e6e90000 { 1231 compatible = "renesas,msiof-r8a77990", 1232 "renesas,rcar-gen3-msiof"; 1233 reg = <0 0xe6e90000 0 0x0064>; 1234 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1235 clocks = <&cpg CPG_MOD 211>; 1236 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1237 <&dmac2 0x41>, <&dmac2 0x40>; 1238 dma-names = "tx", "rx", "tx", "rx"; 1239 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1240 resets = <&cpg 211>; 1241 #address-cells = <1>; 1242 #size-cells = <0>; 1243 status = "disabled"; 1244 }; 1245 1246 msiof1: spi@e6ea0000 { 1247 compatible = "renesas,msiof-r8a77990", 1248 "renesas,rcar-gen3-msiof"; 1249 reg = <0 0xe6ea0000 0 0x0064>; 1250 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1251 clocks = <&cpg CPG_MOD 210>; 1252 dmas = <&dmac0 0x43>, <&dmac0 0x42>; 1253 dma-names = "tx", "rx"; 1254 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1255 resets = <&cpg 210>; 1256 #address-cells = <1>; 1257 #size-cells = <0>; 1258 status = "disabled"; 1259 }; 1260 1261 msiof2: spi@e6c00000 { 1262 compatible = "renesas,msiof-r8a77990", 1263 "renesas,rcar-gen3-msiof"; 1264 reg = <0 0xe6c00000 0 0x0064>; 1265 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1266 clocks = <&cpg CPG_MOD 209>; 1267 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1268 dma-names = "tx", "rx"; 1269 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1270 resets = <&cpg 209>; 1271 #address-cells = <1>; 1272 #size-cells = <0>; 1273 status = "disabled"; 1274 }; 1275 1276 msiof3: spi@e6c10000 { 1277 compatible = "renesas,msiof-r8a77990", 1278 "renesas,rcar-gen3-msiof"; 1279 reg = <0 0xe6c10000 0 0x0064>; 1280 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1281 clocks = <&cpg CPG_MOD 208>; 1282 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1283 dma-names = "tx", "rx"; 1284 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1285 resets = <&cpg 208>; 1286 #address-cells = <1>; 1287 #size-cells = <0>; 1288 status = "disabled"; 1289 }; 1290 1291 vin4: video@e6ef4000 { 1292 compatible = "renesas,vin-r8a77990"; 1293 reg = <0 0xe6ef4000 0 0x1000>; 1294 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1295 clocks = <&cpg CPG_MOD 807>; 1296 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1297 resets = <&cpg 807>; 1298 renesas,id = <4>; 1299 status = "disabled"; 1300 1301 ports { 1302 #address-cells = <1>; 1303 #size-cells = <0>; 1304 1305 port@1 { 1306 #address-cells = <1>; 1307 #size-cells = <0>; 1308 1309 reg = <1>; 1310 1311 vin4csi40: endpoint@2 { 1312 reg = <2>; 1313 remote-endpoint = <&csi40vin4>; 1314 }; 1315 }; 1316 }; 1317 }; 1318 1319 vin5: video@e6ef5000 { 1320 compatible = "renesas,vin-r8a77990"; 1321 reg = <0 0xe6ef5000 0 0x1000>; 1322 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1323 clocks = <&cpg CPG_MOD 806>; 1324 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1325 resets = <&cpg 806>; 1326 renesas,id = <5>; 1327 status = "disabled"; 1328 1329 ports { 1330 #address-cells = <1>; 1331 #size-cells = <0>; 1332 1333 port@1 { 1334 #address-cells = <1>; 1335 #size-cells = <0>; 1336 1337 reg = <1>; 1338 1339 vin5csi40: endpoint@2 { 1340 reg = <2>; 1341 remote-endpoint = <&csi40vin5>; 1342 }; 1343 }; 1344 }; 1345 }; 1346 1347 drif00: rif@e6f40000 { 1348 compatible = "renesas,r8a77990-drif", 1349 "renesas,rcar-gen3-drif"; 1350 reg = <0 0xe6f40000 0 0x84>; 1351 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1352 clocks = <&cpg CPG_MOD 515>; 1353 clock-names = "fck"; 1354 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1355 dma-names = "rx", "rx"; 1356 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1357 resets = <&cpg 515>; 1358 renesas,bonding = <&drif01>; 1359 status = "disabled"; 1360 }; 1361 1362 drif01: rif@e6f50000 { 1363 compatible = "renesas,r8a77990-drif", 1364 "renesas,rcar-gen3-drif"; 1365 reg = <0 0xe6f50000 0 0x84>; 1366 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1367 clocks = <&cpg CPG_MOD 514>; 1368 clock-names = "fck"; 1369 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1370 dma-names = "rx", "rx"; 1371 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1372 resets = <&cpg 514>; 1373 renesas,bonding = <&drif00>; 1374 status = "disabled"; 1375 }; 1376 1377 drif10: rif@e6f60000 { 1378 compatible = "renesas,r8a77990-drif", 1379 "renesas,rcar-gen3-drif"; 1380 reg = <0 0xe6f60000 0 0x84>; 1381 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1382 clocks = <&cpg CPG_MOD 513>; 1383 clock-names = "fck"; 1384 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1385 dma-names = "rx", "rx"; 1386 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1387 resets = <&cpg 513>; 1388 renesas,bonding = <&drif11>; 1389 status = "disabled"; 1390 }; 1391 1392 drif11: rif@e6f70000 { 1393 compatible = "renesas,r8a77990-drif", 1394 "renesas,rcar-gen3-drif"; 1395 reg = <0 0xe6f70000 0 0x84>; 1396 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1397 clocks = <&cpg CPG_MOD 512>; 1398 clock-names = "fck"; 1399 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1400 dma-names = "rx", "rx"; 1401 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1402 resets = <&cpg 512>; 1403 renesas,bonding = <&drif10>; 1404 status = "disabled"; 1405 }; 1406 1407 drif20: rif@e6f80000 { 1408 compatible = "renesas,r8a77990-drif", 1409 "renesas,rcar-gen3-drif"; 1410 reg = <0 0xe6f80000 0 0x84>; 1411 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1412 clocks = <&cpg CPG_MOD 511>; 1413 clock-names = "fck"; 1414 dmas = <&dmac0 0x28>; 1415 dma-names = "rx"; 1416 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1417 resets = <&cpg 511>; 1418 renesas,bonding = <&drif21>; 1419 status = "disabled"; 1420 }; 1421 1422 drif21: rif@e6f90000 { 1423 compatible = "renesas,r8a77990-drif", 1424 "renesas,rcar-gen3-drif"; 1425 reg = <0 0xe6f90000 0 0x84>; 1426 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1427 clocks = <&cpg CPG_MOD 510>; 1428 clock-names = "fck"; 1429 dmas = <&dmac0 0x2a>; 1430 dma-names = "rx"; 1431 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1432 resets = <&cpg 510>; 1433 renesas,bonding = <&drif20>; 1434 status = "disabled"; 1435 }; 1436 1437 drif30: rif@e6fa0000 { 1438 compatible = "renesas,r8a77990-drif", 1439 "renesas,rcar-gen3-drif"; 1440 reg = <0 0xe6fa0000 0 0x84>; 1441 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1442 clocks = <&cpg CPG_MOD 509>; 1443 clock-names = "fck"; 1444 dmas = <&dmac0 0x2c>; 1445 dma-names = "rx"; 1446 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1447 resets = <&cpg 509>; 1448 renesas,bonding = <&drif31>; 1449 status = "disabled"; 1450 }; 1451 1452 drif31: rif@e6fb0000 { 1453 compatible = "renesas,r8a77990-drif", 1454 "renesas,rcar-gen3-drif"; 1455 reg = <0 0xe6fb0000 0 0x84>; 1456 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1457 clocks = <&cpg CPG_MOD 508>; 1458 clock-names = "fck"; 1459 dmas = <&dmac0 0x2e>; 1460 dma-names = "rx"; 1461 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1462 resets = <&cpg 508>; 1463 renesas,bonding = <&drif30>; 1464 status = "disabled"; 1465 }; 1466 1467 rcar_sound: sound@ec500000 { 1468 /* 1469 * #sound-dai-cells is required if simple-card 1470 * 1471 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1472 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1473 */ 1474 /* 1475 * #clock-cells is required for audio_clkout0/1/2/3 1476 * 1477 * clkout : #clock-cells = <0>; <&rcar_sound>; 1478 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1479 */ 1480 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1481 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1482 <0 0xec5a0000 0 0x100>, /* ADG */ 1483 <0 0xec540000 0 0x1000>, /* SSIU */ 1484 <0 0xec541000 0 0x280>, /* SSI */ 1485 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1486 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1487 1488 clocks = <&cpg CPG_MOD 1005>, 1489 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1490 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1491 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1492 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1493 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1494 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1495 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1496 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1497 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1498 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1499 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1500 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1501 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1502 <&audio_clk_a>, <&audio_clk_b>, 1503 <&audio_clk_c>, 1504 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1505 clock-names = "ssi-all", 1506 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1507 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1508 "ssi.1", "ssi.0", 1509 "src.9", "src.8", "src.7", "src.6", 1510 "src.5", "src.4", "src.3", "src.2", 1511 "src.1", "src.0", 1512 "mix.1", "mix.0", 1513 "ctu.1", "ctu.0", 1514 "dvc.0", "dvc.1", 1515 "clk_a", "clk_b", "clk_c", "clk_i"; 1516 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1517 resets = <&cpg 1005>, 1518 <&cpg 1006>, <&cpg 1007>, 1519 <&cpg 1008>, <&cpg 1009>, 1520 <&cpg 1010>, <&cpg 1011>, 1521 <&cpg 1012>, <&cpg 1013>, 1522 <&cpg 1014>, <&cpg 1015>; 1523 reset-names = "ssi-all", 1524 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1525 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1526 "ssi.1", "ssi.0"; 1527 status = "disabled"; 1528 1529 rcar_sound,ctu { 1530 ctu00: ctu-0 { }; 1531 ctu01: ctu-1 { }; 1532 ctu02: ctu-2 { }; 1533 ctu03: ctu-3 { }; 1534 ctu10: ctu-4 { }; 1535 ctu11: ctu-5 { }; 1536 ctu12: ctu-6 { }; 1537 ctu13: ctu-7 { }; 1538 }; 1539 1540 rcar_sound,dvc { 1541 dvc0: dvc-0 { 1542 dmas = <&audma0 0xbc>; 1543 dma-names = "tx"; 1544 }; 1545 dvc1: dvc-1 { 1546 dmas = <&audma0 0xbe>; 1547 dma-names = "tx"; 1548 }; 1549 }; 1550 1551 rcar_sound,mix { 1552 mix0: mix-0 { }; 1553 mix1: mix-1 { }; 1554 }; 1555 1556 rcar_sound,src { 1557 src0: src-0 { 1558 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1559 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1560 dma-names = "rx", "tx"; 1561 }; 1562 src1: src-1 { 1563 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1564 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1565 dma-names = "rx", "tx"; 1566 }; 1567 src2: src-2 { 1568 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1569 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1570 dma-names = "rx", "tx"; 1571 }; 1572 src3: src-3 { 1573 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1574 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1575 dma-names = "rx", "tx"; 1576 }; 1577 src4: src-4 { 1578 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1579 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1580 dma-names = "rx", "tx"; 1581 }; 1582 src5: src-5 { 1583 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1584 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1585 dma-names = "rx", "tx"; 1586 }; 1587 src6: src-6 { 1588 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1589 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1590 dma-names = "rx", "tx"; 1591 }; 1592 src7: src-7 { 1593 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1594 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1595 dma-names = "rx", "tx"; 1596 }; 1597 src8: src-8 { 1598 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1599 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1600 dma-names = "rx", "tx"; 1601 }; 1602 src9: src-9 { 1603 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1604 dmas = <&audma0 0x97>, <&audma0 0xba>; 1605 dma-names = "rx", "tx"; 1606 }; 1607 }; 1608 1609 rcar_sound,ssi { 1610 ssi0: ssi-0 { 1611 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1612 dmas = <&audma0 0x01>, <&audma0 0x02>, 1613 <&audma0 0x15>, <&audma0 0x16>; 1614 dma-names = "rx", "tx", "rxu", "txu"; 1615 }; 1616 ssi1: ssi-1 { 1617 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1618 dmas = <&audma0 0x03>, <&audma0 0x04>, 1619 <&audma0 0x49>, <&audma0 0x4a>; 1620 dma-names = "rx", "tx", "rxu", "txu"; 1621 }; 1622 ssi2: ssi-2 { 1623 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1624 dmas = <&audma0 0x05>, <&audma0 0x06>, 1625 <&audma0 0x63>, <&audma0 0x64>; 1626 dma-names = "rx", "tx", "rxu", "txu"; 1627 }; 1628 ssi3: ssi-3 { 1629 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1630 dmas = <&audma0 0x07>, <&audma0 0x08>, 1631 <&audma0 0x6f>, <&audma0 0x70>; 1632 dma-names = "rx", "tx", "rxu", "txu"; 1633 }; 1634 ssi4: ssi-4 { 1635 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1636 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1637 <&audma0 0x71>, <&audma0 0x72>; 1638 dma-names = "rx", "tx", "rxu", "txu"; 1639 }; 1640 ssi5: ssi-5 { 1641 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1642 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1643 <&audma0 0x73>, <&audma0 0x74>; 1644 dma-names = "rx", "tx", "rxu", "txu"; 1645 }; 1646 ssi6: ssi-6 { 1647 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1648 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1649 <&audma0 0x75>, <&audma0 0x76>; 1650 dma-names = "rx", "tx", "rxu", "txu"; 1651 }; 1652 ssi7: ssi-7 { 1653 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1654 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1655 <&audma0 0x79>, <&audma0 0x7a>; 1656 dma-names = "rx", "tx", "rxu", "txu"; 1657 }; 1658 ssi8: ssi-8 { 1659 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1660 dmas = <&audma0 0x11>, <&audma0 0x12>, 1661 <&audma0 0x7b>, <&audma0 0x7c>; 1662 dma-names = "rx", "tx", "rxu", "txu"; 1663 }; 1664 ssi9: ssi-9 { 1665 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1666 dmas = <&audma0 0x13>, <&audma0 0x14>, 1667 <&audma0 0x7d>, <&audma0 0x7e>; 1668 dma-names = "rx", "tx", "rxu", "txu"; 1669 }; 1670 }; 1671 }; 1672 1673 mlp: mlp@ec520000 { 1674 compatible = "renesas,r8a77990-mlp", 1675 "renesas,rcar-gen3-mlp"; 1676 reg = <0 0xec520000 0 0x800>; 1677 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 1678 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 1679 clocks = <&cpg CPG_MOD 802>; 1680 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1681 resets = <&cpg 802>; 1682 status = "disabled"; 1683 }; 1684 1685 audma0: dma-controller@ec700000 { 1686 compatible = "renesas,dmac-r8a77990", 1687 "renesas,rcar-dmac"; 1688 reg = <0 0xec700000 0 0x10000>; 1689 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1690 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1691 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1692 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1693 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1694 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1695 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1696 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1697 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1698 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1699 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1700 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1701 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1702 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1703 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1704 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1705 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1706 interrupt-names = "error", 1707 "ch0", "ch1", "ch2", "ch3", 1708 "ch4", "ch5", "ch6", "ch7", 1709 "ch8", "ch9", "ch10", "ch11", 1710 "ch12", "ch13", "ch14", "ch15"; 1711 clocks = <&cpg CPG_MOD 502>; 1712 clock-names = "fck"; 1713 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1714 resets = <&cpg 502>; 1715 #dma-cells = <1>; 1716 dma-channels = <16>; 1717 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1718 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1719 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1720 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1721 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1722 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1723 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1724 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1725 }; 1726 1727 xhci0: usb@ee000000 { 1728 compatible = "renesas,xhci-r8a77990", 1729 "renesas,rcar-gen3-xhci"; 1730 reg = <0 0xee000000 0 0xc00>; 1731 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1732 clocks = <&cpg CPG_MOD 328>; 1733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1734 resets = <&cpg 328>; 1735 status = "disabled"; 1736 }; 1737 1738 usb3_peri0: usb@ee020000 { 1739 compatible = "renesas,r8a77990-usb3-peri", 1740 "renesas,rcar-gen3-usb3-peri"; 1741 reg = <0 0xee020000 0 0x400>; 1742 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1743 clocks = <&cpg CPG_MOD 328>; 1744 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1745 resets = <&cpg 328>; 1746 status = "disabled"; 1747 }; 1748 1749 ohci0: usb@ee080000 { 1750 compatible = "generic-ohci"; 1751 reg = <0 0xee080000 0 0x100>; 1752 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1753 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1754 phys = <&usb2_phy0 1>; 1755 phy-names = "usb"; 1756 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1757 resets = <&cpg 703>, <&cpg 704>; 1758 status = "disabled"; 1759 }; 1760 1761 ehci0: usb@ee080100 { 1762 compatible = "generic-ehci"; 1763 reg = <0 0xee080100 0 0x100>; 1764 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1765 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1766 phys = <&usb2_phy0 2>; 1767 phy-names = "usb"; 1768 companion = <&ohci0>; 1769 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1770 resets = <&cpg 703>, <&cpg 704>; 1771 status = "disabled"; 1772 }; 1773 1774 usb2_phy0: usb-phy@ee080200 { 1775 compatible = "renesas,usb2-phy-r8a77990", 1776 "renesas,rcar-gen3-usb2-phy"; 1777 reg = <0 0xee080200 0 0x700>; 1778 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1779 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1780 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1781 resets = <&cpg 703>, <&cpg 704>; 1782 #phy-cells = <1>; 1783 status = "disabled"; 1784 }; 1785 1786 sdhi0: mmc@ee100000 { 1787 compatible = "renesas,sdhi-r8a77990", 1788 "renesas,rcar-gen3-sdhi"; 1789 reg = <0 0xee100000 0 0x2000>; 1790 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1791 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>; 1792 clock-names = "core", "clkh"; 1793 max-frequency = <200000000>; 1794 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1795 resets = <&cpg 314>; 1796 iommus = <&ipmmu_ds1 32>; 1797 status = "disabled"; 1798 }; 1799 1800 sdhi1: mmc@ee120000 { 1801 compatible = "renesas,sdhi-r8a77990", 1802 "renesas,rcar-gen3-sdhi"; 1803 reg = <0 0xee120000 0 0x2000>; 1804 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1805 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>; 1806 clock-names = "core", "clkh"; 1807 max-frequency = <200000000>; 1808 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1809 resets = <&cpg 313>; 1810 iommus = <&ipmmu_ds1 33>; 1811 status = "disabled"; 1812 }; 1813 1814 sdhi3: mmc@ee160000 { 1815 compatible = "renesas,sdhi-r8a77990", 1816 "renesas,rcar-gen3-sdhi"; 1817 reg = <0 0xee160000 0 0x2000>; 1818 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1819 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>; 1820 clock-names = "core", "clkh"; 1821 max-frequency = <200000000>; 1822 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1823 resets = <&cpg 311>; 1824 iommus = <&ipmmu_ds1 35>; 1825 status = "disabled"; 1826 }; 1827 1828 rpc: spi@ee200000 { 1829 compatible = "renesas,r8a77990-rpc-if", 1830 "renesas,rcar-gen3-rpc-if"; 1831 reg = <0 0xee200000 0 0x200>, 1832 <0 0x08000000 0 0x04000000>, 1833 <0 0xee208000 0 0x100>; 1834 reg-names = "regs", "dirmap", "wbuf"; 1835 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 1836 clocks = <&cpg CPG_MOD 917>; 1837 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1838 resets = <&cpg 917>; 1839 #address-cells = <1>; 1840 #size-cells = <0>; 1841 status = "disabled"; 1842 }; 1843 1844 gic: interrupt-controller@f1010000 { 1845 compatible = "arm,gic-400"; 1846 #interrupt-cells = <3>; 1847 #address-cells = <0>; 1848 interrupt-controller; 1849 reg = <0x0 0xf1010000 0 0x1000>, 1850 <0x0 0xf1020000 0 0x20000>, 1851 <0x0 0xf1040000 0 0x20000>, 1852 <0x0 0xf1060000 0 0x20000>; 1853 interrupts = <GIC_PPI 9 1854 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1855 clocks = <&cpg CPG_MOD 408>; 1856 clock-names = "clk"; 1857 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1858 resets = <&cpg 408>; 1859 }; 1860 1861 pciec0: pcie@fe000000 { 1862 compatible = "renesas,pcie-r8a77990", 1863 "renesas,pcie-rcar-gen3"; 1864 reg = <0 0xfe000000 0 0x80000>; 1865 #address-cells = <3>; 1866 #size-cells = <2>; 1867 bus-range = <0x00 0xff>; 1868 device_type = "pci"; 1869 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1870 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1871 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1872 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1873 /* Map all possible DDR/IOMMU as inbound ranges */ 1874 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 1875 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1876 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1877 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1878 #interrupt-cells = <1>; 1879 interrupt-map-mask = <0 0 0 0>; 1880 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1881 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1882 clock-names = "pcie", "pcie_bus"; 1883 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1884 resets = <&cpg 319>; 1885 iommu-map = <0 &ipmmu_hc 0 1>; 1886 iommu-map-mask = <0>; 1887 status = "disabled"; 1888 }; 1889 1890 vspb0: vsp@fe960000 { 1891 compatible = "renesas,vsp2"; 1892 reg = <0 0xfe960000 0 0x8000>; 1893 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1894 clocks = <&cpg CPG_MOD 626>; 1895 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1896 resets = <&cpg 626>; 1897 renesas,fcp = <&fcpvb0>; 1898 }; 1899 1900 fcpvb0: fcp@fe96f000 { 1901 compatible = "renesas,fcpv"; 1902 reg = <0 0xfe96f000 0 0x200>; 1903 clocks = <&cpg CPG_MOD 607>; 1904 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1905 resets = <&cpg 607>; 1906 iommus = <&ipmmu_vp0 5>; 1907 }; 1908 1909 vspi0: vsp@fe9a0000 { 1910 compatible = "renesas,vsp2"; 1911 reg = <0 0xfe9a0000 0 0x8000>; 1912 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1913 clocks = <&cpg CPG_MOD 631>; 1914 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1915 resets = <&cpg 631>; 1916 renesas,fcp = <&fcpvi0>; 1917 }; 1918 1919 fcpvi0: fcp@fe9af000 { 1920 compatible = "renesas,fcpv"; 1921 reg = <0 0xfe9af000 0 0x200>; 1922 clocks = <&cpg CPG_MOD 611>; 1923 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1924 resets = <&cpg 611>; 1925 iommus = <&ipmmu_vp0 8>; 1926 }; 1927 1928 vspd0: vsp@fea20000 { 1929 compatible = "renesas,vsp2"; 1930 reg = <0 0xfea20000 0 0x7000>; 1931 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1932 clocks = <&cpg CPG_MOD 623>; 1933 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1934 resets = <&cpg 623>; 1935 renesas,fcp = <&fcpvd0>; 1936 }; 1937 1938 fcpvd0: fcp@fea27000 { 1939 compatible = "renesas,fcpv"; 1940 reg = <0 0xfea27000 0 0x200>; 1941 clocks = <&cpg CPG_MOD 603>; 1942 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1943 resets = <&cpg 603>; 1944 iommus = <&ipmmu_vi0 8>; 1945 }; 1946 1947 vspd1: vsp@fea28000 { 1948 compatible = "renesas,vsp2"; 1949 reg = <0 0xfea28000 0 0x7000>; 1950 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1951 clocks = <&cpg CPG_MOD 622>; 1952 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1953 resets = <&cpg 622>; 1954 renesas,fcp = <&fcpvd1>; 1955 }; 1956 1957 fcpvd1: fcp@fea2f000 { 1958 compatible = "renesas,fcpv"; 1959 reg = <0 0xfea2f000 0 0x200>; 1960 clocks = <&cpg CPG_MOD 602>; 1961 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1962 resets = <&cpg 602>; 1963 iommus = <&ipmmu_vi0 9>; 1964 }; 1965 1966 cmm0: cmm@fea40000 { 1967 compatible = "renesas,r8a77990-cmm", 1968 "renesas,rcar-gen3-cmm"; 1969 reg = <0 0xfea40000 0 0x1000>; 1970 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1971 clocks = <&cpg CPG_MOD 711>; 1972 resets = <&cpg 711>; 1973 }; 1974 1975 cmm1: cmm@fea50000 { 1976 compatible = "renesas,r8a77990-cmm", 1977 "renesas,rcar-gen3-cmm"; 1978 reg = <0 0xfea50000 0 0x1000>; 1979 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1980 clocks = <&cpg CPG_MOD 710>; 1981 resets = <&cpg 710>; 1982 }; 1983 1984 csi40: csi2@feaa0000 { 1985 compatible = "renesas,r8a77990-csi2"; 1986 reg = <0 0xfeaa0000 0 0x10000>; 1987 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1988 clocks = <&cpg CPG_MOD 716>; 1989 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1990 resets = <&cpg 716>; 1991 status = "disabled"; 1992 1993 ports { 1994 #address-cells = <1>; 1995 #size-cells = <0>; 1996 1997 port@0 { 1998 reg = <0>; 1999 }; 2000 2001 port@1 { 2002 #address-cells = <1>; 2003 #size-cells = <0>; 2004 2005 reg = <1>; 2006 2007 csi40vin4: endpoint@0 { 2008 reg = <0>; 2009 remote-endpoint = <&vin4csi40>; 2010 }; 2011 csi40vin5: endpoint@1 { 2012 reg = <1>; 2013 remote-endpoint = <&vin5csi40>; 2014 }; 2015 }; 2016 }; 2017 }; 2018 2019 du: display@feb00000 { 2020 compatible = "renesas,du-r8a77990"; 2021 reg = <0 0xfeb00000 0 0x40000>; 2022 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2023 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 2024 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 2025 clock-names = "du.0", "du.1"; 2026 resets = <&cpg 724>; 2027 reset-names = "du.0"; 2028 2029 renesas,cmms = <&cmm0>, <&cmm1>; 2030 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2031 2032 status = "disabled"; 2033 2034 ports { 2035 #address-cells = <1>; 2036 #size-cells = <0>; 2037 2038 port@0 { 2039 reg = <0>; 2040 }; 2041 2042 port@1 { 2043 reg = <1>; 2044 du_out_lvds0: endpoint { 2045 remote-endpoint = <&lvds0_in>; 2046 }; 2047 }; 2048 2049 port@2 { 2050 reg = <2>; 2051 du_out_lvds1: endpoint { 2052 remote-endpoint = <&lvds1_in>; 2053 }; 2054 }; 2055 }; 2056 }; 2057 2058 lvds0: lvds-encoder@feb90000 { 2059 compatible = "renesas,r8a77990-lvds"; 2060 reg = <0 0xfeb90000 0 0x20>; 2061 clocks = <&cpg CPG_MOD 727>; 2062 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2063 resets = <&cpg 727>; 2064 status = "disabled"; 2065 2066 renesas,companion = <&lvds1>; 2067 2068 ports { 2069 #address-cells = <1>; 2070 #size-cells = <0>; 2071 2072 port@0 { 2073 reg = <0>; 2074 lvds0_in: endpoint { 2075 remote-endpoint = <&du_out_lvds0>; 2076 }; 2077 }; 2078 2079 port@1 { 2080 reg = <1>; 2081 }; 2082 }; 2083 }; 2084 2085 lvds1: lvds-encoder@feb90100 { 2086 compatible = "renesas,r8a77990-lvds"; 2087 reg = <0 0xfeb90100 0 0x20>; 2088 clocks = <&cpg CPG_MOD 727>; 2089 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2090 resets = <&cpg 726>; 2091 status = "disabled"; 2092 2093 ports { 2094 #address-cells = <1>; 2095 #size-cells = <0>; 2096 2097 port@0 { 2098 reg = <0>; 2099 lvds1_in: endpoint { 2100 remote-endpoint = <&du_out_lvds1>; 2101 }; 2102 }; 2103 2104 port@1 { 2105 reg = <1>; 2106 }; 2107 }; 2108 }; 2109 2110 prr: chipid@fff00044 { 2111 compatible = "renesas,prr"; 2112 reg = <0 0xfff00044 0 4>; 2113 }; 2114 }; 2115 2116 thermal-zones { 2117 cpu-thermal { 2118 polling-delay-passive = <250>; 2119 polling-delay = <0>; 2120 thermal-sensors = <&thermal>; 2121 sustainable-power = <717>; 2122 2123 cooling-maps { 2124 map0 { 2125 trip = <&target>; 2126 cooling-device = <&a53_0 0 2>; 2127 contribution = <1024>; 2128 }; 2129 }; 2130 2131 trips { 2132 sensor1_crit: sensor1-crit { 2133 temperature = <120000>; 2134 hysteresis = <2000>; 2135 type = "critical"; 2136 }; 2137 2138 target: trip-point1 { 2139 temperature = <100000>; 2140 hysteresis = <2000>; 2141 type = "passive"; 2142 }; 2143 }; 2144 }; 2145 }; 2146 2147 timer { 2148 compatible = "arm,armv8-timer"; 2149 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2150 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2151 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2152 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2153 }; 2154}; 2155