1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a77990-sysc.h>
11
12/ {
13	compatible = "renesas,r8a77990";
14	#address-cells = <2>;
15	#size-cells = <2>;
16
17	aliases {
18		i2c0 = &i2c0;
19		i2c1 = &i2c1;
20		i2c2 = &i2c2;
21		i2c3 = &i2c3;
22		i2c4 = &i2c4;
23		i2c5 = &i2c5;
24		i2c6 = &i2c6;
25		i2c7 = &i2c7;
26	};
27
28	/*
29	 * The external audio clocks are configured as 0 Hz fixed frequency
30	 * clocks by default.
31	 * Boards that provide audio clocks should override them.
32	 */
33	audio_clk_a: audio_clk_a {
34		compatible = "fixed-clock";
35		#clock-cells = <0>;
36		clock-frequency = <0>;
37	};
38
39	audio_clk_b: audio_clk_b {
40		compatible = "fixed-clock";
41		#clock-cells = <0>;
42		clock-frequency = <0>;
43	};
44
45	audio_clk_c: audio_clk_c {
46		compatible = "fixed-clock";
47		#clock-cells = <0>;
48		clock-frequency = <0>;
49	};
50
51	/* External CAN clock - to be overridden by boards that provide it */
52	can_clk: can {
53		compatible = "fixed-clock";
54		#clock-cells = <0>;
55		clock-frequency = <0>;
56	};
57
58	cluster1_opp: opp_table10 {
59		compatible = "operating-points-v2";
60		opp-shared;
61		opp-800000000 {
62			opp-hz = /bits/ 64 <800000000>;
63			opp-microvolt = <820000>;
64			clock-latency-ns = <300000>;
65		};
66		opp-1000000000 {
67			opp-hz = /bits/ 64 <1000000000>;
68			opp-microvolt = <820000>;
69			clock-latency-ns = <300000>;
70		};
71		opp-1200000000 {
72			opp-hz = /bits/ 64 <1200000000>;
73			opp-microvolt = <820000>;
74			clock-latency-ns = <300000>;
75			opp-suspend;
76		};
77	};
78
79	cpus {
80		#address-cells = <1>;
81		#size-cells = <0>;
82
83		a53_0: cpu@0 {
84			compatible = "arm,cortex-a53";
85			reg = <0>;
86			device_type = "cpu";
87			#cooling-cells = <2>;
88			power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
89			next-level-cache = <&L2_CA53>;
90			enable-method = "psci";
91			cpu-idle-states = <&CPU_SLEEP_0>;
92			dynamic-power-coefficient = <277>;
93			clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
94			operating-points-v2 = <&cluster1_opp>;
95		};
96
97		a53_1: cpu@1 {
98			compatible = "arm,cortex-a53";
99			reg = <1>;
100			device_type = "cpu";
101			power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
102			next-level-cache = <&L2_CA53>;
103			enable-method = "psci";
104			cpu-idle-states = <&CPU_SLEEP_0>;
105			clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
106			operating-points-v2 = <&cluster1_opp>;
107		};
108
109		L2_CA53: cache-controller-0 {
110			compatible = "cache";
111			power-domains = <&sysc R8A77990_PD_CA53_SCU>;
112			cache-unified;
113			cache-level = <2>;
114		};
115
116		idle-states {
117			entry-method = "psci";
118
119			CPU_SLEEP_0: cpu-sleep-0 {
120				compatible = "arm,idle-state";
121				arm,psci-suspend-param = <0x0010000>;
122				local-timer-stop;
123				entry-latency-us = <700>;
124				exit-latency-us = <700>;
125				min-residency-us = <5000>;
126			};
127		};
128	};
129
130	extal_clk: extal {
131		compatible = "fixed-clock";
132		#clock-cells = <0>;
133		/* This value must be overridden by the board */
134		clock-frequency = <0>;
135	};
136
137	/* External PCIe clock - can be overridden by the board */
138	pcie_bus_clk: pcie_bus {
139		compatible = "fixed-clock";
140		#clock-cells = <0>;
141		clock-frequency = <0>;
142	};
143
144	pmu_a53 {
145		compatible = "arm,cortex-a53-pmu";
146		interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
147				      <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
148		interrupt-affinity = <&a53_0>, <&a53_1>;
149	};
150
151	psci {
152		compatible = "arm,psci-1.0", "arm,psci-0.2";
153		method = "smc";
154	};
155
156	/* External SCIF clock - to be overridden by boards that provide it */
157	scif_clk: scif {
158		compatible = "fixed-clock";
159		#clock-cells = <0>;
160		clock-frequency = <0>;
161	};
162
163	soc: soc {
164		compatible = "simple-bus";
165		interrupt-parent = <&gic>;
166		#address-cells = <2>;
167		#size-cells = <2>;
168		ranges;
169
170		rwdt: watchdog@e6020000 {
171			compatible = "renesas,r8a77990-wdt",
172				     "renesas,rcar-gen3-wdt";
173			reg = <0 0xe6020000 0 0x0c>;
174			clocks = <&cpg CPG_MOD 402>;
175			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
176			resets = <&cpg 402>;
177			status = "disabled";
178		};
179
180		gpio0: gpio@e6050000 {
181			compatible = "renesas,gpio-r8a77990",
182				     "renesas,rcar-gen3-gpio";
183			reg = <0 0xe6050000 0 0x50>;
184			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
185			#gpio-cells = <2>;
186			gpio-controller;
187			gpio-ranges = <&pfc 0 0 18>;
188			#interrupt-cells = <2>;
189			interrupt-controller;
190			clocks = <&cpg CPG_MOD 912>;
191			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
192			resets = <&cpg 912>;
193		};
194
195		gpio1: gpio@e6051000 {
196			compatible = "renesas,gpio-r8a77990",
197				     "renesas,rcar-gen3-gpio";
198			reg = <0 0xe6051000 0 0x50>;
199			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
200			#gpio-cells = <2>;
201			gpio-controller;
202			gpio-ranges = <&pfc 0 32 23>;
203			#interrupt-cells = <2>;
204			interrupt-controller;
205			clocks = <&cpg CPG_MOD 911>;
206			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
207			resets = <&cpg 911>;
208		};
209
210		gpio2: gpio@e6052000 {
211			compatible = "renesas,gpio-r8a77990",
212				     "renesas,rcar-gen3-gpio";
213			reg = <0 0xe6052000 0 0x50>;
214			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
215			#gpio-cells = <2>;
216			gpio-controller;
217			gpio-ranges = <&pfc 0 64 26>;
218			#interrupt-cells = <2>;
219			interrupt-controller;
220			clocks = <&cpg CPG_MOD 910>;
221			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
222			resets = <&cpg 910>;
223		};
224
225		gpio3: gpio@e6053000 {
226			compatible = "renesas,gpio-r8a77990",
227				     "renesas,rcar-gen3-gpio";
228			reg = <0 0xe6053000 0 0x50>;
229			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
230			#gpio-cells = <2>;
231			gpio-controller;
232			gpio-ranges = <&pfc 0 96 16>;
233			#interrupt-cells = <2>;
234			interrupt-controller;
235			clocks = <&cpg CPG_MOD 909>;
236			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
237			resets = <&cpg 909>;
238		};
239
240		gpio4: gpio@e6054000 {
241			compatible = "renesas,gpio-r8a77990",
242				     "renesas,rcar-gen3-gpio";
243			reg = <0 0xe6054000 0 0x50>;
244			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
245			#gpio-cells = <2>;
246			gpio-controller;
247			gpio-ranges = <&pfc 0 128 11>;
248			#interrupt-cells = <2>;
249			interrupt-controller;
250			clocks = <&cpg CPG_MOD 908>;
251			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
252			resets = <&cpg 908>;
253		};
254
255		gpio5: gpio@e6055000 {
256			compatible = "renesas,gpio-r8a77990",
257				     "renesas,rcar-gen3-gpio";
258			reg = <0 0xe6055000 0 0x50>;
259			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
260			#gpio-cells = <2>;
261			gpio-controller;
262			gpio-ranges = <&pfc 0 160 20>;
263			#interrupt-cells = <2>;
264			interrupt-controller;
265			clocks = <&cpg CPG_MOD 907>;
266			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
267			resets = <&cpg 907>;
268		};
269
270		gpio6: gpio@e6055400 {
271			compatible = "renesas,gpio-r8a77990",
272				     "renesas,rcar-gen3-gpio";
273			reg = <0 0xe6055400 0 0x50>;
274			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
275			#gpio-cells = <2>;
276			gpio-controller;
277			gpio-ranges = <&pfc 0 192 18>;
278			#interrupt-cells = <2>;
279			interrupt-controller;
280			clocks = <&cpg CPG_MOD 906>;
281			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
282			resets = <&cpg 906>;
283		};
284
285		pfc: pin-controller@e6060000 {
286			compatible = "renesas,pfc-r8a77990";
287			reg = <0 0xe6060000 0 0x508>;
288		};
289
290		i2c_dvfs: i2c@e60b0000 {
291			#address-cells = <1>;
292			#size-cells = <0>;
293			compatible = "renesas,iic-r8a77990";
294			reg = <0 0xe60b0000 0 0x15>;
295			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
296			clocks = <&cpg CPG_MOD 926>;
297			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
298			resets = <&cpg 926>;
299			dmas = <&dmac0 0x11>, <&dmac0 0x10>;
300			dma-names = "tx", "rx";
301			status = "disabled";
302		};
303
304		cmt0: timer@e60f0000 {
305			compatible = "renesas,r8a77990-cmt0",
306				     "renesas,rcar-gen3-cmt0";
307			reg = <0 0xe60f0000 0 0x1004>;
308			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
309				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
310			clocks = <&cpg CPG_MOD 303>;
311			clock-names = "fck";
312			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
313			resets = <&cpg 303>;
314			status = "disabled";
315		};
316
317		cmt1: timer@e6130000 {
318			compatible = "renesas,r8a77990-cmt1",
319				     "renesas,rcar-gen3-cmt1";
320			reg = <0 0xe6130000 0 0x1004>;
321			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
322				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
323				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
324				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
325				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
326				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
327				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
328				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
329			clocks = <&cpg CPG_MOD 302>;
330			clock-names = "fck";
331			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
332			resets = <&cpg 302>;
333			status = "disabled";
334		};
335
336		cmt2: timer@e6140000 {
337			compatible = "renesas,r8a77990-cmt1",
338				     "renesas,rcar-gen3-cmt1";
339			reg = <0 0xe6140000 0 0x1004>;
340			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
341				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
342				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
343				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
344				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
345				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
346				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
347				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
348			clocks = <&cpg CPG_MOD 301>;
349			clock-names = "fck";
350			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
351			resets = <&cpg 301>;
352			status = "disabled";
353		};
354
355		cmt3: timer@e6148000 {
356			compatible = "renesas,r8a77990-cmt1",
357				     "renesas,rcar-gen3-cmt1";
358			reg = <0 0xe6148000 0 0x1004>;
359			interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
360				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
361				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
362				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
363				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
364				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
365				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
366				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
367			clocks = <&cpg CPG_MOD 300>;
368			clock-names = "fck";
369			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
370			resets = <&cpg 300>;
371			status = "disabled";
372		};
373
374		cpg: clock-controller@e6150000 {
375			compatible = "renesas,r8a77990-cpg-mssr";
376			reg = <0 0xe6150000 0 0x1000>;
377			clocks = <&extal_clk>;
378			clock-names = "extal";
379			#clock-cells = <2>;
380			#power-domain-cells = <0>;
381			#reset-cells = <1>;
382		};
383
384		rst: reset-controller@e6160000 {
385			compatible = "renesas,r8a77990-rst";
386			reg = <0 0xe6160000 0 0x0200>;
387		};
388
389		sysc: system-controller@e6180000 {
390			compatible = "renesas,r8a77990-sysc";
391			reg = <0 0xe6180000 0 0x0400>;
392			#power-domain-cells = <1>;
393		};
394
395		thermal: thermal@e6190000 {
396			compatible = "renesas,thermal-r8a77990";
397			reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
398			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
399				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
400				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
401			clocks = <&cpg CPG_MOD 522>;
402			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
403			resets = <&cpg 522>;
404			#thermal-sensor-cells = <0>;
405		};
406
407		intc_ex: interrupt-controller@e61c0000 {
408			compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
409			#interrupt-cells = <2>;
410			interrupt-controller;
411			reg = <0 0xe61c0000 0 0x200>;
412			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
413				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
414				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
415				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
416				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
417				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
418			clocks = <&cpg CPG_MOD 407>;
419			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
420			resets = <&cpg 407>;
421		};
422
423		i2c0: i2c@e6500000 {
424			#address-cells = <1>;
425			#size-cells = <0>;
426			compatible = "renesas,i2c-r8a77990",
427				     "renesas,rcar-gen3-i2c";
428			reg = <0 0xe6500000 0 0x40>;
429			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
430			clocks = <&cpg CPG_MOD 931>;
431			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
432			resets = <&cpg 931>;
433			dmas = <&dmac1 0x91>, <&dmac1 0x90>,
434			       <&dmac2 0x91>, <&dmac2 0x90>;
435			dma-names = "tx", "rx", "tx", "rx";
436			i2c-scl-internal-delay-ns = <110>;
437			status = "disabled";
438		};
439
440		i2c1: i2c@e6508000 {
441			#address-cells = <1>;
442			#size-cells = <0>;
443			compatible = "renesas,i2c-r8a77990",
444				     "renesas,rcar-gen3-i2c";
445			reg = <0 0xe6508000 0 0x40>;
446			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
447			clocks = <&cpg CPG_MOD 930>;
448			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
449			resets = <&cpg 930>;
450			dmas = <&dmac1 0x93>, <&dmac1 0x92>,
451			       <&dmac2 0x93>, <&dmac2 0x92>;
452			dma-names = "tx", "rx", "tx", "rx";
453			i2c-scl-internal-delay-ns = <6>;
454			status = "disabled";
455		};
456
457		i2c2: i2c@e6510000 {
458			#address-cells = <1>;
459			#size-cells = <0>;
460			compatible = "renesas,i2c-r8a77990",
461				     "renesas,rcar-gen3-i2c";
462			reg = <0 0xe6510000 0 0x40>;
463			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
464			clocks = <&cpg CPG_MOD 929>;
465			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
466			resets = <&cpg 929>;
467			dmas = <&dmac1 0x95>, <&dmac1 0x94>,
468			       <&dmac2 0x95>, <&dmac2 0x94>;
469			dma-names = "tx", "rx", "tx", "rx";
470			i2c-scl-internal-delay-ns = <6>;
471			status = "disabled";
472		};
473
474		i2c3: i2c@e66d0000 {
475			#address-cells = <1>;
476			#size-cells = <0>;
477			compatible = "renesas,i2c-r8a77990",
478				     "renesas,rcar-gen3-i2c";
479			reg = <0 0xe66d0000 0 0x40>;
480			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
481			clocks = <&cpg CPG_MOD 928>;
482			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
483			resets = <&cpg 928>;
484			dmas = <&dmac0 0x97>, <&dmac0 0x96>;
485			dma-names = "tx", "rx";
486			i2c-scl-internal-delay-ns = <110>;
487			status = "disabled";
488		};
489
490		i2c4: i2c@e66d8000 {
491			#address-cells = <1>;
492			#size-cells = <0>;
493			compatible = "renesas,i2c-r8a77990",
494				     "renesas,rcar-gen3-i2c";
495			reg = <0 0xe66d8000 0 0x40>;
496			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
497			clocks = <&cpg CPG_MOD 927>;
498			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
499			resets = <&cpg 927>;
500			dmas = <&dmac0 0x99>, <&dmac0 0x98>;
501			dma-names = "tx", "rx";
502			i2c-scl-internal-delay-ns = <6>;
503			status = "disabled";
504		};
505
506		i2c5: i2c@e66e0000 {
507			#address-cells = <1>;
508			#size-cells = <0>;
509			compatible = "renesas,i2c-r8a77990",
510				     "renesas,rcar-gen3-i2c";
511			reg = <0 0xe66e0000 0 0x40>;
512			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
513			clocks = <&cpg CPG_MOD 919>;
514			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
515			resets = <&cpg 919>;
516			dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
517			dma-names = "tx", "rx";
518			i2c-scl-internal-delay-ns = <6>;
519			status = "disabled";
520		};
521
522		i2c6: i2c@e66e8000 {
523			#address-cells = <1>;
524			#size-cells = <0>;
525			compatible = "renesas,i2c-r8a77990",
526				     "renesas,rcar-gen3-i2c";
527			reg = <0 0xe66e8000 0 0x40>;
528			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
529			clocks = <&cpg CPG_MOD 918>;
530			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
531			resets = <&cpg 918>;
532			dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
533			dma-names = "tx", "rx";
534			i2c-scl-internal-delay-ns = <6>;
535			status = "disabled";
536		};
537
538		i2c7: i2c@e6690000 {
539			#address-cells = <1>;
540			#size-cells = <0>;
541			compatible = "renesas,i2c-r8a77990",
542				     "renesas,rcar-gen3-i2c";
543			reg = <0 0xe6690000 0 0x40>;
544			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
545			clocks = <&cpg CPG_MOD 1003>;
546			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
547			resets = <&cpg 1003>;
548			i2c-scl-internal-delay-ns = <6>;
549			status = "disabled";
550		};
551
552		hscif0: serial@e6540000 {
553			compatible = "renesas,hscif-r8a77990",
554				     "renesas,rcar-gen3-hscif",
555				     "renesas,hscif";
556			reg = <0 0xe6540000 0 0x60>;
557			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
558			clocks = <&cpg CPG_MOD 520>,
559				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
560				 <&scif_clk>;
561			clock-names = "fck", "brg_int", "scif_clk";
562			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
563			       <&dmac2 0x31>, <&dmac2 0x30>;
564			dma-names = "tx", "rx", "tx", "rx";
565			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
566			resets = <&cpg 520>;
567			status = "disabled";
568		};
569
570		hscif1: serial@e6550000 {
571			compatible = "renesas,hscif-r8a77990",
572				     "renesas,rcar-gen3-hscif",
573				     "renesas,hscif";
574			reg = <0 0xe6550000 0 0x60>;
575			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
576			clocks = <&cpg CPG_MOD 519>,
577				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
578				 <&scif_clk>;
579			clock-names = "fck", "brg_int", "scif_clk";
580			dmas = <&dmac1 0x33>, <&dmac1 0x32>,
581			       <&dmac2 0x33>, <&dmac2 0x32>;
582			dma-names = "tx", "rx", "tx", "rx";
583			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
584			resets = <&cpg 519>;
585			status = "disabled";
586		};
587
588		hscif2: serial@e6560000 {
589			compatible = "renesas,hscif-r8a77990",
590				     "renesas,rcar-gen3-hscif",
591				     "renesas,hscif";
592			reg = <0 0xe6560000 0 0x60>;
593			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
594			clocks = <&cpg CPG_MOD 518>,
595				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
596				 <&scif_clk>;
597			clock-names = "fck", "brg_int", "scif_clk";
598			dmas = <&dmac1 0x35>, <&dmac1 0x34>,
599			       <&dmac2 0x35>, <&dmac2 0x34>;
600			dma-names = "tx", "rx", "tx", "rx";
601			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
602			resets = <&cpg 518>;
603			status = "disabled";
604		};
605
606		hscif3: serial@e66a0000 {
607			compatible = "renesas,hscif-r8a77990",
608				     "renesas,rcar-gen3-hscif",
609				     "renesas,hscif";
610			reg = <0 0xe66a0000 0 0x60>;
611			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
612			clocks = <&cpg CPG_MOD 517>,
613				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
614				 <&scif_clk>;
615			clock-names = "fck", "brg_int", "scif_clk";
616			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
617			dma-names = "tx", "rx";
618			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
619			resets = <&cpg 517>;
620			status = "disabled";
621		};
622
623		hscif4: serial@e66b0000 {
624			compatible = "renesas,hscif-r8a77990",
625				     "renesas,rcar-gen3-hscif",
626				     "renesas,hscif";
627			reg = <0 0xe66b0000 0 0x60>;
628			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
629			clocks = <&cpg CPG_MOD 516>,
630				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
631				 <&scif_clk>;
632			clock-names = "fck", "brg_int", "scif_clk";
633			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
634			dma-names = "tx", "rx";
635			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
636			resets = <&cpg 516>;
637			status = "disabled";
638		};
639
640		hsusb: usb@e6590000 {
641			compatible = "renesas,usbhs-r8a77990",
642				     "renesas,rcar-gen3-usbhs";
643			reg = <0 0xe6590000 0 0x200>;
644			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
645			clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
646			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
647			       <&usb_dmac1 0>, <&usb_dmac1 1>;
648			dma-names = "ch0", "ch1", "ch2", "ch3";
649			renesas,buswait = <11>;
650			phys = <&usb2_phy0 3>;
651			phy-names = "usb";
652			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
653			resets = <&cpg 704>, <&cpg 703>;
654			status = "disabled";
655		};
656
657		usb_dmac0: dma-controller@e65a0000 {
658			compatible = "renesas,r8a77990-usb-dmac",
659				     "renesas,usb-dmac";
660			reg = <0 0xe65a0000 0 0x100>;
661			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
662				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
663			interrupt-names = "ch0", "ch1";
664			clocks = <&cpg CPG_MOD 330>;
665			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
666			resets = <&cpg 330>;
667			#dma-cells = <1>;
668			dma-channels = <2>;
669		};
670
671		usb_dmac1: dma-controller@e65b0000 {
672			compatible = "renesas,r8a77990-usb-dmac",
673				     "renesas,usb-dmac";
674			reg = <0 0xe65b0000 0 0x100>;
675			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
676				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
677			interrupt-names = "ch0", "ch1";
678			clocks = <&cpg CPG_MOD 331>;
679			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
680			resets = <&cpg 331>;
681			#dma-cells = <1>;
682			dma-channels = <2>;
683		};
684
685		arm_cc630p: crypto@e6601000 {
686			compatible = "arm,cryptocell-630p-ree";
687			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
688			reg = <0x0 0xe6601000 0 0x1000>;
689			clocks = <&cpg CPG_MOD 229>;
690			resets = <&cpg 229>;
691			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
692		};
693
694		dmac0: dma-controller@e6700000 {
695			compatible = "renesas,dmac-r8a77990",
696				     "renesas,rcar-dmac";
697			reg = <0 0xe6700000 0 0x10000>;
698			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
699				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
700				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
701				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
702				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
703				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
704				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
705				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
706				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
707				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
708				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
709				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
710				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
711				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
712				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
713				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
714				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
715			interrupt-names = "error",
716					"ch0", "ch1", "ch2", "ch3",
717					"ch4", "ch5", "ch6", "ch7",
718					"ch8", "ch9", "ch10", "ch11",
719					"ch12", "ch13", "ch14", "ch15";
720			clocks = <&cpg CPG_MOD 219>;
721			clock-names = "fck";
722			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
723			resets = <&cpg 219>;
724			#dma-cells = <1>;
725			dma-channels = <16>;
726			iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
727			       <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
728			       <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
729			       <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
730			       <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
731			       <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
732			       <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
733			       <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
734		};
735
736		dmac1: dma-controller@e7300000 {
737			compatible = "renesas,dmac-r8a77990",
738				     "renesas,rcar-dmac";
739			reg = <0 0xe7300000 0 0x10000>;
740			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
741				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
742				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
743				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
744				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
745				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
746				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
747				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
748				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
749				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
750				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
751				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
752				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
753				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
754				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
755				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
756				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
757			interrupt-names = "error",
758					"ch0", "ch1", "ch2", "ch3",
759					"ch4", "ch5", "ch6", "ch7",
760					"ch8", "ch9", "ch10", "ch11",
761					"ch12", "ch13", "ch14", "ch15";
762			clocks = <&cpg CPG_MOD 218>;
763			clock-names = "fck";
764			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
765			resets = <&cpg 218>;
766			#dma-cells = <1>;
767			dma-channels = <16>;
768			iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
769			       <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
770			       <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
771			       <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
772			       <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
773			       <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
774			       <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
775			       <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
776		};
777
778		dmac2: dma-controller@e7310000 {
779			compatible = "renesas,dmac-r8a77990",
780				     "renesas,rcar-dmac";
781			reg = <0 0xe7310000 0 0x10000>;
782			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
783				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
784				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
785				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
786				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
787				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
788				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
789				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
790				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
791				     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
792				     <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
793				     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
794				     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
795				     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
796				     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
797				     <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
798				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
799			interrupt-names = "error",
800					"ch0", "ch1", "ch2", "ch3",
801					"ch4", "ch5", "ch6", "ch7",
802					"ch8", "ch9", "ch10", "ch11",
803					"ch12", "ch13", "ch14", "ch15";
804			clocks = <&cpg CPG_MOD 217>;
805			clock-names = "fck";
806			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
807			resets = <&cpg 217>;
808			#dma-cells = <1>;
809			dma-channels = <16>;
810			iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
811			       <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
812			       <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
813			       <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
814			       <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
815			       <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
816			       <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
817			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
818		};
819
820		ipmmu_ds0: iommu@e6740000 {
821			compatible = "renesas,ipmmu-r8a77990";
822			reg = <0 0xe6740000 0 0x1000>;
823			renesas,ipmmu-main = <&ipmmu_mm 0>;
824			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
825			#iommu-cells = <1>;
826		};
827
828		ipmmu_ds1: iommu@e7740000 {
829			compatible = "renesas,ipmmu-r8a77990";
830			reg = <0 0xe7740000 0 0x1000>;
831			renesas,ipmmu-main = <&ipmmu_mm 1>;
832			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
833			#iommu-cells = <1>;
834		};
835
836		ipmmu_hc: iommu@e6570000 {
837			compatible = "renesas,ipmmu-r8a77990";
838			reg = <0 0xe6570000 0 0x1000>;
839			renesas,ipmmu-main = <&ipmmu_mm 2>;
840			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
841			#iommu-cells = <1>;
842		};
843
844		ipmmu_mm: iommu@e67b0000 {
845			compatible = "renesas,ipmmu-r8a77990";
846			reg = <0 0xe67b0000 0 0x1000>;
847			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
848				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
849			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
850			#iommu-cells = <1>;
851		};
852
853		ipmmu_mp: iommu@ec670000 {
854			compatible = "renesas,ipmmu-r8a77990";
855			reg = <0 0xec670000 0 0x1000>;
856			renesas,ipmmu-main = <&ipmmu_mm 4>;
857			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
858			#iommu-cells = <1>;
859		};
860
861		ipmmu_pv0: iommu@fd800000 {
862			compatible = "renesas,ipmmu-r8a77990";
863			reg = <0 0xfd800000 0 0x1000>;
864			renesas,ipmmu-main = <&ipmmu_mm 6>;
865			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
866			#iommu-cells = <1>;
867		};
868
869		ipmmu_rt: iommu@ffc80000 {
870			compatible = "renesas,ipmmu-r8a77990";
871			reg = <0 0xffc80000 0 0x1000>;
872			renesas,ipmmu-main = <&ipmmu_mm 10>;
873			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
874			#iommu-cells = <1>;
875		};
876
877		ipmmu_vc0: iommu@fe6b0000 {
878			compatible = "renesas,ipmmu-r8a77990";
879			reg = <0 0xfe6b0000 0 0x1000>;
880			renesas,ipmmu-main = <&ipmmu_mm 12>;
881			power-domains = <&sysc R8A77990_PD_A3VC>;
882			#iommu-cells = <1>;
883		};
884
885		ipmmu_vi0: iommu@febd0000 {
886			compatible = "renesas,ipmmu-r8a77990";
887			reg = <0 0xfebd0000 0 0x1000>;
888			renesas,ipmmu-main = <&ipmmu_mm 14>;
889			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
890			#iommu-cells = <1>;
891		};
892
893		ipmmu_vp0: iommu@fe990000 {
894			compatible = "renesas,ipmmu-r8a77990";
895			reg = <0 0xfe990000 0 0x1000>;
896			renesas,ipmmu-main = <&ipmmu_mm 16>;
897			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
898			#iommu-cells = <1>;
899		};
900
901		avb: ethernet@e6800000 {
902			compatible = "renesas,etheravb-r8a77990",
903				     "renesas,etheravb-rcar-gen3";
904			reg = <0 0xe6800000 0 0x800>;
905			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
906				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
907				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
908				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
909				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
910				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
911				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
912				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
913				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
914				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
915				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
916				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
917				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
918				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
919				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
920				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
921				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
922				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
923				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
924				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
925				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
926				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
927				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
928				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
929				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
930			interrupt-names = "ch0", "ch1", "ch2", "ch3",
931					  "ch4", "ch5", "ch6", "ch7",
932					  "ch8", "ch9", "ch10", "ch11",
933					  "ch12", "ch13", "ch14", "ch15",
934					  "ch16", "ch17", "ch18", "ch19",
935					  "ch20", "ch21", "ch22", "ch23",
936					  "ch24";
937			clocks = <&cpg CPG_MOD 812>;
938			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
939			resets = <&cpg 812>;
940			phy-mode = "rgmii";
941			iommus = <&ipmmu_ds0 16>;
942			#address-cells = <1>;
943			#size-cells = <0>;
944			status = "disabled";
945		};
946
947		can0: can@e6c30000 {
948			compatible = "renesas,can-r8a77990",
949				     "renesas,rcar-gen3-can";
950			reg = <0 0xe6c30000 0 0x1000>;
951			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
952			clocks = <&cpg CPG_MOD 916>,
953			       <&cpg CPG_CORE R8A77990_CLK_CANFD>,
954			       <&can_clk>;
955			clock-names = "clkp1", "clkp2", "can_clk";
956			assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
957			assigned-clock-rates = <40000000>;
958			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
959			resets = <&cpg 916>;
960			status = "disabled";
961		};
962
963		can1: can@e6c38000 {
964			compatible = "renesas,can-r8a77990",
965				     "renesas,rcar-gen3-can";
966			reg = <0 0xe6c38000 0 0x1000>;
967			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
968			clocks = <&cpg CPG_MOD 915>,
969			       <&cpg CPG_CORE R8A77990_CLK_CANFD>,
970			       <&can_clk>;
971			clock-names = "clkp1", "clkp2", "can_clk";
972			assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
973			assigned-clock-rates = <40000000>;
974			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
975			resets = <&cpg 915>;
976			status = "disabled";
977		};
978
979		canfd: can@e66c0000 {
980			compatible = "renesas,r8a77990-canfd",
981				     "renesas,rcar-gen3-canfd";
982			reg = <0 0xe66c0000 0 0x8000>;
983			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
984				   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
985			clocks = <&cpg CPG_MOD 914>,
986			       <&cpg CPG_CORE R8A77990_CLK_CANFD>,
987			       <&can_clk>;
988			clock-names = "fck", "canfd", "can_clk";
989			assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
990			assigned-clock-rates = <40000000>;
991			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
992			resets = <&cpg 914>;
993			status = "disabled";
994
995			channel0 {
996				status = "disabled";
997			};
998
999			channel1 {
1000				status = "disabled";
1001			};
1002		};
1003
1004		pwm0: pwm@e6e30000 {
1005			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1006			reg = <0 0xe6e30000 0 0x8>;
1007			clocks = <&cpg CPG_MOD 523>;
1008			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1009			resets = <&cpg 523>;
1010			#pwm-cells = <2>;
1011			status = "disabled";
1012		};
1013
1014		pwm1: pwm@e6e31000 {
1015			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1016			reg = <0 0xe6e31000 0 0x8>;
1017			clocks = <&cpg CPG_MOD 523>;
1018			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1019			resets = <&cpg 523>;
1020			#pwm-cells = <2>;
1021			status = "disabled";
1022		};
1023
1024		pwm2: pwm@e6e32000 {
1025			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1026			reg = <0 0xe6e32000 0 0x8>;
1027			clocks = <&cpg CPG_MOD 523>;
1028			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1029			resets = <&cpg 523>;
1030			#pwm-cells = <2>;
1031			status = "disabled";
1032		};
1033
1034		pwm3: pwm@e6e33000 {
1035			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1036			reg = <0 0xe6e33000 0 0x8>;
1037			clocks = <&cpg CPG_MOD 523>;
1038			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1039			resets = <&cpg 523>;
1040			#pwm-cells = <2>;
1041			status = "disabled";
1042		};
1043
1044		pwm4: pwm@e6e34000 {
1045			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1046			reg = <0 0xe6e34000 0 0x8>;
1047			clocks = <&cpg CPG_MOD 523>;
1048			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1049			resets = <&cpg 523>;
1050			#pwm-cells = <2>;
1051			status = "disabled";
1052		};
1053
1054		pwm5: pwm@e6e35000 {
1055			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1056			reg = <0 0xe6e35000 0 0x8>;
1057			clocks = <&cpg CPG_MOD 523>;
1058			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1059			resets = <&cpg 523>;
1060			#pwm-cells = <2>;
1061			status = "disabled";
1062		};
1063
1064		pwm6: pwm@e6e36000 {
1065			compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1066			reg = <0 0xe6e36000 0 0x8>;
1067			clocks = <&cpg CPG_MOD 523>;
1068			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1069			resets = <&cpg 523>;
1070			#pwm-cells = <2>;
1071			status = "disabled";
1072		};
1073
1074		scif0: serial@e6e60000 {
1075			compatible = "renesas,scif-r8a77990",
1076				     "renesas,rcar-gen3-scif", "renesas,scif";
1077			reg = <0 0xe6e60000 0 64>;
1078			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1079			clocks = <&cpg CPG_MOD 207>,
1080				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1081				 <&scif_clk>;
1082			clock-names = "fck", "brg_int", "scif_clk";
1083			dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1084			       <&dmac2 0x51>, <&dmac2 0x50>;
1085			dma-names = "tx", "rx", "tx", "rx";
1086			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1087			resets = <&cpg 207>;
1088			status = "disabled";
1089		};
1090
1091		scif1: serial@e6e68000 {
1092			compatible = "renesas,scif-r8a77990",
1093				     "renesas,rcar-gen3-scif", "renesas,scif";
1094			reg = <0 0xe6e68000 0 64>;
1095			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1096			clocks = <&cpg CPG_MOD 206>,
1097				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1098				 <&scif_clk>;
1099			clock-names = "fck", "brg_int", "scif_clk";
1100			dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1101			       <&dmac2 0x53>, <&dmac2 0x52>;
1102			dma-names = "tx", "rx", "tx", "rx";
1103			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1104			resets = <&cpg 206>;
1105			status = "disabled";
1106		};
1107
1108		scif2: serial@e6e88000 {
1109			compatible = "renesas,scif-r8a77990",
1110				     "renesas,rcar-gen3-scif", "renesas,scif";
1111			reg = <0 0xe6e88000 0 64>;
1112			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1113			clocks = <&cpg CPG_MOD 310>,
1114				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1115				 <&scif_clk>;
1116			clock-names = "fck", "brg_int", "scif_clk";
1117			dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1118			       <&dmac2 0x13>, <&dmac2 0x12>;
1119			dma-names = "tx", "rx", "tx", "rx";
1120			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1121			resets = <&cpg 310>;
1122			status = "disabled";
1123		};
1124
1125		scif3: serial@e6c50000 {
1126			compatible = "renesas,scif-r8a77990",
1127				     "renesas,rcar-gen3-scif", "renesas,scif";
1128			reg = <0 0xe6c50000 0 64>;
1129			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1130			clocks = <&cpg CPG_MOD 204>,
1131				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1132				 <&scif_clk>;
1133			clock-names = "fck", "brg_int", "scif_clk";
1134			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1135			dma-names = "tx", "rx";
1136			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1137			resets = <&cpg 204>;
1138			status = "disabled";
1139		};
1140
1141		scif4: serial@e6c40000 {
1142			compatible = "renesas,scif-r8a77990",
1143				     "renesas,rcar-gen3-scif", "renesas,scif";
1144			reg = <0 0xe6c40000 0 64>;
1145			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1146			clocks = <&cpg CPG_MOD 203>,
1147				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1148				 <&scif_clk>;
1149			clock-names = "fck", "brg_int", "scif_clk";
1150			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1151			dma-names = "tx", "rx";
1152			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1153			resets = <&cpg 203>;
1154			status = "disabled";
1155		};
1156
1157		scif5: serial@e6f30000 {
1158			compatible = "renesas,scif-r8a77990",
1159				     "renesas,rcar-gen3-scif", "renesas,scif";
1160			reg = <0 0xe6f30000 0 64>;
1161			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1162			clocks = <&cpg CPG_MOD 202>,
1163				 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1164				 <&scif_clk>;
1165			clock-names = "fck", "brg_int", "scif_clk";
1166			dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1167			dma-names = "tx", "rx";
1168			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1169			resets = <&cpg 202>;
1170			status = "disabled";
1171		};
1172
1173		msiof0: spi@e6e90000 {
1174			compatible = "renesas,msiof-r8a77990",
1175				     "renesas,rcar-gen3-msiof";
1176			reg = <0 0xe6e90000 0 0x0064>;
1177			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1178			clocks = <&cpg CPG_MOD 211>;
1179			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1180			       <&dmac2 0x41>, <&dmac2 0x40>;
1181			dma-names = "tx", "rx", "tx", "rx";
1182			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1183			resets = <&cpg 211>;
1184			#address-cells = <1>;
1185			#size-cells = <0>;
1186			status = "disabled";
1187		};
1188
1189		msiof1: spi@e6ea0000 {
1190			compatible = "renesas,msiof-r8a77990",
1191				     "renesas,rcar-gen3-msiof";
1192			reg = <0 0xe6ea0000 0 0x0064>;
1193			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1194			clocks = <&cpg CPG_MOD 210>;
1195			dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1196			       <&dmac2 0x43>, <&dmac2 0x42>;
1197			dma-names = "tx", "rx", "tx", "rx";
1198			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1199			resets = <&cpg 210>;
1200			#address-cells = <1>;
1201			#size-cells = <0>;
1202			status = "disabled";
1203		};
1204
1205		msiof2: spi@e6c00000 {
1206			compatible = "renesas,msiof-r8a77990",
1207				     "renesas,rcar-gen3-msiof";
1208			reg = <0 0xe6c00000 0 0x0064>;
1209			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1210			clocks = <&cpg CPG_MOD 209>;
1211			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1212			dma-names = "tx", "rx";
1213			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1214			resets = <&cpg 209>;
1215			#address-cells = <1>;
1216			#size-cells = <0>;
1217			status = "disabled";
1218		};
1219
1220		msiof3: spi@e6c10000 {
1221			compatible = "renesas,msiof-r8a77990",
1222				     "renesas,rcar-gen3-msiof";
1223			reg = <0 0xe6c10000 0 0x0064>;
1224			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1225			clocks = <&cpg CPG_MOD 208>;
1226			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1227			dma-names = "tx", "rx";
1228			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1229			resets = <&cpg 208>;
1230			#address-cells = <1>;
1231			#size-cells = <0>;
1232			status = "disabled";
1233		};
1234
1235		vin4: video@e6ef4000 {
1236			compatible = "renesas,vin-r8a77990";
1237			reg = <0 0xe6ef4000 0 0x1000>;
1238			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1239			clocks = <&cpg CPG_MOD 807>;
1240			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1241			resets = <&cpg 807>;
1242			renesas,id = <4>;
1243			status = "disabled";
1244
1245			ports {
1246				#address-cells = <1>;
1247				#size-cells = <0>;
1248
1249				port@1 {
1250					#address-cells = <1>;
1251					#size-cells = <0>;
1252
1253					reg = <1>;
1254
1255					vin4csi40: endpoint@2 {
1256						reg = <2>;
1257						remote-endpoint= <&csi40vin4>;
1258					};
1259				};
1260			};
1261		};
1262
1263		vin5: video@e6ef5000 {
1264			compatible = "renesas,vin-r8a77990";
1265			reg = <0 0xe6ef5000 0 0x1000>;
1266			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1267			clocks = <&cpg CPG_MOD 806>;
1268			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1269			resets = <&cpg 806>;
1270			renesas,id = <5>;
1271			status = "disabled";
1272
1273			ports {
1274				#address-cells = <1>;
1275				#size-cells = <0>;
1276
1277				port@1 {
1278					#address-cells = <1>;
1279					#size-cells = <0>;
1280
1281					reg = <1>;
1282
1283					vin5csi40: endpoint@2 {
1284						reg = <2>;
1285						remote-endpoint= <&csi40vin5>;
1286					};
1287				};
1288			};
1289		};
1290
1291		rcar_sound: sound@ec500000 {
1292			/*
1293			 * #sound-dai-cells is required
1294			 *
1295			 * Single DAI : #sound-dai-cells = <0>;	<&rcar_sound>;
1296			 * Multi  DAI : #sound-dai-cells = <1>;	<&rcar_sound N>;
1297			 */
1298			/*
1299			 * #clock-cells is required for audio_clkout0/1/2/3
1300			 *
1301			 * clkout	: #clock-cells = <0>;	<&rcar_sound>;
1302			 * clkout0/1/2/3: #clock-cells = <1>;	<&rcar_sound N>;
1303			 */
1304			compatible =  "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1305			reg =	<0 0xec500000 0 0x1000>, /* SCU */
1306				<0 0xec5a0000 0 0x100>,  /* ADG */
1307				<0 0xec540000 0 0x1000>, /* SSIU */
1308				<0 0xec541000 0 0x280>,  /* SSI */
1309				<0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1310			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1311
1312			clocks = <&cpg CPG_MOD 1005>,
1313				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1314				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1315				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1316				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1317				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1318				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1319				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1320				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1321				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1322				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1323				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1324				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1325				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1326				 <&audio_clk_a>, <&audio_clk_b>,
1327				 <&audio_clk_c>,
1328				 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1329			clock-names = "ssi-all",
1330				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1331				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1332				      "ssi.1", "ssi.0",
1333				      "src.9", "src.8", "src.7", "src.6",
1334				      "src.5", "src.4", "src.3", "src.2",
1335				      "src.1", "src.0",
1336				      "mix.1", "mix.0",
1337				      "ctu.1", "ctu.0",
1338				      "dvc.0", "dvc.1",
1339				      "clk_a", "clk_b", "clk_c", "clk_i";
1340			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1341			resets = <&cpg 1005>,
1342				 <&cpg 1006>, <&cpg 1007>,
1343				 <&cpg 1008>, <&cpg 1009>,
1344				 <&cpg 1010>, <&cpg 1011>,
1345				 <&cpg 1012>, <&cpg 1013>,
1346				 <&cpg 1014>, <&cpg 1015>;
1347			reset-names = "ssi-all",
1348				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1349				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1350				      "ssi.1", "ssi.0";
1351			status = "disabled";
1352
1353			rcar_sound,ctu {
1354				ctu00: ctu-0 { };
1355				ctu01: ctu-1 { };
1356				ctu02: ctu-2 { };
1357				ctu03: ctu-3 { };
1358				ctu10: ctu-4 { };
1359				ctu11: ctu-5 { };
1360				ctu12: ctu-6 { };
1361				ctu13: ctu-7 { };
1362			};
1363
1364			rcar_sound,dvc {
1365				dvc0: dvc-0 {
1366					dmas = <&audma0 0xbc>;
1367					dma-names = "tx";
1368				};
1369				dvc1: dvc-1 {
1370					dmas = <&audma0 0xbe>;
1371					dma-names = "tx";
1372				};
1373			};
1374
1375			rcar_sound,mix {
1376				mix0: mix-0 { };
1377				mix1: mix-1 { };
1378			};
1379
1380			rcar_sound,src {
1381				src0: src-0 {
1382					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1383					dmas = <&audma0 0x85>, <&audma0 0x9a>;
1384					dma-names = "rx", "tx";
1385				};
1386				src1: src-1 {
1387					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1388					dmas = <&audma0 0x87>, <&audma0 0x9c>;
1389					dma-names = "rx", "tx";
1390				};
1391				src2: src-2 {
1392					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1393					dmas = <&audma0 0x89>, <&audma0 0x9e>;
1394					dma-names = "rx", "tx";
1395				};
1396				src3: src-3 {
1397					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1398					dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1399					dma-names = "rx", "tx";
1400				};
1401				src4: src-4 {
1402					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1403					dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1404					dma-names = "rx", "tx";
1405				};
1406				src5: src-5 {
1407					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1408					dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1409					dma-names = "rx", "tx";
1410				};
1411				src6: src-6 {
1412					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1413					dmas = <&audma0 0x91>, <&audma0 0xb4>;
1414					dma-names = "rx", "tx";
1415				};
1416				src7: src-7 {
1417					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1418					dmas = <&audma0 0x93>, <&audma0 0xb6>;
1419					dma-names = "rx", "tx";
1420				};
1421				src8: src-8 {
1422					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1423					dmas = <&audma0 0x95>, <&audma0 0xb8>;
1424					dma-names = "rx", "tx";
1425				};
1426				src9: src-9 {
1427					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1428					dmas = <&audma0 0x97>, <&audma0 0xba>;
1429					dma-names = "rx", "tx";
1430				};
1431			};
1432
1433			rcar_sound,ssi {
1434				ssi0: ssi-0 {
1435					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1436					dmas = <&audma0 0x01>, <&audma0 0x02>,
1437					       <&audma0 0x15>, <&audma0 0x16>;
1438					dma-names = "rx", "tx", "rxu", "txu";
1439				};
1440				ssi1: ssi-1 {
1441					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1442					dmas = <&audma0 0x03>, <&audma0 0x04>,
1443					       <&audma0 0x49>, <&audma0 0x4a>;
1444					dma-names = "rx", "tx", "rxu", "txu";
1445				};
1446				ssi2: ssi-2 {
1447					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1448					dmas = <&audma0 0x05>, <&audma0 0x06>,
1449					       <&audma0 0x63>, <&audma0 0x64>;
1450					dma-names = "rx", "tx", "rxu", "txu";
1451				};
1452				ssi3: ssi-3 {
1453					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1454					dmas = <&audma0 0x07>, <&audma0 0x08>,
1455					       <&audma0 0x6f>, <&audma0 0x70>;
1456					dma-names = "rx", "tx", "rxu", "txu";
1457				};
1458				ssi4: ssi-4 {
1459					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1460					dmas = <&audma0 0x09>, <&audma0 0x0a>,
1461					       <&audma0 0x71>, <&audma0 0x72>;
1462					dma-names = "rx", "tx", "rxu", "txu";
1463				};
1464				ssi5: ssi-5 {
1465					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1466					dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1467					       <&audma0 0x73>, <&audma0 0x74>;
1468					dma-names = "rx", "tx", "rxu", "txu";
1469				};
1470				ssi6: ssi-6 {
1471					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1472					dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1473					       <&audma0 0x75>, <&audma0 0x76>;
1474					dma-names = "rx", "tx", "rxu", "txu";
1475				};
1476				ssi7: ssi-7 {
1477					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1478					dmas = <&audma0 0x0f>, <&audma0 0x10>,
1479					       <&audma0 0x79>, <&audma0 0x7a>;
1480					dma-names = "rx", "tx", "rxu", "txu";
1481				};
1482				ssi8: ssi-8 {
1483					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1484					dmas = <&audma0 0x11>, <&audma0 0x12>,
1485					       <&audma0 0x7b>, <&audma0 0x7c>;
1486					dma-names = "rx", "tx", "rxu", "txu";
1487				};
1488				ssi9: ssi-9 {
1489					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1490					dmas = <&audma0 0x13>, <&audma0 0x14>,
1491					       <&audma0 0x7d>, <&audma0 0x7e>;
1492					dma-names = "rx", "tx", "rxu", "txu";
1493				};
1494			};
1495		};
1496
1497		audma0: dma-controller@ec700000 {
1498			compatible = "renesas,dmac-r8a77990",
1499				     "renesas,rcar-dmac";
1500			reg = <0 0xec700000 0 0x10000>;
1501			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1502				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1503				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1504				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1505				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1506				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1507				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1508				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1509				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1510				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1511				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1512				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1513				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1514				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1515				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1516				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1517				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1518			interrupt-names = "error",
1519					"ch0", "ch1", "ch2", "ch3",
1520					"ch4", "ch5", "ch6", "ch7",
1521					"ch8", "ch9", "ch10", "ch11",
1522					"ch12", "ch13", "ch14", "ch15";
1523			clocks = <&cpg CPG_MOD 502>;
1524			clock-names = "fck";
1525			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1526			resets = <&cpg 502>;
1527			#dma-cells = <1>;
1528			dma-channels = <16>;
1529			iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1530				 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1531				 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1532				 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1533				 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1534				 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1535				 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1536				 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1537		};
1538
1539		xhci0: usb@ee000000 {
1540			compatible = "renesas,xhci-r8a77990",
1541				     "renesas,rcar-gen3-xhci";
1542			reg = <0 0xee000000 0 0xc00>;
1543			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1544			clocks = <&cpg CPG_MOD 328>;
1545			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1546			resets = <&cpg 328>;
1547			status = "disabled";
1548		};
1549
1550		usb3_peri0: usb@ee020000 {
1551			compatible = "renesas,r8a77990-usb3-peri",
1552				     "renesas,rcar-gen3-usb3-peri";
1553			reg = <0 0xee020000 0 0x400>;
1554			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1555			clocks = <&cpg CPG_MOD 328>;
1556			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1557			resets = <&cpg 328>;
1558			status = "disabled";
1559		};
1560
1561		ohci0: usb@ee080000 {
1562			compatible = "generic-ohci";
1563			reg = <0 0xee080000 0 0x100>;
1564			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1565			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1566			phys = <&usb2_phy0 1>;
1567			phy-names = "usb";
1568			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1569			resets = <&cpg 703>, <&cpg 704>;
1570			status = "disabled";
1571		};
1572
1573		ehci0: usb@ee080100 {
1574			compatible = "generic-ehci";
1575			reg = <0 0xee080100 0 0x100>;
1576			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1577			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1578			phys = <&usb2_phy0 2>;
1579			phy-names = "usb";
1580			companion = <&ohci0>;
1581			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1582			resets = <&cpg 703>, <&cpg 704>;
1583			status = "disabled";
1584		};
1585
1586		usb2_phy0: usb-phy@ee080200 {
1587			compatible = "renesas,usb2-phy-r8a77990",
1588				     "renesas,rcar-gen3-usb2-phy";
1589			reg = <0 0xee080200 0 0x700>;
1590			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1591			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1592			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1593			resets = <&cpg 703>, <&cpg 704>;
1594			#phy-cells = <1>;
1595			status = "disabled";
1596		};
1597
1598		sdhi0: mmc@ee100000 {
1599			compatible = "renesas,sdhi-r8a77990",
1600				     "renesas,rcar-gen3-sdhi";
1601			reg = <0 0xee100000 0 0x2000>;
1602			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1603			clocks = <&cpg CPG_MOD 314>;
1604			max-frequency = <200000000>;
1605			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1606			resets = <&cpg 314>;
1607			iommus = <&ipmmu_ds1 32>;
1608			status = "disabled";
1609		};
1610
1611		sdhi1: mmc@ee120000 {
1612			compatible = "renesas,sdhi-r8a77990",
1613				     "renesas,rcar-gen3-sdhi";
1614			reg = <0 0xee120000 0 0x2000>;
1615			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1616			clocks = <&cpg CPG_MOD 313>;
1617			max-frequency = <200000000>;
1618			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1619			resets = <&cpg 313>;
1620			iommus = <&ipmmu_ds1 33>;
1621			status = "disabled";
1622		};
1623
1624		sdhi3: mmc@ee160000 {
1625			compatible = "renesas,sdhi-r8a77990",
1626				     "renesas,rcar-gen3-sdhi";
1627			reg = <0 0xee160000 0 0x2000>;
1628			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1629			clocks = <&cpg CPG_MOD 311>;
1630			max-frequency = <200000000>;
1631			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1632			resets = <&cpg 311>;
1633			iommus = <&ipmmu_ds1 35>;
1634			status = "disabled";
1635		};
1636
1637		gic: interrupt-controller@f1010000 {
1638			compatible = "arm,gic-400";
1639			#interrupt-cells = <3>;
1640			#address-cells = <0>;
1641			interrupt-controller;
1642			reg = <0x0 0xf1010000 0 0x1000>,
1643			      <0x0 0xf1020000 0 0x20000>,
1644			      <0x0 0xf1040000 0 0x20000>,
1645			      <0x0 0xf1060000 0 0x20000>;
1646			interrupts = <GIC_PPI 9
1647					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1648			clocks = <&cpg CPG_MOD 408>;
1649			clock-names = "clk";
1650			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1651			resets = <&cpg 408>;
1652		};
1653
1654		pciec0: pcie@fe000000 {
1655			compatible = "renesas,pcie-r8a77990",
1656				     "renesas,pcie-rcar-gen3";
1657			reg = <0 0xfe000000 0 0x80000>;
1658			#address-cells = <3>;
1659			#size-cells = <2>;
1660			bus-range = <0x00 0xff>;
1661			device_type = "pci";
1662			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1663				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1664				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1665				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1666			/* Map all possible DDR as inbound ranges */
1667			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1668			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1669				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1670				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1671			#interrupt-cells = <1>;
1672			interrupt-map-mask = <0 0 0 0>;
1673			interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1674			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1675			clock-names = "pcie", "pcie_bus";
1676			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1677			resets = <&cpg 319>;
1678			status = "disabled";
1679		};
1680
1681		vspb0: vsp@fe960000 {
1682			compatible = "renesas,vsp2";
1683			reg = <0 0xfe960000 0 0x8000>;
1684			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1685			clocks = <&cpg CPG_MOD 626>;
1686			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1687			resets = <&cpg 626>;
1688			renesas,fcp = <&fcpvb0>;
1689		};
1690
1691		fcpvb0: fcp@fe96f000 {
1692			compatible = "renesas,fcpv";
1693			reg = <0 0xfe96f000 0 0x200>;
1694			clocks = <&cpg CPG_MOD 607>;
1695			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1696			resets = <&cpg 607>;
1697			iommus = <&ipmmu_vp0 5>;
1698		};
1699
1700		vspi0: vsp@fe9a0000 {
1701			compatible = "renesas,vsp2";
1702			reg = <0 0xfe9a0000 0 0x8000>;
1703			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1704			clocks = <&cpg CPG_MOD 631>;
1705			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1706			resets = <&cpg 631>;
1707			renesas,fcp = <&fcpvi0>;
1708		};
1709
1710		fcpvi0: fcp@fe9af000 {
1711			compatible = "renesas,fcpv";
1712			reg = <0 0xfe9af000 0 0x200>;
1713			clocks = <&cpg CPG_MOD 611>;
1714			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1715			resets = <&cpg 611>;
1716			iommus = <&ipmmu_vp0 8>;
1717		};
1718
1719		vspd0: vsp@fea20000 {
1720			compatible = "renesas,vsp2";
1721			reg = <0 0xfea20000 0 0x7000>;
1722			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1723			clocks = <&cpg CPG_MOD 623>;
1724			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1725			resets = <&cpg 623>;
1726			renesas,fcp = <&fcpvd0>;
1727		};
1728
1729		fcpvd0: fcp@fea27000 {
1730			compatible = "renesas,fcpv";
1731			reg = <0 0xfea27000 0 0x200>;
1732			clocks = <&cpg CPG_MOD 603>;
1733			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1734			resets = <&cpg 603>;
1735			iommus = <&ipmmu_vi0 8>;
1736		};
1737
1738		vspd1: vsp@fea28000 {
1739			compatible = "renesas,vsp2";
1740			reg = <0 0xfea28000 0 0x7000>;
1741			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1742			clocks = <&cpg CPG_MOD 622>;
1743			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1744			resets = <&cpg 622>;
1745			renesas,fcp = <&fcpvd1>;
1746		};
1747
1748		fcpvd1: fcp@fea2f000 {
1749			compatible = "renesas,fcpv";
1750			reg = <0 0xfea2f000 0 0x200>;
1751			clocks = <&cpg CPG_MOD 602>;
1752			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1753			resets = <&cpg 602>;
1754			iommus = <&ipmmu_vi0 9>;
1755		};
1756
1757		cmm0: cmm@fea40000 {
1758			compatible = "renesas,r8a77990-cmm",
1759				     "renesas,rcar-gen3-cmm";
1760			reg = <0 0xfea40000 0 0x1000>;
1761			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1762			clocks = <&cpg CPG_MOD 711>;
1763			resets = <&cpg 711>;
1764		};
1765
1766		cmm1: cmm@fea50000 {
1767			compatible = "renesas,r8a77990-cmm",
1768				     "renesas,rcar-gen3-cmm";
1769			reg = <0 0xfea50000 0 0x1000>;
1770			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1771			clocks = <&cpg CPG_MOD 710>;
1772			resets = <&cpg 710>;
1773		};
1774
1775		csi40: csi2@feaa0000 {
1776			compatible = "renesas,r8a77990-csi2";
1777			reg = <0 0xfeaa0000 0 0x10000>;
1778			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1779			clocks = <&cpg CPG_MOD 716>;
1780			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1781			resets = <&cpg 716>;
1782			status = "disabled";
1783
1784			ports {
1785				#address-cells = <1>;
1786				#size-cells = <0>;
1787
1788				port@1 {
1789					#address-cells = <1>;
1790					#size-cells = <0>;
1791
1792					reg = <1>;
1793
1794					csi40vin4: endpoint@0 {
1795						reg = <0>;
1796						remote-endpoint = <&vin4csi40>;
1797					};
1798					csi40vin5: endpoint@1 {
1799						reg = <1>;
1800						remote-endpoint = <&vin5csi40>;
1801					};
1802				};
1803			};
1804		};
1805
1806		du: display@feb00000 {
1807			compatible = "renesas,du-r8a77990";
1808			reg = <0 0xfeb00000 0 0x40000>;
1809			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1810				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1811			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1812			clock-names = "du.0", "du.1";
1813			resets = <&cpg 724>;
1814			reset-names = "du.0";
1815
1816			renesas,cmms = <&cmm0>, <&cmm1>;
1817			renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1818
1819			status = "disabled";
1820
1821			ports {
1822				#address-cells = <1>;
1823				#size-cells = <0>;
1824
1825				port@0 {
1826					reg = <0>;
1827					du_out_rgb: endpoint {
1828					};
1829				};
1830
1831				port@1 {
1832					reg = <1>;
1833					du_out_lvds0: endpoint {
1834						remote-endpoint = <&lvds0_in>;
1835					};
1836				};
1837
1838				port@2 {
1839					reg = <2>;
1840					du_out_lvds1: endpoint {
1841						remote-endpoint = <&lvds1_in>;
1842					};
1843				};
1844			};
1845		};
1846
1847		lvds0: lvds-encoder@feb90000 {
1848			compatible = "renesas,r8a77990-lvds";
1849			reg = <0 0xfeb90000 0 0x20>;
1850			clocks = <&cpg CPG_MOD 727>;
1851			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1852			resets = <&cpg 727>;
1853			status = "disabled";
1854
1855			renesas,companion = <&lvds1>;
1856
1857			ports {
1858				#address-cells = <1>;
1859				#size-cells = <0>;
1860
1861				port@0 {
1862					reg = <0>;
1863					lvds0_in: endpoint {
1864						remote-endpoint = <&du_out_lvds0>;
1865					};
1866				};
1867
1868				port@1 {
1869					reg = <1>;
1870					lvds0_out: endpoint {
1871					};
1872				};
1873			};
1874		};
1875
1876		lvds1: lvds-encoder@feb90100 {
1877			compatible = "renesas,r8a77990-lvds";
1878			reg = <0 0xfeb90100 0 0x20>;
1879			clocks = <&cpg CPG_MOD 727>;
1880			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1881			resets = <&cpg 726>;
1882			status = "disabled";
1883
1884			ports {
1885				#address-cells = <1>;
1886				#size-cells = <0>;
1887
1888				port@0 {
1889					reg = <0>;
1890					lvds1_in: endpoint {
1891						remote-endpoint = <&du_out_lvds1>;
1892					};
1893				};
1894
1895				port@1 {
1896					reg = <1>;
1897					lvds1_out: endpoint {
1898					};
1899				};
1900			};
1901		};
1902
1903		prr: chipid@fff00044 {
1904			compatible = "renesas,prr";
1905			reg = <0 0xfff00044 0 4>;
1906		};
1907	};
1908
1909	thermal-zones {
1910		cpu-thermal {
1911			polling-delay-passive = <250>;
1912			polling-delay = <0>;
1913			thermal-sensors = <&thermal 0>;
1914			sustainable-power = <717>;
1915
1916			cooling-maps {
1917				map0 {
1918					trip = <&target>;
1919					cooling-device = <&a53_0 0 2>;
1920					contribution = <1024>;
1921				};
1922			};
1923
1924			trips {
1925				sensor1_crit: sensor1-crit {
1926					temperature = <120000>;
1927					hysteresis = <2000>;
1928					type = "critical";
1929				};
1930
1931				target: trip-point1 {
1932					temperature = <100000>;
1933					hysteresis = <2000>;
1934					type = "passive";
1935				};
1936			};
1937		};
1938	};
1939
1940	timer {
1941		compatible = "arm,armv8-timer";
1942		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1943				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1944				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1945				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1946	};
1947};
1948