1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the V3H Starter Kit board 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 * Copyright (C) 2018 Cogent Embedded, Inc. 7 */ 8 9/dts-v1/; 10#include "r8a77980.dtsi" 11 12/ { 13 model = "Renesas V3H Starter Kit board"; 14 compatible = "renesas,v3hsk", "renesas,r8a77980"; 15 16 aliases { 17 serial0 = &scif0; 18 ethernet0 = &gether; 19 }; 20 21 chosen { 22 stdout-path = "serial0:115200n8"; 23 }; 24 25 memory@48000000 { 26 device_type = "memory"; 27 /* first 128MB is reserved for secure area. */ 28 reg = <0 0x48000000 0 0x78000000>; 29 }; 30 31 hdmi-out { 32 compatible = "hdmi-connector"; 33 type = "a"; 34 35 port { 36 hdmi_con: endpoint { 37 remote-endpoint = <&adv7511_out>; 38 }; 39 }; 40 }; 41 42 lvds-decoder { 43 compatible = "thine,thc63lvd1024"; 44 vcc-supply = <&vcc3v3_d5>; 45 46 ports { 47 #address-cells = <1>; 48 #size-cells = <0>; 49 50 port@0 { 51 reg = <0>; 52 thc63lvd1024_in: endpoint { 53 remote-endpoint = <&lvds0_out>; 54 }; 55 }; 56 57 port@2 { 58 reg = <2>; 59 thc63lvd1024_out: endpoint { 60 remote-endpoint = <&adv7511_in>; 61 }; 62 }; 63 }; 64 }; 65 66 osc1_clk: osc1-clock { 67 compatible = "fixed-clock"; 68 #clock-cells = <0>; 69 clock-frequency = <148500000>; 70 }; 71 72 vcc1v8_d4: regulator-0 { 73 compatible = "regulator-fixed"; 74 regulator-name = "VCC1V8_D4"; 75 regulator-min-microvolt = <1800000>; 76 regulator-max-microvolt = <1800000>; 77 regulator-boot-on; 78 regulator-always-on; 79 }; 80 81 vcc3v3_d5: regulator-1 { 82 compatible = "regulator-fixed"; 83 regulator-name = "VCC3V3_D5"; 84 regulator-min-microvolt = <3300000>; 85 regulator-max-microvolt = <3300000>; 86 regulator-boot-on; 87 regulator-always-on; 88 }; 89}; 90 91&du { 92 clocks = <&cpg CPG_MOD 724>, 93 <&osc1_clk>; 94 clock-names = "du.0", "dclkin.0"; 95 status = "okay"; 96}; 97 98&extal_clk { 99 clock-frequency = <16666666>; 100}; 101 102&extalr_clk { 103 clock-frequency = <32768>; 104}; 105 106&gether { 107 pinctrl-0 = <&gether_pins>; 108 pinctrl-names = "default"; 109 110 phy-mode = "rgmii"; 111 phy-handle = <&phy0>; 112 renesas,no-ether-link; 113 status = "okay"; 114 115 phy0: ethernet-phy@0 { 116 reg = <0>; 117 interrupt-parent = <&gpio4>; 118 interrupts = <23 IRQ_TYPE_LEVEL_LOW>; 119 }; 120}; 121 122&lvds0 { 123 status = "okay"; 124 125 ports { 126 port@1 { 127 lvds0_out: endpoint { 128 remote-endpoint = <&thc63lvd1024_in>; 129 }; 130 }; 131 }; 132}; 133 134&i2c0 { 135 pinctrl-0 = <&i2c0_pins>; 136 pinctrl-names = "default"; 137 138 status = "okay"; 139 clock-frequency = <400000>; 140 141 hdmi@39 { 142 compatible = "adi,adv7511w"; 143 #sound-dai-cells = <0>; 144 reg = <0x39>; 145 interrupt-parent = <&gpio1>; 146 interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 147 avdd-supply = <&vcc1v8_d4>; 148 dvdd-supply = <&vcc1v8_d4>; 149 pvdd-supply = <&vcc1v8_d4>; 150 bgvdd-supply = <&vcc1v8_d4>; 151 dvdd-3v-supply = <&vcc3v3_d5>; 152 153 adi,input-depth = <8>; 154 adi,input-colorspace = "rgb"; 155 adi,input-clock = "1x"; 156 adi,input-style = <1>; 157 adi,input-justification = "evenly"; 158 159 ports { 160 #address-cells = <1>; 161 #size-cells = <0>; 162 163 port@0 { 164 reg = <0>; 165 adv7511_in: endpoint { 166 remote-endpoint = <&thc63lvd1024_out>; 167 }; 168 }; 169 170 port@1 { 171 reg = <1>; 172 adv7511_out: endpoint { 173 remote-endpoint = <&hdmi_con>; 174 }; 175 }; 176 }; 177 }; 178}; 179 180&pfc { 181 gether_pins: gether { 182 groups = "gether_mdio_a", "gether_rgmii", 183 "gether_txcrefclk", "gether_txcrefclk_mega"; 184 function = "gether"; 185 }; 186 187 i2c0_pins: i2c0 { 188 groups = "i2c0"; 189 function = "i2c0"; 190 }; 191 192 scif0_pins: scif0 { 193 groups = "scif0_data"; 194 function = "scif0"; 195 }; 196 197 scif_clk_pins: scif_clk { 198 groups = "scif_clk_b"; 199 function = "scif_clk"; 200 }; 201}; 202 203&rwdt { 204 timeout-sec = <60>; 205 status = "okay"; 206}; 207 208&scif0 { 209 pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>; 210 pinctrl-names = "default"; 211 212 status = "okay"; 213}; 214 215&scif_clk { 216 clock-frequency = <14745600>; 217}; 218