1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Condor board 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 * Copyright (C) 2018 Cogent Embedded, Inc. 7 */ 8 9/dts-v1/; 10#include "r8a77980.dtsi" 11 12/ { 13 model = "Renesas Condor board based on r8a77980"; 14 compatible = "renesas,condor", "renesas,r8a77980"; 15 16 aliases { 17 serial0 = &scif0; 18 ethernet0 = &avb; 19 }; 20 21 chosen { 22 stdout-path = "serial0:115200n8"; 23 }; 24 25 memory@48000000 { 26 device_type = "memory"; 27 /* first 128MB is reserved for secure area. */ 28 reg = <0 0x48000000 0 0x78000000>; 29 }; 30}; 31 32&avb { 33 phy-mode = "rgmii-id"; 34 phy-handle = <&phy0>; 35 renesas,no-ether-link; 36 status = "okay"; 37 38 phy0: ethernet-phy@0 { 39 rxc-skew-ps = <1500>; 40 reg = <0>; 41 }; 42}; 43 44&extal_clk { 45 clock-frequency = <16666666>; 46}; 47 48&extalr_clk { 49 clock-frequency = <32768>; 50}; 51 52&pfc { 53 scif0_pins: scif0 { 54 groups = "scif0_data"; 55 function = "scif0"; 56 }; 57 58 scif_clk_pins: scif_clk { 59 groups = "scif_clk_b"; 60 function = "scif_clk"; 61 }; 62}; 63 64&scif0 { 65 pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>; 66 pinctrl-names = "default"; 67 68 status = "okay"; 69}; 70 71&scif_clk { 72 clock-frequency = <14745600>; 73}; 74