1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the V3M Starter Kit board
4 *
5 * Copyright (C) 2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8
9/dts-v1/;
10#include "r8a77970.dtsi"
11
12/ {
13	model = "Renesas V3M Starter Kit board";
14	compatible = "renesas,v3msk", "renesas,r8a77970";
15
16	aliases {
17		serial0 = &scif0;
18	};
19
20	chosen {
21		stdout-path = "serial0:115200n8";
22	};
23
24	hdmi-out {
25		compatible = "hdmi-connector";
26		type = "a";
27
28		port {
29			hdmi_con: endpoint {
30				remote-endpoint = <&adv7511_out>;
31			};
32		};
33	};
34
35	lvds-decoder {
36		compatible = "thine,thc63lvd1024";
37		vcc-supply = <&vcc_d3_3v>;
38
39		ports {
40			#address-cells = <1>;
41			#size-cells = <0>;
42
43			port@0 {
44				reg = <0>;
45				thc63lvd1024_in: endpoint {
46					remote-endpoint = <&lvds0_out>;
47				};
48			};
49
50			port@2 {
51				reg = <2>;
52				thc63lvd1024_out: endpoint {
53					remote-endpoint = <&adv7511_in>;
54				};
55			};
56		};
57	};
58
59	memory@48000000 {
60		device_type = "memory";
61		/* first 128MB is reserved for secure area. */
62		reg = <0x0 0x48000000 0x0 0x78000000>;
63	};
64
65	osc5_clk: osc5-clock {
66		compatible = "fixed-clock";
67		#clock-cells = <0>;
68		clock-frequency = <148500000>;
69	};
70
71	vcc_d1_8v: regulator-0 {
72		compatible = "regulator-fixed";
73		regulator-name = "VCC_D1.8V";
74		regulator-min-microvolt = <1800000>;
75		regulator-max-microvolt = <1800000>;
76		regulator-boot-on;
77		regulator-always-on;
78	};
79
80	vcc_d3_3v: regulator-1 {
81		compatible = "regulator-fixed";
82		regulator-name = "VCC_D3.3V";
83		regulator-min-microvolt = <3300000>;
84		regulator-max-microvolt = <3300000>;
85		regulator-boot-on;
86		regulator-always-on;
87	};
88
89	vcc_vddq_vin0: regulator-2 {
90		compatible = "regulator-fixed";
91		regulator-name = "VCC_VDDQ_VIN0";
92		regulator-min-microvolt = <3300000>;
93		regulator-max-microvolt = <3300000>;
94		regulator-boot-on;
95		regulator-always-on;
96	};
97};
98
99&avb {
100	pinctrl-0 = <&avb_pins>;
101	pinctrl-names = "default";
102
103	renesas,no-ether-link;
104	phy-handle = <&phy0>;
105	rx-internal-delay-ps = <1800>;
106	tx-internal-delay-ps = <2000>;
107	status = "okay";
108
109	phy0: ethernet-phy@0 {
110		rxc-skew-ps = <1500>;
111		reg = <0>;
112		interrupt-parent = <&gpio1>;
113		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
114	};
115};
116
117&du {
118	clocks = <&cpg CPG_MOD 724>,
119		 <&osc5_clk>;
120	clock-names = "du.0", "dclkin.0";
121	status = "okay";
122};
123
124&extal_clk {
125	clock-frequency = <16666666>;
126};
127
128&extalr_clk {
129	clock-frequency = <32768>;
130};
131
132&i2c0 {
133	pinctrl-0 = <&i2c0_pins>;
134	pinctrl-names = "default";
135
136	status = "okay";
137	clock-frequency = <400000>;
138
139	hdmi@39{
140		compatible = "adi,adv7511w";
141		#sound-dai-cells = <0>;
142		reg = <0x39>;
143		interrupt-parent = <&gpio1>;
144		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
145		avdd-supply = <&vcc_d1_8v>;
146		dvdd-supply = <&vcc_d1_8v>;
147		pvdd-supply = <&vcc_d1_8v>;
148		bgvdd-supply = <&vcc_d1_8v>;
149		dvdd-3v-supply = <&vcc_d3_3v>;
150
151		adi,input-depth = <8>;
152		adi,input-colorspace = "rgb";
153		adi,input-clock = "1x";
154
155		ports {
156			#address-cells = <1>;
157			#size-cells = <0>;
158
159			port@0 {
160				reg = <0>;
161				adv7511_in: endpoint {
162					remote-endpoint = <&thc63lvd1024_out>;
163				};
164			};
165
166			port@1 {
167				reg = <1>;
168				adv7511_out: endpoint {
169					remote-endpoint = <&hdmi_con>;
170				};
171			};
172		};
173	};
174};
175
176&lvds0 {
177	status = "okay";
178
179	ports {
180		port@1 {
181			lvds0_out: endpoint {
182				remote-endpoint = <&thc63lvd1024_in>;
183			};
184		};
185	};
186};
187
188&mmc0 {
189	pinctrl-0 = <&mmc_pins>;
190	pinctrl-names = "default";
191
192	vmmc-supply = <&vcc_d3_3v>;
193	vqmmc-supply = <&vcc_vddq_vin0>;
194	bus-width = <8>;
195	non-removable;
196	status = "okay";
197};
198
199&pfc {
200	avb_pins: avb0 {
201		groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
202		function = "avb0";
203	};
204
205	i2c0_pins: i2c0 {
206		groups = "i2c0";
207		function = "i2c0";
208	};
209
210	mmc_pins: mmc_3_3v {
211		groups = "mmc_data8", "mmc_ctrl";
212		function = "mmc";
213		power-source = <3300>;
214	};
215
216	qspi0_pins: qspi0 {
217		groups = "qspi0_ctrl", "qspi0_data4";
218		function = "qspi0";
219	};
220
221	scif0_pins: scif0 {
222		groups = "scif0_data";
223		function = "scif0";
224	};
225};
226
227&rpc {
228	pinctrl-0 = <&qspi0_pins>;
229	pinctrl-names = "default";
230
231	status = "okay";
232
233	flash@0 {
234		compatible = "spansion,s25fs512s", "jedec,spi-nor";
235		reg = <0>;
236		spi-max-frequency = <50000000>;
237		spi-rx-bus-width = <4>;
238
239		partitions {
240			compatible = "fixed-partitions";
241			#address-cells = <1>;
242			#size-cells = <1>;
243
244			bootparam@0 {
245				reg = <0x00000000 0x040000>;
246				read-only;
247			};
248			cr7@40000 {
249				reg = <0x00040000 0x080000>;
250				read-only;
251			};
252			cert_header_sa3@c0000 {
253				reg = <0x000c0000 0x080000>;
254				read-only;
255			};
256			bl2@140000 {
257				reg = <0x00140000 0x040000>;
258				read-only;
259			};
260			cert_header_sa6@180000 {
261				reg = <0x00180000 0x040000>;
262				read-only;
263			};
264			bl31@1c0000 {
265				reg = <0x001c0000 0x460000>;
266				read-only;
267			};
268			uboot@640000 {
269				reg = <0x00640000 0x0c0000>;
270				read-only;
271			};
272			uboot-env@700000 {
273				reg = <0x00700000 0x040000>;
274				read-only;
275			};
276			dtb@740000 {
277				reg = <0x00740000 0x080000>;
278			};
279			kernel@7c0000 {
280				reg = <0x007c0000 0x1400000>;
281			};
282			user@1bc0000 {
283				reg = <0x01bc0000 0x2440000>;
284			};
285		};
286	};
287};
288
289&scif0 {
290	pinctrl-0 = <&scif0_pins>;
291	pinctrl-names = "default";
292
293	status = "okay";
294};
295