1cba59c25SWolfram Sang// SPDX-License-Identifier: GPL-2.0 2cc3e267eSSergei Shtylyov/* 3cc3e267eSSergei Shtylyov * Device Tree Source for the V3M Starter Kit board 4cc3e267eSSergei Shtylyov * 5cc3e267eSSergei Shtylyov * Copyright (C) 2017 Renesas Electronics Corp. 6cc3e267eSSergei Shtylyov * Copyright (C) 2017 Cogent Embedded, Inc. 7cc3e267eSSergei Shtylyov */ 8cc3e267eSSergei Shtylyov 9cc3e267eSSergei Shtylyov/dts-v1/; 10cc3e267eSSergei Shtylyov#include "r8a77970.dtsi" 11cc3e267eSSergei Shtylyov 12cc3e267eSSergei Shtylyov/ { 13cc3e267eSSergei Shtylyov model = "Renesas V3M Starter Kit board"; 14cc3e267eSSergei Shtylyov compatible = "renesas,v3msk", "renesas,r8a77970"; 15cc3e267eSSergei Shtylyov 16cc3e267eSSergei Shtylyov aliases { 17cc3e267eSSergei Shtylyov serial0 = &scif0; 18cc3e267eSSergei Shtylyov }; 19cc3e267eSSergei Shtylyov 20cc3e267eSSergei Shtylyov chosen { 21cc3e267eSSergei Shtylyov stdout-path = "serial0:115200n8"; 22cc3e267eSSergei Shtylyov }; 23cc3e267eSSergei Shtylyov 2443afe206SYoshihiro Kaneko hdmi-out { 2543afe206SYoshihiro Kaneko compatible = "hdmi-connector"; 2643afe206SYoshihiro Kaneko type = "a"; 2743afe206SYoshihiro Kaneko 2843afe206SYoshihiro Kaneko port { 2943afe206SYoshihiro Kaneko hdmi_con: endpoint { 3043afe206SYoshihiro Kaneko remote-endpoint = <&adv7511_out>; 3143afe206SYoshihiro Kaneko }; 3243afe206SYoshihiro Kaneko }; 3343afe206SYoshihiro Kaneko }; 3443afe206SYoshihiro Kaneko 3543afe206SYoshihiro Kaneko lvds-decoder { 3643afe206SYoshihiro Kaneko compatible = "thine,thc63lvd1024"; 3743afe206SYoshihiro Kaneko vcc-supply = <&vcc_d3_3v>; 3843afe206SYoshihiro Kaneko 3943afe206SYoshihiro Kaneko ports { 4043afe206SYoshihiro Kaneko #address-cells = <1>; 4143afe206SYoshihiro Kaneko #size-cells = <0>; 4243afe206SYoshihiro Kaneko 4343afe206SYoshihiro Kaneko port@0 { 4443afe206SYoshihiro Kaneko reg = <0>; 4543afe206SYoshihiro Kaneko thc63lvd1024_in: endpoint { 4643afe206SYoshihiro Kaneko remote-endpoint = <&lvds0_out>; 4743afe206SYoshihiro Kaneko }; 4843afe206SYoshihiro Kaneko }; 4943afe206SYoshihiro Kaneko 5043afe206SYoshihiro Kaneko port@2 { 5143afe206SYoshihiro Kaneko reg = <2>; 5243afe206SYoshihiro Kaneko thc63lvd1024_out: endpoint { 5343afe206SYoshihiro Kaneko remote-endpoint = <&adv7511_in>; 5443afe206SYoshihiro Kaneko }; 5543afe206SYoshihiro Kaneko }; 5643afe206SYoshihiro Kaneko }; 5743afe206SYoshihiro Kaneko }; 5843afe206SYoshihiro Kaneko 59cc3e267eSSergei Shtylyov memory@48000000 { 60cc3e267eSSergei Shtylyov device_type = "memory"; 61cc3e267eSSergei Shtylyov /* first 128MB is reserved for secure area. */ 62*a422ec20SValentine Barshak reg = <0x0 0x48000000 0x0 0x78000000>; 63cc3e267eSSergei Shtylyov }; 640c1861feSSergei Shtylyov 650c1861feSSergei Shtylyov osc5_clk: osc5-clock { 660c1861feSSergei Shtylyov compatible = "fixed-clock"; 670c1861feSSergei Shtylyov #clock-cells = <0>; 680c1861feSSergei Shtylyov clock-frequency = <148500000>; 690c1861feSSergei Shtylyov }; 700c1861feSSergei Shtylyov 710c1861feSSergei Shtylyov vcc_d1_8v: regulator-0 { 720c1861feSSergei Shtylyov compatible = "regulator-fixed"; 730c1861feSSergei Shtylyov regulator-name = "VCC_D1.8V"; 740c1861feSSergei Shtylyov regulator-min-microvolt = <1800000>; 750c1861feSSergei Shtylyov regulator-max-microvolt = <1800000>; 760c1861feSSergei Shtylyov regulator-boot-on; 770c1861feSSergei Shtylyov regulator-always-on; 780c1861feSSergei Shtylyov }; 790c1861feSSergei Shtylyov 800c1861feSSergei Shtylyov vcc_d3_3v: regulator-1 { 810c1861feSSergei Shtylyov compatible = "regulator-fixed"; 820c1861feSSergei Shtylyov regulator-name = "VCC_D3.3V"; 830c1861feSSergei Shtylyov regulator-min-microvolt = <3300000>; 840c1861feSSergei Shtylyov regulator-max-microvolt = <3300000>; 850c1861feSSergei Shtylyov regulator-boot-on; 860c1861feSSergei Shtylyov regulator-always-on; 870c1861feSSergei Shtylyov }; 880c1861feSSergei Shtylyov 898d9923b3SSergei Shtylyov vcc_vddq_vin0: regulator-2 { 908d9923b3SSergei Shtylyov compatible = "regulator-fixed"; 918d9923b3SSergei Shtylyov regulator-name = "VCC_VDDQ_VIN0"; 928d9923b3SSergei Shtylyov regulator-min-microvolt = <3300000>; 938d9923b3SSergei Shtylyov regulator-max-microvolt = <3300000>; 948d9923b3SSergei Shtylyov regulator-boot-on; 958d9923b3SSergei Shtylyov regulator-always-on; 968d9923b3SSergei Shtylyov }; 97cc3e267eSSergei Shtylyov}; 98cc3e267eSSergei Shtylyov 99a6b1b735SSergei Shtylyov&avb { 10068d3b03fSSergei Shtylyov pinctrl-0 = <&avb_pins>; 10168d3b03fSSergei Shtylyov pinctrl-names = "default"; 10268d3b03fSSergei Shtylyov 103a6b1b735SSergei Shtylyov renesas,no-ether-link; 104a6b1b735SSergei Shtylyov phy-handle = <&phy0>; 1059b810181SGeert Uytterhoeven rx-internal-delay-ps = <1800>; 1069b810181SGeert Uytterhoeven tx-internal-delay-ps = <2000>; 107a6b1b735SSergei Shtylyov status = "okay"; 108a6b1b735SSergei Shtylyov 109a6b1b735SSergei Shtylyov phy0: ethernet-phy@0 { 110a6b1b735SSergei Shtylyov rxc-skew-ps = <1500>; 111a6b1b735SSergei Shtylyov reg = <0>; 112d5e5790cSSergei Shtylyov interrupt-parent = <&gpio1>; 113d5e5790cSSergei Shtylyov interrupts = <17 IRQ_TYPE_LEVEL_LOW>; 114a6b1b735SSergei Shtylyov }; 115a6b1b735SSergei Shtylyov}; 116a6b1b735SSergei Shtylyov 1170c1861feSSergei Shtylyov&du { 1180c1861feSSergei Shtylyov clocks = <&cpg CPG_MOD 724>, 1190c1861feSSergei Shtylyov <&osc5_clk>; 1200c1861feSSergei Shtylyov clock-names = "du.0", "dclkin.0"; 1210c1861feSSergei Shtylyov status = "okay"; 1220c1861feSSergei Shtylyov}; 1230c1861feSSergei Shtylyov 124cc3e267eSSergei Shtylyov&extal_clk { 125cc3e267eSSergei Shtylyov clock-frequency = <16666666>; 126cc3e267eSSergei Shtylyov}; 127cc3e267eSSergei Shtylyov 128cc3e267eSSergei Shtylyov&extalr_clk { 129cc3e267eSSergei Shtylyov clock-frequency = <32768>; 130cc3e267eSSergei Shtylyov}; 131cc3e267eSSergei Shtylyov 1320c1861feSSergei Shtylyov&i2c0 { 1330c1861feSSergei Shtylyov pinctrl-0 = <&i2c0_pins>; 1340c1861feSSergei Shtylyov pinctrl-names = "default"; 1350c1861feSSergei Shtylyov 1360c1861feSSergei Shtylyov status = "okay"; 1370c1861feSSergei Shtylyov clock-frequency = <400000>; 1380c1861feSSergei Shtylyov 1390c1861feSSergei Shtylyov hdmi@39{ 1400c1861feSSergei Shtylyov compatible = "adi,adv7511w"; 1410c1861feSSergei Shtylyov #sound-dai-cells = <0>; 1420c1861feSSergei Shtylyov reg = <0x39>; 1430c1861feSSergei Shtylyov interrupt-parent = <&gpio1>; 1440c1861feSSergei Shtylyov interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 1450c1861feSSergei Shtylyov avdd-supply = <&vcc_d1_8v>; 1460c1861feSSergei Shtylyov dvdd-supply = <&vcc_d1_8v>; 1470c1861feSSergei Shtylyov pvdd-supply = <&vcc_d1_8v>; 1480c1861feSSergei Shtylyov bgvdd-supply = <&vcc_d1_8v>; 1490c1861feSSergei Shtylyov dvdd-3v-supply = <&vcc_d3_3v>; 1500c1861feSSergei Shtylyov 1510c1861feSSergei Shtylyov adi,input-depth = <8>; 1520c1861feSSergei Shtylyov adi,input-colorspace = "rgb"; 1530c1861feSSergei Shtylyov adi,input-clock = "1x"; 1540c1861feSSergei Shtylyov 1550c1861feSSergei Shtylyov ports { 1560c1861feSSergei Shtylyov #address-cells = <1>; 1570c1861feSSergei Shtylyov #size-cells = <0>; 1580c1861feSSergei Shtylyov 1590c1861feSSergei Shtylyov port@0 { 1600c1861feSSergei Shtylyov reg = <0>; 1610c1861feSSergei Shtylyov adv7511_in: endpoint { 1620c1861feSSergei Shtylyov remote-endpoint = <&thc63lvd1024_out>; 1630c1861feSSergei Shtylyov }; 1640c1861feSSergei Shtylyov }; 1650c1861feSSergei Shtylyov 1660c1861feSSergei Shtylyov port@1 { 1670c1861feSSergei Shtylyov reg = <1>; 1680c1861feSSergei Shtylyov adv7511_out: endpoint { 1690c1861feSSergei Shtylyov remote-endpoint = <&hdmi_con>; 1700c1861feSSergei Shtylyov }; 1710c1861feSSergei Shtylyov }; 1720c1861feSSergei Shtylyov }; 1730c1861feSSergei Shtylyov }; 1740c1861feSSergei Shtylyov}; 1750c1861feSSergei Shtylyov 1760c1861feSSergei Shtylyov&lvds0 { 1770c1861feSSergei Shtylyov status = "okay"; 1780c1861feSSergei Shtylyov 1790c1861feSSergei Shtylyov ports { 1800c1861feSSergei Shtylyov port@1 { 1810c1861feSSergei Shtylyov lvds0_out: endpoint { 1820c1861feSSergei Shtylyov remote-endpoint = <&thc63lvd1024_in>; 1830c1861feSSergei Shtylyov }; 1840c1861feSSergei Shtylyov }; 1850c1861feSSergei Shtylyov }; 1860c1861feSSergei Shtylyov}; 1870c1861feSSergei Shtylyov 1888d9923b3SSergei Shtylyov&mmc0 { 1898d9923b3SSergei Shtylyov pinctrl-0 = <&mmc_pins>; 1908d9923b3SSergei Shtylyov pinctrl-names = "default"; 1918d9923b3SSergei Shtylyov 1928d9923b3SSergei Shtylyov vmmc-supply = <&vcc_d3_3v>; 1938d9923b3SSergei Shtylyov vqmmc-supply = <&vcc_vddq_vin0>; 1948d9923b3SSergei Shtylyov bus-width = <8>; 1958d9923b3SSergei Shtylyov non-removable; 1968d9923b3SSergei Shtylyov status = "okay"; 1978d9923b3SSergei Shtylyov}; 1988d9923b3SSergei Shtylyov 19943afe206SYoshihiro Kaneko&pfc { 20043afe206SYoshihiro Kaneko avb_pins: avb0 { 20143afe206SYoshihiro Kaneko groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; 20243afe206SYoshihiro Kaneko function = "avb0"; 20343afe206SYoshihiro Kaneko }; 20443afe206SYoshihiro Kaneko 20543afe206SYoshihiro Kaneko i2c0_pins: i2c0 { 20643afe206SYoshihiro Kaneko groups = "i2c0"; 20743afe206SYoshihiro Kaneko function = "i2c0"; 20843afe206SYoshihiro Kaneko }; 20943afe206SYoshihiro Kaneko 21043afe206SYoshihiro Kaneko mmc_pins: mmc_3_3v { 21143afe206SYoshihiro Kaneko groups = "mmc_data8", "mmc_ctrl"; 21243afe206SYoshihiro Kaneko function = "mmc"; 21343afe206SYoshihiro Kaneko power-source = <3300>; 21443afe206SYoshihiro Kaneko }; 21543afe206SYoshihiro Kaneko 216daa36ae0SSergei Shtylyov qspi0_pins: qspi0 { 217daa36ae0SSergei Shtylyov groups = "qspi0_ctrl", "qspi0_data4"; 218daa36ae0SSergei Shtylyov function = "qspi0"; 219daa36ae0SSergei Shtylyov }; 220daa36ae0SSergei Shtylyov 22143afe206SYoshihiro Kaneko scif0_pins: scif0 { 22243afe206SYoshihiro Kaneko groups = "scif0_data"; 22343afe206SYoshihiro Kaneko function = "scif0"; 22443afe206SYoshihiro Kaneko }; 22543afe206SYoshihiro Kaneko}; 22643afe206SYoshihiro Kaneko 227daa36ae0SSergei Shtylyov&rpc { 228daa36ae0SSergei Shtylyov pinctrl-0 = <&qspi0_pins>; 229daa36ae0SSergei Shtylyov pinctrl-names = "default"; 230daa36ae0SSergei Shtylyov 231daa36ae0SSergei Shtylyov status = "okay"; 232daa36ae0SSergei Shtylyov 233daa36ae0SSergei Shtylyov flash@0 { 234daa36ae0SSergei Shtylyov compatible = "spansion,s25fs512s", "jedec,spi-nor"; 235daa36ae0SSergei Shtylyov reg = <0>; 236daa36ae0SSergei Shtylyov spi-max-frequency = <50000000>; 237daa36ae0SSergei Shtylyov spi-rx-bus-width = <4>; 238daa36ae0SSergei Shtylyov 239daa36ae0SSergei Shtylyov partitions { 240daa36ae0SSergei Shtylyov compatible = "fixed-partitions"; 241daa36ae0SSergei Shtylyov #address-cells = <1>; 242daa36ae0SSergei Shtylyov #size-cells = <1>; 243daa36ae0SSergei Shtylyov 244daa36ae0SSergei Shtylyov bootparam@0 { 245daa36ae0SSergei Shtylyov reg = <0x00000000 0x040000>; 246daa36ae0SSergei Shtylyov read-only; 247daa36ae0SSergei Shtylyov }; 248daa36ae0SSergei Shtylyov cr7@40000 { 249daa36ae0SSergei Shtylyov reg = <0x00040000 0x080000>; 250daa36ae0SSergei Shtylyov read-only; 251daa36ae0SSergei Shtylyov }; 252daa36ae0SSergei Shtylyov cert_header_sa3@c0000 { 253daa36ae0SSergei Shtylyov reg = <0x000c0000 0x080000>; 254daa36ae0SSergei Shtylyov read-only; 255daa36ae0SSergei Shtylyov }; 256daa36ae0SSergei Shtylyov bl2@140000 { 257daa36ae0SSergei Shtylyov reg = <0x00140000 0x040000>; 258daa36ae0SSergei Shtylyov read-only; 259daa36ae0SSergei Shtylyov }; 260daa36ae0SSergei Shtylyov cert_header_sa6@180000 { 261daa36ae0SSergei Shtylyov reg = <0x00180000 0x040000>; 262daa36ae0SSergei Shtylyov read-only; 263daa36ae0SSergei Shtylyov }; 264daa36ae0SSergei Shtylyov bl31@1c0000 { 265daa36ae0SSergei Shtylyov reg = <0x001c0000 0x460000>; 266daa36ae0SSergei Shtylyov read-only; 267daa36ae0SSergei Shtylyov }; 268daa36ae0SSergei Shtylyov uboot@640000 { 269daa36ae0SSergei Shtylyov reg = <0x00640000 0x0c0000>; 270daa36ae0SSergei Shtylyov read-only; 271daa36ae0SSergei Shtylyov }; 272daa36ae0SSergei Shtylyov uboot-env@700000 { 273daa36ae0SSergei Shtylyov reg = <0x00700000 0x040000>; 274daa36ae0SSergei Shtylyov read-only; 275daa36ae0SSergei Shtylyov }; 276daa36ae0SSergei Shtylyov dtb@740000 { 277daa36ae0SSergei Shtylyov reg = <0x00740000 0x080000>; 278daa36ae0SSergei Shtylyov }; 279daa36ae0SSergei Shtylyov kernel@7c0000 { 280daa36ae0SSergei Shtylyov reg = <0x007c0000 0x1400000>; 281daa36ae0SSergei Shtylyov }; 282daa36ae0SSergei Shtylyov user@1bc0000 { 283daa36ae0SSergei Shtylyov reg = <0x01bc0000 0x2440000>; 284daa36ae0SSergei Shtylyov }; 285daa36ae0SSergei Shtylyov }; 286daa36ae0SSergei Shtylyov }; 287daa36ae0SSergei Shtylyov}; 288daa36ae0SSergei Shtylyov 289cc3e267eSSergei Shtylyov&scif0 { 290ca565be2SSergei Shtylyov pinctrl-0 = <&scif0_pins>; 291ca565be2SSergei Shtylyov pinctrl-names = "default"; 292ca565be2SSergei Shtylyov 293cc3e267eSSergei Shtylyov status = "okay"; 294cc3e267eSSergei Shtylyov}; 295