1cc3e267eSSergei Shtylyov/* 2cc3e267eSSergei Shtylyov * Device Tree Source for the V3M Starter Kit board 3cc3e267eSSergei Shtylyov * 4cc3e267eSSergei Shtylyov * Copyright (C) 2017 Renesas Electronics Corp. 5cc3e267eSSergei Shtylyov * Copyright (C) 2017 Cogent Embedded, Inc. 6cc3e267eSSergei Shtylyov * 7cc3e267eSSergei Shtylyov * This file is licensed under the terms of the GNU General Public License 8cc3e267eSSergei Shtylyov * version 2. This program is licensed "as is" without any warranty of any 9cc3e267eSSergei Shtylyov * kind, whether express or implied. 10cc3e267eSSergei Shtylyov */ 11cc3e267eSSergei Shtylyov 12cc3e267eSSergei Shtylyov/dts-v1/; 13cc3e267eSSergei Shtylyov#include "r8a77970.dtsi" 14cc3e267eSSergei Shtylyov 15cc3e267eSSergei Shtylyov/ { 16cc3e267eSSergei Shtylyov model = "Renesas V3M Starter Kit board"; 17cc3e267eSSergei Shtylyov compatible = "renesas,v3msk", "renesas,r8a77970"; 18cc3e267eSSergei Shtylyov 19cc3e267eSSergei Shtylyov aliases { 20cc3e267eSSergei Shtylyov serial0 = &scif0; 21cc3e267eSSergei Shtylyov }; 22cc3e267eSSergei Shtylyov 23cc3e267eSSergei Shtylyov chosen { 24cc3e267eSSergei Shtylyov stdout-path = "serial0:115200n8"; 25cc3e267eSSergei Shtylyov }; 26cc3e267eSSergei Shtylyov 27cc3e267eSSergei Shtylyov memory@48000000 { 28cc3e267eSSergei Shtylyov device_type = "memory"; 29cc3e267eSSergei Shtylyov /* first 128MB is reserved for secure area. */ 30cc3e267eSSergei Shtylyov reg = <0x0 0x48000000 0x0 0x38000000>; 31cc3e267eSSergei Shtylyov }; 32cc3e267eSSergei Shtylyov}; 33cc3e267eSSergei Shtylyov 34a6b1b735SSergei Shtylyov&avb { 35a6b1b735SSergei Shtylyov renesas,no-ether-link; 36a6b1b735SSergei Shtylyov phy-handle = <&phy0>; 379dcd1f26SJacopo Mondi phy-mode = "rgmii-id"; 38a6b1b735SSergei Shtylyov status = "okay"; 39a6b1b735SSergei Shtylyov 40a6b1b735SSergei Shtylyov phy0: ethernet-phy@0 { 41a6b1b735SSergei Shtylyov rxc-skew-ps = <1500>; 42a6b1b735SSergei Shtylyov reg = <0>; 43a6b1b735SSergei Shtylyov }; 44a6b1b735SSergei Shtylyov}; 45a6b1b735SSergei Shtylyov 46cc3e267eSSergei Shtylyov&extal_clk { 47cc3e267eSSergei Shtylyov clock-frequency = <16666666>; 48cc3e267eSSergei Shtylyov}; 49cc3e267eSSergei Shtylyov 50cc3e267eSSergei Shtylyov&extalr_clk { 51cc3e267eSSergei Shtylyov clock-frequency = <32768>; 52cc3e267eSSergei Shtylyov}; 53cc3e267eSSergei Shtylyov 54cc3e267eSSergei Shtylyov&scif0 { 55cc3e267eSSergei Shtylyov status = "okay"; 56cc3e267eSSergei Shtylyov}; 57