1cba59c25SWolfram Sang// SPDX-License-Identifier: GPL-2.0
2cc3e267eSSergei Shtylyov/*
3cc3e267eSSergei Shtylyov * Device Tree Source for the V3M Starter Kit board
4cc3e267eSSergei Shtylyov *
5cc3e267eSSergei Shtylyov * Copyright (C) 2017 Renesas Electronics Corp.
6cc3e267eSSergei Shtylyov * Copyright (C) 2017 Cogent Embedded, Inc.
7cc3e267eSSergei Shtylyov */
8cc3e267eSSergei Shtylyov
9cc3e267eSSergei Shtylyov/dts-v1/;
10cc3e267eSSergei Shtylyov#include "r8a77970.dtsi"
11cc3e267eSSergei Shtylyov
12cc3e267eSSergei Shtylyov/ {
13cc3e267eSSergei Shtylyov	model = "Renesas V3M Starter Kit board";
14cc3e267eSSergei Shtylyov	compatible = "renesas,v3msk", "renesas,r8a77970";
15cc3e267eSSergei Shtylyov
16cc3e267eSSergei Shtylyov	aliases {
17cc3e267eSSergei Shtylyov		serial0 = &scif0;
18cc3e267eSSergei Shtylyov	};
19cc3e267eSSergei Shtylyov
20cc3e267eSSergei Shtylyov	chosen {
21cc3e267eSSergei Shtylyov		stdout-path = "serial0:115200n8";
22cc3e267eSSergei Shtylyov	};
23cc3e267eSSergei Shtylyov
24cc3e267eSSergei Shtylyov	memory@48000000 {
25cc3e267eSSergei Shtylyov		device_type = "memory";
26cc3e267eSSergei Shtylyov		/* first 128MB is reserved for secure area. */
27cc3e267eSSergei Shtylyov		reg = <0x0 0x48000000 0x0 0x38000000>;
28cc3e267eSSergei Shtylyov	};
290c1861feSSergei Shtylyov
300c1861feSSergei Shtylyov	osc5_clk: osc5-clock {
310c1861feSSergei Shtylyov		compatible = "fixed-clock";
320c1861feSSergei Shtylyov		#clock-cells = <0>;
330c1861feSSergei Shtylyov		clock-frequency = <148500000>;
340c1861feSSergei Shtylyov	};
350c1861feSSergei Shtylyov
360c1861feSSergei Shtylyov	vcc_d1_8v: regulator-0 {
370c1861feSSergei Shtylyov		compatible = "regulator-fixed";
380c1861feSSergei Shtylyov		regulator-name = "VCC_D1.8V";
390c1861feSSergei Shtylyov		regulator-min-microvolt = <1800000>;
400c1861feSSergei Shtylyov		regulator-max-microvolt = <1800000>;
410c1861feSSergei Shtylyov		regulator-boot-on;
420c1861feSSergei Shtylyov		regulator-always-on;
430c1861feSSergei Shtylyov	};
440c1861feSSergei Shtylyov
450c1861feSSergei Shtylyov	vcc_d3_3v: regulator-1 {
460c1861feSSergei Shtylyov		compatible = "regulator-fixed";
470c1861feSSergei Shtylyov		regulator-name = "VCC_D3.3V";
480c1861feSSergei Shtylyov		regulator-min-microvolt = <3300000>;
490c1861feSSergei Shtylyov		regulator-max-microvolt = <3300000>;
500c1861feSSergei Shtylyov		regulator-boot-on;
510c1861feSSergei Shtylyov		regulator-always-on;
520c1861feSSergei Shtylyov	};
530c1861feSSergei Shtylyov
548d9923b3SSergei Shtylyov	vcc_vddq_vin0: regulator-2 {
558d9923b3SSergei Shtylyov		compatible = "regulator-fixed";
568d9923b3SSergei Shtylyov		regulator-name = "VCC_VDDQ_VIN0";
578d9923b3SSergei Shtylyov		regulator-min-microvolt = <3300000>;
588d9923b3SSergei Shtylyov		regulator-max-microvolt = <3300000>;
598d9923b3SSergei Shtylyov		regulator-boot-on;
608d9923b3SSergei Shtylyov		regulator-always-on;
618d9923b3SSergei Shtylyov	};
628d9923b3SSergei Shtylyov
630c1861feSSergei Shtylyov	lvds-decoder {
640c1861feSSergei Shtylyov		compatible = "thine,thc63lvd1024";
650c1861feSSergei Shtylyov		vcc-supply = <&vcc_d3_3v>;
660c1861feSSergei Shtylyov
670c1861feSSergei Shtylyov		ports {
680c1861feSSergei Shtylyov			#address-cells = <1>;
690c1861feSSergei Shtylyov			#size-cells = <0>;
700c1861feSSergei Shtylyov
710c1861feSSergei Shtylyov			port@0 {
720c1861feSSergei Shtylyov				reg = <0>;
730c1861feSSergei Shtylyov				thc63lvd1024_in: endpoint {
740c1861feSSergei Shtylyov					remote-endpoint = <&lvds0_out>;
750c1861feSSergei Shtylyov				};
760c1861feSSergei Shtylyov			};
770c1861feSSergei Shtylyov
780c1861feSSergei Shtylyov			port@2 {
790c1861feSSergei Shtylyov				reg = <2>;
800c1861feSSergei Shtylyov				thc63lvd1024_out: endpoint {
810c1861feSSergei Shtylyov					remote-endpoint = <&adv7511_in>;
820c1861feSSergei Shtylyov				};
830c1861feSSergei Shtylyov			};
840c1861feSSergei Shtylyov		};
850c1861feSSergei Shtylyov	};
860c1861feSSergei Shtylyov
870c1861feSSergei Shtylyov	hdmi-out {
880c1861feSSergei Shtylyov		compatible = "hdmi-connector";
890c1861feSSergei Shtylyov		type = "a";
900c1861feSSergei Shtylyov
910c1861feSSergei Shtylyov		port {
920c1861feSSergei Shtylyov			hdmi_con: endpoint {
930c1861feSSergei Shtylyov				remote-endpoint = <&adv7511_out>;
940c1861feSSergei Shtylyov			};
950c1861feSSergei Shtylyov		};
960c1861feSSergei Shtylyov	};
97cc3e267eSSergei Shtylyov};
98cc3e267eSSergei Shtylyov
99a6b1b735SSergei Shtylyov&avb {
10068d3b03fSSergei Shtylyov	pinctrl-0 = <&avb_pins>;
10168d3b03fSSergei Shtylyov	pinctrl-names = "default";
10268d3b03fSSergei Shtylyov
103a6b1b735SSergei Shtylyov	renesas,no-ether-link;
104a6b1b735SSergei Shtylyov	phy-handle = <&phy0>;
1059dcd1f26SJacopo Mondi	phy-mode = "rgmii-id";
106a6b1b735SSergei Shtylyov	status = "okay";
107a6b1b735SSergei Shtylyov
108a6b1b735SSergei Shtylyov	phy0: ethernet-phy@0 {
109a6b1b735SSergei Shtylyov		rxc-skew-ps = <1500>;
110a6b1b735SSergei Shtylyov		reg = <0>;
111a6b1b735SSergei Shtylyov	};
112a6b1b735SSergei Shtylyov};
113a6b1b735SSergei Shtylyov
1140c1861feSSergei Shtylyov&du {
1150c1861feSSergei Shtylyov	clocks = <&cpg CPG_MOD 724>,
1160c1861feSSergei Shtylyov		 <&osc5_clk>;
1170c1861feSSergei Shtylyov	clock-names = "du.0", "dclkin.0";
1180c1861feSSergei Shtylyov	status = "okay";
1190c1861feSSergei Shtylyov};
1200c1861feSSergei Shtylyov
121cc3e267eSSergei Shtylyov&extal_clk {
122cc3e267eSSergei Shtylyov	clock-frequency = <16666666>;
123cc3e267eSSergei Shtylyov};
124cc3e267eSSergei Shtylyov
125cc3e267eSSergei Shtylyov&extalr_clk {
126cc3e267eSSergei Shtylyov	clock-frequency = <32768>;
127cc3e267eSSergei Shtylyov};
128cc3e267eSSergei Shtylyov
129ca565be2SSergei Shtylyov&pfc {
13068d3b03fSSergei Shtylyov	avb_pins: avb0 {
13168d3b03fSSergei Shtylyov		groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
13268d3b03fSSergei Shtylyov		function = "avb0";
13368d3b03fSSergei Shtylyov	};
13468d3b03fSSergei Shtylyov
1350c1861feSSergei Shtylyov	i2c0_pins: i2c0 {
1360c1861feSSergei Shtylyov		groups = "i2c0";
1370c1861feSSergei Shtylyov		function = "i2c0";
1380c1861feSSergei Shtylyov	};
1390c1861feSSergei Shtylyov
1408d9923b3SSergei Shtylyov	mmc_pins: mmc_3_3v {
1418d9923b3SSergei Shtylyov		groups = "mmc_data8", "mmc_ctrl";
1428d9923b3SSergei Shtylyov		function = "mmc";
1438d9923b3SSergei Shtylyov		power-source = <3300>;
1448d9923b3SSergei Shtylyov	};
1458d9923b3SSergei Shtylyov
146ca565be2SSergei Shtylyov	scif0_pins: scif0 {
147ca565be2SSergei Shtylyov		groups = "scif0_data";
148ca565be2SSergei Shtylyov		function = "scif0";
149ca565be2SSergei Shtylyov	};
150ca565be2SSergei Shtylyov};
151ca565be2SSergei Shtylyov
1520c1861feSSergei Shtylyov&i2c0 {
1530c1861feSSergei Shtylyov	pinctrl-0 = <&i2c0_pins>;
1540c1861feSSergei Shtylyov	pinctrl-names = "default";
1550c1861feSSergei Shtylyov
1560c1861feSSergei Shtylyov	status = "okay";
1570c1861feSSergei Shtylyov	clock-frequency = <400000>;
1580c1861feSSergei Shtylyov
1590c1861feSSergei Shtylyov	hdmi@39{
1600c1861feSSergei Shtylyov		compatible = "adi,adv7511w";
1610c1861feSSergei Shtylyov		#sound-dai-cells = <0>;
1620c1861feSSergei Shtylyov		reg = <0x39>;
1630c1861feSSergei Shtylyov		interrupt-parent = <&gpio1>;
1640c1861feSSergei Shtylyov		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1650c1861feSSergei Shtylyov		avdd-supply = <&vcc_d1_8v>;
1660c1861feSSergei Shtylyov		dvdd-supply = <&vcc_d1_8v>;
1670c1861feSSergei Shtylyov		pvdd-supply = <&vcc_d1_8v>;
1680c1861feSSergei Shtylyov		bgvdd-supply = <&vcc_d1_8v>;
1690c1861feSSergei Shtylyov		dvdd-3v-supply = <&vcc_d3_3v>;
1700c1861feSSergei Shtylyov
1710c1861feSSergei Shtylyov		adi,input-depth = <8>;
1720c1861feSSergei Shtylyov		adi,input-colorspace = "rgb";
1730c1861feSSergei Shtylyov		adi,input-clock = "1x";
1740c1861feSSergei Shtylyov		adi,input-style = <1>;
1750c1861feSSergei Shtylyov		adi,input-justification = "evenly";
1760c1861feSSergei Shtylyov
1770c1861feSSergei Shtylyov		ports {
1780c1861feSSergei Shtylyov			#address-cells = <1>;
1790c1861feSSergei Shtylyov			#size-cells = <0>;
1800c1861feSSergei Shtylyov
1810c1861feSSergei Shtylyov			port@0 {
1820c1861feSSergei Shtylyov				reg = <0>;
1830c1861feSSergei Shtylyov				adv7511_in: endpoint {
1840c1861feSSergei Shtylyov					remote-endpoint = <&thc63lvd1024_out>;
1850c1861feSSergei Shtylyov				};
1860c1861feSSergei Shtylyov			};
1870c1861feSSergei Shtylyov
1880c1861feSSergei Shtylyov			port@1 {
1890c1861feSSergei Shtylyov				reg = <1>;
1900c1861feSSergei Shtylyov				adv7511_out: endpoint {
1910c1861feSSergei Shtylyov					remote-endpoint = <&hdmi_con>;
1920c1861feSSergei Shtylyov				};
1930c1861feSSergei Shtylyov			};
1940c1861feSSergei Shtylyov		};
1950c1861feSSergei Shtylyov	};
1960c1861feSSergei Shtylyov};
1970c1861feSSergei Shtylyov
1980c1861feSSergei Shtylyov&lvds0 {
1990c1861feSSergei Shtylyov	status = "okay";
2000c1861feSSergei Shtylyov
2010c1861feSSergei Shtylyov	ports {
2020c1861feSSergei Shtylyov		port@1 {
2030c1861feSSergei Shtylyov			lvds0_out: endpoint {
2040c1861feSSergei Shtylyov				remote-endpoint = <&thc63lvd1024_in>;
2050c1861feSSergei Shtylyov			};
2060c1861feSSergei Shtylyov		};
2070c1861feSSergei Shtylyov	};
2080c1861feSSergei Shtylyov};
2090c1861feSSergei Shtylyov
2108d9923b3SSergei Shtylyov&mmc0 {
2118d9923b3SSergei Shtylyov	pinctrl-0 = <&mmc_pins>;
2128d9923b3SSergei Shtylyov	pinctrl-names = "default";
2138d9923b3SSergei Shtylyov
2148d9923b3SSergei Shtylyov	vmmc-supply = <&vcc_d3_3v>;
2158d9923b3SSergei Shtylyov	vqmmc-supply = <&vcc_vddq_vin0>;
2168d9923b3SSergei Shtylyov	bus-width = <8>;
2178d9923b3SSergei Shtylyov	non-removable;
2188d9923b3SSergei Shtylyov	status = "okay";
2198d9923b3SSergei Shtylyov};
2208d9923b3SSergei Shtylyov
221cc3e267eSSergei Shtylyov&scif0 {
222ca565be2SSergei Shtylyov	pinctrl-0 = <&scif0_pins>;
223ca565be2SSergei Shtylyov	pinctrl-names = "default";
224ca565be2SSergei Shtylyov
225cc3e267eSSergei Shtylyov	status = "okay";
226cc3e267eSSergei Shtylyov};
227