1cba59c25SWolfram Sang// SPDX-License-Identifier: GPL-2.0
2cc3e267eSSergei Shtylyov/*
3cc3e267eSSergei Shtylyov * Device Tree Source for the V3M Starter Kit board
4cc3e267eSSergei Shtylyov *
5cc3e267eSSergei Shtylyov * Copyright (C) 2017 Renesas Electronics Corp.
6cc3e267eSSergei Shtylyov * Copyright (C) 2017 Cogent Embedded, Inc.
7cc3e267eSSergei Shtylyov */
8cc3e267eSSergei Shtylyov
9cc3e267eSSergei Shtylyov/dts-v1/;
10cc3e267eSSergei Shtylyov#include "r8a77970.dtsi"
11cc3e267eSSergei Shtylyov
12cc3e267eSSergei Shtylyov/ {
13cc3e267eSSergei Shtylyov	model = "Renesas V3M Starter Kit board";
14cc3e267eSSergei Shtylyov	compatible = "renesas,v3msk", "renesas,r8a77970";
15cc3e267eSSergei Shtylyov
16cc3e267eSSergei Shtylyov	aliases {
17cc3e267eSSergei Shtylyov		serial0 = &scif0;
18cc3e267eSSergei Shtylyov	};
19cc3e267eSSergei Shtylyov
20cc3e267eSSergei Shtylyov	chosen {
21cc3e267eSSergei Shtylyov		stdout-path = "serial0:115200n8";
22cc3e267eSSergei Shtylyov	};
23cc3e267eSSergei Shtylyov
2443afe206SYoshihiro Kaneko	hdmi-out {
2543afe206SYoshihiro Kaneko		compatible = "hdmi-connector";
2643afe206SYoshihiro Kaneko		type = "a";
2743afe206SYoshihiro Kaneko
2843afe206SYoshihiro Kaneko		port {
2943afe206SYoshihiro Kaneko			hdmi_con: endpoint {
3043afe206SYoshihiro Kaneko				remote-endpoint = <&adv7511_out>;
3143afe206SYoshihiro Kaneko			};
3243afe206SYoshihiro Kaneko		};
3343afe206SYoshihiro Kaneko	};
3443afe206SYoshihiro Kaneko
3543afe206SYoshihiro Kaneko	lvds-decoder {
3643afe206SYoshihiro Kaneko		compatible = "thine,thc63lvd1024";
3743afe206SYoshihiro Kaneko		vcc-supply = <&vcc_d3_3v>;
3843afe206SYoshihiro Kaneko
3943afe206SYoshihiro Kaneko		ports {
4043afe206SYoshihiro Kaneko			#address-cells = <1>;
4143afe206SYoshihiro Kaneko			#size-cells = <0>;
4243afe206SYoshihiro Kaneko
4343afe206SYoshihiro Kaneko			port@0 {
4443afe206SYoshihiro Kaneko				reg = <0>;
4543afe206SYoshihiro Kaneko				thc63lvd1024_in: endpoint {
4643afe206SYoshihiro Kaneko					remote-endpoint = <&lvds0_out>;
4743afe206SYoshihiro Kaneko				};
4843afe206SYoshihiro Kaneko			};
4943afe206SYoshihiro Kaneko
5043afe206SYoshihiro Kaneko			port@2 {
5143afe206SYoshihiro Kaneko				reg = <2>;
5243afe206SYoshihiro Kaneko				thc63lvd1024_out: endpoint {
5343afe206SYoshihiro Kaneko					remote-endpoint = <&adv7511_in>;
5443afe206SYoshihiro Kaneko				};
5543afe206SYoshihiro Kaneko			};
5643afe206SYoshihiro Kaneko		};
5743afe206SYoshihiro Kaneko	};
5843afe206SYoshihiro Kaneko
59cc3e267eSSergei Shtylyov	memory@48000000 {
60cc3e267eSSergei Shtylyov		device_type = "memory";
61cc3e267eSSergei Shtylyov		/* first 128MB is reserved for secure area. */
62cc3e267eSSergei Shtylyov		reg = <0x0 0x48000000 0x0 0x38000000>;
63cc3e267eSSergei Shtylyov	};
640c1861feSSergei Shtylyov
650c1861feSSergei Shtylyov	osc5_clk: osc5-clock {
660c1861feSSergei Shtylyov		compatible = "fixed-clock";
670c1861feSSergei Shtylyov		#clock-cells = <0>;
680c1861feSSergei Shtylyov		clock-frequency = <148500000>;
690c1861feSSergei Shtylyov	};
700c1861feSSergei Shtylyov
710c1861feSSergei Shtylyov	vcc_d1_8v: regulator-0 {
720c1861feSSergei Shtylyov		compatible = "regulator-fixed";
730c1861feSSergei Shtylyov		regulator-name = "VCC_D1.8V";
740c1861feSSergei Shtylyov		regulator-min-microvolt = <1800000>;
750c1861feSSergei Shtylyov		regulator-max-microvolt = <1800000>;
760c1861feSSergei Shtylyov		regulator-boot-on;
770c1861feSSergei Shtylyov		regulator-always-on;
780c1861feSSergei Shtylyov	};
790c1861feSSergei Shtylyov
800c1861feSSergei Shtylyov	vcc_d3_3v: regulator-1 {
810c1861feSSergei Shtylyov		compatible = "regulator-fixed";
820c1861feSSergei Shtylyov		regulator-name = "VCC_D3.3V";
830c1861feSSergei Shtylyov		regulator-min-microvolt = <3300000>;
840c1861feSSergei Shtylyov		regulator-max-microvolt = <3300000>;
850c1861feSSergei Shtylyov		regulator-boot-on;
860c1861feSSergei Shtylyov		regulator-always-on;
870c1861feSSergei Shtylyov	};
880c1861feSSergei Shtylyov
898d9923b3SSergei Shtylyov	vcc_vddq_vin0: regulator-2 {
908d9923b3SSergei Shtylyov		compatible = "regulator-fixed";
918d9923b3SSergei Shtylyov		regulator-name = "VCC_VDDQ_VIN0";
928d9923b3SSergei Shtylyov		regulator-min-microvolt = <3300000>;
938d9923b3SSergei Shtylyov		regulator-max-microvolt = <3300000>;
948d9923b3SSergei Shtylyov		regulator-boot-on;
958d9923b3SSergei Shtylyov		regulator-always-on;
968d9923b3SSergei Shtylyov	};
97cc3e267eSSergei Shtylyov};
98cc3e267eSSergei Shtylyov
99a6b1b735SSergei Shtylyov&avb {
10068d3b03fSSergei Shtylyov	pinctrl-0 = <&avb_pins>;
10168d3b03fSSergei Shtylyov	pinctrl-names = "default";
10268d3b03fSSergei Shtylyov
103a6b1b735SSergei Shtylyov	renesas,no-ether-link;
104a6b1b735SSergei Shtylyov	phy-handle = <&phy0>;
1059dcd1f26SJacopo Mondi	phy-mode = "rgmii-id";
106a6b1b735SSergei Shtylyov	status = "okay";
107a6b1b735SSergei Shtylyov
108a6b1b735SSergei Shtylyov	phy0: ethernet-phy@0 {
109a6b1b735SSergei Shtylyov		rxc-skew-ps = <1500>;
110a6b1b735SSergei Shtylyov		reg = <0>;
111d5e5790cSSergei Shtylyov		interrupt-parent = <&gpio1>;
112d5e5790cSSergei Shtylyov		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
113a6b1b735SSergei Shtylyov	};
114a6b1b735SSergei Shtylyov};
115a6b1b735SSergei Shtylyov
1160c1861feSSergei Shtylyov&du {
1170c1861feSSergei Shtylyov	clocks = <&cpg CPG_MOD 724>,
1180c1861feSSergei Shtylyov		 <&osc5_clk>;
1190c1861feSSergei Shtylyov	clock-names = "du.0", "dclkin.0";
1200c1861feSSergei Shtylyov	status = "okay";
1210c1861feSSergei Shtylyov};
1220c1861feSSergei Shtylyov
123cc3e267eSSergei Shtylyov&extal_clk {
124cc3e267eSSergei Shtylyov	clock-frequency = <16666666>;
125cc3e267eSSergei Shtylyov};
126cc3e267eSSergei Shtylyov
127cc3e267eSSergei Shtylyov&extalr_clk {
128cc3e267eSSergei Shtylyov	clock-frequency = <32768>;
129cc3e267eSSergei Shtylyov};
130cc3e267eSSergei Shtylyov
1310c1861feSSergei Shtylyov&i2c0 {
1320c1861feSSergei Shtylyov	pinctrl-0 = <&i2c0_pins>;
1330c1861feSSergei Shtylyov	pinctrl-names = "default";
1340c1861feSSergei Shtylyov
1350c1861feSSergei Shtylyov	status = "okay";
1360c1861feSSergei Shtylyov	clock-frequency = <400000>;
1370c1861feSSergei Shtylyov
1380c1861feSSergei Shtylyov	hdmi@39{
1390c1861feSSergei Shtylyov		compatible = "adi,adv7511w";
1400c1861feSSergei Shtylyov		#sound-dai-cells = <0>;
1410c1861feSSergei Shtylyov		reg = <0x39>;
1420c1861feSSergei Shtylyov		interrupt-parent = <&gpio1>;
1430c1861feSSergei Shtylyov		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1440c1861feSSergei Shtylyov		avdd-supply = <&vcc_d1_8v>;
1450c1861feSSergei Shtylyov		dvdd-supply = <&vcc_d1_8v>;
1460c1861feSSergei Shtylyov		pvdd-supply = <&vcc_d1_8v>;
1470c1861feSSergei Shtylyov		bgvdd-supply = <&vcc_d1_8v>;
1480c1861feSSergei Shtylyov		dvdd-3v-supply = <&vcc_d3_3v>;
1490c1861feSSergei Shtylyov
1500c1861feSSergei Shtylyov		adi,input-depth = <8>;
1510c1861feSSergei Shtylyov		adi,input-colorspace = "rgb";
1520c1861feSSergei Shtylyov		adi,input-clock = "1x";
1530c1861feSSergei Shtylyov		adi,input-style = <1>;
1540c1861feSSergei Shtylyov		adi,input-justification = "evenly";
1550c1861feSSergei Shtylyov
1560c1861feSSergei Shtylyov		ports {
1570c1861feSSergei Shtylyov			#address-cells = <1>;
1580c1861feSSergei Shtylyov			#size-cells = <0>;
1590c1861feSSergei Shtylyov
1600c1861feSSergei Shtylyov			port@0 {
1610c1861feSSergei Shtylyov				reg = <0>;
1620c1861feSSergei Shtylyov				adv7511_in: endpoint {
1630c1861feSSergei Shtylyov					remote-endpoint = <&thc63lvd1024_out>;
1640c1861feSSergei Shtylyov				};
1650c1861feSSergei Shtylyov			};
1660c1861feSSergei Shtylyov
1670c1861feSSergei Shtylyov			port@1 {
1680c1861feSSergei Shtylyov				reg = <1>;
1690c1861feSSergei Shtylyov				adv7511_out: endpoint {
1700c1861feSSergei Shtylyov					remote-endpoint = <&hdmi_con>;
1710c1861feSSergei Shtylyov				};
1720c1861feSSergei Shtylyov			};
1730c1861feSSergei Shtylyov		};
1740c1861feSSergei Shtylyov	};
1750c1861feSSergei Shtylyov};
1760c1861feSSergei Shtylyov
1770c1861feSSergei Shtylyov&lvds0 {
1780c1861feSSergei Shtylyov	status = "okay";
1790c1861feSSergei Shtylyov
1800c1861feSSergei Shtylyov	ports {
1810c1861feSSergei Shtylyov		port@1 {
1820c1861feSSergei Shtylyov			lvds0_out: endpoint {
1830c1861feSSergei Shtylyov				remote-endpoint = <&thc63lvd1024_in>;
1840c1861feSSergei Shtylyov			};
1850c1861feSSergei Shtylyov		};
1860c1861feSSergei Shtylyov	};
1870c1861feSSergei Shtylyov};
1880c1861feSSergei Shtylyov
1898d9923b3SSergei Shtylyov&mmc0 {
1908d9923b3SSergei Shtylyov	pinctrl-0 = <&mmc_pins>;
1918d9923b3SSergei Shtylyov	pinctrl-names = "default";
1928d9923b3SSergei Shtylyov
1938d9923b3SSergei Shtylyov	vmmc-supply = <&vcc_d3_3v>;
1948d9923b3SSergei Shtylyov	vqmmc-supply = <&vcc_vddq_vin0>;
1958d9923b3SSergei Shtylyov	bus-width = <8>;
1968d9923b3SSergei Shtylyov	non-removable;
1978d9923b3SSergei Shtylyov	status = "okay";
1988d9923b3SSergei Shtylyov};
1998d9923b3SSergei Shtylyov
20043afe206SYoshihiro Kaneko&pfc {
20143afe206SYoshihiro Kaneko	avb_pins: avb0 {
20243afe206SYoshihiro Kaneko		groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
20343afe206SYoshihiro Kaneko		function = "avb0";
20443afe206SYoshihiro Kaneko	};
20543afe206SYoshihiro Kaneko
20643afe206SYoshihiro Kaneko	i2c0_pins: i2c0 {
20743afe206SYoshihiro Kaneko		groups = "i2c0";
20843afe206SYoshihiro Kaneko		function = "i2c0";
20943afe206SYoshihiro Kaneko	};
21043afe206SYoshihiro Kaneko
21143afe206SYoshihiro Kaneko	mmc_pins: mmc_3_3v {
21243afe206SYoshihiro Kaneko		groups = "mmc_data8", "mmc_ctrl";
21343afe206SYoshihiro Kaneko		function = "mmc";
21443afe206SYoshihiro Kaneko		power-source = <3300>;
21543afe206SYoshihiro Kaneko	};
21643afe206SYoshihiro Kaneko
21743afe206SYoshihiro Kaneko	scif0_pins: scif0 {
21843afe206SYoshihiro Kaneko		groups = "scif0_data";
21943afe206SYoshihiro Kaneko		function = "scif0";
22043afe206SYoshihiro Kaneko	};
22143afe206SYoshihiro Kaneko};
22243afe206SYoshihiro Kaneko
223cc3e267eSSergei Shtylyov&scif0 {
224ca565be2SSergei Shtylyov	pinctrl-0 = <&scif0_pins>;
225ca565be2SSergei Shtylyov	pinctrl-names = "default";
226ca565be2SSergei Shtylyov
227cc3e267eSSergei Shtylyov	status = "okay";
228cc3e267eSSergei Shtylyov};
229