1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Eagle board with R-Car V3M
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8
9/dts-v1/;
10#include "r8a77970.dtsi"
11
12/ {
13	model = "Renesas Eagle board based on r8a77970";
14	compatible = "renesas,eagle", "renesas,r8a77970";
15
16	aliases {
17		serial0 = &scif0;
18		ethernet0 = &avb;
19	};
20
21	chosen {
22		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
23		stdout-path = "serial0:115200n8";
24	};
25
26	d3p3: regulator-fixed {
27		compatible = "regulator-fixed";
28		regulator-name = "fixed-3.3V";
29		regulator-min-microvolt = <3300000>;
30		regulator-max-microvolt = <3300000>;
31		regulator-boot-on;
32		regulator-always-on;
33	};
34
35	hdmi-out {
36		compatible = "hdmi-connector";
37		type = "a";
38
39		port {
40			hdmi_con_out: endpoint {
41				remote-endpoint = <&adv7511_out>;
42			};
43		};
44	};
45
46	lvds-decoder {
47		compatible = "thine,thc63lvd1024";
48
49		vcc-supply = <&d3p3>;
50
51		ports {
52			#address-cells = <1>;
53			#size-cells = <0>;
54
55			port@0 {
56				reg = <0>;
57				thc63lvd1024_in: endpoint {
58					remote-endpoint = <&lvds0_out>;
59				};
60			};
61
62			port@2 {
63				reg = <2>;
64				thc63lvd1024_out: endpoint {
65					remote-endpoint = <&adv7511_in>;
66				};
67			};
68		};
69	};
70
71	memory@48000000 {
72		device_type = "memory";
73		/* first 128MB is reserved for secure area. */
74		reg = <0x0 0x48000000 0x0 0x38000000>;
75	};
76
77	x1_clk: x1-clock {
78		compatible = "fixed-clock";
79		#clock-cells = <0>;
80		clock-frequency = <148500000>;
81	};
82};
83
84&avb {
85	pinctrl-0 = <&avb_pins>;
86	pinctrl-names = "default";
87
88	renesas,no-ether-link;
89	phy-handle = <&phy0>;
90	rx-internal-delay-ps = <1800>;
91	tx-internal-delay-ps = <2000>;
92	status = "okay";
93
94	phy0: ethernet-phy@0 {
95		compatible = "ethernet-phy-id0022.1622",
96			     "ethernet-phy-ieee802.3-c22";
97		rxc-skew-ps = <1500>;
98		reg = <0>;
99		interrupt-parent = <&gpio1>;
100		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
101	};
102};
103
104&canfd {
105	pinctrl-0 = <&canfd0_pins>;
106	pinctrl-names = "default";
107	status = "okay";
108
109	channel0 {
110		status = "okay";
111	};
112};
113
114&du {
115	clocks = <&cpg CPG_MOD 724>, <&x1_clk>;
116	clock-names = "du.0", "dclkin.0";
117	status = "okay";
118};
119
120&extal_clk {
121	clock-frequency = <16666666>;
122};
123
124&extalr_clk {
125	clock-frequency = <32768>;
126};
127
128&i2c0 {
129	pinctrl-0 = <&i2c0_pins>;
130	pinctrl-names = "default";
131
132	status = "okay";
133	clock-frequency = <400000>;
134
135	io_expander: gpio@20 {
136		compatible = "onnn,pca9654";
137		reg = <0x20>;
138		gpio-controller;
139		#gpio-cells = <2>;
140	};
141
142	hdmi@39 {
143		compatible = "adi,adv7511w";
144		reg = <0x39>;
145		interrupt-parent = <&gpio1>;
146		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
147
148		adi,input-depth = <8>;
149		adi,input-colorspace = "rgb";
150		adi,input-clock = "1x";
151
152		ports {
153			#address-cells = <1>;
154			#size-cells = <0>;
155
156			port@0 {
157				reg = <0>;
158				adv7511_in: endpoint {
159					remote-endpoint = <&thc63lvd1024_out>;
160				};
161			};
162
163			port@1 {
164				reg = <1>;
165				adv7511_out: endpoint {
166					remote-endpoint = <&hdmi_con_out>;
167				};
168			};
169		};
170	};
171};
172
173&lvds0 {
174	status = "okay";
175
176	ports {
177		port@1 {
178			lvds0_out: endpoint {
179				remote-endpoint = <&thc63lvd1024_in>;
180			};
181		};
182	};
183};
184
185&pfc {
186	avb_pins: avb0 {
187		groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
188		function = "avb0";
189	};
190
191	canfd0_pins: canfd0 {
192		groups = "canfd0_data_a";
193		function = "canfd0";
194	};
195
196	i2c0_pins: i2c0 {
197		groups = "i2c0";
198		function = "i2c0";
199	};
200
201	qspi0_pins: qspi0 {
202		groups = "qspi0_ctrl", "qspi0_data4";
203		function = "qspi0";
204	};
205
206	scif0_pins: scif0 {
207		groups = "scif0_data";
208		function = "scif0";
209	};
210};
211
212&rpc {
213	pinctrl-0 = <&qspi0_pins>;
214	pinctrl-names = "default";
215
216	status = "okay";
217
218	flash@0 {
219		compatible = "spansion,s25fs512s", "jedec,spi-nor";
220		reg = <0>;
221		spi-max-frequency = <50000000>;
222		spi-rx-bus-width = <4>;
223
224		partitions {
225			compatible = "fixed-partitions";
226			#address-cells = <1>;
227			#size-cells = <1>;
228
229			bootparam@0 {
230				reg = <0x00000000 0x040000>;
231				read-only;
232			};
233			cr7@40000 {
234				reg = <0x00040000 0x080000>;
235				read-only;
236			};
237			cert_header_sa3@c0000 {
238				reg = <0x000c0000 0x080000>;
239				read-only;
240			};
241			bl2@140000 {
242				reg = <0x00140000 0x040000>;
243				read-only;
244			};
245			cert_header_sa6@180000 {
246				reg = <0x00180000 0x040000>;
247				read-only;
248			};
249			bl31@1c0000 {
250				reg = <0x001c0000 0x460000>;
251				read-only;
252			};
253			uboot@640000 {
254				reg = <0x00640000 0x0c0000>;
255				read-only;
256			};
257			uboot-env@700000 {
258				reg = <0x00700000 0x040000>;
259				read-only;
260			};
261			dtb@740000 {
262				reg = <0x00740000 0x080000>;
263			};
264			kernel@7c0000 {
265				reg = <0x007c0000 0x1400000>;
266			};
267			user@1bc0000 {
268				reg = <0x01bc0000 0x2440000>;
269			};
270		};
271	};
272};
273
274&rwdt {
275	timeout-sec = <60>;
276	status = "okay";
277};
278
279&scif0 {
280	pinctrl-0 = <&scif0_pins>;
281	pinctrl-names = "default";
282
283	status = "okay";
284};
285