1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Eagle board
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8
9/dts-v1/;
10#include "r8a77970.dtsi"
11
12/ {
13	model = "Renesas Eagle board based on r8a77970";
14	compatible = "renesas,eagle", "renesas,r8a77970";
15
16	aliases {
17		serial0 = &scif0;
18		ethernet0 = &avb;
19	};
20
21	chosen {
22		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
23		stdout-path = "serial0:115200n8";
24	};
25
26	d3p3: regulator-fixed {
27		compatible = "regulator-fixed";
28		regulator-name = "fixed-3.3V";
29		regulator-min-microvolt = <3300000>;
30		regulator-max-microvolt = <3300000>;
31		regulator-boot-on;
32		regulator-always-on;
33	};
34
35	hdmi-out {
36		compatible = "hdmi-connector";
37		type = "a";
38
39		port {
40			hdmi_con_out: endpoint {
41				remote-endpoint = <&adv7511_out>;
42			};
43		};
44	};
45
46	lvds-decoder {
47		compatible = "thine,thc63lvd1024";
48
49		vcc-supply = <&d3p3>;
50
51		ports {
52			#address-cells = <1>;
53			#size-cells = <0>;
54
55			port@0 {
56				reg = <0>;
57				thc63lvd1024_in: endpoint {
58					remote-endpoint = <&lvds0_out>;
59				};
60			};
61
62			port@2 {
63				reg = <2>;
64				thc63lvd1024_out: endpoint {
65					remote-endpoint = <&adv7511_in>;
66				};
67			};
68		};
69	};
70
71	memory@48000000 {
72		device_type = "memory";
73		/* first 128MB is reserved for secure area. */
74		reg = <0x0 0x48000000 0x0 0x38000000>;
75	};
76};
77
78&avb {
79	pinctrl-0 = <&avb_pins>;
80	pinctrl-names = "default";
81
82	renesas,no-ether-link;
83	phy-handle = <&phy0>;
84	rx-internal-delay-ps = <1800>;
85	tx-internal-delay-ps = <2000>;
86	status = "okay";
87
88	phy0: ethernet-phy@0 {
89		rxc-skew-ps = <1500>;
90		reg = <0>;
91		interrupt-parent = <&gpio1>;
92		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
93	};
94};
95
96&canfd {
97	pinctrl-0 = <&canfd0_pins>;
98	pinctrl-names = "default";
99	status = "okay";
100
101	channel0 {
102		status = "okay";
103	};
104};
105
106&du {
107	status = "okay";
108};
109
110&extal_clk {
111	clock-frequency = <16666666>;
112};
113
114&extalr_clk {
115	clock-frequency = <32768>;
116};
117
118&i2c0 {
119	pinctrl-0 = <&i2c0_pins>;
120	pinctrl-names = "default";
121
122	status = "okay";
123	clock-frequency = <400000>;
124
125	io_expander: gpio@20 {
126		compatible = "onnn,pca9654";
127		reg = <0x20>;
128		gpio-controller;
129		#gpio-cells = <2>;
130	};
131
132	hdmi@39 {
133		compatible = "adi,adv7511w";
134		reg = <0x39>;
135		interrupt-parent = <&gpio1>;
136		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
137
138		adi,input-depth = <8>;
139		adi,input-colorspace = "rgb";
140		adi,input-clock = "1x";
141
142		ports {
143			#address-cells = <1>;
144			#size-cells = <0>;
145
146			port@0 {
147				reg = <0>;
148				adv7511_in: endpoint {
149					remote-endpoint = <&thc63lvd1024_out>;
150				};
151			};
152
153			port@1 {
154				reg = <1>;
155				adv7511_out: endpoint {
156					remote-endpoint = <&hdmi_con_out>;
157				};
158			};
159		};
160	};
161};
162
163&lvds0 {
164	status = "okay";
165
166	ports {
167		port@1 {
168			lvds0_out: endpoint {
169				remote-endpoint = <&thc63lvd1024_in>;
170			};
171		};
172	};
173};
174
175&pfc {
176	avb_pins: avb0 {
177		groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
178		function = "avb0";
179	};
180
181	canfd0_pins: canfd0 {
182		groups = "canfd0_data_a";
183		function = "canfd0";
184	};
185
186	i2c0_pins: i2c0 {
187		groups = "i2c0";
188		function = "i2c0";
189	};
190
191	qspi0_pins: qspi0 {
192		groups = "qspi0_ctrl", "qspi0_data4";
193		function = "qspi0";
194	};
195
196	scif0_pins: scif0 {
197		groups = "scif0_data";
198		function = "scif0";
199	};
200};
201
202&rpc {
203	pinctrl-0 = <&qspi0_pins>;
204	pinctrl-names = "default";
205
206	status = "okay";
207
208	flash@0 {
209		compatible = "spansion,s25fs512s", "jedec,spi-nor";
210		reg = <0>;
211		spi-max-frequency = <50000000>;
212		spi-rx-bus-width = <4>;
213
214		partitions {
215			compatible = "fixed-partitions";
216			#address-cells = <1>;
217			#size-cells = <1>;
218
219			bootparam@0 {
220				reg = <0x00000000 0x040000>;
221				read-only;
222			};
223			cr7@40000 {
224				reg = <0x00040000 0x080000>;
225				read-only;
226			};
227			cert_header_sa3@c0000 {
228				reg = <0x000c0000 0x080000>;
229				read-only;
230			};
231			bl2@140000 {
232				reg = <0x00140000 0x040000>;
233				read-only;
234			};
235			cert_header_sa6@180000 {
236				reg = <0x00180000 0x040000>;
237				read-only;
238			};
239			bl31@1c0000 {
240				reg = <0x001c0000 0x460000>;
241				read-only;
242			};
243			uboot@640000 {
244				reg = <0x00640000 0x0c0000>;
245				read-only;
246			};
247			uboot-env@700000 {
248				reg = <0x00700000 0x040000>;
249				read-only;
250			};
251			dtb@740000 {
252				reg = <0x00740000 0x080000>;
253			};
254			kernel@7c0000 {
255				reg = <0x007c0000 0x1400000>;
256			};
257			user@1bc0000 {
258				reg = <0x01bc0000 0x2440000>;
259			};
260		};
261	};
262};
263
264&rwdt {
265	timeout-sec = <60>;
266	status = "okay";
267};
268
269&scif0 {
270	pinctrl-0 = <&scif0_pins>;
271	pinctrl-names = "default";
272
273	status = "okay";
274};
275