1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 16 17#define SOC_HAS_SATA 18 19/ { 20 compatible = "renesas,r8a77965"; 21 #address-cells = <2>; 22 #size-cells = <2>; 23 24 /* 25 * The external audio clocks are configured as 0 Hz fixed frequency 26 * clocks by default. 27 * Boards that provide audio clocks should override them. 28 */ 29 audio_clk_a: audio_clk_a { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_b: audio_clk_b { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_c: audio_clk_c { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 /* External CAN clock - to be overridden by boards that provide it */ 48 can_clk: can { 49 compatible = "fixed-clock"; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 52 }; 53 54 cluster0_opp: opp-table-0 { 55 compatible = "operating-points-v2"; 56 opp-shared; 57 58 opp-500000000 { 59 opp-hz = /bits/ 64 <500000000>; 60 opp-microvolt = <830000>; 61 clock-latency-ns = <300000>; 62 }; 63 opp-1000000000 { 64 opp-hz = /bits/ 64 <1000000000>; 65 opp-microvolt = <830000>; 66 clock-latency-ns = <300000>; 67 }; 68 opp-1500000000 { 69 opp-hz = /bits/ 64 <1500000000>; 70 opp-microvolt = <830000>; 71 clock-latency-ns = <300000>; 72 opp-suspend; 73 }; 74 opp-1600000000 { 75 opp-hz = /bits/ 64 <1600000000>; 76 opp-microvolt = <900000>; 77 clock-latency-ns = <300000>; 78 turbo-mode; 79 }; 80 opp-1700000000 { 81 opp-hz = /bits/ 64 <1700000000>; 82 opp-microvolt = <900000>; 83 clock-latency-ns = <300000>; 84 turbo-mode; 85 }; 86 opp-1800000000 { 87 opp-hz = /bits/ 64 <1800000000>; 88 opp-microvolt = <960000>; 89 clock-latency-ns = <300000>; 90 turbo-mode; 91 }; 92 }; 93 94 cpus { 95 #address-cells = <1>; 96 #size-cells = <0>; 97 98 a57_0: cpu@0 { 99 compatible = "arm,cortex-a57"; 100 reg = <0x0>; 101 device_type = "cpu"; 102 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 103 next-level-cache = <&L2_CA57>; 104 enable-method = "psci"; 105 cpu-idle-states = <&CPU_SLEEP_0>; 106 #cooling-cells = <2>; 107 dynamic-power-coefficient = <854>; 108 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 109 operating-points-v2 = <&cluster0_opp>; 110 }; 111 112 a57_1: cpu@1 { 113 compatible = "arm,cortex-a57"; 114 reg = <0x1>; 115 device_type = "cpu"; 116 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 117 next-level-cache = <&L2_CA57>; 118 enable-method = "psci"; 119 cpu-idle-states = <&CPU_SLEEP_0>; 120 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 121 operating-points-v2 = <&cluster0_opp>; 122 }; 123 124 L2_CA57: cache-controller-0 { 125 compatible = "cache"; 126 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 127 cache-unified; 128 cache-level = <2>; 129 }; 130 131 idle-states { 132 entry-method = "psci"; 133 134 CPU_SLEEP_0: cpu-sleep-0 { 135 compatible = "arm,idle-state"; 136 arm,psci-suspend-param = <0x0010000>; 137 local-timer-stop; 138 entry-latency-us = <400>; 139 exit-latency-us = <500>; 140 min-residency-us = <4000>; 141 }; 142 }; 143 }; 144 145 extal_clk: extal { 146 compatible = "fixed-clock"; 147 #clock-cells = <0>; 148 /* This value must be overridden by the board */ 149 clock-frequency = <0>; 150 }; 151 152 extalr_clk: extalr { 153 compatible = "fixed-clock"; 154 #clock-cells = <0>; 155 /* This value must be overridden by the board */ 156 clock-frequency = <0>; 157 }; 158 159 /* External PCIe clock - can be overridden by the board */ 160 pcie_bus_clk: pcie_bus { 161 compatible = "fixed-clock"; 162 #clock-cells = <0>; 163 clock-frequency = <0>; 164 }; 165 166 pmu_a57 { 167 compatible = "arm,cortex-a57-pmu"; 168 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 169 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 170 interrupt-affinity = <&a57_0>, 171 <&a57_1>; 172 }; 173 174 psci { 175 compatible = "arm,psci-1.0", "arm,psci-0.2"; 176 method = "smc"; 177 }; 178 179 /* External SCIF clock - to be overridden by boards that provide it */ 180 scif_clk: scif { 181 compatible = "fixed-clock"; 182 #clock-cells = <0>; 183 clock-frequency = <0>; 184 }; 185 186 soc { 187 compatible = "simple-bus"; 188 interrupt-parent = <&gic>; 189 #address-cells = <2>; 190 #size-cells = <2>; 191 ranges; 192 193 rwdt: watchdog@e6020000 { 194 compatible = "renesas,r8a77965-wdt", 195 "renesas,rcar-gen3-wdt"; 196 reg = <0 0xe6020000 0 0x0c>; 197 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 198 clocks = <&cpg CPG_MOD 402>; 199 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 200 resets = <&cpg 402>; 201 status = "disabled"; 202 }; 203 204 gpio0: gpio@e6050000 { 205 compatible = "renesas,gpio-r8a77965", 206 "renesas,rcar-gen3-gpio"; 207 reg = <0 0xe6050000 0 0x50>; 208 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 209 #gpio-cells = <2>; 210 gpio-controller; 211 gpio-ranges = <&pfc 0 0 16>; 212 #interrupt-cells = <2>; 213 interrupt-controller; 214 clocks = <&cpg CPG_MOD 912>; 215 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 216 resets = <&cpg 912>; 217 }; 218 219 gpio1: gpio@e6051000 { 220 compatible = "renesas,gpio-r8a77965", 221 "renesas,rcar-gen3-gpio"; 222 reg = <0 0xe6051000 0 0x50>; 223 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 224 #gpio-cells = <2>; 225 gpio-controller; 226 gpio-ranges = <&pfc 0 32 29>; 227 #interrupt-cells = <2>; 228 interrupt-controller; 229 clocks = <&cpg CPG_MOD 911>; 230 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 231 resets = <&cpg 911>; 232 }; 233 234 gpio2: gpio@e6052000 { 235 compatible = "renesas,gpio-r8a77965", 236 "renesas,rcar-gen3-gpio"; 237 reg = <0 0xe6052000 0 0x50>; 238 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 239 #gpio-cells = <2>; 240 gpio-controller; 241 gpio-ranges = <&pfc 0 64 15>; 242 #interrupt-cells = <2>; 243 interrupt-controller; 244 clocks = <&cpg CPG_MOD 910>; 245 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 246 resets = <&cpg 910>; 247 }; 248 249 gpio3: gpio@e6053000 { 250 compatible = "renesas,gpio-r8a77965", 251 "renesas,rcar-gen3-gpio"; 252 reg = <0 0xe6053000 0 0x50>; 253 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 254 #gpio-cells = <2>; 255 gpio-controller; 256 gpio-ranges = <&pfc 0 96 16>; 257 #interrupt-cells = <2>; 258 interrupt-controller; 259 clocks = <&cpg CPG_MOD 909>; 260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 261 resets = <&cpg 909>; 262 }; 263 264 gpio4: gpio@e6054000 { 265 compatible = "renesas,gpio-r8a77965", 266 "renesas,rcar-gen3-gpio"; 267 reg = <0 0xe6054000 0 0x50>; 268 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 269 #gpio-cells = <2>; 270 gpio-controller; 271 gpio-ranges = <&pfc 0 128 18>; 272 #interrupt-cells = <2>; 273 interrupt-controller; 274 clocks = <&cpg CPG_MOD 908>; 275 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 276 resets = <&cpg 908>; 277 }; 278 279 gpio5: gpio@e6055000 { 280 compatible = "renesas,gpio-r8a77965", 281 "renesas,rcar-gen3-gpio"; 282 reg = <0 0xe6055000 0 0x50>; 283 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 284 #gpio-cells = <2>; 285 gpio-controller; 286 gpio-ranges = <&pfc 0 160 26>; 287 #interrupt-cells = <2>; 288 interrupt-controller; 289 clocks = <&cpg CPG_MOD 907>; 290 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 291 resets = <&cpg 907>; 292 }; 293 294 gpio6: gpio@e6055400 { 295 compatible = "renesas,gpio-r8a77965", 296 "renesas,rcar-gen3-gpio"; 297 reg = <0 0xe6055400 0 0x50>; 298 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 299 #gpio-cells = <2>; 300 gpio-controller; 301 gpio-ranges = <&pfc 0 192 32>; 302 #interrupt-cells = <2>; 303 interrupt-controller; 304 clocks = <&cpg CPG_MOD 906>; 305 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 306 resets = <&cpg 906>; 307 }; 308 309 gpio7: gpio@e6055800 { 310 compatible = "renesas,gpio-r8a77965", 311 "renesas,rcar-gen3-gpio"; 312 reg = <0 0xe6055800 0 0x50>; 313 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 314 #gpio-cells = <2>; 315 gpio-controller; 316 gpio-ranges = <&pfc 0 224 4>; 317 #interrupt-cells = <2>; 318 interrupt-controller; 319 clocks = <&cpg CPG_MOD 905>; 320 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 321 resets = <&cpg 905>; 322 }; 323 324 pfc: pinctrl@e6060000 { 325 compatible = "renesas,pfc-r8a77965"; 326 reg = <0 0xe6060000 0 0x50c>; 327 }; 328 329 cmt0: timer@e60f0000 { 330 compatible = "renesas,r8a77965-cmt0", 331 "renesas,rcar-gen3-cmt0"; 332 reg = <0 0xe60f0000 0 0x1004>; 333 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 334 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 335 clocks = <&cpg CPG_MOD 303>; 336 clock-names = "fck"; 337 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 338 resets = <&cpg 303>; 339 status = "disabled"; 340 }; 341 342 cmt1: timer@e6130000 { 343 compatible = "renesas,r8a77965-cmt1", 344 "renesas,rcar-gen3-cmt1"; 345 reg = <0 0xe6130000 0 0x1004>; 346 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 354 clocks = <&cpg CPG_MOD 302>; 355 clock-names = "fck"; 356 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 357 resets = <&cpg 302>; 358 status = "disabled"; 359 }; 360 361 cmt2: timer@e6140000 { 362 compatible = "renesas,r8a77965-cmt1", 363 "renesas,rcar-gen3-cmt1"; 364 reg = <0 0xe6140000 0 0x1004>; 365 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 366 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 367 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 369 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 370 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 371 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 372 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 373 clocks = <&cpg CPG_MOD 301>; 374 clock-names = "fck"; 375 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 376 resets = <&cpg 301>; 377 status = "disabled"; 378 }; 379 380 cmt3: timer@e6148000 { 381 compatible = "renesas,r8a77965-cmt1", 382 "renesas,rcar-gen3-cmt1"; 383 reg = <0 0xe6148000 0 0x1004>; 384 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 388 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 390 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 391 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 392 clocks = <&cpg CPG_MOD 300>; 393 clock-names = "fck"; 394 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 395 resets = <&cpg 300>; 396 status = "disabled"; 397 }; 398 399 cpg: clock-controller@e6150000 { 400 compatible = "renesas,r8a77965-cpg-mssr"; 401 reg = <0 0xe6150000 0 0x1000>; 402 clocks = <&extal_clk>, <&extalr_clk>; 403 clock-names = "extal", "extalr"; 404 #clock-cells = <2>; 405 #power-domain-cells = <0>; 406 #reset-cells = <1>; 407 }; 408 409 rst: reset-controller@e6160000 { 410 compatible = "renesas,r8a77965-rst"; 411 reg = <0 0xe6160000 0 0x0200>; 412 }; 413 414 sysc: system-controller@e6180000 { 415 compatible = "renesas,r8a77965-sysc"; 416 reg = <0 0xe6180000 0 0x0400>; 417 #power-domain-cells = <1>; 418 }; 419 420 tsc: thermal@e6198000 { 421 compatible = "renesas,r8a77965-thermal"; 422 reg = <0 0xe6198000 0 0x100>, 423 <0 0xe61a0000 0 0x100>, 424 <0 0xe61a8000 0 0x100>; 425 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 426 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 427 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 428 clocks = <&cpg CPG_MOD 522>; 429 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 430 resets = <&cpg 522>; 431 #thermal-sensor-cells = <1>; 432 }; 433 434 intc_ex: interrupt-controller@e61c0000 { 435 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 436 #interrupt-cells = <2>; 437 interrupt-controller; 438 reg = <0 0xe61c0000 0 0x200>; 439 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 441 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 442 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 443 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 444 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 407>; 446 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 447 resets = <&cpg 407>; 448 }; 449 450 tmu0: timer@e61e0000 { 451 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 452 reg = <0 0xe61e0000 0 0x30>; 453 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 454 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 455 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 456 clocks = <&cpg CPG_MOD 125>; 457 clock-names = "fck"; 458 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 459 resets = <&cpg 125>; 460 status = "disabled"; 461 }; 462 463 tmu1: timer@e6fc0000 { 464 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 465 reg = <0 0xe6fc0000 0 0x30>; 466 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 467 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 468 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 469 clocks = <&cpg CPG_MOD 124>; 470 clock-names = "fck"; 471 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 472 resets = <&cpg 124>; 473 status = "disabled"; 474 }; 475 476 tmu2: timer@e6fd0000 { 477 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 478 reg = <0 0xe6fd0000 0 0x30>; 479 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 480 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 481 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 482 clocks = <&cpg CPG_MOD 123>; 483 clock-names = "fck"; 484 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 485 resets = <&cpg 123>; 486 status = "disabled"; 487 }; 488 489 tmu3: timer@e6fe0000 { 490 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 491 reg = <0 0xe6fe0000 0 0x30>; 492 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 493 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 494 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 495 clocks = <&cpg CPG_MOD 122>; 496 clock-names = "fck"; 497 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 498 resets = <&cpg 122>; 499 status = "disabled"; 500 }; 501 502 tmu4: timer@ffc00000 { 503 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 504 reg = <0 0xffc00000 0 0x30>; 505 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 506 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 507 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&cpg CPG_MOD 121>; 509 clock-names = "fck"; 510 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 511 resets = <&cpg 121>; 512 status = "disabled"; 513 }; 514 515 i2c0: i2c@e6500000 { 516 #address-cells = <1>; 517 #size-cells = <0>; 518 compatible = "renesas,i2c-r8a77965", 519 "renesas,rcar-gen3-i2c"; 520 reg = <0 0xe6500000 0 0x40>; 521 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 522 clocks = <&cpg CPG_MOD 931>; 523 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 524 resets = <&cpg 931>; 525 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 526 <&dmac2 0x91>, <&dmac2 0x90>; 527 dma-names = "tx", "rx", "tx", "rx"; 528 i2c-scl-internal-delay-ns = <110>; 529 status = "disabled"; 530 }; 531 532 i2c1: i2c@e6508000 { 533 #address-cells = <1>; 534 #size-cells = <0>; 535 compatible = "renesas,i2c-r8a77965", 536 "renesas,rcar-gen3-i2c"; 537 reg = <0 0xe6508000 0 0x40>; 538 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 539 clocks = <&cpg CPG_MOD 930>; 540 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 541 resets = <&cpg 930>; 542 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 543 <&dmac2 0x93>, <&dmac2 0x92>; 544 dma-names = "tx", "rx", "tx", "rx"; 545 i2c-scl-internal-delay-ns = <6>; 546 status = "disabled"; 547 }; 548 549 i2c2: i2c@e6510000 { 550 #address-cells = <1>; 551 #size-cells = <0>; 552 compatible = "renesas,i2c-r8a77965", 553 "renesas,rcar-gen3-i2c"; 554 reg = <0 0xe6510000 0 0x40>; 555 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 556 clocks = <&cpg CPG_MOD 929>; 557 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 558 resets = <&cpg 929>; 559 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 560 <&dmac2 0x95>, <&dmac2 0x94>; 561 dma-names = "tx", "rx", "tx", "rx"; 562 i2c-scl-internal-delay-ns = <6>; 563 status = "disabled"; 564 }; 565 566 i2c3: i2c@e66d0000 { 567 #address-cells = <1>; 568 #size-cells = <0>; 569 compatible = "renesas,i2c-r8a77965", 570 "renesas,rcar-gen3-i2c"; 571 reg = <0 0xe66d0000 0 0x40>; 572 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 573 clocks = <&cpg CPG_MOD 928>; 574 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 575 resets = <&cpg 928>; 576 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 577 dma-names = "tx", "rx"; 578 i2c-scl-internal-delay-ns = <110>; 579 status = "disabled"; 580 }; 581 582 i2c4: i2c@e66d8000 { 583 #address-cells = <1>; 584 #size-cells = <0>; 585 compatible = "renesas,i2c-r8a77965", 586 "renesas,rcar-gen3-i2c"; 587 reg = <0 0xe66d8000 0 0x40>; 588 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 589 clocks = <&cpg CPG_MOD 927>; 590 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 591 resets = <&cpg 927>; 592 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 593 dma-names = "tx", "rx"; 594 i2c-scl-internal-delay-ns = <110>; 595 status = "disabled"; 596 }; 597 598 i2c5: i2c@e66e0000 { 599 #address-cells = <1>; 600 #size-cells = <0>; 601 compatible = "renesas,i2c-r8a77965", 602 "renesas,rcar-gen3-i2c"; 603 reg = <0 0xe66e0000 0 0x40>; 604 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 605 clocks = <&cpg CPG_MOD 919>; 606 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 607 resets = <&cpg 919>; 608 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 609 dma-names = "tx", "rx"; 610 i2c-scl-internal-delay-ns = <110>; 611 status = "disabled"; 612 }; 613 614 i2c6: i2c@e66e8000 { 615 #address-cells = <1>; 616 #size-cells = <0>; 617 compatible = "renesas,i2c-r8a77965", 618 "renesas,rcar-gen3-i2c"; 619 reg = <0 0xe66e8000 0 0x40>; 620 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 621 clocks = <&cpg CPG_MOD 918>; 622 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 623 resets = <&cpg 918>; 624 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 625 dma-names = "tx", "rx"; 626 i2c-scl-internal-delay-ns = <6>; 627 status = "disabled"; 628 }; 629 630 i2c_dvfs: i2c@e60b0000 { 631 #address-cells = <1>; 632 #size-cells = <0>; 633 compatible = "renesas,iic-r8a77965", 634 "renesas,rcar-gen3-iic", 635 "renesas,rmobile-iic"; 636 reg = <0 0xe60b0000 0 0x425>; 637 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 638 clocks = <&cpg CPG_MOD 926>; 639 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 640 resets = <&cpg 926>; 641 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 642 dma-names = "tx", "rx"; 643 status = "disabled"; 644 }; 645 646 hscif0: serial@e6540000 { 647 compatible = "renesas,hscif-r8a77965", 648 "renesas,rcar-gen3-hscif", 649 "renesas,hscif"; 650 reg = <0 0xe6540000 0 0x60>; 651 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 652 clocks = <&cpg CPG_MOD 520>, 653 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 654 <&scif_clk>; 655 clock-names = "fck", "brg_int", "scif_clk"; 656 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 657 <&dmac2 0x31>, <&dmac2 0x30>; 658 dma-names = "tx", "rx", "tx", "rx"; 659 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 660 resets = <&cpg 520>; 661 status = "disabled"; 662 }; 663 664 hscif1: serial@e6550000 { 665 compatible = "renesas,hscif-r8a77965", 666 "renesas,rcar-gen3-hscif", 667 "renesas,hscif"; 668 reg = <0 0xe6550000 0 0x60>; 669 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 670 clocks = <&cpg CPG_MOD 519>, 671 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 672 <&scif_clk>; 673 clock-names = "fck", "brg_int", "scif_clk"; 674 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 675 <&dmac2 0x33>, <&dmac2 0x32>; 676 dma-names = "tx", "rx", "tx", "rx"; 677 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 678 resets = <&cpg 519>; 679 status = "disabled"; 680 }; 681 682 hscif2: serial@e6560000 { 683 compatible = "renesas,hscif-r8a77965", 684 "renesas,rcar-gen3-hscif", 685 "renesas,hscif"; 686 reg = <0 0xe6560000 0 0x60>; 687 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 688 clocks = <&cpg CPG_MOD 518>, 689 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 690 <&scif_clk>; 691 clock-names = "fck", "brg_int", "scif_clk"; 692 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 693 <&dmac2 0x35>, <&dmac2 0x34>; 694 dma-names = "tx", "rx", "tx", "rx"; 695 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 696 resets = <&cpg 518>; 697 status = "disabled"; 698 }; 699 700 hscif3: serial@e66a0000 { 701 compatible = "renesas,hscif-r8a77965", 702 "renesas,rcar-gen3-hscif", 703 "renesas,hscif"; 704 reg = <0 0xe66a0000 0 0x60>; 705 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 706 clocks = <&cpg CPG_MOD 517>, 707 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 708 <&scif_clk>; 709 clock-names = "fck", "brg_int", "scif_clk"; 710 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 711 dma-names = "tx", "rx"; 712 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 713 resets = <&cpg 517>; 714 status = "disabled"; 715 }; 716 717 hscif4: serial@e66b0000 { 718 compatible = "renesas,hscif-r8a77965", 719 "renesas,rcar-gen3-hscif", 720 "renesas,hscif"; 721 reg = <0 0xe66b0000 0 0x60>; 722 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 723 clocks = <&cpg CPG_MOD 516>, 724 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 725 <&scif_clk>; 726 clock-names = "fck", "brg_int", "scif_clk"; 727 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 728 dma-names = "tx", "rx"; 729 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 730 resets = <&cpg 516>; 731 status = "disabled"; 732 }; 733 734 hsusb: usb@e6590000 { 735 compatible = "renesas,usbhs-r8a77965", 736 "renesas,rcar-gen3-usbhs"; 737 reg = <0 0xe6590000 0 0x200>; 738 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 739 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 740 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 741 <&usb_dmac1 0>, <&usb_dmac1 1>; 742 dma-names = "ch0", "ch1", "ch2", "ch3"; 743 renesas,buswait = <11>; 744 phys = <&usb2_phy0 3>; 745 phy-names = "usb"; 746 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 747 resets = <&cpg 704>, <&cpg 703>; 748 status = "disabled"; 749 }; 750 751 usb_dmac0: dma-controller@e65a0000 { 752 compatible = "renesas,r8a77965-usb-dmac", 753 "renesas,usb-dmac"; 754 reg = <0 0xe65a0000 0 0x100>; 755 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 756 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 757 interrupt-names = "ch0", "ch1"; 758 clocks = <&cpg CPG_MOD 330>; 759 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 760 resets = <&cpg 330>; 761 #dma-cells = <1>; 762 dma-channels = <2>; 763 }; 764 765 usb_dmac1: dma-controller@e65b0000 { 766 compatible = "renesas,r8a77965-usb-dmac", 767 "renesas,usb-dmac"; 768 reg = <0 0xe65b0000 0 0x100>; 769 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 771 interrupt-names = "ch0", "ch1"; 772 clocks = <&cpg CPG_MOD 331>; 773 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 774 resets = <&cpg 331>; 775 #dma-cells = <1>; 776 dma-channels = <2>; 777 }; 778 779 usb3_phy0: usb-phy@e65ee000 { 780 compatible = "renesas,r8a77965-usb3-phy", 781 "renesas,rcar-gen3-usb3-phy"; 782 reg = <0 0xe65ee000 0 0x90>; 783 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 784 <&usb_extal_clk>; 785 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 786 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 787 resets = <&cpg 328>; 788 #phy-cells = <0>; 789 status = "disabled"; 790 }; 791 792 arm_cc630p: crypto@e6601000 { 793 compatible = "arm,cryptocell-630p-ree"; 794 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 795 reg = <0x0 0xe6601000 0 0x1000>; 796 clocks = <&cpg CPG_MOD 229>; 797 resets = <&cpg 229>; 798 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 799 }; 800 801 dmac0: dma-controller@e6700000 { 802 compatible = "renesas,dmac-r8a77965", 803 "renesas,rcar-dmac"; 804 reg = <0 0xe6700000 0 0x10000>; 805 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 808 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 822 interrupt-names = "error", 823 "ch0", "ch1", "ch2", "ch3", 824 "ch4", "ch5", "ch6", "ch7", 825 "ch8", "ch9", "ch10", "ch11", 826 "ch12", "ch13", "ch14", "ch15"; 827 clocks = <&cpg CPG_MOD 219>; 828 clock-names = "fck"; 829 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 830 resets = <&cpg 219>; 831 #dma-cells = <1>; 832 dma-channels = <16>; 833 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 834 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 835 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 836 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 837 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 838 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 839 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 840 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 841 }; 842 843 dmac1: dma-controller@e7300000 { 844 compatible = "renesas,dmac-r8a77965", 845 "renesas,rcar-dmac"; 846 reg = <0 0xe7300000 0 0x10000>; 847 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 848 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 849 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 850 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 852 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 853 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 854 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 855 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 864 interrupt-names = "error", 865 "ch0", "ch1", "ch2", "ch3", 866 "ch4", "ch5", "ch6", "ch7", 867 "ch8", "ch9", "ch10", "ch11", 868 "ch12", "ch13", "ch14", "ch15"; 869 clocks = <&cpg CPG_MOD 218>; 870 clock-names = "fck"; 871 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 872 resets = <&cpg 218>; 873 #dma-cells = <1>; 874 dma-channels = <16>; 875 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 876 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 877 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 878 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 879 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 880 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 881 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 882 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 883 }; 884 885 dmac2: dma-controller@e7310000 { 886 compatible = "renesas,dmac-r8a77965", 887 "renesas,rcar-dmac"; 888 reg = <0 0xe7310000 0 0x10000>; 889 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 896 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 897 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 898 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 899 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 906 interrupt-names = "error", 907 "ch0", "ch1", "ch2", "ch3", 908 "ch4", "ch5", "ch6", "ch7", 909 "ch8", "ch9", "ch10", "ch11", 910 "ch12", "ch13", "ch14", "ch15"; 911 clocks = <&cpg CPG_MOD 217>; 912 clock-names = "fck"; 913 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 914 resets = <&cpg 217>; 915 #dma-cells = <1>; 916 dma-channels = <16>; 917 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 918 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 919 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 920 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 921 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 922 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 923 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 924 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 925 }; 926 927 ipmmu_ds0: iommu@e6740000 { 928 compatible = "renesas,ipmmu-r8a77965"; 929 reg = <0 0xe6740000 0 0x1000>; 930 renesas,ipmmu-main = <&ipmmu_mm 0>; 931 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 932 #iommu-cells = <1>; 933 }; 934 935 ipmmu_ds1: iommu@e7740000 { 936 compatible = "renesas,ipmmu-r8a77965"; 937 reg = <0 0xe7740000 0 0x1000>; 938 renesas,ipmmu-main = <&ipmmu_mm 1>; 939 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 940 #iommu-cells = <1>; 941 }; 942 943 ipmmu_hc: iommu@e6570000 { 944 compatible = "renesas,ipmmu-r8a77965"; 945 reg = <0 0xe6570000 0 0x1000>; 946 renesas,ipmmu-main = <&ipmmu_mm 2>; 947 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 948 #iommu-cells = <1>; 949 }; 950 951 ipmmu_mm: iommu@e67b0000 { 952 compatible = "renesas,ipmmu-r8a77965"; 953 reg = <0 0xe67b0000 0 0x1000>; 954 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 956 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 957 #iommu-cells = <1>; 958 }; 959 960 ipmmu_mp: iommu@ec670000 { 961 compatible = "renesas,ipmmu-r8a77965"; 962 reg = <0 0xec670000 0 0x1000>; 963 renesas,ipmmu-main = <&ipmmu_mm 4>; 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 965 #iommu-cells = <1>; 966 }; 967 968 ipmmu_pv0: iommu@fd800000 { 969 compatible = "renesas,ipmmu-r8a77965"; 970 reg = <0 0xfd800000 0 0x1000>; 971 renesas,ipmmu-main = <&ipmmu_mm 6>; 972 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 973 #iommu-cells = <1>; 974 }; 975 976 ipmmu_rt: iommu@ffc80000 { 977 compatible = "renesas,ipmmu-r8a77965"; 978 reg = <0 0xffc80000 0 0x1000>; 979 renesas,ipmmu-main = <&ipmmu_mm 10>; 980 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 981 #iommu-cells = <1>; 982 }; 983 984 ipmmu_vc0: iommu@fe6b0000 { 985 compatible = "renesas,ipmmu-r8a77965"; 986 reg = <0 0xfe6b0000 0 0x1000>; 987 renesas,ipmmu-main = <&ipmmu_mm 12>; 988 power-domains = <&sysc R8A77965_PD_A3VC>; 989 #iommu-cells = <1>; 990 }; 991 992 ipmmu_vi0: iommu@febd0000 { 993 compatible = "renesas,ipmmu-r8a77965"; 994 reg = <0 0xfebd0000 0 0x1000>; 995 renesas,ipmmu-main = <&ipmmu_mm 14>; 996 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 997 #iommu-cells = <1>; 998 }; 999 1000 ipmmu_vp0: iommu@fe990000 { 1001 compatible = "renesas,ipmmu-r8a77965"; 1002 reg = <0 0xfe990000 0 0x1000>; 1003 renesas,ipmmu-main = <&ipmmu_mm 16>; 1004 power-domains = <&sysc R8A77965_PD_A3VP>; 1005 #iommu-cells = <1>; 1006 }; 1007 1008 avb: ethernet@e6800000 { 1009 compatible = "renesas,etheravb-r8a77965", 1010 "renesas,etheravb-rcar-gen3"; 1011 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1012 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1013 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1014 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1015 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1016 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1017 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1018 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1019 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1020 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1021 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1022 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1037 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1038 "ch4", "ch5", "ch6", "ch7", 1039 "ch8", "ch9", "ch10", "ch11", 1040 "ch12", "ch13", "ch14", "ch15", 1041 "ch16", "ch17", "ch18", "ch19", 1042 "ch20", "ch21", "ch22", "ch23", 1043 "ch24"; 1044 clocks = <&cpg CPG_MOD 812>; 1045 clock-names = "fck"; 1046 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1047 resets = <&cpg 812>; 1048 phy-mode = "rgmii"; 1049 rx-internal-delay-ps = <0>; 1050 tx-internal-delay-ps = <0>; 1051 iommus = <&ipmmu_ds0 16>; 1052 #address-cells = <1>; 1053 #size-cells = <0>; 1054 status = "disabled"; 1055 }; 1056 1057 can0: can@e6c30000 { 1058 compatible = "renesas,can-r8a77965", 1059 "renesas,rcar-gen3-can"; 1060 reg = <0 0xe6c30000 0 0x1000>; 1061 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1062 clocks = <&cpg CPG_MOD 916>, 1063 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1064 <&can_clk>; 1065 clock-names = "clkp1", "clkp2", "can_clk"; 1066 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1067 assigned-clock-rates = <40000000>; 1068 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1069 resets = <&cpg 916>; 1070 status = "disabled"; 1071 }; 1072 1073 can1: can@e6c38000 { 1074 compatible = "renesas,can-r8a77965", 1075 "renesas,rcar-gen3-can"; 1076 reg = <0 0xe6c38000 0 0x1000>; 1077 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1078 clocks = <&cpg CPG_MOD 915>, 1079 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1080 <&can_clk>; 1081 clock-names = "clkp1", "clkp2", "can_clk"; 1082 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1083 assigned-clock-rates = <40000000>; 1084 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1085 resets = <&cpg 915>; 1086 status = "disabled"; 1087 }; 1088 1089 canfd: can@e66c0000 { 1090 compatible = "renesas,r8a77965-canfd", 1091 "renesas,rcar-gen3-canfd"; 1092 reg = <0 0xe66c0000 0 0x8000>; 1093 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1094 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1095 interrupt-names = "ch_int", "g_int"; 1096 clocks = <&cpg CPG_MOD 914>, 1097 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1098 <&can_clk>; 1099 clock-names = "fck", "canfd", "can_clk"; 1100 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1101 assigned-clock-rates = <40000000>; 1102 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1103 resets = <&cpg 914>; 1104 status = "disabled"; 1105 1106 channel0 { 1107 status = "disabled"; 1108 }; 1109 1110 channel1 { 1111 status = "disabled"; 1112 }; 1113 }; 1114 1115 pwm0: pwm@e6e30000 { 1116 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1117 reg = <0 0xe6e30000 0 8>; 1118 #pwm-cells = <2>; 1119 clocks = <&cpg CPG_MOD 523>; 1120 resets = <&cpg 523>; 1121 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1122 status = "disabled"; 1123 }; 1124 1125 pwm1: pwm@e6e31000 { 1126 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1127 reg = <0 0xe6e31000 0 8>; 1128 #pwm-cells = <2>; 1129 clocks = <&cpg CPG_MOD 523>; 1130 resets = <&cpg 523>; 1131 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1132 status = "disabled"; 1133 }; 1134 1135 pwm2: pwm@e6e32000 { 1136 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1137 reg = <0 0xe6e32000 0 8>; 1138 #pwm-cells = <2>; 1139 clocks = <&cpg CPG_MOD 523>; 1140 resets = <&cpg 523>; 1141 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1142 status = "disabled"; 1143 }; 1144 1145 pwm3: pwm@e6e33000 { 1146 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1147 reg = <0 0xe6e33000 0 8>; 1148 #pwm-cells = <2>; 1149 clocks = <&cpg CPG_MOD 523>; 1150 resets = <&cpg 523>; 1151 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1152 status = "disabled"; 1153 }; 1154 1155 pwm4: pwm@e6e34000 { 1156 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1157 reg = <0 0xe6e34000 0 8>; 1158 #pwm-cells = <2>; 1159 clocks = <&cpg CPG_MOD 523>; 1160 resets = <&cpg 523>; 1161 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1162 status = "disabled"; 1163 }; 1164 1165 pwm5: pwm@e6e35000 { 1166 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1167 reg = <0 0xe6e35000 0 8>; 1168 #pwm-cells = <2>; 1169 clocks = <&cpg CPG_MOD 523>; 1170 resets = <&cpg 523>; 1171 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1172 status = "disabled"; 1173 }; 1174 1175 pwm6: pwm@e6e36000 { 1176 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1177 reg = <0 0xe6e36000 0 8>; 1178 #pwm-cells = <2>; 1179 clocks = <&cpg CPG_MOD 523>; 1180 resets = <&cpg 523>; 1181 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1182 status = "disabled"; 1183 }; 1184 1185 scif0: serial@e6e60000 { 1186 compatible = "renesas,scif-r8a77965", 1187 "renesas,rcar-gen3-scif", "renesas,scif"; 1188 reg = <0 0xe6e60000 0 64>; 1189 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1190 clocks = <&cpg CPG_MOD 207>, 1191 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1192 <&scif_clk>; 1193 clock-names = "fck", "brg_int", "scif_clk"; 1194 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1195 <&dmac2 0x51>, <&dmac2 0x50>; 1196 dma-names = "tx", "rx", "tx", "rx"; 1197 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1198 resets = <&cpg 207>; 1199 status = "disabled"; 1200 }; 1201 1202 scif1: serial@e6e68000 { 1203 compatible = "renesas,scif-r8a77965", 1204 "renesas,rcar-gen3-scif", "renesas,scif"; 1205 reg = <0 0xe6e68000 0 64>; 1206 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1207 clocks = <&cpg CPG_MOD 206>, 1208 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1209 <&scif_clk>; 1210 clock-names = "fck", "brg_int", "scif_clk"; 1211 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1212 <&dmac2 0x53>, <&dmac2 0x52>; 1213 dma-names = "tx", "rx", "tx", "rx"; 1214 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1215 resets = <&cpg 206>; 1216 status = "disabled"; 1217 }; 1218 1219 scif2: serial@e6e88000 { 1220 compatible = "renesas,scif-r8a77965", 1221 "renesas,rcar-gen3-scif", "renesas,scif"; 1222 reg = <0 0xe6e88000 0 64>; 1223 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1224 clocks = <&cpg CPG_MOD 310>, 1225 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1226 <&scif_clk>; 1227 clock-names = "fck", "brg_int", "scif_clk"; 1228 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1229 <&dmac2 0x13>, <&dmac2 0x12>; 1230 dma-names = "tx", "rx", "tx", "rx"; 1231 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1232 resets = <&cpg 310>; 1233 status = "disabled"; 1234 }; 1235 1236 scif3: serial@e6c50000 { 1237 compatible = "renesas,scif-r8a77965", 1238 "renesas,rcar-gen3-scif", "renesas,scif"; 1239 reg = <0 0xe6c50000 0 64>; 1240 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1241 clocks = <&cpg CPG_MOD 204>, 1242 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1243 <&scif_clk>; 1244 clock-names = "fck", "brg_int", "scif_clk"; 1245 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1246 dma-names = "tx", "rx"; 1247 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1248 resets = <&cpg 204>; 1249 status = "disabled"; 1250 }; 1251 1252 scif4: serial@e6c40000 { 1253 compatible = "renesas,scif-r8a77965", 1254 "renesas,rcar-gen3-scif", "renesas,scif"; 1255 reg = <0 0xe6c40000 0 64>; 1256 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1257 clocks = <&cpg CPG_MOD 203>, 1258 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1259 <&scif_clk>; 1260 clock-names = "fck", "brg_int", "scif_clk"; 1261 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1262 dma-names = "tx", "rx"; 1263 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1264 resets = <&cpg 203>; 1265 status = "disabled"; 1266 }; 1267 1268 scif5: serial@e6f30000 { 1269 compatible = "renesas,scif-r8a77965", 1270 "renesas,rcar-gen3-scif", "renesas,scif"; 1271 reg = <0 0xe6f30000 0 64>; 1272 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1273 clocks = <&cpg CPG_MOD 202>, 1274 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1275 <&scif_clk>; 1276 clock-names = "fck", "brg_int", "scif_clk"; 1277 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1278 <&dmac2 0x5b>, <&dmac2 0x5a>; 1279 dma-names = "tx", "rx", "tx", "rx"; 1280 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1281 resets = <&cpg 202>; 1282 status = "disabled"; 1283 }; 1284 1285 tpu: pwm@e6e80000 { 1286 compatible = "renesas,tpu-r8a77965", "renesas,tpu"; 1287 reg = <0 0xe6e80000 0 0x148>; 1288 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1289 clocks = <&cpg CPG_MOD 304>; 1290 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1291 resets = <&cpg 304>; 1292 #pwm-cells = <3>; 1293 status = "disabled"; 1294 }; 1295 1296 msiof0: spi@e6e90000 { 1297 compatible = "renesas,msiof-r8a77965", 1298 "renesas,rcar-gen3-msiof"; 1299 reg = <0 0xe6e90000 0 0x0064>; 1300 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1301 clocks = <&cpg CPG_MOD 211>; 1302 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1303 <&dmac2 0x41>, <&dmac2 0x40>; 1304 dma-names = "tx", "rx", "tx", "rx"; 1305 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1306 resets = <&cpg 211>; 1307 #address-cells = <1>; 1308 #size-cells = <0>; 1309 status = "disabled"; 1310 }; 1311 1312 msiof1: spi@e6ea0000 { 1313 compatible = "renesas,msiof-r8a77965", 1314 "renesas,rcar-gen3-msiof"; 1315 reg = <0 0xe6ea0000 0 0x0064>; 1316 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1317 clocks = <&cpg CPG_MOD 210>; 1318 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1319 <&dmac2 0x43>, <&dmac2 0x42>; 1320 dma-names = "tx", "rx", "tx", "rx"; 1321 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1322 resets = <&cpg 210>; 1323 #address-cells = <1>; 1324 #size-cells = <0>; 1325 status = "disabled"; 1326 }; 1327 1328 msiof2: spi@e6c00000 { 1329 compatible = "renesas,msiof-r8a77965", 1330 "renesas,rcar-gen3-msiof"; 1331 reg = <0 0xe6c00000 0 0x0064>; 1332 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1333 clocks = <&cpg CPG_MOD 209>; 1334 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1335 dma-names = "tx", "rx"; 1336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1337 resets = <&cpg 209>; 1338 #address-cells = <1>; 1339 #size-cells = <0>; 1340 status = "disabled"; 1341 }; 1342 1343 msiof3: spi@e6c10000 { 1344 compatible = "renesas,msiof-r8a77965", 1345 "renesas,rcar-gen3-msiof"; 1346 reg = <0 0xe6c10000 0 0x0064>; 1347 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1348 clocks = <&cpg CPG_MOD 208>; 1349 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1350 dma-names = "tx", "rx"; 1351 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1352 resets = <&cpg 208>; 1353 #address-cells = <1>; 1354 #size-cells = <0>; 1355 status = "disabled"; 1356 }; 1357 1358 vin0: video@e6ef0000 { 1359 compatible = "renesas,vin-r8a77965"; 1360 reg = <0 0xe6ef0000 0 0x1000>; 1361 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1362 clocks = <&cpg CPG_MOD 811>; 1363 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1364 resets = <&cpg 811>; 1365 renesas,id = <0>; 1366 status = "disabled"; 1367 1368 ports { 1369 #address-cells = <1>; 1370 #size-cells = <0>; 1371 1372 port@1 { 1373 #address-cells = <1>; 1374 #size-cells = <0>; 1375 1376 reg = <1>; 1377 1378 vin0csi20: endpoint@0 { 1379 reg = <0>; 1380 remote-endpoint = <&csi20vin0>; 1381 }; 1382 vin0csi40: endpoint@2 { 1383 reg = <2>; 1384 remote-endpoint = <&csi40vin0>; 1385 }; 1386 }; 1387 }; 1388 }; 1389 1390 vin1: video@e6ef1000 { 1391 compatible = "renesas,vin-r8a77965"; 1392 reg = <0 0xe6ef1000 0 0x1000>; 1393 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1394 clocks = <&cpg CPG_MOD 810>; 1395 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1396 resets = <&cpg 810>; 1397 renesas,id = <1>; 1398 status = "disabled"; 1399 1400 ports { 1401 #address-cells = <1>; 1402 #size-cells = <0>; 1403 1404 port@1 { 1405 #address-cells = <1>; 1406 #size-cells = <0>; 1407 1408 reg = <1>; 1409 1410 vin1csi20: endpoint@0 { 1411 reg = <0>; 1412 remote-endpoint = <&csi20vin1>; 1413 }; 1414 vin1csi40: endpoint@2 { 1415 reg = <2>; 1416 remote-endpoint = <&csi40vin1>; 1417 }; 1418 }; 1419 }; 1420 }; 1421 1422 vin2: video@e6ef2000 { 1423 compatible = "renesas,vin-r8a77965"; 1424 reg = <0 0xe6ef2000 0 0x1000>; 1425 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1426 clocks = <&cpg CPG_MOD 809>; 1427 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1428 resets = <&cpg 809>; 1429 renesas,id = <2>; 1430 status = "disabled"; 1431 1432 ports { 1433 #address-cells = <1>; 1434 #size-cells = <0>; 1435 1436 port@1 { 1437 #address-cells = <1>; 1438 #size-cells = <0>; 1439 1440 reg = <1>; 1441 1442 vin2csi20: endpoint@0 { 1443 reg = <0>; 1444 remote-endpoint = <&csi20vin2>; 1445 }; 1446 vin2csi40: endpoint@2 { 1447 reg = <2>; 1448 remote-endpoint = <&csi40vin2>; 1449 }; 1450 }; 1451 }; 1452 }; 1453 1454 vin3: video@e6ef3000 { 1455 compatible = "renesas,vin-r8a77965"; 1456 reg = <0 0xe6ef3000 0 0x1000>; 1457 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1458 clocks = <&cpg CPG_MOD 808>; 1459 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1460 resets = <&cpg 808>; 1461 renesas,id = <3>; 1462 status = "disabled"; 1463 1464 ports { 1465 #address-cells = <1>; 1466 #size-cells = <0>; 1467 1468 port@1 { 1469 #address-cells = <1>; 1470 #size-cells = <0>; 1471 1472 reg = <1>; 1473 1474 vin3csi20: endpoint@0 { 1475 reg = <0>; 1476 remote-endpoint = <&csi20vin3>; 1477 }; 1478 vin3csi40: endpoint@2 { 1479 reg = <2>; 1480 remote-endpoint = <&csi40vin3>; 1481 }; 1482 }; 1483 }; 1484 }; 1485 1486 vin4: video@e6ef4000 { 1487 compatible = "renesas,vin-r8a77965"; 1488 reg = <0 0xe6ef4000 0 0x1000>; 1489 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1490 clocks = <&cpg CPG_MOD 807>; 1491 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1492 resets = <&cpg 807>; 1493 renesas,id = <4>; 1494 status = "disabled"; 1495 1496 ports { 1497 #address-cells = <1>; 1498 #size-cells = <0>; 1499 1500 port@1 { 1501 #address-cells = <1>; 1502 #size-cells = <0>; 1503 1504 reg = <1>; 1505 1506 vin4csi20: endpoint@0 { 1507 reg = <0>; 1508 remote-endpoint = <&csi20vin4>; 1509 }; 1510 vin4csi40: endpoint@2 { 1511 reg = <2>; 1512 remote-endpoint = <&csi40vin4>; 1513 }; 1514 }; 1515 }; 1516 }; 1517 1518 vin5: video@e6ef5000 { 1519 compatible = "renesas,vin-r8a77965"; 1520 reg = <0 0xe6ef5000 0 0x1000>; 1521 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1522 clocks = <&cpg CPG_MOD 806>; 1523 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1524 resets = <&cpg 806>; 1525 renesas,id = <5>; 1526 status = "disabled"; 1527 1528 ports { 1529 #address-cells = <1>; 1530 #size-cells = <0>; 1531 1532 port@1 { 1533 #address-cells = <1>; 1534 #size-cells = <0>; 1535 1536 reg = <1>; 1537 1538 vin5csi20: endpoint@0 { 1539 reg = <0>; 1540 remote-endpoint = <&csi20vin5>; 1541 }; 1542 vin5csi40: endpoint@2 { 1543 reg = <2>; 1544 remote-endpoint = <&csi40vin5>; 1545 }; 1546 }; 1547 }; 1548 }; 1549 1550 vin6: video@e6ef6000 { 1551 compatible = "renesas,vin-r8a77965"; 1552 reg = <0 0xe6ef6000 0 0x1000>; 1553 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1554 clocks = <&cpg CPG_MOD 805>; 1555 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1556 resets = <&cpg 805>; 1557 renesas,id = <6>; 1558 status = "disabled"; 1559 1560 ports { 1561 #address-cells = <1>; 1562 #size-cells = <0>; 1563 1564 port@1 { 1565 #address-cells = <1>; 1566 #size-cells = <0>; 1567 1568 reg = <1>; 1569 1570 vin6csi20: endpoint@0 { 1571 reg = <0>; 1572 remote-endpoint = <&csi20vin6>; 1573 }; 1574 vin6csi40: endpoint@2 { 1575 reg = <2>; 1576 remote-endpoint = <&csi40vin6>; 1577 }; 1578 }; 1579 }; 1580 }; 1581 1582 vin7: video@e6ef7000 { 1583 compatible = "renesas,vin-r8a77965"; 1584 reg = <0 0xe6ef7000 0 0x1000>; 1585 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1586 clocks = <&cpg CPG_MOD 804>; 1587 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1588 resets = <&cpg 804>; 1589 renesas,id = <7>; 1590 status = "disabled"; 1591 1592 ports { 1593 #address-cells = <1>; 1594 #size-cells = <0>; 1595 1596 port@1 { 1597 #address-cells = <1>; 1598 #size-cells = <0>; 1599 1600 reg = <1>; 1601 1602 vin7csi20: endpoint@0 { 1603 reg = <0>; 1604 remote-endpoint = <&csi20vin7>; 1605 }; 1606 vin7csi40: endpoint@2 { 1607 reg = <2>; 1608 remote-endpoint = <&csi40vin7>; 1609 }; 1610 }; 1611 }; 1612 }; 1613 1614 drif00: rif@e6f40000 { 1615 compatible = "renesas,r8a77965-drif", 1616 "renesas,rcar-gen3-drif"; 1617 reg = <0 0xe6f40000 0 0x84>; 1618 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1619 clocks = <&cpg CPG_MOD 515>; 1620 clock-names = "fck"; 1621 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1622 dma-names = "rx", "rx"; 1623 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1624 resets = <&cpg 515>; 1625 renesas,bonding = <&drif01>; 1626 status = "disabled"; 1627 }; 1628 1629 drif01: rif@e6f50000 { 1630 compatible = "renesas,r8a77965-drif", 1631 "renesas,rcar-gen3-drif"; 1632 reg = <0 0xe6f50000 0 0x84>; 1633 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1634 clocks = <&cpg CPG_MOD 514>; 1635 clock-names = "fck"; 1636 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1637 dma-names = "rx", "rx"; 1638 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1639 resets = <&cpg 514>; 1640 renesas,bonding = <&drif00>; 1641 status = "disabled"; 1642 }; 1643 1644 drif10: rif@e6f60000 { 1645 compatible = "renesas,r8a77965-drif", 1646 "renesas,rcar-gen3-drif"; 1647 reg = <0 0xe6f60000 0 0x84>; 1648 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1649 clocks = <&cpg CPG_MOD 513>; 1650 clock-names = "fck"; 1651 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1652 dma-names = "rx", "rx"; 1653 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1654 resets = <&cpg 513>; 1655 renesas,bonding = <&drif11>; 1656 status = "disabled"; 1657 }; 1658 1659 drif11: rif@e6f70000 { 1660 compatible = "renesas,r8a77965-drif", 1661 "renesas,rcar-gen3-drif"; 1662 reg = <0 0xe6f70000 0 0x84>; 1663 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1664 clocks = <&cpg CPG_MOD 512>; 1665 clock-names = "fck"; 1666 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1667 dma-names = "rx", "rx"; 1668 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1669 resets = <&cpg 512>; 1670 renesas,bonding = <&drif10>; 1671 status = "disabled"; 1672 }; 1673 1674 drif20: rif@e6f80000 { 1675 compatible = "renesas,r8a77965-drif", 1676 "renesas,rcar-gen3-drif"; 1677 reg = <0 0xe6f80000 0 0x84>; 1678 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1679 clocks = <&cpg CPG_MOD 511>; 1680 clock-names = "fck"; 1681 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1682 dma-names = "rx", "rx"; 1683 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1684 resets = <&cpg 511>; 1685 renesas,bonding = <&drif21>; 1686 status = "disabled"; 1687 }; 1688 1689 drif21: rif@e6f90000 { 1690 compatible = "renesas,r8a77965-drif", 1691 "renesas,rcar-gen3-drif"; 1692 reg = <0 0xe6f90000 0 0x84>; 1693 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1694 clocks = <&cpg CPG_MOD 510>; 1695 clock-names = "fck"; 1696 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1697 dma-names = "rx", "rx"; 1698 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1699 resets = <&cpg 510>; 1700 renesas,bonding = <&drif20>; 1701 status = "disabled"; 1702 }; 1703 1704 drif30: rif@e6fa0000 { 1705 compatible = "renesas,r8a77965-drif", 1706 "renesas,rcar-gen3-drif"; 1707 reg = <0 0xe6fa0000 0 0x84>; 1708 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1709 clocks = <&cpg CPG_MOD 509>; 1710 clock-names = "fck"; 1711 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1712 dma-names = "rx", "rx"; 1713 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1714 resets = <&cpg 509>; 1715 renesas,bonding = <&drif31>; 1716 status = "disabled"; 1717 }; 1718 1719 drif31: rif@e6fb0000 { 1720 compatible = "renesas,r8a77965-drif", 1721 "renesas,rcar-gen3-drif"; 1722 reg = <0 0xe6fb0000 0 0x84>; 1723 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1724 clocks = <&cpg CPG_MOD 508>; 1725 clock-names = "fck"; 1726 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1727 dma-names = "rx", "rx"; 1728 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1729 resets = <&cpg 508>; 1730 renesas,bonding = <&drif30>; 1731 status = "disabled"; 1732 }; 1733 1734 rcar_sound: sound@ec500000 { 1735 /* 1736 * #sound-dai-cells is required 1737 * 1738 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1739 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1740 */ 1741 /* 1742 * #clock-cells is required for audio_clkout0/1/2/3 1743 * 1744 * clkout : #clock-cells = <0>; <&rcar_sound>; 1745 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1746 */ 1747 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1748 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1749 <0 0xec5a0000 0 0x100>, /* ADG */ 1750 <0 0xec540000 0 0x1000>, /* SSIU */ 1751 <0 0xec541000 0 0x280>, /* SSI */ 1752 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1753 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1754 1755 clocks = <&cpg CPG_MOD 1005>, 1756 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1757 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1758 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1759 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1760 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1761 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1762 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1763 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1764 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1765 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1766 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1767 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1768 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1769 <&audio_clk_a>, <&audio_clk_b>, 1770 <&audio_clk_c>, 1771 <&cpg CPG_CORE R8A77965_CLK_S0D4>; 1772 clock-names = "ssi-all", 1773 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1774 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1775 "ssi.1", "ssi.0", 1776 "src.9", "src.8", "src.7", "src.6", 1777 "src.5", "src.4", "src.3", "src.2", 1778 "src.1", "src.0", 1779 "mix.1", "mix.0", 1780 "ctu.1", "ctu.0", 1781 "dvc.0", "dvc.1", 1782 "clk_a", "clk_b", "clk_c", "clk_i"; 1783 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1784 resets = <&cpg 1005>, 1785 <&cpg 1006>, <&cpg 1007>, 1786 <&cpg 1008>, <&cpg 1009>, 1787 <&cpg 1010>, <&cpg 1011>, 1788 <&cpg 1012>, <&cpg 1013>, 1789 <&cpg 1014>, <&cpg 1015>; 1790 reset-names = "ssi-all", 1791 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1792 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1793 "ssi.1", "ssi.0"; 1794 status = "disabled"; 1795 1796 rcar_sound,dvc { 1797 dvc0: dvc-0 { 1798 dmas = <&audma1 0xbc>; 1799 dma-names = "tx"; 1800 }; 1801 dvc1: dvc-1 { 1802 dmas = <&audma1 0xbe>; 1803 dma-names = "tx"; 1804 }; 1805 }; 1806 1807 rcar_sound,mix { 1808 mix0: mix-0 { }; 1809 mix1: mix-1 { }; 1810 }; 1811 1812 rcar_sound,ctu { 1813 ctu00: ctu-0 { }; 1814 ctu01: ctu-1 { }; 1815 ctu02: ctu-2 { }; 1816 ctu03: ctu-3 { }; 1817 ctu10: ctu-4 { }; 1818 ctu11: ctu-5 { }; 1819 ctu12: ctu-6 { }; 1820 ctu13: ctu-7 { }; 1821 }; 1822 1823 rcar_sound,src { 1824 src0: src-0 { 1825 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1826 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1827 dma-names = "rx", "tx"; 1828 }; 1829 src1: src-1 { 1830 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1831 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1832 dma-names = "rx", "tx"; 1833 }; 1834 src2: src-2 { 1835 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1836 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1837 dma-names = "rx", "tx"; 1838 }; 1839 src3: src-3 { 1840 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1841 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1842 dma-names = "rx", "tx"; 1843 }; 1844 src4: src-4 { 1845 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1846 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1847 dma-names = "rx", "tx"; 1848 }; 1849 src5: src-5 { 1850 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1851 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1852 dma-names = "rx", "tx"; 1853 }; 1854 src6: src-6 { 1855 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1856 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1857 dma-names = "rx", "tx"; 1858 }; 1859 src7: src-7 { 1860 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1861 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1862 dma-names = "rx", "tx"; 1863 }; 1864 src8: src-8 { 1865 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1866 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1867 dma-names = "rx", "tx"; 1868 }; 1869 src9: src-9 { 1870 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1871 dmas = <&audma0 0x97>, <&audma1 0xba>; 1872 dma-names = "rx", "tx"; 1873 }; 1874 }; 1875 1876 rcar_sound,ssiu { 1877 ssiu00: ssiu-0 { 1878 dmas = <&audma0 0x15>, <&audma1 0x16>; 1879 dma-names = "rx", "tx"; 1880 }; 1881 ssiu01: ssiu-1 { 1882 dmas = <&audma0 0x35>, <&audma1 0x36>; 1883 dma-names = "rx", "tx"; 1884 }; 1885 ssiu02: ssiu-2 { 1886 dmas = <&audma0 0x37>, <&audma1 0x38>; 1887 dma-names = "rx", "tx"; 1888 }; 1889 ssiu03: ssiu-3 { 1890 dmas = <&audma0 0x47>, <&audma1 0x48>; 1891 dma-names = "rx", "tx"; 1892 }; 1893 ssiu04: ssiu-4 { 1894 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1895 dma-names = "rx", "tx"; 1896 }; 1897 ssiu05: ssiu-5 { 1898 dmas = <&audma0 0x43>, <&audma1 0x44>; 1899 dma-names = "rx", "tx"; 1900 }; 1901 ssiu06: ssiu-6 { 1902 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1903 dma-names = "rx", "tx"; 1904 }; 1905 ssiu07: ssiu-7 { 1906 dmas = <&audma0 0x53>, <&audma1 0x54>; 1907 dma-names = "rx", "tx"; 1908 }; 1909 ssiu10: ssiu-8 { 1910 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1911 dma-names = "rx", "tx"; 1912 }; 1913 ssiu11: ssiu-9 { 1914 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1915 dma-names = "rx", "tx"; 1916 }; 1917 ssiu12: ssiu-10 { 1918 dmas = <&audma0 0x57>, <&audma1 0x58>; 1919 dma-names = "rx", "tx"; 1920 }; 1921 ssiu13: ssiu-11 { 1922 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1923 dma-names = "rx", "tx"; 1924 }; 1925 ssiu14: ssiu-12 { 1926 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1927 dma-names = "rx", "tx"; 1928 }; 1929 ssiu15: ssiu-13 { 1930 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1931 dma-names = "rx", "tx"; 1932 }; 1933 ssiu16: ssiu-14 { 1934 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1935 dma-names = "rx", "tx"; 1936 }; 1937 ssiu17: ssiu-15 { 1938 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1939 dma-names = "rx", "tx"; 1940 }; 1941 ssiu20: ssiu-16 { 1942 dmas = <&audma0 0x63>, <&audma1 0x64>; 1943 dma-names = "rx", "tx"; 1944 }; 1945 ssiu21: ssiu-17 { 1946 dmas = <&audma0 0x67>, <&audma1 0x68>; 1947 dma-names = "rx", "tx"; 1948 }; 1949 ssiu22: ssiu-18 { 1950 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1951 dma-names = "rx", "tx"; 1952 }; 1953 ssiu23: ssiu-19 { 1954 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1955 dma-names = "rx", "tx"; 1956 }; 1957 ssiu24: ssiu-20 { 1958 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1959 dma-names = "rx", "tx"; 1960 }; 1961 ssiu25: ssiu-21 { 1962 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1963 dma-names = "rx", "tx"; 1964 }; 1965 ssiu26: ssiu-22 { 1966 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1967 dma-names = "rx", "tx"; 1968 }; 1969 ssiu27: ssiu-23 { 1970 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1971 dma-names = "rx", "tx"; 1972 }; 1973 ssiu30: ssiu-24 { 1974 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1975 dma-names = "rx", "tx"; 1976 }; 1977 ssiu31: ssiu-25 { 1978 dmas = <&audma0 0x21>, <&audma1 0x22>; 1979 dma-names = "rx", "tx"; 1980 }; 1981 ssiu32: ssiu-26 { 1982 dmas = <&audma0 0x23>, <&audma1 0x24>; 1983 dma-names = "rx", "tx"; 1984 }; 1985 ssiu33: ssiu-27 { 1986 dmas = <&audma0 0x25>, <&audma1 0x26>; 1987 dma-names = "rx", "tx"; 1988 }; 1989 ssiu34: ssiu-28 { 1990 dmas = <&audma0 0x27>, <&audma1 0x28>; 1991 dma-names = "rx", "tx"; 1992 }; 1993 ssiu35: ssiu-29 { 1994 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1995 dma-names = "rx", "tx"; 1996 }; 1997 ssiu36: ssiu-30 { 1998 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1999 dma-names = "rx", "tx"; 2000 }; 2001 ssiu37: ssiu-31 { 2002 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2003 dma-names = "rx", "tx"; 2004 }; 2005 ssiu40: ssiu-32 { 2006 dmas = <&audma0 0x71>, <&audma1 0x72>; 2007 dma-names = "rx", "tx"; 2008 }; 2009 ssiu41: ssiu-33 { 2010 dmas = <&audma0 0x17>, <&audma1 0x18>; 2011 dma-names = "rx", "tx"; 2012 }; 2013 ssiu42: ssiu-34 { 2014 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2015 dma-names = "rx", "tx"; 2016 }; 2017 ssiu43: ssiu-35 { 2018 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2019 dma-names = "rx", "tx"; 2020 }; 2021 ssiu44: ssiu-36 { 2022 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2023 dma-names = "rx", "tx"; 2024 }; 2025 ssiu45: ssiu-37 { 2026 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2027 dma-names = "rx", "tx"; 2028 }; 2029 ssiu46: ssiu-38 { 2030 dmas = <&audma0 0x31>, <&audma1 0x32>; 2031 dma-names = "rx", "tx"; 2032 }; 2033 ssiu47: ssiu-39 { 2034 dmas = <&audma0 0x33>, <&audma1 0x34>; 2035 dma-names = "rx", "tx"; 2036 }; 2037 ssiu50: ssiu-40 { 2038 dmas = <&audma0 0x73>, <&audma1 0x74>; 2039 dma-names = "rx", "tx"; 2040 }; 2041 ssiu60: ssiu-41 { 2042 dmas = <&audma0 0x75>, <&audma1 0x76>; 2043 dma-names = "rx", "tx"; 2044 }; 2045 ssiu70: ssiu-42 { 2046 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2047 dma-names = "rx", "tx"; 2048 }; 2049 ssiu80: ssiu-43 { 2050 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2051 dma-names = "rx", "tx"; 2052 }; 2053 ssiu90: ssiu-44 { 2054 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2055 dma-names = "rx", "tx"; 2056 }; 2057 ssiu91: ssiu-45 { 2058 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2059 dma-names = "rx", "tx"; 2060 }; 2061 ssiu92: ssiu-46 { 2062 dmas = <&audma0 0x81>, <&audma1 0x82>; 2063 dma-names = "rx", "tx"; 2064 }; 2065 ssiu93: ssiu-47 { 2066 dmas = <&audma0 0x83>, <&audma1 0x84>; 2067 dma-names = "rx", "tx"; 2068 }; 2069 ssiu94: ssiu-48 { 2070 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2071 dma-names = "rx", "tx"; 2072 }; 2073 ssiu95: ssiu-49 { 2074 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2075 dma-names = "rx", "tx"; 2076 }; 2077 ssiu96: ssiu-50 { 2078 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2079 dma-names = "rx", "tx"; 2080 }; 2081 ssiu97: ssiu-51 { 2082 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2083 dma-names = "rx", "tx"; 2084 }; 2085 }; 2086 2087 rcar_sound,ssi { 2088 ssi0: ssi-0 { 2089 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2090 dmas = <&audma0 0x01>, <&audma1 0x02>; 2091 dma-names = "rx", "tx"; 2092 }; 2093 ssi1: ssi-1 { 2094 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2095 dmas = <&audma0 0x03>, <&audma1 0x04>; 2096 dma-names = "rx", "tx"; 2097 }; 2098 ssi2: ssi-2 { 2099 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2100 dmas = <&audma0 0x05>, <&audma1 0x06>; 2101 dma-names = "rx", "tx"; 2102 }; 2103 ssi3: ssi-3 { 2104 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2105 dmas = <&audma0 0x07>, <&audma1 0x08>; 2106 dma-names = "rx", "tx"; 2107 }; 2108 ssi4: ssi-4 { 2109 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2110 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2111 dma-names = "rx", "tx"; 2112 }; 2113 ssi5: ssi-5 { 2114 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2115 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2116 dma-names = "rx", "tx"; 2117 }; 2118 ssi6: ssi-6 { 2119 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2120 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2121 dma-names = "rx", "tx"; 2122 }; 2123 ssi7: ssi-7 { 2124 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2125 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2126 dma-names = "rx", "tx"; 2127 }; 2128 ssi8: ssi-8 { 2129 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2130 dmas = <&audma0 0x11>, <&audma1 0x12>; 2131 dma-names = "rx", "tx"; 2132 }; 2133 ssi9: ssi-9 { 2134 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2135 dmas = <&audma0 0x13>, <&audma1 0x14>; 2136 dma-names = "rx", "tx"; 2137 }; 2138 }; 2139 }; 2140 2141 mlp: mlp@ec520000 { 2142 compatible = "renesas,r8a77965-mlp", 2143 "renesas,rcar-gen3-mlp"; 2144 reg = <0 0xec520000 0 0x800>; 2145 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2146 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2147 clocks = <&cpg CPG_MOD 802>; 2148 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2149 resets = <&cpg 802>; 2150 status = "disabled"; 2151 }; 2152 2153 audma0: dma-controller@ec700000 { 2154 compatible = "renesas,dmac-r8a77965", 2155 "renesas,rcar-dmac"; 2156 reg = <0 0xec700000 0 0x10000>; 2157 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2158 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2159 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2160 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2161 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2162 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2163 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2164 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2165 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2166 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2167 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2168 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2169 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2170 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2171 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2172 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2173 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2174 interrupt-names = "error", 2175 "ch0", "ch1", "ch2", "ch3", 2176 "ch4", "ch5", "ch6", "ch7", 2177 "ch8", "ch9", "ch10", "ch11", 2178 "ch12", "ch13", "ch14", "ch15"; 2179 clocks = <&cpg CPG_MOD 502>; 2180 clock-names = "fck"; 2181 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2182 resets = <&cpg 502>; 2183 #dma-cells = <1>; 2184 dma-channels = <16>; 2185 }; 2186 2187 audma1: dma-controller@ec720000 { 2188 compatible = "renesas,dmac-r8a77965", 2189 "renesas,rcar-dmac"; 2190 reg = <0 0xec720000 0 0x10000>; 2191 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2192 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2193 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2194 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2195 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2196 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2197 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2198 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2199 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2200 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2201 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2202 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2203 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2204 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2205 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2206 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2207 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2208 interrupt-names = "error", 2209 "ch0", "ch1", "ch2", "ch3", 2210 "ch4", "ch5", "ch6", "ch7", 2211 "ch8", "ch9", "ch10", "ch11", 2212 "ch12", "ch13", "ch14", "ch15"; 2213 clocks = <&cpg CPG_MOD 501>; 2214 clock-names = "fck"; 2215 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2216 resets = <&cpg 501>; 2217 #dma-cells = <1>; 2218 dma-channels = <16>; 2219 }; 2220 2221 xhci0: usb@ee000000 { 2222 compatible = "renesas,xhci-r8a77965", 2223 "renesas,rcar-gen3-xhci"; 2224 reg = <0 0xee000000 0 0xc00>; 2225 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2226 clocks = <&cpg CPG_MOD 328>; 2227 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2228 resets = <&cpg 328>; 2229 status = "disabled"; 2230 }; 2231 2232 usb3_peri0: usb@ee020000 { 2233 compatible = "renesas,r8a77965-usb3-peri", 2234 "renesas,rcar-gen3-usb3-peri"; 2235 reg = <0 0xee020000 0 0x400>; 2236 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2237 clocks = <&cpg CPG_MOD 328>; 2238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2239 resets = <&cpg 328>; 2240 status = "disabled"; 2241 }; 2242 2243 ohci0: usb@ee080000 { 2244 compatible = "generic-ohci"; 2245 reg = <0 0xee080000 0 0x100>; 2246 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2247 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2248 phys = <&usb2_phy0 1>; 2249 phy-names = "usb"; 2250 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2251 resets = <&cpg 703>, <&cpg 704>; 2252 status = "disabled"; 2253 }; 2254 2255 ohci1: usb@ee0a0000 { 2256 compatible = "generic-ohci"; 2257 reg = <0 0xee0a0000 0 0x100>; 2258 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2259 clocks = <&cpg CPG_MOD 702>; 2260 phys = <&usb2_phy1 1>; 2261 phy-names = "usb"; 2262 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2263 resets = <&cpg 702>; 2264 status = "disabled"; 2265 }; 2266 2267 ehci0: usb@ee080100 { 2268 compatible = "generic-ehci"; 2269 reg = <0 0xee080100 0 0x100>; 2270 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2271 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2272 phys = <&usb2_phy0 2>; 2273 phy-names = "usb"; 2274 companion = <&ohci0>; 2275 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2276 resets = <&cpg 703>, <&cpg 704>; 2277 status = "disabled"; 2278 }; 2279 2280 ehci1: usb@ee0a0100 { 2281 compatible = "generic-ehci"; 2282 reg = <0 0xee0a0100 0 0x100>; 2283 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2284 clocks = <&cpg CPG_MOD 702>; 2285 phys = <&usb2_phy1 2>; 2286 phy-names = "usb"; 2287 companion = <&ohci1>; 2288 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2289 resets = <&cpg 702>; 2290 status = "disabled"; 2291 }; 2292 2293 usb2_phy0: usb-phy@ee080200 { 2294 compatible = "renesas,usb2-phy-r8a77965", 2295 "renesas,rcar-gen3-usb2-phy"; 2296 reg = <0 0xee080200 0 0x700>; 2297 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2298 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2299 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2300 resets = <&cpg 703>, <&cpg 704>; 2301 #phy-cells = <1>; 2302 status = "disabled"; 2303 }; 2304 2305 usb2_phy1: usb-phy@ee0a0200 { 2306 compatible = "renesas,usb2-phy-r8a77965", 2307 "renesas,rcar-gen3-usb2-phy"; 2308 reg = <0 0xee0a0200 0 0x700>; 2309 clocks = <&cpg CPG_MOD 702>; 2310 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2311 resets = <&cpg 702>; 2312 #phy-cells = <1>; 2313 status = "disabled"; 2314 }; 2315 2316 sdhi0: mmc@ee100000 { 2317 compatible = "renesas,sdhi-r8a77965", 2318 "renesas,rcar-gen3-sdhi"; 2319 reg = <0 0xee100000 0 0x2000>; 2320 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2321 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>; 2322 clock-names = "core", "clkh"; 2323 max-frequency = <200000000>; 2324 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2325 resets = <&cpg 314>; 2326 iommus = <&ipmmu_ds1 32>; 2327 status = "disabled"; 2328 }; 2329 2330 sdhi1: mmc@ee120000 { 2331 compatible = "renesas,sdhi-r8a77965", 2332 "renesas,rcar-gen3-sdhi"; 2333 reg = <0 0xee120000 0 0x2000>; 2334 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2335 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>; 2336 clock-names = "core", "clkh"; 2337 max-frequency = <200000000>; 2338 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2339 resets = <&cpg 313>; 2340 iommus = <&ipmmu_ds1 33>; 2341 status = "disabled"; 2342 }; 2343 2344 sdhi2: mmc@ee140000 { 2345 compatible = "renesas,sdhi-r8a77965", 2346 "renesas,rcar-gen3-sdhi"; 2347 reg = <0 0xee140000 0 0x2000>; 2348 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2349 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>; 2350 clock-names = "core", "clkh"; 2351 max-frequency = <200000000>; 2352 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2353 resets = <&cpg 312>; 2354 iommus = <&ipmmu_ds1 34>; 2355 status = "disabled"; 2356 }; 2357 2358 sdhi3: mmc@ee160000 { 2359 compatible = "renesas,sdhi-r8a77965", 2360 "renesas,rcar-gen3-sdhi"; 2361 reg = <0 0xee160000 0 0x2000>; 2362 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2363 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>; 2364 clock-names = "core", "clkh"; 2365 max-frequency = <200000000>; 2366 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2367 resets = <&cpg 311>; 2368 iommus = <&ipmmu_ds1 35>; 2369 status = "disabled"; 2370 }; 2371 2372 rpc: spi@ee200000 { 2373 compatible = "renesas,r8a77965-rpc-if", 2374 "renesas,rcar-gen3-rpc-if"; 2375 reg = <0 0xee200000 0 0x200>, 2376 <0 0x08000000 0 0x04000000>, 2377 <0 0xee208000 0 0x100>; 2378 reg-names = "regs", "dirmap", "wbuf"; 2379 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2380 clocks = <&cpg CPG_MOD 917>; 2381 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2382 resets = <&cpg 917>; 2383 #address-cells = <1>; 2384 #size-cells = <0>; 2385 status = "disabled"; 2386 }; 2387 2388 sata: sata@ee300000 { 2389 compatible = "renesas,sata-r8a77965", 2390 "renesas,rcar-gen3-sata"; 2391 reg = <0 0xee300000 0 0x200000>; 2392 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2393 clocks = <&cpg CPG_MOD 815>; 2394 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2395 resets = <&cpg 815>; 2396 status = "disabled"; 2397 }; 2398 2399 gic: interrupt-controller@f1010000 { 2400 compatible = "arm,gic-400"; 2401 #interrupt-cells = <3>; 2402 #address-cells = <0>; 2403 interrupt-controller; 2404 reg = <0x0 0xf1010000 0 0x1000>, 2405 <0x0 0xf1020000 0 0x20000>, 2406 <0x0 0xf1040000 0 0x20000>, 2407 <0x0 0xf1060000 0 0x20000>; 2408 interrupts = <GIC_PPI 9 2409 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2410 clocks = <&cpg CPG_MOD 408>; 2411 clock-names = "clk"; 2412 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2413 resets = <&cpg 408>; 2414 }; 2415 2416 pciec0: pcie@fe000000 { 2417 compatible = "renesas,pcie-r8a77965", 2418 "renesas,pcie-rcar-gen3"; 2419 reg = <0 0xfe000000 0 0x80000>; 2420 #address-cells = <3>; 2421 #size-cells = <2>; 2422 bus-range = <0x00 0xff>; 2423 device_type = "pci"; 2424 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2425 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2426 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2427 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2428 /* Map all possible DDR as inbound ranges */ 2429 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2430 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2431 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2432 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2433 #interrupt-cells = <1>; 2434 interrupt-map-mask = <0 0 0 0>; 2435 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2436 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2437 clock-names = "pcie", "pcie_bus"; 2438 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2439 resets = <&cpg 319>; 2440 status = "disabled"; 2441 }; 2442 2443 pciec1: pcie@ee800000 { 2444 compatible = "renesas,pcie-r8a77965", 2445 "renesas,pcie-rcar-gen3"; 2446 reg = <0 0xee800000 0 0x80000>; 2447 #address-cells = <3>; 2448 #size-cells = <2>; 2449 bus-range = <0x00 0xff>; 2450 device_type = "pci"; 2451 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2452 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2453 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2454 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2455 /* Map all possible DDR as inbound ranges */ 2456 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2457 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2458 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2459 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2460 #interrupt-cells = <1>; 2461 interrupt-map-mask = <0 0 0 0>; 2462 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2463 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2464 clock-names = "pcie", "pcie_bus"; 2465 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2466 resets = <&cpg 318>; 2467 status = "disabled"; 2468 }; 2469 2470 fdp1@fe940000 { 2471 compatible = "renesas,fdp1"; 2472 reg = <0 0xfe940000 0 0x2400>; 2473 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2474 clocks = <&cpg CPG_MOD 119>; 2475 power-domains = <&sysc R8A77965_PD_A3VP>; 2476 resets = <&cpg 119>; 2477 renesas,fcp = <&fcpf0>; 2478 }; 2479 2480 fcpf0: fcp@fe950000 { 2481 compatible = "renesas,fcpf"; 2482 reg = <0 0xfe950000 0 0x200>; 2483 clocks = <&cpg CPG_MOD 615>; 2484 power-domains = <&sysc R8A77965_PD_A3VP>; 2485 resets = <&cpg 615>; 2486 }; 2487 2488 vspb: vsp@fe960000 { 2489 compatible = "renesas,vsp2"; 2490 reg = <0 0xfe960000 0 0x8000>; 2491 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2492 clocks = <&cpg CPG_MOD 626>; 2493 power-domains = <&sysc R8A77965_PD_A3VP>; 2494 resets = <&cpg 626>; 2495 2496 renesas,fcp = <&fcpvb0>; 2497 }; 2498 2499 vspi0: vsp@fe9a0000 { 2500 compatible = "renesas,vsp2"; 2501 reg = <0 0xfe9a0000 0 0x8000>; 2502 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2503 clocks = <&cpg CPG_MOD 631>; 2504 power-domains = <&sysc R8A77965_PD_A3VP>; 2505 resets = <&cpg 631>; 2506 2507 renesas,fcp = <&fcpvi0>; 2508 }; 2509 2510 vspd0: vsp@fea20000 { 2511 compatible = "renesas,vsp2"; 2512 reg = <0 0xfea20000 0 0x5000>; 2513 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2514 clocks = <&cpg CPG_MOD 623>; 2515 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2516 resets = <&cpg 623>; 2517 2518 renesas,fcp = <&fcpvd0>; 2519 }; 2520 2521 vspd1: vsp@fea28000 { 2522 compatible = "renesas,vsp2"; 2523 reg = <0 0xfea28000 0 0x5000>; 2524 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2525 clocks = <&cpg CPG_MOD 622>; 2526 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2527 resets = <&cpg 622>; 2528 2529 renesas,fcp = <&fcpvd1>; 2530 }; 2531 2532 fcpvb0: fcp@fe96f000 { 2533 compatible = "renesas,fcpv"; 2534 reg = <0 0xfe96f000 0 0x200>; 2535 clocks = <&cpg CPG_MOD 607>; 2536 power-domains = <&sysc R8A77965_PD_A3VP>; 2537 resets = <&cpg 607>; 2538 }; 2539 2540 fcpvd0: fcp@fea27000 { 2541 compatible = "renesas,fcpv"; 2542 reg = <0 0xfea27000 0 0x200>; 2543 clocks = <&cpg CPG_MOD 603>; 2544 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2545 resets = <&cpg 603>; 2546 }; 2547 2548 fcpvd1: fcp@fea2f000 { 2549 compatible = "renesas,fcpv"; 2550 reg = <0 0xfea2f000 0 0x200>; 2551 clocks = <&cpg CPG_MOD 602>; 2552 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2553 resets = <&cpg 602>; 2554 }; 2555 2556 fcpvi0: fcp@fe9af000 { 2557 compatible = "renesas,fcpv"; 2558 reg = <0 0xfe9af000 0 0x200>; 2559 clocks = <&cpg CPG_MOD 611>; 2560 power-domains = <&sysc R8A77965_PD_A3VP>; 2561 resets = <&cpg 611>; 2562 }; 2563 2564 cmm0: cmm@fea40000 { 2565 compatible = "renesas,r8a77965-cmm", 2566 "renesas,rcar-gen3-cmm"; 2567 reg = <0 0xfea40000 0 0x1000>; 2568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2569 clocks = <&cpg CPG_MOD 711>; 2570 resets = <&cpg 711>; 2571 }; 2572 2573 cmm1: cmm@fea50000 { 2574 compatible = "renesas,r8a77965-cmm", 2575 "renesas,rcar-gen3-cmm"; 2576 reg = <0 0xfea50000 0 0x1000>; 2577 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2578 clocks = <&cpg CPG_MOD 710>; 2579 resets = <&cpg 710>; 2580 }; 2581 2582 cmm3: cmm@fea70000 { 2583 compatible = "renesas,r8a77965-cmm", 2584 "renesas,rcar-gen3-cmm"; 2585 reg = <0 0xfea70000 0 0x1000>; 2586 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2587 clocks = <&cpg CPG_MOD 708>; 2588 resets = <&cpg 708>; 2589 }; 2590 2591 csi20: csi2@fea80000 { 2592 compatible = "renesas,r8a77965-csi2"; 2593 reg = <0 0xfea80000 0 0x10000>; 2594 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2595 clocks = <&cpg CPG_MOD 714>; 2596 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2597 resets = <&cpg 714>; 2598 status = "disabled"; 2599 2600 ports { 2601 #address-cells = <1>; 2602 #size-cells = <0>; 2603 2604 port@0 { 2605 reg = <0>; 2606 }; 2607 2608 port@1 { 2609 #address-cells = <1>; 2610 #size-cells = <0>; 2611 2612 reg = <1>; 2613 2614 csi20vin0: endpoint@0 { 2615 reg = <0>; 2616 remote-endpoint = <&vin0csi20>; 2617 }; 2618 csi20vin1: endpoint@1 { 2619 reg = <1>; 2620 remote-endpoint = <&vin1csi20>; 2621 }; 2622 csi20vin2: endpoint@2 { 2623 reg = <2>; 2624 remote-endpoint = <&vin2csi20>; 2625 }; 2626 csi20vin3: endpoint@3 { 2627 reg = <3>; 2628 remote-endpoint = <&vin3csi20>; 2629 }; 2630 csi20vin4: endpoint@4 { 2631 reg = <4>; 2632 remote-endpoint = <&vin4csi20>; 2633 }; 2634 csi20vin5: endpoint@5 { 2635 reg = <5>; 2636 remote-endpoint = <&vin5csi20>; 2637 }; 2638 csi20vin6: endpoint@6 { 2639 reg = <6>; 2640 remote-endpoint = <&vin6csi20>; 2641 }; 2642 csi20vin7: endpoint@7 { 2643 reg = <7>; 2644 remote-endpoint = <&vin7csi20>; 2645 }; 2646 }; 2647 }; 2648 }; 2649 2650 csi40: csi2@feaa0000 { 2651 compatible = "renesas,r8a77965-csi2"; 2652 reg = <0 0xfeaa0000 0 0x10000>; 2653 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2654 clocks = <&cpg CPG_MOD 716>; 2655 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2656 resets = <&cpg 716>; 2657 status = "disabled"; 2658 2659 ports { 2660 #address-cells = <1>; 2661 #size-cells = <0>; 2662 2663 port@0 { 2664 reg = <0>; 2665 }; 2666 2667 port@1 { 2668 #address-cells = <1>; 2669 #size-cells = <0>; 2670 2671 reg = <1>; 2672 2673 csi40vin0: endpoint@0 { 2674 reg = <0>; 2675 remote-endpoint = <&vin0csi40>; 2676 }; 2677 csi40vin1: endpoint@1 { 2678 reg = <1>; 2679 remote-endpoint = <&vin1csi40>; 2680 }; 2681 csi40vin2: endpoint@2 { 2682 reg = <2>; 2683 remote-endpoint = <&vin2csi40>; 2684 }; 2685 csi40vin3: endpoint@3 { 2686 reg = <3>; 2687 remote-endpoint = <&vin3csi40>; 2688 }; 2689 csi40vin4: endpoint@4 { 2690 reg = <4>; 2691 remote-endpoint = <&vin4csi40>; 2692 }; 2693 csi40vin5: endpoint@5 { 2694 reg = <5>; 2695 remote-endpoint = <&vin5csi40>; 2696 }; 2697 csi40vin6: endpoint@6 { 2698 reg = <6>; 2699 remote-endpoint = <&vin6csi40>; 2700 }; 2701 csi40vin7: endpoint@7 { 2702 reg = <7>; 2703 remote-endpoint = <&vin7csi40>; 2704 }; 2705 }; 2706 }; 2707 }; 2708 2709 hdmi0: hdmi@fead0000 { 2710 compatible = "renesas,r8a77965-hdmi", 2711 "renesas,rcar-gen3-hdmi"; 2712 reg = <0 0xfead0000 0 0x10000>; 2713 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2714 clocks = <&cpg CPG_MOD 729>, 2715 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2716 clock-names = "iahb", "isfr"; 2717 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2718 resets = <&cpg 729>; 2719 status = "disabled"; 2720 2721 ports { 2722 #address-cells = <1>; 2723 #size-cells = <0>; 2724 port@0 { 2725 reg = <0>; 2726 dw_hdmi0_in: endpoint { 2727 remote-endpoint = <&du_out_hdmi0>; 2728 }; 2729 }; 2730 port@1 { 2731 reg = <1>; 2732 }; 2733 }; 2734 }; 2735 2736 du: display@feb00000 { 2737 compatible = "renesas,du-r8a77965"; 2738 reg = <0 0xfeb00000 0 0x80000>; 2739 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2740 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2741 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2742 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2743 <&cpg CPG_MOD 721>; 2744 clock-names = "du.0", "du.1", "du.3"; 2745 resets = <&cpg 724>, <&cpg 722>; 2746 reset-names = "du.0", "du.3"; 2747 2748 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; 2749 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2750 2751 status = "disabled"; 2752 2753 ports { 2754 #address-cells = <1>; 2755 #size-cells = <0>; 2756 2757 port@0 { 2758 reg = <0>; 2759 }; 2760 port@1 { 2761 reg = <1>; 2762 du_out_hdmi0: endpoint { 2763 remote-endpoint = <&dw_hdmi0_in>; 2764 }; 2765 }; 2766 port@2 { 2767 reg = <2>; 2768 du_out_lvds0: endpoint { 2769 remote-endpoint = <&lvds0_in>; 2770 }; 2771 }; 2772 }; 2773 }; 2774 2775 lvds0: lvds@feb90000 { 2776 compatible = "renesas,r8a77965-lvds"; 2777 reg = <0 0xfeb90000 0 0x14>; 2778 clocks = <&cpg CPG_MOD 727>; 2779 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2780 resets = <&cpg 727>; 2781 status = "disabled"; 2782 2783 ports { 2784 #address-cells = <1>; 2785 #size-cells = <0>; 2786 2787 port@0 { 2788 reg = <0>; 2789 lvds0_in: endpoint { 2790 remote-endpoint = <&du_out_lvds0>; 2791 }; 2792 }; 2793 port@1 { 2794 reg = <1>; 2795 }; 2796 }; 2797 }; 2798 2799 prr: chipid@fff00044 { 2800 compatible = "renesas,prr"; 2801 reg = <0 0xfff00044 0 4>; 2802 }; 2803 }; 2804 2805 thermal-zones { 2806 sensor1_thermal: sensor1-thermal { 2807 polling-delay-passive = <250>; 2808 polling-delay = <1000>; 2809 thermal-sensors = <&tsc 0>; 2810 sustainable-power = <2439>; 2811 2812 trips { 2813 sensor1_crit: sensor1-crit { 2814 temperature = <120000>; 2815 hysteresis = <1000>; 2816 type = "critical"; 2817 }; 2818 }; 2819 }; 2820 2821 sensor2_thermal: sensor2-thermal { 2822 polling-delay-passive = <250>; 2823 polling-delay = <1000>; 2824 thermal-sensors = <&tsc 1>; 2825 sustainable-power = <2439>; 2826 2827 trips { 2828 sensor2_crit: sensor2-crit { 2829 temperature = <120000>; 2830 hysteresis = <1000>; 2831 type = "critical"; 2832 }; 2833 }; 2834 }; 2835 2836 sensor3_thermal: sensor3-thermal { 2837 polling-delay-passive = <250>; 2838 polling-delay = <1000>; 2839 thermal-sensors = <&tsc 2>; 2840 sustainable-power = <2439>; 2841 2842 trips { 2843 target: trip-point1 { 2844 /* miliCelsius */ 2845 temperature = <100000>; 2846 hysteresis = <1000>; 2847 type = "passive"; 2848 }; 2849 2850 sensor3_crit: sensor3-crit { 2851 temperature = <120000>; 2852 hysteresis = <1000>; 2853 type = "critical"; 2854 }; 2855 }; 2856 2857 cooling-maps { 2858 map0 { 2859 trip = <&target>; 2860 cooling-device = <&a57_0 2 4>; 2861 contribution = <1024>; 2862 }; 2863 }; 2864 }; 2865 }; 2866 2867 timer { 2868 compatible = "arm,armv8-timer"; 2869 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2870 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2871 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2872 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2873 }; 2874 2875 /* External USB clocks - can be overridden by the board */ 2876 usb3s0_clk: usb3s0 { 2877 compatible = "fixed-clock"; 2878 #clock-cells = <0>; 2879 clock-frequency = <0>; 2880 }; 2881 2882 usb_extal_clk: usb_extal { 2883 compatible = "fixed-clock"; 2884 #clock-cells = <0>; 2885 clock-frequency = <0>; 2886 }; 2887}; 2888