1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a77965 SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I 10 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cpus { 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 a57_0: cpu@0 { 68 compatible = "arm,cortex-a57", "arm,armv8"; 69 reg = <0x0>; 70 device_type = "cpu"; 71 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 72 next-level-cache = <&L2_CA57>; 73 enable-method = "psci"; 74 }; 75 76 a57_1: cpu@1 { 77 compatible = "arm,cortex-a57", "arm,armv8"; 78 reg = <0x1>; 79 device_type = "cpu"; 80 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 81 next-level-cache = <&L2_CA57>; 82 enable-method = "psci"; 83 }; 84 85 L2_CA57: cache-controller-0 { 86 compatible = "cache"; 87 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 88 cache-unified; 89 cache-level = <2>; 90 }; 91 }; 92 93 extal_clk: extal { 94 compatible = "fixed-clock"; 95 #clock-cells = <0>; 96 /* This value must be overridden by the board */ 97 clock-frequency = <0>; 98 }; 99 100 extalr_clk: extalr { 101 compatible = "fixed-clock"; 102 #clock-cells = <0>; 103 /* This value must be overridden by the board */ 104 clock-frequency = <0>; 105 }; 106 107 /* External PCIe clock - can be overridden by the board */ 108 pcie_bus_clk: pcie_bus { 109 compatible = "fixed-clock"; 110 #clock-cells = <0>; 111 clock-frequency = <0>; 112 }; 113 114 pmu_a57 { 115 compatible = "arm,cortex-a57-pmu"; 116 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 117 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 118 interrupt-affinity = <&a57_0>, 119 <&a57_1>; 120 }; 121 122 psci { 123 compatible = "arm,psci-1.0", "arm,psci-0.2"; 124 method = "smc"; 125 }; 126 127 /* External SCIF clock - to be overridden by boards that provide it */ 128 scif_clk: scif { 129 compatible = "fixed-clock"; 130 #clock-cells = <0>; 131 clock-frequency = <0>; 132 }; 133 134 soc { 135 compatible = "simple-bus"; 136 interrupt-parent = <&gic>; 137 #address-cells = <2>; 138 #size-cells = <2>; 139 ranges; 140 141 wdt0: watchdog@e6020000 { 142 reg = <0 0xe6020000 0 0x0c>; 143 /* placeholder */ 144 }; 145 146 gpio0: gpio@e6050000 { 147 compatible = "renesas,gpio-r8a77965", 148 "renesas,rcar-gen3-gpio"; 149 reg = <0 0xe6050000 0 0x50>; 150 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 151 #gpio-cells = <2>; 152 gpio-controller; 153 gpio-ranges = <&pfc 0 0 16>; 154 #interrupt-cells = <2>; 155 interrupt-controller; 156 clocks = <&cpg CPG_MOD 912>; 157 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 158 resets = <&cpg 912>; 159 }; 160 161 gpio1: gpio@e6051000 { 162 compatible = "renesas,gpio-r8a77965", 163 "renesas,rcar-gen3-gpio"; 164 reg = <0 0xe6051000 0 0x50>; 165 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 166 #gpio-cells = <2>; 167 gpio-controller; 168 gpio-ranges = <&pfc 0 32 29>; 169 #interrupt-cells = <2>; 170 interrupt-controller; 171 clocks = <&cpg CPG_MOD 911>; 172 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 173 resets = <&cpg 911>; 174 }; 175 176 gpio2: gpio@e6052000 { 177 compatible = "renesas,gpio-r8a77965", 178 "renesas,rcar-gen3-gpio"; 179 reg = <0 0xe6052000 0 0x50>; 180 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 181 #gpio-cells = <2>; 182 gpio-controller; 183 gpio-ranges = <&pfc 0 64 15>; 184 #interrupt-cells = <2>; 185 interrupt-controller; 186 clocks = <&cpg CPG_MOD 910>; 187 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 188 resets = <&cpg 910>; 189 }; 190 191 gpio3: gpio@e6053000 { 192 compatible = "renesas,gpio-r8a77965", 193 "renesas,rcar-gen3-gpio"; 194 reg = <0 0xe6053000 0 0x50>; 195 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 196 #gpio-cells = <2>; 197 gpio-controller; 198 gpio-ranges = <&pfc 0 96 16>; 199 #interrupt-cells = <2>; 200 interrupt-controller; 201 clocks = <&cpg CPG_MOD 909>; 202 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 203 resets = <&cpg 909>; 204 }; 205 206 gpio4: gpio@e6054000 { 207 compatible = "renesas,gpio-r8a77965", 208 "renesas,rcar-gen3-gpio"; 209 reg = <0 0xe6054000 0 0x50>; 210 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 211 #gpio-cells = <2>; 212 gpio-controller; 213 gpio-ranges = <&pfc 0 128 18>; 214 #interrupt-cells = <2>; 215 interrupt-controller; 216 clocks = <&cpg CPG_MOD 908>; 217 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 218 resets = <&cpg 908>; 219 }; 220 221 gpio5: gpio@e6055000 { 222 compatible = "renesas,gpio-r8a77965", 223 "renesas,rcar-gen3-gpio"; 224 reg = <0 0xe6055000 0 0x50>; 225 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 226 #gpio-cells = <2>; 227 gpio-controller; 228 gpio-ranges = <&pfc 0 160 26>; 229 #interrupt-cells = <2>; 230 interrupt-controller; 231 clocks = <&cpg CPG_MOD 907>; 232 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 233 resets = <&cpg 907>; 234 }; 235 236 gpio6: gpio@e6055400 { 237 compatible = "renesas,gpio-r8a77965", 238 "renesas,rcar-gen3-gpio"; 239 reg = <0 0xe6055400 0 0x50>; 240 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 241 #gpio-cells = <2>; 242 gpio-controller; 243 gpio-ranges = <&pfc 0 192 32>; 244 #interrupt-cells = <2>; 245 interrupt-controller; 246 clocks = <&cpg CPG_MOD 906>; 247 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 248 resets = <&cpg 906>; 249 }; 250 251 gpio7: gpio@e6055800 { 252 compatible = "renesas,gpio-r8a77965", 253 "renesas,rcar-gen3-gpio"; 254 reg = <0 0xe6055800 0 0x50>; 255 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 256 #gpio-cells = <2>; 257 gpio-controller; 258 gpio-ranges = <&pfc 0 224 4>; 259 #interrupt-cells = <2>; 260 interrupt-controller; 261 clocks = <&cpg CPG_MOD 905>; 262 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 263 resets = <&cpg 905>; 264 }; 265 266 pfc: pin-controller@e6060000 { 267 compatible = "renesas,pfc-r8a77965"; 268 reg = <0 0xe6060000 0 0x50c>; 269 }; 270 271 cpg: clock-controller@e6150000 { 272 compatible = "renesas,r8a77965-cpg-mssr"; 273 reg = <0 0xe6150000 0 0x1000>; 274 clocks = <&extal_clk>, <&extalr_clk>; 275 clock-names = "extal", "extalr"; 276 #clock-cells = <2>; 277 #power-domain-cells = <0>; 278 #reset-cells = <1>; 279 }; 280 281 rst: reset-controller@e6160000 { 282 compatible = "renesas,r8a77965-rst"; 283 reg = <0 0xe6160000 0 0x0200>; 284 }; 285 286 sysc: system-controller@e6180000 { 287 compatible = "renesas,r8a77965-sysc"; 288 reg = <0 0xe6180000 0 0x0400>; 289 #power-domain-cells = <1>; 290 }; 291 292 tsc: thermal@e6198000 { 293 compatible = "renesas,r8a77965-thermal"; 294 reg = <0 0xe6198000 0 0x100>, 295 <0 0xe61a0000 0 0x100>, 296 <0 0xe61a8000 0 0x100>; 297 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 300 clocks = <&cpg CPG_MOD 522>; 301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 302 resets = <&cpg 522>; 303 #thermal-sensor-cells = <1>; 304 status = "okay"; 305 }; 306 307 intc_ex: interrupt-controller@e61c0000 { 308 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 309 #interrupt-cells = <2>; 310 interrupt-controller; 311 reg = <0 0xe61c0000 0 0x200>; 312 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 313 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 314 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 315 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 316 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 317 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 318 clocks = <&cpg CPG_MOD 407>; 319 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 320 resets = <&cpg 407>; 321 }; 322 323 i2c0: i2c@e6500000 { 324 #address-cells = <1>; 325 #size-cells = <0>; 326 compatible = "renesas,i2c-r8a77965", 327 "renesas,rcar-gen3-i2c"; 328 reg = <0 0xe6500000 0 0x40>; 329 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 330 clocks = <&cpg CPG_MOD 931>; 331 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 332 resets = <&cpg 931>; 333 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 334 <&dmac2 0x91>, <&dmac2 0x90>; 335 dma-names = "tx", "rx", "tx", "rx"; 336 i2c-scl-internal-delay-ns = <110>; 337 status = "disabled"; 338 }; 339 340 i2c1: i2c@e6508000 { 341 #address-cells = <1>; 342 #size-cells = <0>; 343 compatible = "renesas,i2c-r8a77965", 344 "renesas,rcar-gen3-i2c"; 345 reg = <0 0xe6508000 0 0x40>; 346 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 347 clocks = <&cpg CPG_MOD 930>; 348 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 349 resets = <&cpg 930>; 350 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 351 <&dmac2 0x93>, <&dmac2 0x92>; 352 dma-names = "tx", "rx", "tx", "rx"; 353 i2c-scl-internal-delay-ns = <6>; 354 status = "disabled"; 355 }; 356 357 i2c2: i2c@e6510000 { 358 #address-cells = <1>; 359 #size-cells = <0>; 360 compatible = "renesas,i2c-r8a77965", 361 "renesas,rcar-gen3-i2c"; 362 reg = <0 0xe6510000 0 0x40>; 363 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 364 clocks = <&cpg CPG_MOD 929>; 365 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 366 resets = <&cpg 929>; 367 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 368 <&dmac2 0x95>, <&dmac2 0x94>; 369 dma-names = "tx", "rx", "tx", "rx"; 370 i2c-scl-internal-delay-ns = <6>; 371 status = "disabled"; 372 }; 373 374 i2c3: i2c@e66d0000 { 375 #address-cells = <1>; 376 #size-cells = <0>; 377 compatible = "renesas,i2c-r8a77965", 378 "renesas,rcar-gen3-i2c"; 379 reg = <0 0xe66d0000 0 0x40>; 380 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 381 clocks = <&cpg CPG_MOD 928>; 382 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 383 resets = <&cpg 928>; 384 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 385 dma-names = "tx", "rx"; 386 i2c-scl-internal-delay-ns = <110>; 387 status = "disabled"; 388 }; 389 390 i2c4: i2c@e66d8000 { 391 #address-cells = <1>; 392 #size-cells = <0>; 393 compatible = "renesas,i2c-r8a77965", 394 "renesas,rcar-gen3-i2c"; 395 reg = <0 0xe66d8000 0 0x40>; 396 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 397 clocks = <&cpg CPG_MOD 927>; 398 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 399 resets = <&cpg 927>; 400 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 401 dma-names = "tx", "rx"; 402 i2c-scl-internal-delay-ns = <110>; 403 status = "disabled"; 404 }; 405 406 i2c5: i2c@e66e0000 { 407 #address-cells = <1>; 408 #size-cells = <0>; 409 compatible = "renesas,i2c-r8a77965", 410 "renesas,rcar-gen3-i2c"; 411 reg = <0 0xe66e0000 0 0x40>; 412 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 413 clocks = <&cpg CPG_MOD 919>; 414 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 415 resets = <&cpg 919>; 416 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 417 dma-names = "tx", "rx"; 418 i2c-scl-internal-delay-ns = <110>; 419 status = "disabled"; 420 }; 421 422 i2c6: i2c@e66e8000 { 423 #address-cells = <1>; 424 #size-cells = <0>; 425 compatible = "renesas,i2c-r8a77965", 426 "renesas,rcar-gen3-i2c"; 427 reg = <0 0xe66e8000 0 0x40>; 428 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 429 clocks = <&cpg CPG_MOD 918>; 430 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 431 resets = <&cpg 918>; 432 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 433 dma-names = "tx", "rx"; 434 i2c-scl-internal-delay-ns = <6>; 435 status = "disabled"; 436 }; 437 438 i2c_dvfs: i2c@e60b0000 { 439 #address-cells = <1>; 440 #size-cells = <0>; 441 compatible = "renesas,iic-r8a77965", 442 "renesas,rcar-gen3-iic", 443 "renesas,rmobile-iic"; 444 reg = <0 0xe60b0000 0 0x425>; 445 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 446 clocks = <&cpg CPG_MOD 926>; 447 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 448 resets = <&cpg 926>; 449 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 450 dma-names = "tx", "rx"; 451 status = "disabled"; 452 }; 453 454 hsusb: usb@e6590000 { 455 compatible = "renesas,usbhs-r8a7796", 456 "renesas,rcar-gen3-usbhs"; 457 reg = <0 0xe6590000 0 0x100>; 458 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 459 clocks = <&cpg CPG_MOD 704>; 460 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 461 <&usb_dmac1 0>, <&usb_dmac1 1>; 462 dma-names = "ch0", "ch1", "ch2", "ch3"; 463 renesas,buswait = <11>; 464 phys = <&usb2_phy0>; 465 phy-names = "usb"; 466 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 467 resets = <&cpg 704>; 468 status = "disabled"; 469 }; 470 471 usb_dmac0: dma-controller@e65a0000 { 472 compatible = "renesas,r8a77965-usb-dmac", 473 "renesas,usb-dmac"; 474 reg = <0 0xe65a0000 0 0x100>; 475 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 476 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 477 interrupt-names = "ch0", "ch1"; 478 clocks = <&cpg CPG_MOD 330>; 479 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 480 resets = <&cpg 330>; 481 #dma-cells = <1>; 482 dma-channels = <2>; 483 }; 484 485 usb_dmac1: dma-controller@e65b0000 { 486 compatible = "renesas,r8a77965-usb-dmac", 487 "renesas,usb-dmac"; 488 reg = <0 0xe65b0000 0 0x100>; 489 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 490 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 491 interrupt-names = "ch0", "ch1"; 492 clocks = <&cpg CPG_MOD 331>; 493 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 494 resets = <&cpg 331>; 495 #dma-cells = <1>; 496 dma-channels = <2>; 497 }; 498 499 usb3_phy0: usb-phy@e65ee000 { 500 compatible = "renesas,r8a77965-usb3-phy", 501 "renesas,rcar-gen3-usb3-phy"; 502 reg = <0 0xe65ee000 0 0x90>; 503 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 504 <&usb_extal_clk>; 505 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 506 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 507 resets = <&cpg 328>; 508 #phy-cells = <0>; 509 status = "disabled"; 510 }; 511 512 dmac0: dma-controller@e6700000 { 513 compatible = "renesas,dmac-r8a77965", 514 "renesas,rcar-dmac"; 515 reg = <0 0xe6700000 0 0x10000>; 516 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 517 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 518 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 519 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 520 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 521 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 522 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 523 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 524 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 525 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 526 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 527 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 528 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 529 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 530 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 531 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 532 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 533 interrupt-names = "error", 534 "ch0", "ch1", "ch2", "ch3", 535 "ch4", "ch5", "ch6", "ch7", 536 "ch8", "ch9", "ch10", "ch11", 537 "ch12", "ch13", "ch14", "ch15"; 538 clocks = <&cpg CPG_MOD 219>; 539 clock-names = "fck"; 540 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 541 resets = <&cpg 219>; 542 #dma-cells = <1>; 543 dma-channels = <16>; 544 }; 545 546 dmac1: dma-controller@e7300000 { 547 compatible = "renesas,dmac-r8a77965", 548 "renesas,rcar-dmac"; 549 reg = <0 0xe7300000 0 0x10000>; 550 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 551 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 552 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 553 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 554 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 555 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 556 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 557 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 558 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 559 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 560 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 561 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 562 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 563 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 564 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 565 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 566 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 567 interrupt-names = "error", 568 "ch0", "ch1", "ch2", "ch3", 569 "ch4", "ch5", "ch6", "ch7", 570 "ch8", "ch9", "ch10", "ch11", 571 "ch12", "ch13", "ch14", "ch15"; 572 clocks = <&cpg CPG_MOD 218>; 573 clock-names = "fck"; 574 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 575 resets = <&cpg 218>; 576 #dma-cells = <1>; 577 dma-channels = <16>; 578 }; 579 580 dmac2: dma-controller@e7310000 { 581 compatible = "renesas,dmac-r8a77965", 582 "renesas,rcar-dmac"; 583 reg = <0 0xe7310000 0 0x10000>; 584 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 585 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 586 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 587 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 588 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 589 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 590 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 591 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 592 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 593 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 594 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 595 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 596 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 597 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 598 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 599 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 600 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 601 interrupt-names = "error", 602 "ch0", "ch1", "ch2", "ch3", 603 "ch4", "ch5", "ch6", "ch7", 604 "ch8", "ch9", "ch10", "ch11", 605 "ch12", "ch13", "ch14", "ch15"; 606 clocks = <&cpg CPG_MOD 217>; 607 clock-names = "fck"; 608 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 609 resets = <&cpg 217>; 610 #dma-cells = <1>; 611 dma-channels = <16>; 612 }; 613 614 avb: ethernet@e6800000 { 615 compatible = "renesas,etheravb-r8a77965", 616 "renesas,etheravb-rcar-gen3"; 617 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 618 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 619 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 620 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 621 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 622 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 623 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 624 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 626 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 628 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 629 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 630 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 631 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 632 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 633 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 634 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 635 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 636 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 637 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 638 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 639 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 643 interrupt-names = "ch0", "ch1", "ch2", "ch3", 644 "ch4", "ch5", "ch6", "ch7", 645 "ch8", "ch9", "ch10", "ch11", 646 "ch12", "ch13", "ch14", "ch15", 647 "ch16", "ch17", "ch18", "ch19", 648 "ch20", "ch21", "ch22", "ch23", 649 "ch24"; 650 clocks = <&cpg CPG_MOD 812>; 651 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 652 resets = <&cpg 812>; 653 phy-mode = "rgmii"; 654 #address-cells = <1>; 655 #size-cells = <0>; 656 status = "disabled"; 657 }; 658 659 pwm0: pwm@e6e30000 { 660 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 661 reg = <0 0xe6e30000 0 8>; 662 #pwm-cells = <2>; 663 clocks = <&cpg CPG_MOD 523>; 664 resets = <&cpg 523>; 665 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 666 status = "disabled"; 667 }; 668 669 pwm1: pwm@e6e31000 { 670 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 671 reg = <0 0xe6e31000 0 8>; 672 #pwm-cells = <2>; 673 clocks = <&cpg CPG_MOD 523>; 674 resets = <&cpg 523>; 675 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 676 status = "disabled"; 677 }; 678 679 pwm2: pwm@e6e32000 { 680 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 681 reg = <0 0xe6e32000 0 8>; 682 #pwm-cells = <2>; 683 clocks = <&cpg CPG_MOD 523>; 684 resets = <&cpg 523>; 685 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 686 status = "disabled"; 687 }; 688 689 pwm3: pwm@e6e33000 { 690 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 691 reg = <0 0xe6e33000 0 8>; 692 #pwm-cells = <2>; 693 clocks = <&cpg CPG_MOD 523>; 694 resets = <&cpg 523>; 695 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 696 status = "disabled"; 697 }; 698 699 pwm4: pwm@e6e34000 { 700 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 701 reg = <0 0xe6e34000 0 8>; 702 #pwm-cells = <2>; 703 clocks = <&cpg CPG_MOD 523>; 704 resets = <&cpg 523>; 705 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 706 status = "disabled"; 707 }; 708 709 pwm5: pwm@e6e35000 { 710 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 711 reg = <0 0xe6e35000 0 8>; 712 #pwm-cells = <2>; 713 clocks = <&cpg CPG_MOD 523>; 714 resets = <&cpg 523>; 715 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 716 status = "disabled"; 717 }; 718 719 pwm6: pwm@e6e36000 { 720 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 721 reg = <0 0xe6e36000 0 8>; 722 #pwm-cells = <2>; 723 clocks = <&cpg CPG_MOD 523>; 724 resets = <&cpg 523>; 725 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 726 status = "disabled"; 727 }; 728 729 scif0: serial@e6e60000 { 730 compatible = "renesas,scif-r8a77965", 731 "renesas,rcar-gen3-scif", "renesas,scif"; 732 reg = <0 0xe6e60000 0 64>; 733 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 734 clocks = <&cpg CPG_MOD 207>, 735 <&cpg CPG_CORE 20>, 736 <&scif_clk>; 737 clock-names = "fck", "brg_int", "scif_clk"; 738 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 739 <&dmac2 0x51>, <&dmac2 0x50>; 740 dma-names = "tx", "rx", "tx", "rx"; 741 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 742 resets = <&cpg 207>; 743 status = "disabled"; 744 }; 745 746 scif1: serial@e6e68000 { 747 compatible = "renesas,scif-r8a77965", 748 "renesas,rcar-gen3-scif", "renesas,scif"; 749 reg = <0 0xe6e68000 0 64>; 750 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 751 clocks = <&cpg CPG_MOD 206>, 752 <&cpg CPG_CORE 20>, 753 <&scif_clk>; 754 clock-names = "fck", "brg_int", "scif_clk"; 755 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 756 <&dmac2 0x53>, <&dmac2 0x52>; 757 dma-names = "tx", "rx", "tx", "rx"; 758 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 759 resets = <&cpg 206>; 760 status = "disabled"; 761 }; 762 763 scif2: serial@e6e88000 { 764 compatible = "renesas,scif-r8a77965", 765 "renesas,rcar-gen3-scif", "renesas,scif"; 766 reg = <0 0xe6e88000 0 64>; 767 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 768 clocks = <&cpg CPG_MOD 310>, 769 <&cpg CPG_CORE 20>, 770 <&scif_clk>; 771 clock-names = "fck", "brg_int", "scif_clk"; 772 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 773 resets = <&cpg 310>; 774 status = "disabled"; 775 }; 776 777 scif3: serial@e6c50000 { 778 compatible = "renesas,scif-r8a77965", 779 "renesas,rcar-gen3-scif", "renesas,scif"; 780 reg = <0 0xe6c50000 0 64>; 781 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 782 clocks = <&cpg CPG_MOD 204>, 783 <&cpg CPG_CORE 20>, 784 <&scif_clk>; 785 clock-names = "fck", "brg_int", "scif_clk"; 786 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 787 dma-names = "tx", "rx"; 788 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 789 resets = <&cpg 204>; 790 status = "disabled"; 791 }; 792 793 scif4: serial@e6c40000 { 794 compatible = "renesas,scif-r8a77965", 795 "renesas,rcar-gen3-scif", "renesas,scif"; 796 reg = <0 0xe6c40000 0 64>; 797 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 798 clocks = <&cpg CPG_MOD 203>, 799 <&cpg CPG_CORE 20>, 800 <&scif_clk>; 801 clock-names = "fck", "brg_int", "scif_clk"; 802 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 803 dma-names = "tx", "rx"; 804 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 805 resets = <&cpg 203>; 806 status = "disabled"; 807 }; 808 809 scif5: serial@e6f30000 { 810 compatible = "renesas,scif-r8a77965", 811 "renesas,rcar-gen3-scif", "renesas,scif"; 812 reg = <0 0xe6f30000 0 64>; 813 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 814 clocks = <&cpg CPG_MOD 202>, 815 <&cpg CPG_CORE 20>, 816 <&scif_clk>; 817 clock-names = "fck", "brg_int", "scif_clk"; 818 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 819 <&dmac2 0x5b>, <&dmac2 0x5a>; 820 dma-names = "tx", "rx", "tx", "rx"; 821 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 822 resets = <&cpg 202>; 823 status = "disabled"; 824 }; 825 826 msiof0: spi@e6e90000 { 827 compatible = "renesas,msiof-r8a77965", 828 "renesas,rcar-gen3-msiof"; 829 reg = <0 0xe6e90000 0 0x0064>; 830 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 831 clocks = <&cpg CPG_MOD 211>; 832 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 833 <&dmac2 0x41>, <&dmac2 0x40>; 834 dma-names = "tx", "rx", "tx", "rx"; 835 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 836 resets = <&cpg 211>; 837 #address-cells = <1>; 838 #size-cells = <0>; 839 status = "disabled"; 840 }; 841 842 msiof1: spi@e6ea0000 { 843 compatible = "renesas,msiof-r8a77965", 844 "renesas,rcar-gen3-msiof"; 845 reg = <0 0xe6ea0000 0 0x0064>; 846 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 847 clocks = <&cpg CPG_MOD 210>; 848 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 849 <&dmac2 0x43>, <&dmac2 0x42>; 850 dma-names = "tx", "rx", "tx", "rx"; 851 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 852 resets = <&cpg 210>; 853 #address-cells = <1>; 854 #size-cells = <0>; 855 status = "disabled"; 856 }; 857 858 msiof2: spi@e6c00000 { 859 compatible = "renesas,msiof-r8a77965", 860 "renesas,rcar-gen3-msiof"; 861 reg = <0 0xe6c00000 0 0x0064>; 862 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 863 clocks = <&cpg CPG_MOD 209>; 864 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 865 dma-names = "tx", "rx"; 866 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 867 resets = <&cpg 209>; 868 #address-cells = <1>; 869 #size-cells = <0>; 870 status = "disabled"; 871 }; 872 873 msiof3: spi@e6c10000 { 874 compatible = "renesas,msiof-r8a77965", 875 "renesas,rcar-gen3-msiof"; 876 reg = <0 0xe6c10000 0 0x0064>; 877 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 878 clocks = <&cpg CPG_MOD 208>; 879 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 880 dma-names = "tx", "rx"; 881 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 882 resets = <&cpg 208>; 883 #address-cells = <1>; 884 #size-cells = <0>; 885 status = "disabled"; 886 }; 887 888 vin0: video@e6ef0000 { 889 compatible = "renesas,vin-r8a77965"; 890 reg = <0 0xe6ef0000 0 0x1000>; 891 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 892 clocks = <&cpg CPG_MOD 811>; 893 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 894 resets = <&cpg 811>; 895 renesas,id = <0>; 896 status = "disabled"; 897 898 ports { 899 #address-cells = <1>; 900 #size-cells = <0>; 901 902 port@1 { 903 #address-cells = <1>; 904 #size-cells = <0>; 905 906 reg = <1>; 907 908 vin0csi20: endpoint@0 { 909 reg = <0>; 910 remote-endpoint= <&csi20vin0>; 911 }; 912 vin0csi40: endpoint@2 { 913 reg = <2>; 914 remote-endpoint= <&csi40vin0>; 915 }; 916 }; 917 }; 918 }; 919 920 vin1: video@e6ef1000 { 921 compatible = "renesas,vin-r8a77965"; 922 reg = <0 0xe6ef1000 0 0x1000>; 923 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 924 clocks = <&cpg CPG_MOD 810>; 925 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 926 resets = <&cpg 810>; 927 renesas,id = <1>; 928 status = "disabled"; 929 930 ports { 931 #address-cells = <1>; 932 #size-cells = <0>; 933 934 port@1 { 935 #address-cells = <1>; 936 #size-cells = <0>; 937 938 reg = <1>; 939 940 vin1csi20: endpoint@0 { 941 reg = <0>; 942 remote-endpoint= <&csi20vin1>; 943 }; 944 vin1csi40: endpoint@2 { 945 reg = <2>; 946 remote-endpoint= <&csi40vin1>; 947 }; 948 }; 949 }; 950 }; 951 952 vin2: video@e6ef2000 { 953 compatible = "renesas,vin-r8a77965"; 954 reg = <0 0xe6ef2000 0 0x1000>; 955 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 956 clocks = <&cpg CPG_MOD 809>; 957 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 958 resets = <&cpg 809>; 959 renesas,id = <2>; 960 status = "disabled"; 961 962 ports { 963 #address-cells = <1>; 964 #size-cells = <0>; 965 966 port@1 { 967 #address-cells = <1>; 968 #size-cells = <0>; 969 970 reg = <1>; 971 972 vin2csi20: endpoint@0 { 973 reg = <0>; 974 remote-endpoint= <&csi20vin2>; 975 }; 976 vin2csi40: endpoint@2 { 977 reg = <2>; 978 remote-endpoint= <&csi40vin2>; 979 }; 980 }; 981 }; 982 }; 983 984 vin3: video@e6ef3000 { 985 compatible = "renesas,vin-r8a77965"; 986 reg = <0 0xe6ef3000 0 0x1000>; 987 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 988 clocks = <&cpg CPG_MOD 808>; 989 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 990 resets = <&cpg 808>; 991 renesas,id = <3>; 992 status = "disabled"; 993 994 ports { 995 #address-cells = <1>; 996 #size-cells = <0>; 997 998 port@1 { 999 #address-cells = <1>; 1000 #size-cells = <0>; 1001 1002 reg = <1>; 1003 1004 vin3csi20: endpoint@0 { 1005 reg = <0>; 1006 remote-endpoint= <&csi20vin3>; 1007 }; 1008 vin3csi40: endpoint@2 { 1009 reg = <2>; 1010 remote-endpoint= <&csi40vin3>; 1011 }; 1012 }; 1013 }; 1014 }; 1015 1016 vin4: video@e6ef4000 { 1017 compatible = "renesas,vin-r8a77965"; 1018 reg = <0 0xe6ef4000 0 0x1000>; 1019 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1020 clocks = <&cpg CPG_MOD 807>; 1021 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1022 resets = <&cpg 807>; 1023 renesas,id = <4>; 1024 status = "disabled"; 1025 1026 ports { 1027 #address-cells = <1>; 1028 #size-cells = <0>; 1029 1030 port@1 { 1031 #address-cells = <1>; 1032 #size-cells = <0>; 1033 1034 reg = <1>; 1035 1036 vin4csi20: endpoint@0 { 1037 reg = <0>; 1038 remote-endpoint= <&csi20vin4>; 1039 }; 1040 vin4csi40: endpoint@2 { 1041 reg = <2>; 1042 remote-endpoint= <&csi40vin4>; 1043 }; 1044 }; 1045 }; 1046 }; 1047 1048 vin5: video@e6ef5000 { 1049 compatible = "renesas,vin-r8a77965"; 1050 reg = <0 0xe6ef5000 0 0x1000>; 1051 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1052 clocks = <&cpg CPG_MOD 806>; 1053 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1054 resets = <&cpg 806>; 1055 renesas,id = <5>; 1056 status = "disabled"; 1057 1058 ports { 1059 #address-cells = <1>; 1060 #size-cells = <0>; 1061 1062 port@1 { 1063 #address-cells = <1>; 1064 #size-cells = <0>; 1065 1066 reg = <1>; 1067 1068 vin5csi20: endpoint@0 { 1069 reg = <0>; 1070 remote-endpoint= <&csi20vin5>; 1071 }; 1072 vin5csi40: endpoint@2 { 1073 reg = <2>; 1074 remote-endpoint= <&csi40vin5>; 1075 }; 1076 }; 1077 }; 1078 }; 1079 1080 vin6: video@e6ef6000 { 1081 compatible = "renesas,vin-r8a77965"; 1082 reg = <0 0xe6ef6000 0 0x1000>; 1083 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1084 clocks = <&cpg CPG_MOD 805>; 1085 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1086 resets = <&cpg 805>; 1087 renesas,id = <6>; 1088 status = "disabled"; 1089 1090 ports { 1091 #address-cells = <1>; 1092 #size-cells = <0>; 1093 1094 port@1 { 1095 #address-cells = <1>; 1096 #size-cells = <0>; 1097 1098 reg = <1>; 1099 1100 vin6csi20: endpoint@0 { 1101 reg = <0>; 1102 remote-endpoint= <&csi20vin6>; 1103 }; 1104 vin6csi40: endpoint@2 { 1105 reg = <2>; 1106 remote-endpoint= <&csi40vin6>; 1107 }; 1108 }; 1109 }; 1110 }; 1111 1112 vin7: video@e6ef7000 { 1113 compatible = "renesas,vin-r8a77965"; 1114 reg = <0 0xe6ef7000 0 0x1000>; 1115 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1116 clocks = <&cpg CPG_MOD 804>; 1117 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1118 resets = <&cpg 804>; 1119 renesas,id = <7>; 1120 status = "disabled"; 1121 1122 ports { 1123 #address-cells = <1>; 1124 #size-cells = <0>; 1125 1126 port@1 { 1127 #address-cells = <1>; 1128 #size-cells = <0>; 1129 1130 reg = <1>; 1131 1132 vin7csi20: endpoint@0 { 1133 reg = <0>; 1134 remote-endpoint= <&csi20vin7>; 1135 }; 1136 vin7csi40: endpoint@2 { 1137 reg = <2>; 1138 remote-endpoint= <&csi40vin7>; 1139 }; 1140 }; 1141 }; 1142 }; 1143 1144 rcar_sound: sound@ec500000 { 1145 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1146 <0 0xec5a0000 0 0x100>, /* ADG */ 1147 <0 0xec540000 0 0x1000>, /* SSIU */ 1148 <0 0xec541000 0 0x280>, /* SSI */ 1149 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1150 /* placeholder */ 1151 1152 rcar_sound,dvc { 1153 dvc0: dvc-0 { 1154 }; 1155 dvc1: dvc-1 { 1156 }; 1157 }; 1158 1159 rcar_sound,src { 1160 src0: src-0 { 1161 }; 1162 src1: src-1 { 1163 }; 1164 }; 1165 1166 rcar_sound,ssi { 1167 ssi0: ssi-0 { 1168 }; 1169 ssi1: ssi-1 { 1170 }; 1171 }; 1172 1173 ports { 1174 #address-cells = <1>; 1175 #size-cells = <0>; 1176 port@0 { 1177 reg = <0>; 1178 }; 1179 }; 1180 }; 1181 1182 xhci0: usb@ee000000 { 1183 compatible = "renesas,xhci-r8a77965", 1184 "renesas,rcar-gen3-xhci"; 1185 reg = <0 0xee000000 0 0xc00>; 1186 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1187 clocks = <&cpg CPG_MOD 328>; 1188 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1189 resets = <&cpg 328>; 1190 status = "disabled"; 1191 }; 1192 1193 usb3_peri0: usb@ee020000 { 1194 compatible = "renesas,r8a77965-usb3-peri", 1195 "renesas,rcar-gen3-usb3-peri"; 1196 reg = <0 0xee020000 0 0x400>; 1197 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1198 clocks = <&cpg CPG_MOD 328>; 1199 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1200 resets = <&cpg 328>; 1201 status = "disabled"; 1202 }; 1203 1204 ohci0: usb@ee080000 { 1205 compatible = "generic-ohci"; 1206 reg = <0 0xee080000 0 0x100>; 1207 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1208 clocks = <&cpg CPG_MOD 703>; 1209 phys = <&usb2_phy0>; 1210 phy-names = "usb"; 1211 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1212 resets = <&cpg 703>; 1213 status = "disabled"; 1214 }; 1215 1216 ohci1: usb@ee0a0000 { 1217 compatible = "generic-ohci"; 1218 reg = <0 0xee0a0000 0 0x100>; 1219 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1220 clocks = <&cpg CPG_MOD 702>; 1221 phys = <&usb2_phy1>; 1222 phy-names = "usb"; 1223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1224 resets = <&cpg 702>; 1225 status = "disabled"; 1226 }; 1227 1228 ehci0: usb@ee080100 { 1229 compatible = "generic-ehci"; 1230 reg = <0 0xee080100 0 0x100>; 1231 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1232 clocks = <&cpg CPG_MOD 703>; 1233 phys = <&usb2_phy0>; 1234 phy-names = "usb"; 1235 companion = <&ohci0>; 1236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1237 resets = <&cpg 703>; 1238 status = "disabled"; 1239 }; 1240 1241 ehci1: usb@ee0a0100 { 1242 compatible = "generic-ehci"; 1243 reg = <0 0xee0a0100 0 0x100>; 1244 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1245 clocks = <&cpg CPG_MOD 702>; 1246 phys = <&usb2_phy1>; 1247 phy-names = "usb"; 1248 companion = <&ohci1>; 1249 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1250 resets = <&cpg 702>; 1251 status = "disabled"; 1252 }; 1253 1254 usb2_phy0: usb-phy@ee080200 { 1255 compatible = "renesas,usb2-phy-r8a77965", 1256 "renesas,rcar-gen3-usb2-phy"; 1257 reg = <0 0xee080200 0 0x700>; 1258 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1259 clocks = <&cpg CPG_MOD 703>; 1260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1261 resets = <&cpg 703>; 1262 #phy-cells = <0>; 1263 status = "disabled"; 1264 }; 1265 1266 usb2_phy1: usb-phy@ee0a0200 { 1267 compatible = "renesas,usb2-phy-r8a77965", 1268 "renesas,rcar-gen3-usb2-phy"; 1269 reg = <0 0xee0a0200 0 0x700>; 1270 clocks = <&cpg CPG_MOD 703>; 1271 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1272 resets = <&cpg 703>; 1273 #phy-cells = <0>; 1274 status = "disabled"; 1275 }; 1276 1277 sdhi0: sd@ee100000 { 1278 compatible = "renesas,sdhi-r8a77965", 1279 "renesas,rcar-gen3-sdhi"; 1280 reg = <0 0xee100000 0 0x2000>; 1281 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1282 clocks = <&cpg CPG_MOD 314>; 1283 max-frequency = <200000000>; 1284 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1285 resets = <&cpg 314>; 1286 status = "disabled"; 1287 }; 1288 1289 sdhi1: sd@ee120000 { 1290 compatible = "renesas,sdhi-r8a77965", 1291 "renesas,rcar-gen3-sdhi"; 1292 reg = <0 0xee120000 0 0x2000>; 1293 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1294 clocks = <&cpg CPG_MOD 313>; 1295 max-frequency = <200000000>; 1296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1297 resets = <&cpg 313>; 1298 status = "disabled"; 1299 }; 1300 1301 sdhi2: sd@ee140000 { 1302 compatible = "renesas,sdhi-r8a77965", 1303 "renesas,rcar-gen3-sdhi"; 1304 reg = <0 0xee140000 0 0x2000>; 1305 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1306 clocks = <&cpg CPG_MOD 312>; 1307 max-frequency = <200000000>; 1308 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1309 resets = <&cpg 312>; 1310 status = "disabled"; 1311 }; 1312 1313 sdhi3: sd@ee160000 { 1314 compatible = "renesas,sdhi-r8a77965", 1315 "renesas,rcar-gen3-sdhi"; 1316 reg = <0 0xee160000 0 0x2000>; 1317 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1318 clocks = <&cpg CPG_MOD 311>; 1319 max-frequency = <200000000>; 1320 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1321 resets = <&cpg 311>; 1322 status = "disabled"; 1323 }; 1324 1325 gic: interrupt-controller@f1010000 { 1326 compatible = "arm,gic-400"; 1327 #interrupt-cells = <3>; 1328 #address-cells = <0>; 1329 interrupt-controller; 1330 reg = <0x0 0xf1010000 0 0x1000>, 1331 <0x0 0xf1020000 0 0x20000>, 1332 <0x0 0xf1040000 0 0x20000>, 1333 <0x0 0xf1060000 0 0x20000>; 1334 interrupts = <GIC_PPI 9 1335 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1336 clocks = <&cpg CPG_MOD 408>; 1337 clock-names = "clk"; 1338 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1339 resets = <&cpg 408>; 1340 }; 1341 1342 pciec0: pcie@fe000000 { 1343 reg = <0 0xfe000000 0 0x80000>; 1344 /* placeholder */ 1345 }; 1346 1347 pciec1: pcie@ee800000 { 1348 reg = <0 0xee800000 0 0x80000>; 1349 /* placeholder */ 1350 }; 1351 1352 fcpf0: fcp@fe950000 { 1353 compatible = "renesas,fcpf"; 1354 reg = <0 0xfe950000 0 0x200>; 1355 clocks = <&cpg CPG_MOD 615>; 1356 power-domains = <&sysc R8A77965_PD_A3VP>; 1357 resets = <&cpg 615>; 1358 }; 1359 1360 vspb: vsp@fe960000 { 1361 compatible = "renesas,vsp2"; 1362 reg = <0 0xfe960000 0 0x8000>; 1363 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1364 clocks = <&cpg CPG_MOD 626>; 1365 power-domains = <&sysc R8A77965_PD_A3VP>; 1366 resets = <&cpg 626>; 1367 1368 renesas,fcp = <&fcpvb0>; 1369 }; 1370 1371 fcpvb0: fcp@fe96f000 { 1372 compatible = "renesas,fcpv"; 1373 reg = <0 0xfe96f000 0 0x200>; 1374 clocks = <&cpg CPG_MOD 607>; 1375 power-domains = <&sysc R8A77965_PD_A3VP>; 1376 resets = <&cpg 607>; 1377 }; 1378 1379 vspi0: vsp@fe9a0000 { 1380 compatible = "renesas,vsp2"; 1381 reg = <0 0xfe9a0000 0 0x8000>; 1382 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1383 clocks = <&cpg CPG_MOD 631>; 1384 power-domains = <&sysc R8A77965_PD_A3VP>; 1385 resets = <&cpg 631>; 1386 1387 renesas,fcp = <&fcpvi0>; 1388 }; 1389 1390 fcpvi0: fcp@fe9af000 { 1391 compatible = "renesas,fcpv"; 1392 reg = <0 0xfe9af000 0 0x200>; 1393 clocks = <&cpg CPG_MOD 611>; 1394 power-domains = <&sysc R8A77965_PD_A3VP>; 1395 resets = <&cpg 611>; 1396 }; 1397 1398 vspd0: vsp@fea20000 { 1399 compatible = "renesas,vsp2"; 1400 reg = <0 0xfea20000 0 0x8000>; 1401 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1402 clocks = <&cpg CPG_MOD 623>; 1403 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1404 resets = <&cpg 623>; 1405 1406 renesas,fcp = <&fcpvd0>; 1407 }; 1408 1409 fcpvd0: fcp@fea27000 { 1410 compatible = "renesas,fcpv"; 1411 reg = <0 0xfea27000 0 0x200>; 1412 clocks = <&cpg CPG_MOD 603>; 1413 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1414 resets = <&cpg 603>; 1415 }; 1416 1417 vspd1: vsp@fea28000 { 1418 compatible = "renesas,vsp2"; 1419 reg = <0 0xfea28000 0 0x8000>; 1420 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1421 clocks = <&cpg CPG_MOD 622>; 1422 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1423 resets = <&cpg 622>; 1424 1425 renesas,fcp = <&fcpvd1>; 1426 }; 1427 1428 fcpvd1: fcp@fea2f000 { 1429 compatible = "renesas,fcpv"; 1430 reg = <0 0xfea2f000 0 0x200>; 1431 clocks = <&cpg CPG_MOD 602>; 1432 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1433 resets = <&cpg 602>; 1434 }; 1435 1436 csi20: csi2@fea80000 { 1437 compatible = "renesas,r8a77965-csi2"; 1438 reg = <0 0xfea80000 0 0x10000>; 1439 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1440 clocks = <&cpg CPG_MOD 714>; 1441 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1442 resets = <&cpg 714>; 1443 status = "disabled"; 1444 1445 ports { 1446 #address-cells = <1>; 1447 #size-cells = <0>; 1448 1449 port@1 { 1450 #address-cells = <1>; 1451 #size-cells = <0>; 1452 1453 reg = <1>; 1454 1455 csi20vin0: endpoint@0 { 1456 reg = <0>; 1457 remote-endpoint = <&vin0csi20>; 1458 }; 1459 csi20vin1: endpoint@1 { 1460 reg = <1>; 1461 remote-endpoint = <&vin1csi20>; 1462 }; 1463 csi20vin2: endpoint@2 { 1464 reg = <2>; 1465 remote-endpoint = <&vin2csi20>; 1466 }; 1467 csi20vin3: endpoint@3 { 1468 reg = <3>; 1469 remote-endpoint = <&vin3csi20>; 1470 }; 1471 csi20vin4: endpoint@4 { 1472 reg = <4>; 1473 remote-endpoint = <&vin4csi20>; 1474 }; 1475 csi20vin5: endpoint@5 { 1476 reg = <5>; 1477 remote-endpoint = <&vin5csi20>; 1478 }; 1479 csi20vin6: endpoint@6 { 1480 reg = <6>; 1481 remote-endpoint = <&vin6csi20>; 1482 }; 1483 csi20vin7: endpoint@7 { 1484 reg = <7>; 1485 remote-endpoint = <&vin7csi20>; 1486 }; 1487 }; 1488 }; 1489 }; 1490 1491 csi40: csi2@feaa0000 { 1492 compatible = "renesas,r8a77965-csi2"; 1493 reg = <0 0xfeaa0000 0 0x10000>; 1494 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1495 clocks = <&cpg CPG_MOD 716>; 1496 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1497 resets = <&cpg 716>; 1498 status = "disabled"; 1499 1500 ports { 1501 #address-cells = <1>; 1502 #size-cells = <0>; 1503 1504 port@1 { 1505 #address-cells = <1>; 1506 #size-cells = <0>; 1507 1508 reg = <1>; 1509 1510 csi40vin0: endpoint@0 { 1511 reg = <0>; 1512 remote-endpoint = <&vin0csi40>; 1513 }; 1514 csi40vin1: endpoint@1 { 1515 reg = <1>; 1516 remote-endpoint = <&vin1csi40>; 1517 }; 1518 csi40vin2: endpoint@2 { 1519 reg = <2>; 1520 remote-endpoint = <&vin2csi40>; 1521 }; 1522 csi40vin3: endpoint@3 { 1523 reg = <3>; 1524 remote-endpoint = <&vin3csi40>; 1525 }; 1526 csi40vin4: endpoint@4 { 1527 reg = <4>; 1528 remote-endpoint = <&vin4csi40>; 1529 }; 1530 csi40vin5: endpoint@5 { 1531 reg = <5>; 1532 remote-endpoint = <&vin5csi40>; 1533 }; 1534 csi40vin6: endpoint@6 { 1535 reg = <6>; 1536 remote-endpoint = <&vin6csi40>; 1537 }; 1538 csi40vin7: endpoint@7 { 1539 reg = <7>; 1540 remote-endpoint = <&vin7csi40>; 1541 }; 1542 }; 1543 }; 1544 }; 1545 1546 hdmi0: hdmi@fead0000 { 1547 compatible = "renesas,r8a77965-hdmi", 1548 "renesas,rcar-gen3-hdmi"; 1549 reg = <0 0xfead0000 0 0x10000>; 1550 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 1551 clocks = <&cpg CPG_MOD 729>, 1552 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 1553 clock-names = "iahb", "isfr"; 1554 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1555 resets = <&cpg 729>; 1556 status = "disabled"; 1557 1558 ports { 1559 #address-cells = <1>; 1560 #size-cells = <0>; 1561 port@0 { 1562 reg = <0>; 1563 dw_hdmi0_in: endpoint { 1564 remote-endpoint = <&du_out_hdmi0>; 1565 }; 1566 }; 1567 port@1 { 1568 reg = <1>; 1569 }; 1570 }; 1571 }; 1572 1573 du: display@feb00000 { 1574 compatible = "renesas,du-r8a77965"; 1575 reg = <0 0xfeb00000 0 0x80000>; 1576 reg-names = "du"; 1577 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1578 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1579 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 1580 clocks = <&cpg CPG_MOD 724>, 1581 <&cpg CPG_MOD 723>, 1582 <&cpg CPG_MOD 721>; 1583 clock-names = "du.0", "du.1", "du.3"; 1584 status = "disabled"; 1585 1586 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; 1587 1588 ports { 1589 #address-cells = <1>; 1590 #size-cells = <0>; 1591 1592 port@0 { 1593 reg = <0>; 1594 du_out_rgb: endpoint { 1595 }; 1596 }; 1597 port@1 { 1598 reg = <1>; 1599 du_out_hdmi0: endpoint { 1600 remote-endpoint = <&dw_hdmi0_in>; 1601 }; 1602 }; 1603 port@2 { 1604 reg = <2>; 1605 du_out_lvds0: endpoint { 1606 }; 1607 }; 1608 }; 1609 }; 1610 1611 prr: chipid@fff00044 { 1612 compatible = "renesas,prr"; 1613 reg = <0 0xfff00044 0 4>; 1614 }; 1615 }; 1616 1617 timer { 1618 compatible = "arm,armv8-timer"; 1619 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1620 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1621 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1622 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1623 }; 1624 1625 thermal-zones { 1626 sensor_thermal1: sensor-thermal1 { 1627 polling-delay-passive = <250>; 1628 polling-delay = <1000>; 1629 thermal-sensors = <&tsc 0>; 1630 1631 trips { 1632 sensor1_crit: sensor1-crit { 1633 temperature = <120000>; 1634 hysteresis = <1000>; 1635 type = "critical"; 1636 }; 1637 }; 1638 }; 1639 1640 sensor_thermal2: sensor-thermal2 { 1641 polling-delay-passive = <250>; 1642 polling-delay = <1000>; 1643 thermal-sensors = <&tsc 1>; 1644 1645 trips { 1646 sensor2_crit: sensor2-crit { 1647 temperature = <120000>; 1648 hysteresis = <1000>; 1649 type = "critical"; 1650 }; 1651 }; 1652 }; 1653 1654 sensor_thermal3: sensor-thermal3 { 1655 polling-delay-passive = <250>; 1656 polling-delay = <1000>; 1657 thermal-sensors = <&tsc 2>; 1658 1659 trips { 1660 sensor3_crit: sensor3-crit { 1661 temperature = <120000>; 1662 hysteresis = <1000>; 1663 type = "critical"; 1664 }; 1665 }; 1666 }; 1667 }; 1668 1669 /* External USB clocks - can be overridden by the board */ 1670 usb3s0_clk: usb3s0 { 1671 compatible = "fixed-clock"; 1672 #clock-cells = <0>; 1673 clock-frequency = <0>; 1674 }; 1675 1676 usb_extal_clk: usb_extal { 1677 compatible = "fixed-clock"; 1678 #clock-cells = <0>; 1679 clock-frequency = <0>; 1680 }; 1681}; 1682