1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cluster0_opp: opp_table0 { 64 compatible = "operating-points-v2"; 65 opp-shared; 66 67 opp-500000000 { 68 opp-hz = /bits/ 64 <500000000>; 69 opp-microvolt = <830000>; 70 clock-latency-ns = <300000>; 71 }; 72 opp-1000000000 { 73 opp-hz = /bits/ 64 <1000000000>; 74 opp-microvolt = <830000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1500000000 { 78 opp-hz = /bits/ 64 <1500000000>; 79 opp-microvolt = <830000>; 80 clock-latency-ns = <300000>; 81 opp-suspend; 82 }; 83 opp-1600000000 { 84 opp-hz = /bits/ 64 <1600000000>; 85 opp-microvolt = <900000>; 86 clock-latency-ns = <300000>; 87 turbo-mode; 88 }; 89 opp-1700000000 { 90 opp-hz = /bits/ 64 <1700000000>; 91 opp-microvolt = <900000>; 92 clock-latency-ns = <300000>; 93 turbo-mode; 94 }; 95 opp-1800000000 { 96 opp-hz = /bits/ 64 <1800000000>; 97 opp-microvolt = <960000>; 98 clock-latency-ns = <300000>; 99 turbo-mode; 100 }; 101 }; 102 103 cpus { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 a57_0: cpu@0 { 108 compatible = "arm,cortex-a57"; 109 reg = <0x0>; 110 device_type = "cpu"; 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 112 next-level-cache = <&L2_CA57>; 113 enable-method = "psci"; 114 cpu-idle-states = <&CPU_SLEEP_0>; 115 #cooling-cells = <2>; 116 dynamic-power-coefficient = <854>; 117 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 118 operating-points-v2 = <&cluster0_opp>; 119 }; 120 121 a57_1: cpu@1 { 122 compatible = "arm,cortex-a57"; 123 reg = <0x1>; 124 device_type = "cpu"; 125 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 126 next-level-cache = <&L2_CA57>; 127 enable-method = "psci"; 128 cpu-idle-states = <&CPU_SLEEP_0>; 129 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 130 operating-points-v2 = <&cluster0_opp>; 131 }; 132 133 L2_CA57: cache-controller-0 { 134 compatible = "cache"; 135 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 136 cache-unified; 137 cache-level = <2>; 138 }; 139 140 idle-states { 141 entry-method = "psci"; 142 143 CPU_SLEEP_0: cpu-sleep-0 { 144 compatible = "arm,idle-state"; 145 arm,psci-suspend-param = <0x0010000>; 146 local-timer-stop; 147 entry-latency-us = <400>; 148 exit-latency-us = <500>; 149 min-residency-us = <4000>; 150 }; 151 }; 152 }; 153 154 extal_clk: extal { 155 compatible = "fixed-clock"; 156 #clock-cells = <0>; 157 /* This value must be overridden by the board */ 158 clock-frequency = <0>; 159 }; 160 161 extalr_clk: extalr { 162 compatible = "fixed-clock"; 163 #clock-cells = <0>; 164 /* This value must be overridden by the board */ 165 clock-frequency = <0>; 166 }; 167 168 /* External PCIe clock - can be overridden by the board */ 169 pcie_bus_clk: pcie_bus { 170 compatible = "fixed-clock"; 171 #clock-cells = <0>; 172 clock-frequency = <0>; 173 }; 174 175 pmu_a57 { 176 compatible = "arm,cortex-a57-pmu"; 177 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 178 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 179 interrupt-affinity = <&a57_0>, 180 <&a57_1>; 181 }; 182 183 psci { 184 compatible = "arm,psci-1.0", "arm,psci-0.2"; 185 method = "smc"; 186 }; 187 188 /* External SCIF clock - to be overridden by boards that provide it */ 189 scif_clk: scif { 190 compatible = "fixed-clock"; 191 #clock-cells = <0>; 192 clock-frequency = <0>; 193 }; 194 195 soc { 196 compatible = "simple-bus"; 197 interrupt-parent = <&gic>; 198 #address-cells = <2>; 199 #size-cells = <2>; 200 ranges; 201 202 rwdt: watchdog@e6020000 { 203 compatible = "renesas,r8a77965-wdt", 204 "renesas,rcar-gen3-wdt"; 205 reg = <0 0xe6020000 0 0x0c>; 206 clocks = <&cpg CPG_MOD 402>; 207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 208 resets = <&cpg 402>; 209 status = "disabled"; 210 }; 211 212 gpio0: gpio@e6050000 { 213 compatible = "renesas,gpio-r8a77965", 214 "renesas,rcar-gen3-gpio"; 215 reg = <0 0xe6050000 0 0x50>; 216 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 217 #gpio-cells = <2>; 218 gpio-controller; 219 gpio-ranges = <&pfc 0 0 16>; 220 #interrupt-cells = <2>; 221 interrupt-controller; 222 clocks = <&cpg CPG_MOD 912>; 223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 224 resets = <&cpg 912>; 225 }; 226 227 gpio1: gpio@e6051000 { 228 compatible = "renesas,gpio-r8a77965", 229 "renesas,rcar-gen3-gpio"; 230 reg = <0 0xe6051000 0 0x50>; 231 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 232 #gpio-cells = <2>; 233 gpio-controller; 234 gpio-ranges = <&pfc 0 32 29>; 235 #interrupt-cells = <2>; 236 interrupt-controller; 237 clocks = <&cpg CPG_MOD 911>; 238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 239 resets = <&cpg 911>; 240 }; 241 242 gpio2: gpio@e6052000 { 243 compatible = "renesas,gpio-r8a77965", 244 "renesas,rcar-gen3-gpio"; 245 reg = <0 0xe6052000 0 0x50>; 246 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 247 #gpio-cells = <2>; 248 gpio-controller; 249 gpio-ranges = <&pfc 0 64 15>; 250 #interrupt-cells = <2>; 251 interrupt-controller; 252 clocks = <&cpg CPG_MOD 910>; 253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 254 resets = <&cpg 910>; 255 }; 256 257 gpio3: gpio@e6053000 { 258 compatible = "renesas,gpio-r8a77965", 259 "renesas,rcar-gen3-gpio"; 260 reg = <0 0xe6053000 0 0x50>; 261 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 262 #gpio-cells = <2>; 263 gpio-controller; 264 gpio-ranges = <&pfc 0 96 16>; 265 #interrupt-cells = <2>; 266 interrupt-controller; 267 clocks = <&cpg CPG_MOD 909>; 268 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 269 resets = <&cpg 909>; 270 }; 271 272 gpio4: gpio@e6054000 { 273 compatible = "renesas,gpio-r8a77965", 274 "renesas,rcar-gen3-gpio"; 275 reg = <0 0xe6054000 0 0x50>; 276 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 277 #gpio-cells = <2>; 278 gpio-controller; 279 gpio-ranges = <&pfc 0 128 18>; 280 #interrupt-cells = <2>; 281 interrupt-controller; 282 clocks = <&cpg CPG_MOD 908>; 283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 284 resets = <&cpg 908>; 285 }; 286 287 gpio5: gpio@e6055000 { 288 compatible = "renesas,gpio-r8a77965", 289 "renesas,rcar-gen3-gpio"; 290 reg = <0 0xe6055000 0 0x50>; 291 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 292 #gpio-cells = <2>; 293 gpio-controller; 294 gpio-ranges = <&pfc 0 160 26>; 295 #interrupt-cells = <2>; 296 interrupt-controller; 297 clocks = <&cpg CPG_MOD 907>; 298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 299 resets = <&cpg 907>; 300 }; 301 302 gpio6: gpio@e6055400 { 303 compatible = "renesas,gpio-r8a77965", 304 "renesas,rcar-gen3-gpio"; 305 reg = <0 0xe6055400 0 0x50>; 306 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 307 #gpio-cells = <2>; 308 gpio-controller; 309 gpio-ranges = <&pfc 0 192 32>; 310 #interrupt-cells = <2>; 311 interrupt-controller; 312 clocks = <&cpg CPG_MOD 906>; 313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 314 resets = <&cpg 906>; 315 }; 316 317 gpio7: gpio@e6055800 { 318 compatible = "renesas,gpio-r8a77965", 319 "renesas,rcar-gen3-gpio"; 320 reg = <0 0xe6055800 0 0x50>; 321 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 322 #gpio-cells = <2>; 323 gpio-controller; 324 gpio-ranges = <&pfc 0 224 4>; 325 #interrupt-cells = <2>; 326 interrupt-controller; 327 clocks = <&cpg CPG_MOD 905>; 328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 329 resets = <&cpg 905>; 330 }; 331 332 pfc: pinctrl@e6060000 { 333 compatible = "renesas,pfc-r8a77965"; 334 reg = <0 0xe6060000 0 0x50c>; 335 }; 336 337 cmt0: timer@e60f0000 { 338 compatible = "renesas,r8a77965-cmt0", 339 "renesas,rcar-gen3-cmt0"; 340 reg = <0 0xe60f0000 0 0x1004>; 341 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 343 clocks = <&cpg CPG_MOD 303>; 344 clock-names = "fck"; 345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 346 resets = <&cpg 303>; 347 status = "disabled"; 348 }; 349 350 cmt1: timer@e6130000 { 351 compatible = "renesas,r8a77965-cmt1", 352 "renesas,rcar-gen3-cmt1"; 353 reg = <0 0xe6130000 0 0x1004>; 354 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 355 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 356 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 362 clocks = <&cpg CPG_MOD 302>; 363 clock-names = "fck"; 364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 365 resets = <&cpg 302>; 366 status = "disabled"; 367 }; 368 369 cmt2: timer@e6140000 { 370 compatible = "renesas,r8a77965-cmt1", 371 "renesas,rcar-gen3-cmt1"; 372 reg = <0 0xe6140000 0 0x1004>; 373 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 374 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 375 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 376 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 378 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 379 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 380 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 381 clocks = <&cpg CPG_MOD 301>; 382 clock-names = "fck"; 383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 384 resets = <&cpg 301>; 385 status = "disabled"; 386 }; 387 388 cmt3: timer@e6148000 { 389 compatible = "renesas,r8a77965-cmt1", 390 "renesas,rcar-gen3-cmt1"; 391 reg = <0 0xe6148000 0 0x1004>; 392 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 393 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 394 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 395 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 400 clocks = <&cpg CPG_MOD 300>; 401 clock-names = "fck"; 402 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 403 resets = <&cpg 300>; 404 status = "disabled"; 405 }; 406 407 cpg: clock-controller@e6150000 { 408 compatible = "renesas,r8a77965-cpg-mssr"; 409 reg = <0 0xe6150000 0 0x1000>; 410 clocks = <&extal_clk>, <&extalr_clk>; 411 clock-names = "extal", "extalr"; 412 #clock-cells = <2>; 413 #power-domain-cells = <0>; 414 #reset-cells = <1>; 415 }; 416 417 rst: reset-controller@e6160000 { 418 compatible = "renesas,r8a77965-rst"; 419 reg = <0 0xe6160000 0 0x0200>; 420 }; 421 422 sysc: system-controller@e6180000 { 423 compatible = "renesas,r8a77965-sysc"; 424 reg = <0 0xe6180000 0 0x0400>; 425 #power-domain-cells = <1>; 426 }; 427 428 tsc: thermal@e6198000 { 429 compatible = "renesas,r8a77965-thermal"; 430 reg = <0 0xe6198000 0 0x100>, 431 <0 0xe61a0000 0 0x100>, 432 <0 0xe61a8000 0 0x100>; 433 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 435 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 436 clocks = <&cpg CPG_MOD 522>; 437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 438 resets = <&cpg 522>; 439 #thermal-sensor-cells = <1>; 440 }; 441 442 intc_ex: interrupt-controller@e61c0000 { 443 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 444 #interrupt-cells = <2>; 445 interrupt-controller; 446 reg = <0 0xe61c0000 0 0x200>; 447 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 448 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 449 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 450 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 451 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 453 clocks = <&cpg CPG_MOD 407>; 454 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 455 resets = <&cpg 407>; 456 }; 457 458 tmu0: timer@e61e0000 { 459 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 460 reg = <0 0xe61e0000 0 0x30>; 461 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 462 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 463 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 464 clocks = <&cpg CPG_MOD 125>; 465 clock-names = "fck"; 466 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 467 resets = <&cpg 125>; 468 status = "disabled"; 469 }; 470 471 tmu1: timer@e6fc0000 { 472 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 473 reg = <0 0xe6fc0000 0 0x30>; 474 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 475 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 476 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 477 clocks = <&cpg CPG_MOD 124>; 478 clock-names = "fck"; 479 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 480 resets = <&cpg 124>; 481 status = "disabled"; 482 }; 483 484 tmu2: timer@e6fd0000 { 485 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 486 reg = <0 0xe6fd0000 0 0x30>; 487 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 490 clocks = <&cpg CPG_MOD 123>; 491 clock-names = "fck"; 492 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 493 resets = <&cpg 123>; 494 status = "disabled"; 495 }; 496 497 tmu3: timer@e6fe0000 { 498 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 499 reg = <0 0xe6fe0000 0 0x30>; 500 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 501 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 502 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 503 clocks = <&cpg CPG_MOD 122>; 504 clock-names = "fck"; 505 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 506 resets = <&cpg 122>; 507 status = "disabled"; 508 }; 509 510 tmu4: timer@ffc00000 { 511 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 512 reg = <0 0xffc00000 0 0x30>; 513 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 514 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 516 clocks = <&cpg CPG_MOD 121>; 517 clock-names = "fck"; 518 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 519 resets = <&cpg 121>; 520 status = "disabled"; 521 }; 522 523 i2c0: i2c@e6500000 { 524 #address-cells = <1>; 525 #size-cells = <0>; 526 compatible = "renesas,i2c-r8a77965", 527 "renesas,rcar-gen3-i2c"; 528 reg = <0 0xe6500000 0 0x40>; 529 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 931>; 531 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 532 resets = <&cpg 931>; 533 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 534 <&dmac2 0x91>, <&dmac2 0x90>; 535 dma-names = "tx", "rx", "tx", "rx"; 536 i2c-scl-internal-delay-ns = <110>; 537 status = "disabled"; 538 }; 539 540 i2c1: i2c@e6508000 { 541 #address-cells = <1>; 542 #size-cells = <0>; 543 compatible = "renesas,i2c-r8a77965", 544 "renesas,rcar-gen3-i2c"; 545 reg = <0 0xe6508000 0 0x40>; 546 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 547 clocks = <&cpg CPG_MOD 930>; 548 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 549 resets = <&cpg 930>; 550 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 551 <&dmac2 0x93>, <&dmac2 0x92>; 552 dma-names = "tx", "rx", "tx", "rx"; 553 i2c-scl-internal-delay-ns = <6>; 554 status = "disabled"; 555 }; 556 557 i2c2: i2c@e6510000 { 558 #address-cells = <1>; 559 #size-cells = <0>; 560 compatible = "renesas,i2c-r8a77965", 561 "renesas,rcar-gen3-i2c"; 562 reg = <0 0xe6510000 0 0x40>; 563 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 564 clocks = <&cpg CPG_MOD 929>; 565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 566 resets = <&cpg 929>; 567 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 568 <&dmac2 0x95>, <&dmac2 0x94>; 569 dma-names = "tx", "rx", "tx", "rx"; 570 i2c-scl-internal-delay-ns = <6>; 571 status = "disabled"; 572 }; 573 574 i2c3: i2c@e66d0000 { 575 #address-cells = <1>; 576 #size-cells = <0>; 577 compatible = "renesas,i2c-r8a77965", 578 "renesas,rcar-gen3-i2c"; 579 reg = <0 0xe66d0000 0 0x40>; 580 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 581 clocks = <&cpg CPG_MOD 928>; 582 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 583 resets = <&cpg 928>; 584 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 585 dma-names = "tx", "rx"; 586 i2c-scl-internal-delay-ns = <110>; 587 status = "disabled"; 588 }; 589 590 i2c4: i2c@e66d8000 { 591 #address-cells = <1>; 592 #size-cells = <0>; 593 compatible = "renesas,i2c-r8a77965", 594 "renesas,rcar-gen3-i2c"; 595 reg = <0 0xe66d8000 0 0x40>; 596 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&cpg CPG_MOD 927>; 598 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 599 resets = <&cpg 927>; 600 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 601 dma-names = "tx", "rx"; 602 i2c-scl-internal-delay-ns = <110>; 603 status = "disabled"; 604 }; 605 606 i2c5: i2c@e66e0000 { 607 #address-cells = <1>; 608 #size-cells = <0>; 609 compatible = "renesas,i2c-r8a77965", 610 "renesas,rcar-gen3-i2c"; 611 reg = <0 0xe66e0000 0 0x40>; 612 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 613 clocks = <&cpg CPG_MOD 919>; 614 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 615 resets = <&cpg 919>; 616 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 617 dma-names = "tx", "rx"; 618 i2c-scl-internal-delay-ns = <110>; 619 status = "disabled"; 620 }; 621 622 i2c6: i2c@e66e8000 { 623 #address-cells = <1>; 624 #size-cells = <0>; 625 compatible = "renesas,i2c-r8a77965", 626 "renesas,rcar-gen3-i2c"; 627 reg = <0 0xe66e8000 0 0x40>; 628 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&cpg CPG_MOD 918>; 630 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 631 resets = <&cpg 918>; 632 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 633 dma-names = "tx", "rx"; 634 i2c-scl-internal-delay-ns = <6>; 635 status = "disabled"; 636 }; 637 638 i2c_dvfs: i2c@e60b0000 { 639 #address-cells = <1>; 640 #size-cells = <0>; 641 compatible = "renesas,iic-r8a77965", 642 "renesas,rcar-gen3-iic", 643 "renesas,rmobile-iic"; 644 reg = <0 0xe60b0000 0 0x425>; 645 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 646 clocks = <&cpg CPG_MOD 926>; 647 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 648 resets = <&cpg 926>; 649 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 650 dma-names = "tx", "rx"; 651 status = "disabled"; 652 }; 653 654 hscif0: serial@e6540000 { 655 compatible = "renesas,hscif-r8a77965", 656 "renesas,rcar-gen3-hscif", 657 "renesas,hscif"; 658 reg = <0 0xe6540000 0 0x60>; 659 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 660 clocks = <&cpg CPG_MOD 520>, 661 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 662 <&scif_clk>; 663 clock-names = "fck", "brg_int", "scif_clk"; 664 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 665 <&dmac2 0x31>, <&dmac2 0x30>; 666 dma-names = "tx", "rx", "tx", "rx"; 667 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 668 resets = <&cpg 520>; 669 status = "disabled"; 670 }; 671 672 hscif1: serial@e6550000 { 673 compatible = "renesas,hscif-r8a77965", 674 "renesas,rcar-gen3-hscif", 675 "renesas,hscif"; 676 reg = <0 0xe6550000 0 0x60>; 677 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 678 clocks = <&cpg CPG_MOD 519>, 679 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 680 <&scif_clk>; 681 clock-names = "fck", "brg_int", "scif_clk"; 682 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 683 <&dmac2 0x33>, <&dmac2 0x32>; 684 dma-names = "tx", "rx", "tx", "rx"; 685 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 686 resets = <&cpg 519>; 687 status = "disabled"; 688 }; 689 690 hscif2: serial@e6560000 { 691 compatible = "renesas,hscif-r8a77965", 692 "renesas,rcar-gen3-hscif", 693 "renesas,hscif"; 694 reg = <0 0xe6560000 0 0x60>; 695 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 696 clocks = <&cpg CPG_MOD 518>, 697 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 698 <&scif_clk>; 699 clock-names = "fck", "brg_int", "scif_clk"; 700 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 701 <&dmac2 0x35>, <&dmac2 0x34>; 702 dma-names = "tx", "rx", "tx", "rx"; 703 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 704 resets = <&cpg 518>; 705 status = "disabled"; 706 }; 707 708 hscif3: serial@e66a0000 { 709 compatible = "renesas,hscif-r8a77965", 710 "renesas,rcar-gen3-hscif", 711 "renesas,hscif"; 712 reg = <0 0xe66a0000 0 0x60>; 713 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 714 clocks = <&cpg CPG_MOD 517>, 715 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 716 <&scif_clk>; 717 clock-names = "fck", "brg_int", "scif_clk"; 718 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 719 dma-names = "tx", "rx"; 720 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 721 resets = <&cpg 517>; 722 status = "disabled"; 723 }; 724 725 hscif4: serial@e66b0000 { 726 compatible = "renesas,hscif-r8a77965", 727 "renesas,rcar-gen3-hscif", 728 "renesas,hscif"; 729 reg = <0 0xe66b0000 0 0x60>; 730 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 731 clocks = <&cpg CPG_MOD 516>, 732 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 733 <&scif_clk>; 734 clock-names = "fck", "brg_int", "scif_clk"; 735 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 736 dma-names = "tx", "rx"; 737 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 738 resets = <&cpg 516>; 739 status = "disabled"; 740 }; 741 742 hsusb: usb@e6590000 { 743 compatible = "renesas,usbhs-r8a77965", 744 "renesas,rcar-gen3-usbhs"; 745 reg = <0 0xe6590000 0 0x200>; 746 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 747 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 748 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 749 <&usb_dmac1 0>, <&usb_dmac1 1>; 750 dma-names = "ch0", "ch1", "ch2", "ch3"; 751 renesas,buswait = <11>; 752 phys = <&usb2_phy0 3>; 753 phy-names = "usb"; 754 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 755 resets = <&cpg 704>, <&cpg 703>; 756 status = "disabled"; 757 }; 758 759 usb_dmac0: dma-controller@e65a0000 { 760 compatible = "renesas,r8a77965-usb-dmac", 761 "renesas,usb-dmac"; 762 reg = <0 0xe65a0000 0 0x100>; 763 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 765 interrupt-names = "ch0", "ch1"; 766 clocks = <&cpg CPG_MOD 330>; 767 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 768 resets = <&cpg 330>; 769 #dma-cells = <1>; 770 dma-channels = <2>; 771 }; 772 773 usb_dmac1: dma-controller@e65b0000 { 774 compatible = "renesas,r8a77965-usb-dmac", 775 "renesas,usb-dmac"; 776 reg = <0 0xe65b0000 0 0x100>; 777 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 779 interrupt-names = "ch0", "ch1"; 780 clocks = <&cpg CPG_MOD 331>; 781 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 782 resets = <&cpg 331>; 783 #dma-cells = <1>; 784 dma-channels = <2>; 785 }; 786 787 usb3_phy0: usb-phy@e65ee000 { 788 compatible = "renesas,r8a77965-usb3-phy", 789 "renesas,rcar-gen3-usb3-phy"; 790 reg = <0 0xe65ee000 0 0x90>; 791 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 792 <&usb_extal_clk>; 793 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 795 resets = <&cpg 328>; 796 #phy-cells = <0>; 797 status = "disabled"; 798 }; 799 800 arm_cc630p: crypto@e6601000 { 801 compatible = "arm,cryptocell-630p-ree"; 802 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 803 reg = <0x0 0xe6601000 0 0x1000>; 804 clocks = <&cpg CPG_MOD 229>; 805 resets = <&cpg 229>; 806 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 807 }; 808 809 dmac0: dma-controller@e6700000 { 810 compatible = "renesas,dmac-r8a77965", 811 "renesas,rcar-dmac"; 812 reg = <0 0xe6700000 0 0x10000>; 813 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 830 interrupt-names = "error", 831 "ch0", "ch1", "ch2", "ch3", 832 "ch4", "ch5", "ch6", "ch7", 833 "ch8", "ch9", "ch10", "ch11", 834 "ch12", "ch13", "ch14", "ch15"; 835 clocks = <&cpg CPG_MOD 219>; 836 clock-names = "fck"; 837 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 838 resets = <&cpg 219>; 839 #dma-cells = <1>; 840 dma-channels = <16>; 841 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 842 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 843 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 844 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 845 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 846 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 847 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 848 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 849 }; 850 851 dmac1: dma-controller@e7300000 { 852 compatible = "renesas,dmac-r8a77965", 853 "renesas,rcar-dmac"; 854 reg = <0 0xe7300000 0 0x10000>; 855 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 872 interrupt-names = "error", 873 "ch0", "ch1", "ch2", "ch3", 874 "ch4", "ch5", "ch6", "ch7", 875 "ch8", "ch9", "ch10", "ch11", 876 "ch12", "ch13", "ch14", "ch15"; 877 clocks = <&cpg CPG_MOD 218>; 878 clock-names = "fck"; 879 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 880 resets = <&cpg 218>; 881 #dma-cells = <1>; 882 dma-channels = <16>; 883 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 884 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 885 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 886 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 887 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 888 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 889 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 890 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 891 }; 892 893 dmac2: dma-controller@e7310000 { 894 compatible = "renesas,dmac-r8a77965", 895 "renesas,rcar-dmac"; 896 reg = <0 0xe7310000 0 0x10000>; 897 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 898 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 899 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 906 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 907 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 908 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 909 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 914 interrupt-names = "error", 915 "ch0", "ch1", "ch2", "ch3", 916 "ch4", "ch5", "ch6", "ch7", 917 "ch8", "ch9", "ch10", "ch11", 918 "ch12", "ch13", "ch14", "ch15"; 919 clocks = <&cpg CPG_MOD 217>; 920 clock-names = "fck"; 921 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 922 resets = <&cpg 217>; 923 #dma-cells = <1>; 924 dma-channels = <16>; 925 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 926 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 927 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 928 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 929 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 930 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 931 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 932 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 933 }; 934 935 ipmmu_ds0: iommu@e6740000 { 936 compatible = "renesas,ipmmu-r8a77965"; 937 reg = <0 0xe6740000 0 0x1000>; 938 renesas,ipmmu-main = <&ipmmu_mm 0>; 939 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 940 #iommu-cells = <1>; 941 }; 942 943 ipmmu_ds1: iommu@e7740000 { 944 compatible = "renesas,ipmmu-r8a77965"; 945 reg = <0 0xe7740000 0 0x1000>; 946 renesas,ipmmu-main = <&ipmmu_mm 1>; 947 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 948 #iommu-cells = <1>; 949 }; 950 951 ipmmu_hc: iommu@e6570000 { 952 compatible = "renesas,ipmmu-r8a77965"; 953 reg = <0 0xe6570000 0 0x1000>; 954 renesas,ipmmu-main = <&ipmmu_mm 2>; 955 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 956 #iommu-cells = <1>; 957 }; 958 959 ipmmu_mm: iommu@e67b0000 { 960 compatible = "renesas,ipmmu-r8a77965"; 961 reg = <0 0xe67b0000 0 0x1000>; 962 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 965 #iommu-cells = <1>; 966 }; 967 968 ipmmu_mp: iommu@ec670000 { 969 compatible = "renesas,ipmmu-r8a77965"; 970 reg = <0 0xec670000 0 0x1000>; 971 renesas,ipmmu-main = <&ipmmu_mm 4>; 972 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 973 #iommu-cells = <1>; 974 }; 975 976 ipmmu_pv0: iommu@fd800000 { 977 compatible = "renesas,ipmmu-r8a77965"; 978 reg = <0 0xfd800000 0 0x1000>; 979 renesas,ipmmu-main = <&ipmmu_mm 6>; 980 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 981 #iommu-cells = <1>; 982 }; 983 984 ipmmu_rt: iommu@ffc80000 { 985 compatible = "renesas,ipmmu-r8a77965"; 986 reg = <0 0xffc80000 0 0x1000>; 987 renesas,ipmmu-main = <&ipmmu_mm 10>; 988 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 989 #iommu-cells = <1>; 990 }; 991 992 ipmmu_vc0: iommu@fe6b0000 { 993 compatible = "renesas,ipmmu-r8a77965"; 994 reg = <0 0xfe6b0000 0 0x1000>; 995 renesas,ipmmu-main = <&ipmmu_mm 12>; 996 power-domains = <&sysc R8A77965_PD_A3VC>; 997 #iommu-cells = <1>; 998 }; 999 1000 ipmmu_vi0: iommu@febd0000 { 1001 compatible = "renesas,ipmmu-r8a77965"; 1002 reg = <0 0xfebd0000 0 0x1000>; 1003 renesas,ipmmu-main = <&ipmmu_mm 14>; 1004 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1005 #iommu-cells = <1>; 1006 }; 1007 1008 ipmmu_vp0: iommu@fe990000 { 1009 compatible = "renesas,ipmmu-r8a77965"; 1010 reg = <0 0xfe990000 0 0x1000>; 1011 renesas,ipmmu-main = <&ipmmu_mm 16>; 1012 power-domains = <&sysc R8A77965_PD_A3VP>; 1013 #iommu-cells = <1>; 1014 }; 1015 1016 avb: ethernet@e6800000 { 1017 compatible = "renesas,etheravb-r8a77965", 1018 "renesas,etheravb-rcar-gen3"; 1019 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1020 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1021 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1022 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1045 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1046 "ch4", "ch5", "ch6", "ch7", 1047 "ch8", "ch9", "ch10", "ch11", 1048 "ch12", "ch13", "ch14", "ch15", 1049 "ch16", "ch17", "ch18", "ch19", 1050 "ch20", "ch21", "ch22", "ch23", 1051 "ch24"; 1052 clocks = <&cpg CPG_MOD 812>; 1053 clock-names = "fck"; 1054 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1055 resets = <&cpg 812>; 1056 phy-mode = "rgmii"; 1057 rx-internal-delay-ps = <0>; 1058 tx-internal-delay-ps = <0>; 1059 iommus = <&ipmmu_ds0 16>; 1060 #address-cells = <1>; 1061 #size-cells = <0>; 1062 status = "disabled"; 1063 }; 1064 1065 can0: can@e6c30000 { 1066 compatible = "renesas,can-r8a77965", 1067 "renesas,rcar-gen3-can"; 1068 reg = <0 0xe6c30000 0 0x1000>; 1069 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1070 clocks = <&cpg CPG_MOD 916>, 1071 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1072 <&can_clk>; 1073 clock-names = "clkp1", "clkp2", "can_clk"; 1074 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1075 assigned-clock-rates = <40000000>; 1076 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1077 resets = <&cpg 916>; 1078 status = "disabled"; 1079 }; 1080 1081 can1: can@e6c38000 { 1082 compatible = "renesas,can-r8a77965", 1083 "renesas,rcar-gen3-can"; 1084 reg = <0 0xe6c38000 0 0x1000>; 1085 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1086 clocks = <&cpg CPG_MOD 915>, 1087 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1088 <&can_clk>; 1089 clock-names = "clkp1", "clkp2", "can_clk"; 1090 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1091 assigned-clock-rates = <40000000>; 1092 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1093 resets = <&cpg 915>; 1094 status = "disabled"; 1095 }; 1096 1097 canfd: can@e66c0000 { 1098 compatible = "renesas,r8a77965-canfd", 1099 "renesas,rcar-gen3-canfd"; 1100 reg = <0 0xe66c0000 0 0x8000>; 1101 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1102 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1103 clocks = <&cpg CPG_MOD 914>, 1104 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1105 <&can_clk>; 1106 clock-names = "fck", "canfd", "can_clk"; 1107 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1108 assigned-clock-rates = <40000000>; 1109 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1110 resets = <&cpg 914>; 1111 status = "disabled"; 1112 1113 channel0 { 1114 status = "disabled"; 1115 }; 1116 1117 channel1 { 1118 status = "disabled"; 1119 }; 1120 }; 1121 1122 pwm0: pwm@e6e30000 { 1123 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1124 reg = <0 0xe6e30000 0 8>; 1125 #pwm-cells = <2>; 1126 clocks = <&cpg CPG_MOD 523>; 1127 resets = <&cpg 523>; 1128 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1129 status = "disabled"; 1130 }; 1131 1132 pwm1: pwm@e6e31000 { 1133 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1134 reg = <0 0xe6e31000 0 8>; 1135 #pwm-cells = <2>; 1136 clocks = <&cpg CPG_MOD 523>; 1137 resets = <&cpg 523>; 1138 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1139 status = "disabled"; 1140 }; 1141 1142 pwm2: pwm@e6e32000 { 1143 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1144 reg = <0 0xe6e32000 0 8>; 1145 #pwm-cells = <2>; 1146 clocks = <&cpg CPG_MOD 523>; 1147 resets = <&cpg 523>; 1148 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1149 status = "disabled"; 1150 }; 1151 1152 pwm3: pwm@e6e33000 { 1153 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1154 reg = <0 0xe6e33000 0 8>; 1155 #pwm-cells = <2>; 1156 clocks = <&cpg CPG_MOD 523>; 1157 resets = <&cpg 523>; 1158 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1159 status = "disabled"; 1160 }; 1161 1162 pwm4: pwm@e6e34000 { 1163 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1164 reg = <0 0xe6e34000 0 8>; 1165 #pwm-cells = <2>; 1166 clocks = <&cpg CPG_MOD 523>; 1167 resets = <&cpg 523>; 1168 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1169 status = "disabled"; 1170 }; 1171 1172 pwm5: pwm@e6e35000 { 1173 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1174 reg = <0 0xe6e35000 0 8>; 1175 #pwm-cells = <2>; 1176 clocks = <&cpg CPG_MOD 523>; 1177 resets = <&cpg 523>; 1178 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1179 status = "disabled"; 1180 }; 1181 1182 pwm6: pwm@e6e36000 { 1183 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1184 reg = <0 0xe6e36000 0 8>; 1185 #pwm-cells = <2>; 1186 clocks = <&cpg CPG_MOD 523>; 1187 resets = <&cpg 523>; 1188 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1189 status = "disabled"; 1190 }; 1191 1192 scif0: serial@e6e60000 { 1193 compatible = "renesas,scif-r8a77965", 1194 "renesas,rcar-gen3-scif", "renesas,scif"; 1195 reg = <0 0xe6e60000 0 64>; 1196 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1197 clocks = <&cpg CPG_MOD 207>, 1198 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1199 <&scif_clk>; 1200 clock-names = "fck", "brg_int", "scif_clk"; 1201 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1202 <&dmac2 0x51>, <&dmac2 0x50>; 1203 dma-names = "tx", "rx", "tx", "rx"; 1204 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1205 resets = <&cpg 207>; 1206 status = "disabled"; 1207 }; 1208 1209 scif1: serial@e6e68000 { 1210 compatible = "renesas,scif-r8a77965", 1211 "renesas,rcar-gen3-scif", "renesas,scif"; 1212 reg = <0 0xe6e68000 0 64>; 1213 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1214 clocks = <&cpg CPG_MOD 206>, 1215 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1216 <&scif_clk>; 1217 clock-names = "fck", "brg_int", "scif_clk"; 1218 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1219 <&dmac2 0x53>, <&dmac2 0x52>; 1220 dma-names = "tx", "rx", "tx", "rx"; 1221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1222 resets = <&cpg 206>; 1223 status = "disabled"; 1224 }; 1225 1226 scif2: serial@e6e88000 { 1227 compatible = "renesas,scif-r8a77965", 1228 "renesas,rcar-gen3-scif", "renesas,scif"; 1229 reg = <0 0xe6e88000 0 64>; 1230 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1231 clocks = <&cpg CPG_MOD 310>, 1232 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1233 <&scif_clk>; 1234 clock-names = "fck", "brg_int", "scif_clk"; 1235 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1236 <&dmac2 0x13>, <&dmac2 0x12>; 1237 dma-names = "tx", "rx", "tx", "rx"; 1238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1239 resets = <&cpg 310>; 1240 status = "disabled"; 1241 }; 1242 1243 scif3: serial@e6c50000 { 1244 compatible = "renesas,scif-r8a77965", 1245 "renesas,rcar-gen3-scif", "renesas,scif"; 1246 reg = <0 0xe6c50000 0 64>; 1247 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1248 clocks = <&cpg CPG_MOD 204>, 1249 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1250 <&scif_clk>; 1251 clock-names = "fck", "brg_int", "scif_clk"; 1252 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1253 dma-names = "tx", "rx"; 1254 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1255 resets = <&cpg 204>; 1256 status = "disabled"; 1257 }; 1258 1259 scif4: serial@e6c40000 { 1260 compatible = "renesas,scif-r8a77965", 1261 "renesas,rcar-gen3-scif", "renesas,scif"; 1262 reg = <0 0xe6c40000 0 64>; 1263 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1264 clocks = <&cpg CPG_MOD 203>, 1265 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1266 <&scif_clk>; 1267 clock-names = "fck", "brg_int", "scif_clk"; 1268 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1269 dma-names = "tx", "rx"; 1270 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1271 resets = <&cpg 203>; 1272 status = "disabled"; 1273 }; 1274 1275 scif5: serial@e6f30000 { 1276 compatible = "renesas,scif-r8a77965", 1277 "renesas,rcar-gen3-scif", "renesas,scif"; 1278 reg = <0 0xe6f30000 0 64>; 1279 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1280 clocks = <&cpg CPG_MOD 202>, 1281 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1282 <&scif_clk>; 1283 clock-names = "fck", "brg_int", "scif_clk"; 1284 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1285 <&dmac2 0x5b>, <&dmac2 0x5a>; 1286 dma-names = "tx", "rx", "tx", "rx"; 1287 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1288 resets = <&cpg 202>; 1289 status = "disabled"; 1290 }; 1291 1292 tpu: pwm@e6e80000 { 1293 compatible = "renesas,tpu-r8a77965", "renesas,tpu"; 1294 reg = <0 0xe6e80000 0 0x148>; 1295 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1296 clocks = <&cpg CPG_MOD 304>; 1297 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1298 resets = <&cpg 304>; 1299 #pwm-cells = <3>; 1300 status = "disabled"; 1301 }; 1302 1303 msiof0: spi@e6e90000 { 1304 compatible = "renesas,msiof-r8a77965", 1305 "renesas,rcar-gen3-msiof"; 1306 reg = <0 0xe6e90000 0 0x0064>; 1307 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1308 clocks = <&cpg CPG_MOD 211>; 1309 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1310 <&dmac2 0x41>, <&dmac2 0x40>; 1311 dma-names = "tx", "rx", "tx", "rx"; 1312 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1313 resets = <&cpg 211>; 1314 #address-cells = <1>; 1315 #size-cells = <0>; 1316 status = "disabled"; 1317 }; 1318 1319 msiof1: spi@e6ea0000 { 1320 compatible = "renesas,msiof-r8a77965", 1321 "renesas,rcar-gen3-msiof"; 1322 reg = <0 0xe6ea0000 0 0x0064>; 1323 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1324 clocks = <&cpg CPG_MOD 210>; 1325 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1326 <&dmac2 0x43>, <&dmac2 0x42>; 1327 dma-names = "tx", "rx", "tx", "rx"; 1328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1329 resets = <&cpg 210>; 1330 #address-cells = <1>; 1331 #size-cells = <0>; 1332 status = "disabled"; 1333 }; 1334 1335 msiof2: spi@e6c00000 { 1336 compatible = "renesas,msiof-r8a77965", 1337 "renesas,rcar-gen3-msiof"; 1338 reg = <0 0xe6c00000 0 0x0064>; 1339 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1340 clocks = <&cpg CPG_MOD 209>; 1341 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1342 dma-names = "tx", "rx"; 1343 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1344 resets = <&cpg 209>; 1345 #address-cells = <1>; 1346 #size-cells = <0>; 1347 status = "disabled"; 1348 }; 1349 1350 msiof3: spi@e6c10000 { 1351 compatible = "renesas,msiof-r8a77965", 1352 "renesas,rcar-gen3-msiof"; 1353 reg = <0 0xe6c10000 0 0x0064>; 1354 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1355 clocks = <&cpg CPG_MOD 208>; 1356 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1357 dma-names = "tx", "rx"; 1358 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1359 resets = <&cpg 208>; 1360 #address-cells = <1>; 1361 #size-cells = <0>; 1362 status = "disabled"; 1363 }; 1364 1365 vin0: video@e6ef0000 { 1366 compatible = "renesas,vin-r8a77965"; 1367 reg = <0 0xe6ef0000 0 0x1000>; 1368 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1369 clocks = <&cpg CPG_MOD 811>; 1370 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1371 resets = <&cpg 811>; 1372 renesas,id = <0>; 1373 status = "disabled"; 1374 1375 ports { 1376 #address-cells = <1>; 1377 #size-cells = <0>; 1378 1379 port@1 { 1380 #address-cells = <1>; 1381 #size-cells = <0>; 1382 1383 reg = <1>; 1384 1385 vin0csi20: endpoint@0 { 1386 reg = <0>; 1387 remote-endpoint = <&csi20vin0>; 1388 }; 1389 vin0csi40: endpoint@2 { 1390 reg = <2>; 1391 remote-endpoint = <&csi40vin0>; 1392 }; 1393 }; 1394 }; 1395 }; 1396 1397 vin1: video@e6ef1000 { 1398 compatible = "renesas,vin-r8a77965"; 1399 reg = <0 0xe6ef1000 0 0x1000>; 1400 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1401 clocks = <&cpg CPG_MOD 810>; 1402 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1403 resets = <&cpg 810>; 1404 renesas,id = <1>; 1405 status = "disabled"; 1406 1407 ports { 1408 #address-cells = <1>; 1409 #size-cells = <0>; 1410 1411 port@1 { 1412 #address-cells = <1>; 1413 #size-cells = <0>; 1414 1415 reg = <1>; 1416 1417 vin1csi20: endpoint@0 { 1418 reg = <0>; 1419 remote-endpoint = <&csi20vin1>; 1420 }; 1421 vin1csi40: endpoint@2 { 1422 reg = <2>; 1423 remote-endpoint = <&csi40vin1>; 1424 }; 1425 }; 1426 }; 1427 }; 1428 1429 vin2: video@e6ef2000 { 1430 compatible = "renesas,vin-r8a77965"; 1431 reg = <0 0xe6ef2000 0 0x1000>; 1432 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1433 clocks = <&cpg CPG_MOD 809>; 1434 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1435 resets = <&cpg 809>; 1436 renesas,id = <2>; 1437 status = "disabled"; 1438 1439 ports { 1440 #address-cells = <1>; 1441 #size-cells = <0>; 1442 1443 port@1 { 1444 #address-cells = <1>; 1445 #size-cells = <0>; 1446 1447 reg = <1>; 1448 1449 vin2csi20: endpoint@0 { 1450 reg = <0>; 1451 remote-endpoint = <&csi20vin2>; 1452 }; 1453 vin2csi40: endpoint@2 { 1454 reg = <2>; 1455 remote-endpoint = <&csi40vin2>; 1456 }; 1457 }; 1458 }; 1459 }; 1460 1461 vin3: video@e6ef3000 { 1462 compatible = "renesas,vin-r8a77965"; 1463 reg = <0 0xe6ef3000 0 0x1000>; 1464 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1465 clocks = <&cpg CPG_MOD 808>; 1466 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1467 resets = <&cpg 808>; 1468 renesas,id = <3>; 1469 status = "disabled"; 1470 1471 ports { 1472 #address-cells = <1>; 1473 #size-cells = <0>; 1474 1475 port@1 { 1476 #address-cells = <1>; 1477 #size-cells = <0>; 1478 1479 reg = <1>; 1480 1481 vin3csi20: endpoint@0 { 1482 reg = <0>; 1483 remote-endpoint = <&csi20vin3>; 1484 }; 1485 vin3csi40: endpoint@2 { 1486 reg = <2>; 1487 remote-endpoint = <&csi40vin3>; 1488 }; 1489 }; 1490 }; 1491 }; 1492 1493 vin4: video@e6ef4000 { 1494 compatible = "renesas,vin-r8a77965"; 1495 reg = <0 0xe6ef4000 0 0x1000>; 1496 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1497 clocks = <&cpg CPG_MOD 807>; 1498 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1499 resets = <&cpg 807>; 1500 renesas,id = <4>; 1501 status = "disabled"; 1502 1503 ports { 1504 #address-cells = <1>; 1505 #size-cells = <0>; 1506 1507 port@1 { 1508 #address-cells = <1>; 1509 #size-cells = <0>; 1510 1511 reg = <1>; 1512 1513 vin4csi20: endpoint@0 { 1514 reg = <0>; 1515 remote-endpoint = <&csi20vin4>; 1516 }; 1517 vin4csi40: endpoint@2 { 1518 reg = <2>; 1519 remote-endpoint = <&csi40vin4>; 1520 }; 1521 }; 1522 }; 1523 }; 1524 1525 vin5: video@e6ef5000 { 1526 compatible = "renesas,vin-r8a77965"; 1527 reg = <0 0xe6ef5000 0 0x1000>; 1528 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1529 clocks = <&cpg CPG_MOD 806>; 1530 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1531 resets = <&cpg 806>; 1532 renesas,id = <5>; 1533 status = "disabled"; 1534 1535 ports { 1536 #address-cells = <1>; 1537 #size-cells = <0>; 1538 1539 port@1 { 1540 #address-cells = <1>; 1541 #size-cells = <0>; 1542 1543 reg = <1>; 1544 1545 vin5csi20: endpoint@0 { 1546 reg = <0>; 1547 remote-endpoint = <&csi20vin5>; 1548 }; 1549 vin5csi40: endpoint@2 { 1550 reg = <2>; 1551 remote-endpoint = <&csi40vin5>; 1552 }; 1553 }; 1554 }; 1555 }; 1556 1557 vin6: video@e6ef6000 { 1558 compatible = "renesas,vin-r8a77965"; 1559 reg = <0 0xe6ef6000 0 0x1000>; 1560 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1561 clocks = <&cpg CPG_MOD 805>; 1562 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1563 resets = <&cpg 805>; 1564 renesas,id = <6>; 1565 status = "disabled"; 1566 1567 ports { 1568 #address-cells = <1>; 1569 #size-cells = <0>; 1570 1571 port@1 { 1572 #address-cells = <1>; 1573 #size-cells = <0>; 1574 1575 reg = <1>; 1576 1577 vin6csi20: endpoint@0 { 1578 reg = <0>; 1579 remote-endpoint = <&csi20vin6>; 1580 }; 1581 vin6csi40: endpoint@2 { 1582 reg = <2>; 1583 remote-endpoint = <&csi40vin6>; 1584 }; 1585 }; 1586 }; 1587 }; 1588 1589 vin7: video@e6ef7000 { 1590 compatible = "renesas,vin-r8a77965"; 1591 reg = <0 0xe6ef7000 0 0x1000>; 1592 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1593 clocks = <&cpg CPG_MOD 804>; 1594 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1595 resets = <&cpg 804>; 1596 renesas,id = <7>; 1597 status = "disabled"; 1598 1599 ports { 1600 #address-cells = <1>; 1601 #size-cells = <0>; 1602 1603 port@1 { 1604 #address-cells = <1>; 1605 #size-cells = <0>; 1606 1607 reg = <1>; 1608 1609 vin7csi20: endpoint@0 { 1610 reg = <0>; 1611 remote-endpoint = <&csi20vin7>; 1612 }; 1613 vin7csi40: endpoint@2 { 1614 reg = <2>; 1615 remote-endpoint = <&csi40vin7>; 1616 }; 1617 }; 1618 }; 1619 }; 1620 1621 drif00: rif@e6f40000 { 1622 compatible = "renesas,r8a77965-drif", 1623 "renesas,rcar-gen3-drif"; 1624 reg = <0 0xe6f40000 0 0x84>; 1625 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1626 clocks = <&cpg CPG_MOD 515>; 1627 clock-names = "fck"; 1628 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1629 dma-names = "rx", "rx"; 1630 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1631 resets = <&cpg 515>; 1632 renesas,bonding = <&drif01>; 1633 status = "disabled"; 1634 }; 1635 1636 drif01: rif@e6f50000 { 1637 compatible = "renesas,r8a77965-drif", 1638 "renesas,rcar-gen3-drif"; 1639 reg = <0 0xe6f50000 0 0x84>; 1640 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1641 clocks = <&cpg CPG_MOD 514>; 1642 clock-names = "fck"; 1643 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1644 dma-names = "rx", "rx"; 1645 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1646 resets = <&cpg 514>; 1647 renesas,bonding = <&drif00>; 1648 status = "disabled"; 1649 }; 1650 1651 drif10: rif@e6f60000 { 1652 compatible = "renesas,r8a77965-drif", 1653 "renesas,rcar-gen3-drif"; 1654 reg = <0 0xe6f60000 0 0x84>; 1655 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1656 clocks = <&cpg CPG_MOD 513>; 1657 clock-names = "fck"; 1658 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1659 dma-names = "rx", "rx"; 1660 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1661 resets = <&cpg 513>; 1662 renesas,bonding = <&drif11>; 1663 status = "disabled"; 1664 }; 1665 1666 drif11: rif@e6f70000 { 1667 compatible = "renesas,r8a77965-drif", 1668 "renesas,rcar-gen3-drif"; 1669 reg = <0 0xe6f70000 0 0x84>; 1670 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1671 clocks = <&cpg CPG_MOD 512>; 1672 clock-names = "fck"; 1673 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1674 dma-names = "rx", "rx"; 1675 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1676 resets = <&cpg 512>; 1677 renesas,bonding = <&drif10>; 1678 status = "disabled"; 1679 }; 1680 1681 drif20: rif@e6f80000 { 1682 compatible = "renesas,r8a77965-drif", 1683 "renesas,rcar-gen3-drif"; 1684 reg = <0 0xe6f80000 0 0x84>; 1685 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1686 clocks = <&cpg CPG_MOD 511>; 1687 clock-names = "fck"; 1688 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1689 dma-names = "rx", "rx"; 1690 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1691 resets = <&cpg 511>; 1692 renesas,bonding = <&drif21>; 1693 status = "disabled"; 1694 }; 1695 1696 drif21: rif@e6f90000 { 1697 compatible = "renesas,r8a77965-drif", 1698 "renesas,rcar-gen3-drif"; 1699 reg = <0 0xe6f90000 0 0x84>; 1700 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1701 clocks = <&cpg CPG_MOD 510>; 1702 clock-names = "fck"; 1703 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1704 dma-names = "rx", "rx"; 1705 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1706 resets = <&cpg 510>; 1707 renesas,bonding = <&drif20>; 1708 status = "disabled"; 1709 }; 1710 1711 drif30: rif@e6fa0000 { 1712 compatible = "renesas,r8a77965-drif", 1713 "renesas,rcar-gen3-drif"; 1714 reg = <0 0xe6fa0000 0 0x84>; 1715 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1716 clocks = <&cpg CPG_MOD 509>; 1717 clock-names = "fck"; 1718 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1719 dma-names = "rx", "rx"; 1720 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1721 resets = <&cpg 509>; 1722 renesas,bonding = <&drif31>; 1723 status = "disabled"; 1724 }; 1725 1726 drif31: rif@e6fb0000 { 1727 compatible = "renesas,r8a77965-drif", 1728 "renesas,rcar-gen3-drif"; 1729 reg = <0 0xe6fb0000 0 0x84>; 1730 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1731 clocks = <&cpg CPG_MOD 508>; 1732 clock-names = "fck"; 1733 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1734 dma-names = "rx", "rx"; 1735 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1736 resets = <&cpg 508>; 1737 renesas,bonding = <&drif30>; 1738 status = "disabled"; 1739 }; 1740 1741 rcar_sound: sound@ec500000 { 1742 /* 1743 * #sound-dai-cells is required 1744 * 1745 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1746 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1747 */ 1748 /* 1749 * #clock-cells is required for audio_clkout0/1/2/3 1750 * 1751 * clkout : #clock-cells = <0>; <&rcar_sound>; 1752 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1753 */ 1754 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1755 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1756 <0 0xec5a0000 0 0x100>, /* ADG */ 1757 <0 0xec540000 0 0x1000>, /* SSIU */ 1758 <0 0xec541000 0 0x280>, /* SSI */ 1759 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1760 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1761 1762 clocks = <&cpg CPG_MOD 1005>, 1763 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1764 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1765 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1766 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1767 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1768 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1769 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1770 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1771 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1772 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1773 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1774 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1775 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1776 <&audio_clk_a>, <&audio_clk_b>, 1777 <&audio_clk_c>, 1778 <&cpg CPG_CORE R8A77965_CLK_S0D4>; 1779 clock-names = "ssi-all", 1780 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1781 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1782 "ssi.1", "ssi.0", 1783 "src.9", "src.8", "src.7", "src.6", 1784 "src.5", "src.4", "src.3", "src.2", 1785 "src.1", "src.0", 1786 "mix.1", "mix.0", 1787 "ctu.1", "ctu.0", 1788 "dvc.0", "dvc.1", 1789 "clk_a", "clk_b", "clk_c", "clk_i"; 1790 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1791 resets = <&cpg 1005>, 1792 <&cpg 1006>, <&cpg 1007>, 1793 <&cpg 1008>, <&cpg 1009>, 1794 <&cpg 1010>, <&cpg 1011>, 1795 <&cpg 1012>, <&cpg 1013>, 1796 <&cpg 1014>, <&cpg 1015>; 1797 reset-names = "ssi-all", 1798 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1799 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1800 "ssi.1", "ssi.0"; 1801 status = "disabled"; 1802 1803 rcar_sound,dvc { 1804 dvc0: dvc-0 { 1805 dmas = <&audma1 0xbc>; 1806 dma-names = "tx"; 1807 }; 1808 dvc1: dvc-1 { 1809 dmas = <&audma1 0xbe>; 1810 dma-names = "tx"; 1811 }; 1812 }; 1813 1814 rcar_sound,mix { 1815 mix0: mix-0 { }; 1816 mix1: mix-1 { }; 1817 }; 1818 1819 rcar_sound,ctu { 1820 ctu00: ctu-0 { }; 1821 ctu01: ctu-1 { }; 1822 ctu02: ctu-2 { }; 1823 ctu03: ctu-3 { }; 1824 ctu10: ctu-4 { }; 1825 ctu11: ctu-5 { }; 1826 ctu12: ctu-6 { }; 1827 ctu13: ctu-7 { }; 1828 }; 1829 1830 rcar_sound,src { 1831 src0: src-0 { 1832 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1833 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1834 dma-names = "rx", "tx"; 1835 }; 1836 src1: src-1 { 1837 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1838 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1839 dma-names = "rx", "tx"; 1840 }; 1841 src2: src-2 { 1842 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1843 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1844 dma-names = "rx", "tx"; 1845 }; 1846 src3: src-3 { 1847 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1848 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1849 dma-names = "rx", "tx"; 1850 }; 1851 src4: src-4 { 1852 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1853 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1854 dma-names = "rx", "tx"; 1855 }; 1856 src5: src-5 { 1857 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1858 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1859 dma-names = "rx", "tx"; 1860 }; 1861 src6: src-6 { 1862 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1863 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1864 dma-names = "rx", "tx"; 1865 }; 1866 src7: src-7 { 1867 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1868 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1869 dma-names = "rx", "tx"; 1870 }; 1871 src8: src-8 { 1872 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1873 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1874 dma-names = "rx", "tx"; 1875 }; 1876 src9: src-9 { 1877 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1878 dmas = <&audma0 0x97>, <&audma1 0xba>; 1879 dma-names = "rx", "tx"; 1880 }; 1881 }; 1882 1883 rcar_sound,ssiu { 1884 ssiu00: ssiu-0 { 1885 dmas = <&audma0 0x15>, <&audma1 0x16>; 1886 dma-names = "rx", "tx"; 1887 }; 1888 ssiu01: ssiu-1 { 1889 dmas = <&audma0 0x35>, <&audma1 0x36>; 1890 dma-names = "rx", "tx"; 1891 }; 1892 ssiu02: ssiu-2 { 1893 dmas = <&audma0 0x37>, <&audma1 0x38>; 1894 dma-names = "rx", "tx"; 1895 }; 1896 ssiu03: ssiu-3 { 1897 dmas = <&audma0 0x47>, <&audma1 0x48>; 1898 dma-names = "rx", "tx"; 1899 }; 1900 ssiu04: ssiu-4 { 1901 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1902 dma-names = "rx", "tx"; 1903 }; 1904 ssiu05: ssiu-5 { 1905 dmas = <&audma0 0x43>, <&audma1 0x44>; 1906 dma-names = "rx", "tx"; 1907 }; 1908 ssiu06: ssiu-6 { 1909 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1910 dma-names = "rx", "tx"; 1911 }; 1912 ssiu07: ssiu-7 { 1913 dmas = <&audma0 0x53>, <&audma1 0x54>; 1914 dma-names = "rx", "tx"; 1915 }; 1916 ssiu10: ssiu-8 { 1917 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1918 dma-names = "rx", "tx"; 1919 }; 1920 ssiu11: ssiu-9 { 1921 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1922 dma-names = "rx", "tx"; 1923 }; 1924 ssiu12: ssiu-10 { 1925 dmas = <&audma0 0x57>, <&audma1 0x58>; 1926 dma-names = "rx", "tx"; 1927 }; 1928 ssiu13: ssiu-11 { 1929 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1930 dma-names = "rx", "tx"; 1931 }; 1932 ssiu14: ssiu-12 { 1933 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1934 dma-names = "rx", "tx"; 1935 }; 1936 ssiu15: ssiu-13 { 1937 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1938 dma-names = "rx", "tx"; 1939 }; 1940 ssiu16: ssiu-14 { 1941 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1942 dma-names = "rx", "tx"; 1943 }; 1944 ssiu17: ssiu-15 { 1945 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1946 dma-names = "rx", "tx"; 1947 }; 1948 ssiu20: ssiu-16 { 1949 dmas = <&audma0 0x63>, <&audma1 0x64>; 1950 dma-names = "rx", "tx"; 1951 }; 1952 ssiu21: ssiu-17 { 1953 dmas = <&audma0 0x67>, <&audma1 0x68>; 1954 dma-names = "rx", "tx"; 1955 }; 1956 ssiu22: ssiu-18 { 1957 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1958 dma-names = "rx", "tx"; 1959 }; 1960 ssiu23: ssiu-19 { 1961 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1962 dma-names = "rx", "tx"; 1963 }; 1964 ssiu24: ssiu-20 { 1965 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1966 dma-names = "rx", "tx"; 1967 }; 1968 ssiu25: ssiu-21 { 1969 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1970 dma-names = "rx", "tx"; 1971 }; 1972 ssiu26: ssiu-22 { 1973 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1974 dma-names = "rx", "tx"; 1975 }; 1976 ssiu27: ssiu-23 { 1977 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1978 dma-names = "rx", "tx"; 1979 }; 1980 ssiu30: ssiu-24 { 1981 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1982 dma-names = "rx", "tx"; 1983 }; 1984 ssiu31: ssiu-25 { 1985 dmas = <&audma0 0x21>, <&audma1 0x22>; 1986 dma-names = "rx", "tx"; 1987 }; 1988 ssiu32: ssiu-26 { 1989 dmas = <&audma0 0x23>, <&audma1 0x24>; 1990 dma-names = "rx", "tx"; 1991 }; 1992 ssiu33: ssiu-27 { 1993 dmas = <&audma0 0x25>, <&audma1 0x26>; 1994 dma-names = "rx", "tx"; 1995 }; 1996 ssiu34: ssiu-28 { 1997 dmas = <&audma0 0x27>, <&audma1 0x28>; 1998 dma-names = "rx", "tx"; 1999 }; 2000 ssiu35: ssiu-29 { 2001 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2002 dma-names = "rx", "tx"; 2003 }; 2004 ssiu36: ssiu-30 { 2005 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2006 dma-names = "rx", "tx"; 2007 }; 2008 ssiu37: ssiu-31 { 2009 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2010 dma-names = "rx", "tx"; 2011 }; 2012 ssiu40: ssiu-32 { 2013 dmas = <&audma0 0x71>, <&audma1 0x72>; 2014 dma-names = "rx", "tx"; 2015 }; 2016 ssiu41: ssiu-33 { 2017 dmas = <&audma0 0x17>, <&audma1 0x18>; 2018 dma-names = "rx", "tx"; 2019 }; 2020 ssiu42: ssiu-34 { 2021 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2022 dma-names = "rx", "tx"; 2023 }; 2024 ssiu43: ssiu-35 { 2025 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2026 dma-names = "rx", "tx"; 2027 }; 2028 ssiu44: ssiu-36 { 2029 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2030 dma-names = "rx", "tx"; 2031 }; 2032 ssiu45: ssiu-37 { 2033 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2034 dma-names = "rx", "tx"; 2035 }; 2036 ssiu46: ssiu-38 { 2037 dmas = <&audma0 0x31>, <&audma1 0x32>; 2038 dma-names = "rx", "tx"; 2039 }; 2040 ssiu47: ssiu-39 { 2041 dmas = <&audma0 0x33>, <&audma1 0x34>; 2042 dma-names = "rx", "tx"; 2043 }; 2044 ssiu50: ssiu-40 { 2045 dmas = <&audma0 0x73>, <&audma1 0x74>; 2046 dma-names = "rx", "tx"; 2047 }; 2048 ssiu60: ssiu-41 { 2049 dmas = <&audma0 0x75>, <&audma1 0x76>; 2050 dma-names = "rx", "tx"; 2051 }; 2052 ssiu70: ssiu-42 { 2053 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2054 dma-names = "rx", "tx"; 2055 }; 2056 ssiu80: ssiu-43 { 2057 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2058 dma-names = "rx", "tx"; 2059 }; 2060 ssiu90: ssiu-44 { 2061 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2062 dma-names = "rx", "tx"; 2063 }; 2064 ssiu91: ssiu-45 { 2065 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2066 dma-names = "rx", "tx"; 2067 }; 2068 ssiu92: ssiu-46 { 2069 dmas = <&audma0 0x81>, <&audma1 0x82>; 2070 dma-names = "rx", "tx"; 2071 }; 2072 ssiu93: ssiu-47 { 2073 dmas = <&audma0 0x83>, <&audma1 0x84>; 2074 dma-names = "rx", "tx"; 2075 }; 2076 ssiu94: ssiu-48 { 2077 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2078 dma-names = "rx", "tx"; 2079 }; 2080 ssiu95: ssiu-49 { 2081 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2082 dma-names = "rx", "tx"; 2083 }; 2084 ssiu96: ssiu-50 { 2085 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2086 dma-names = "rx", "tx"; 2087 }; 2088 ssiu97: ssiu-51 { 2089 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2090 dma-names = "rx", "tx"; 2091 }; 2092 }; 2093 2094 rcar_sound,ssi { 2095 ssi0: ssi-0 { 2096 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2097 dmas = <&audma0 0x01>, <&audma1 0x02>; 2098 dma-names = "rx", "tx"; 2099 }; 2100 ssi1: ssi-1 { 2101 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2102 dmas = <&audma0 0x03>, <&audma1 0x04>; 2103 dma-names = "rx", "tx"; 2104 }; 2105 ssi2: ssi-2 { 2106 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2107 dmas = <&audma0 0x05>, <&audma1 0x06>; 2108 dma-names = "rx", "tx"; 2109 }; 2110 ssi3: ssi-3 { 2111 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2112 dmas = <&audma0 0x07>, <&audma1 0x08>; 2113 dma-names = "rx", "tx"; 2114 }; 2115 ssi4: ssi-4 { 2116 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2117 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2118 dma-names = "rx", "tx"; 2119 }; 2120 ssi5: ssi-5 { 2121 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2122 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2123 dma-names = "rx", "tx"; 2124 }; 2125 ssi6: ssi-6 { 2126 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2127 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2128 dma-names = "rx", "tx"; 2129 }; 2130 ssi7: ssi-7 { 2131 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2132 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2133 dma-names = "rx", "tx"; 2134 }; 2135 ssi8: ssi-8 { 2136 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2137 dmas = <&audma0 0x11>, <&audma1 0x12>; 2138 dma-names = "rx", "tx"; 2139 }; 2140 ssi9: ssi-9 { 2141 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2142 dmas = <&audma0 0x13>, <&audma1 0x14>; 2143 dma-names = "rx", "tx"; 2144 }; 2145 }; 2146 }; 2147 2148 audma0: dma-controller@ec700000 { 2149 compatible = "renesas,dmac-r8a77965", 2150 "renesas,rcar-dmac"; 2151 reg = <0 0xec700000 0 0x10000>; 2152 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2153 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2154 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2155 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2156 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2157 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2158 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2159 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2160 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2161 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2162 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2163 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2164 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2165 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2166 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2167 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2168 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2169 interrupt-names = "error", 2170 "ch0", "ch1", "ch2", "ch3", 2171 "ch4", "ch5", "ch6", "ch7", 2172 "ch8", "ch9", "ch10", "ch11", 2173 "ch12", "ch13", "ch14", "ch15"; 2174 clocks = <&cpg CPG_MOD 502>; 2175 clock-names = "fck"; 2176 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2177 resets = <&cpg 502>; 2178 #dma-cells = <1>; 2179 dma-channels = <16>; 2180 }; 2181 2182 audma1: dma-controller@ec720000 { 2183 compatible = "renesas,dmac-r8a77965", 2184 "renesas,rcar-dmac"; 2185 reg = <0 0xec720000 0 0x10000>; 2186 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2187 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2188 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2189 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2190 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2191 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2192 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2193 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2194 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2195 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2196 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2197 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2198 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2199 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2200 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2201 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2202 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2203 interrupt-names = "error", 2204 "ch0", "ch1", "ch2", "ch3", 2205 "ch4", "ch5", "ch6", "ch7", 2206 "ch8", "ch9", "ch10", "ch11", 2207 "ch12", "ch13", "ch14", "ch15"; 2208 clocks = <&cpg CPG_MOD 501>; 2209 clock-names = "fck"; 2210 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2211 resets = <&cpg 501>; 2212 #dma-cells = <1>; 2213 dma-channels = <16>; 2214 }; 2215 2216 xhci0: usb@ee000000 { 2217 compatible = "renesas,xhci-r8a77965", 2218 "renesas,rcar-gen3-xhci"; 2219 reg = <0 0xee000000 0 0xc00>; 2220 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2221 clocks = <&cpg CPG_MOD 328>; 2222 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2223 resets = <&cpg 328>; 2224 status = "disabled"; 2225 }; 2226 2227 usb3_peri0: usb@ee020000 { 2228 compatible = "renesas,r8a77965-usb3-peri", 2229 "renesas,rcar-gen3-usb3-peri"; 2230 reg = <0 0xee020000 0 0x400>; 2231 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2232 clocks = <&cpg CPG_MOD 328>; 2233 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2234 resets = <&cpg 328>; 2235 status = "disabled"; 2236 }; 2237 2238 ohci0: usb@ee080000 { 2239 compatible = "generic-ohci"; 2240 reg = <0 0xee080000 0 0x100>; 2241 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2242 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2243 phys = <&usb2_phy0 1>; 2244 phy-names = "usb"; 2245 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2246 resets = <&cpg 703>, <&cpg 704>; 2247 status = "disabled"; 2248 }; 2249 2250 ohci1: usb@ee0a0000 { 2251 compatible = "generic-ohci"; 2252 reg = <0 0xee0a0000 0 0x100>; 2253 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2254 clocks = <&cpg CPG_MOD 702>; 2255 phys = <&usb2_phy1 1>; 2256 phy-names = "usb"; 2257 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2258 resets = <&cpg 702>; 2259 status = "disabled"; 2260 }; 2261 2262 ehci0: usb@ee080100 { 2263 compatible = "generic-ehci"; 2264 reg = <0 0xee080100 0 0x100>; 2265 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2266 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2267 phys = <&usb2_phy0 2>; 2268 phy-names = "usb"; 2269 companion = <&ohci0>; 2270 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2271 resets = <&cpg 703>, <&cpg 704>; 2272 status = "disabled"; 2273 }; 2274 2275 ehci1: usb@ee0a0100 { 2276 compatible = "generic-ehci"; 2277 reg = <0 0xee0a0100 0 0x100>; 2278 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2279 clocks = <&cpg CPG_MOD 702>; 2280 phys = <&usb2_phy1 2>; 2281 phy-names = "usb"; 2282 companion = <&ohci1>; 2283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2284 resets = <&cpg 702>; 2285 status = "disabled"; 2286 }; 2287 2288 usb2_phy0: usb-phy@ee080200 { 2289 compatible = "renesas,usb2-phy-r8a77965", 2290 "renesas,rcar-gen3-usb2-phy"; 2291 reg = <0 0xee080200 0 0x700>; 2292 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2293 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2294 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2295 resets = <&cpg 703>, <&cpg 704>; 2296 #phy-cells = <1>; 2297 status = "disabled"; 2298 }; 2299 2300 usb2_phy1: usb-phy@ee0a0200 { 2301 compatible = "renesas,usb2-phy-r8a77965", 2302 "renesas,rcar-gen3-usb2-phy"; 2303 reg = <0 0xee0a0200 0 0x700>; 2304 clocks = <&cpg CPG_MOD 702>; 2305 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2306 resets = <&cpg 702>; 2307 #phy-cells = <1>; 2308 status = "disabled"; 2309 }; 2310 2311 sdhi0: mmc@ee100000 { 2312 compatible = "renesas,sdhi-r8a77965", 2313 "renesas,rcar-gen3-sdhi"; 2314 reg = <0 0xee100000 0 0x2000>; 2315 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2316 clocks = <&cpg CPG_MOD 314>; 2317 max-frequency = <200000000>; 2318 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2319 resets = <&cpg 314>; 2320 iommus = <&ipmmu_ds1 32>; 2321 status = "disabled"; 2322 }; 2323 2324 sdhi1: mmc@ee120000 { 2325 compatible = "renesas,sdhi-r8a77965", 2326 "renesas,rcar-gen3-sdhi"; 2327 reg = <0 0xee120000 0 0x2000>; 2328 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2329 clocks = <&cpg CPG_MOD 313>; 2330 max-frequency = <200000000>; 2331 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2332 resets = <&cpg 313>; 2333 iommus = <&ipmmu_ds1 33>; 2334 status = "disabled"; 2335 }; 2336 2337 sdhi2: mmc@ee140000 { 2338 compatible = "renesas,sdhi-r8a77965", 2339 "renesas,rcar-gen3-sdhi"; 2340 reg = <0 0xee140000 0 0x2000>; 2341 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2342 clocks = <&cpg CPG_MOD 312>; 2343 max-frequency = <200000000>; 2344 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2345 resets = <&cpg 312>; 2346 iommus = <&ipmmu_ds1 34>; 2347 status = "disabled"; 2348 }; 2349 2350 sdhi3: mmc@ee160000 { 2351 compatible = "renesas,sdhi-r8a77965", 2352 "renesas,rcar-gen3-sdhi"; 2353 reg = <0 0xee160000 0 0x2000>; 2354 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2355 clocks = <&cpg CPG_MOD 311>; 2356 max-frequency = <200000000>; 2357 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2358 resets = <&cpg 311>; 2359 iommus = <&ipmmu_ds1 35>; 2360 status = "disabled"; 2361 }; 2362 2363 sata: sata@ee300000 { 2364 compatible = "renesas,sata-r8a77965", 2365 "renesas,rcar-gen3-sata"; 2366 reg = <0 0xee300000 0 0x200000>; 2367 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2368 clocks = <&cpg CPG_MOD 815>; 2369 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2370 resets = <&cpg 815>; 2371 status = "disabled"; 2372 }; 2373 2374 gic: interrupt-controller@f1010000 { 2375 compatible = "arm,gic-400"; 2376 #interrupt-cells = <3>; 2377 #address-cells = <0>; 2378 interrupt-controller; 2379 reg = <0x0 0xf1010000 0 0x1000>, 2380 <0x0 0xf1020000 0 0x20000>, 2381 <0x0 0xf1040000 0 0x20000>, 2382 <0x0 0xf1060000 0 0x20000>; 2383 interrupts = <GIC_PPI 9 2384 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2385 clocks = <&cpg CPG_MOD 408>; 2386 clock-names = "clk"; 2387 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2388 resets = <&cpg 408>; 2389 }; 2390 2391 pciec0: pcie@fe000000 { 2392 compatible = "renesas,pcie-r8a77965", 2393 "renesas,pcie-rcar-gen3"; 2394 reg = <0 0xfe000000 0 0x80000>; 2395 #address-cells = <3>; 2396 #size-cells = <2>; 2397 bus-range = <0x00 0xff>; 2398 device_type = "pci"; 2399 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2400 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2401 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2402 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2403 /* Map all possible DDR as inbound ranges */ 2404 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2405 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2406 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2407 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2408 #interrupt-cells = <1>; 2409 interrupt-map-mask = <0 0 0 0>; 2410 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2411 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2412 clock-names = "pcie", "pcie_bus"; 2413 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2414 resets = <&cpg 319>; 2415 status = "disabled"; 2416 }; 2417 2418 pciec1: pcie@ee800000 { 2419 compatible = "renesas,pcie-r8a77965", 2420 "renesas,pcie-rcar-gen3"; 2421 reg = <0 0xee800000 0 0x80000>; 2422 #address-cells = <3>; 2423 #size-cells = <2>; 2424 bus-range = <0x00 0xff>; 2425 device_type = "pci"; 2426 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2427 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2428 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2429 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2430 /* Map all possible DDR as inbound ranges */ 2431 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2432 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2433 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2434 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2435 #interrupt-cells = <1>; 2436 interrupt-map-mask = <0 0 0 0>; 2437 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2438 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2439 clock-names = "pcie", "pcie_bus"; 2440 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2441 resets = <&cpg 318>; 2442 status = "disabled"; 2443 }; 2444 2445 fdp1@fe940000 { 2446 compatible = "renesas,fdp1"; 2447 reg = <0 0xfe940000 0 0x2400>; 2448 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2449 clocks = <&cpg CPG_MOD 119>; 2450 power-domains = <&sysc R8A77965_PD_A3VP>; 2451 resets = <&cpg 119>; 2452 renesas,fcp = <&fcpf0>; 2453 }; 2454 2455 fcpf0: fcp@fe950000 { 2456 compatible = "renesas,fcpf"; 2457 reg = <0 0xfe950000 0 0x200>; 2458 clocks = <&cpg CPG_MOD 615>; 2459 power-domains = <&sysc R8A77965_PD_A3VP>; 2460 resets = <&cpg 615>; 2461 }; 2462 2463 vspb: vsp@fe960000 { 2464 compatible = "renesas,vsp2"; 2465 reg = <0 0xfe960000 0 0x8000>; 2466 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2467 clocks = <&cpg CPG_MOD 626>; 2468 power-domains = <&sysc R8A77965_PD_A3VP>; 2469 resets = <&cpg 626>; 2470 2471 renesas,fcp = <&fcpvb0>; 2472 }; 2473 2474 vspi0: vsp@fe9a0000 { 2475 compatible = "renesas,vsp2"; 2476 reg = <0 0xfe9a0000 0 0x8000>; 2477 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2478 clocks = <&cpg CPG_MOD 631>; 2479 power-domains = <&sysc R8A77965_PD_A3VP>; 2480 resets = <&cpg 631>; 2481 2482 renesas,fcp = <&fcpvi0>; 2483 }; 2484 2485 vspd0: vsp@fea20000 { 2486 compatible = "renesas,vsp2"; 2487 reg = <0 0xfea20000 0 0x5000>; 2488 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2489 clocks = <&cpg CPG_MOD 623>; 2490 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2491 resets = <&cpg 623>; 2492 2493 renesas,fcp = <&fcpvd0>; 2494 }; 2495 2496 vspd1: vsp@fea28000 { 2497 compatible = "renesas,vsp2"; 2498 reg = <0 0xfea28000 0 0x5000>; 2499 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2500 clocks = <&cpg CPG_MOD 622>; 2501 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2502 resets = <&cpg 622>; 2503 2504 renesas,fcp = <&fcpvd1>; 2505 }; 2506 2507 fcpvb0: fcp@fe96f000 { 2508 compatible = "renesas,fcpv"; 2509 reg = <0 0xfe96f000 0 0x200>; 2510 clocks = <&cpg CPG_MOD 607>; 2511 power-domains = <&sysc R8A77965_PD_A3VP>; 2512 resets = <&cpg 607>; 2513 }; 2514 2515 fcpvd0: fcp@fea27000 { 2516 compatible = "renesas,fcpv"; 2517 reg = <0 0xfea27000 0 0x200>; 2518 clocks = <&cpg CPG_MOD 603>; 2519 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2520 resets = <&cpg 603>; 2521 }; 2522 2523 fcpvd1: fcp@fea2f000 { 2524 compatible = "renesas,fcpv"; 2525 reg = <0 0xfea2f000 0 0x200>; 2526 clocks = <&cpg CPG_MOD 602>; 2527 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2528 resets = <&cpg 602>; 2529 }; 2530 2531 fcpvi0: fcp@fe9af000 { 2532 compatible = "renesas,fcpv"; 2533 reg = <0 0xfe9af000 0 0x200>; 2534 clocks = <&cpg CPG_MOD 611>; 2535 power-domains = <&sysc R8A77965_PD_A3VP>; 2536 resets = <&cpg 611>; 2537 }; 2538 2539 cmm0: cmm@fea40000 { 2540 compatible = "renesas,r8a77965-cmm", 2541 "renesas,rcar-gen3-cmm"; 2542 reg = <0 0xfea40000 0 0x1000>; 2543 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2544 clocks = <&cpg CPG_MOD 711>; 2545 resets = <&cpg 711>; 2546 }; 2547 2548 cmm1: cmm@fea50000 { 2549 compatible = "renesas,r8a77965-cmm", 2550 "renesas,rcar-gen3-cmm"; 2551 reg = <0 0xfea50000 0 0x1000>; 2552 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2553 clocks = <&cpg CPG_MOD 710>; 2554 resets = <&cpg 710>; 2555 }; 2556 2557 cmm3: cmm@fea70000 { 2558 compatible = "renesas,r8a77965-cmm", 2559 "renesas,rcar-gen3-cmm"; 2560 reg = <0 0xfea70000 0 0x1000>; 2561 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2562 clocks = <&cpg CPG_MOD 708>; 2563 resets = <&cpg 708>; 2564 }; 2565 2566 csi20: csi2@fea80000 { 2567 compatible = "renesas,r8a77965-csi2"; 2568 reg = <0 0xfea80000 0 0x10000>; 2569 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2570 clocks = <&cpg CPG_MOD 714>; 2571 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2572 resets = <&cpg 714>; 2573 status = "disabled"; 2574 2575 ports { 2576 #address-cells = <1>; 2577 #size-cells = <0>; 2578 2579 port@0 { 2580 reg = <0>; 2581 }; 2582 2583 port@1 { 2584 #address-cells = <1>; 2585 #size-cells = <0>; 2586 2587 reg = <1>; 2588 2589 csi20vin0: endpoint@0 { 2590 reg = <0>; 2591 remote-endpoint = <&vin0csi20>; 2592 }; 2593 csi20vin1: endpoint@1 { 2594 reg = <1>; 2595 remote-endpoint = <&vin1csi20>; 2596 }; 2597 csi20vin2: endpoint@2 { 2598 reg = <2>; 2599 remote-endpoint = <&vin2csi20>; 2600 }; 2601 csi20vin3: endpoint@3 { 2602 reg = <3>; 2603 remote-endpoint = <&vin3csi20>; 2604 }; 2605 csi20vin4: endpoint@4 { 2606 reg = <4>; 2607 remote-endpoint = <&vin4csi20>; 2608 }; 2609 csi20vin5: endpoint@5 { 2610 reg = <5>; 2611 remote-endpoint = <&vin5csi20>; 2612 }; 2613 csi20vin6: endpoint@6 { 2614 reg = <6>; 2615 remote-endpoint = <&vin6csi20>; 2616 }; 2617 csi20vin7: endpoint@7 { 2618 reg = <7>; 2619 remote-endpoint = <&vin7csi20>; 2620 }; 2621 }; 2622 }; 2623 }; 2624 2625 csi40: csi2@feaa0000 { 2626 compatible = "renesas,r8a77965-csi2"; 2627 reg = <0 0xfeaa0000 0 0x10000>; 2628 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2629 clocks = <&cpg CPG_MOD 716>; 2630 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2631 resets = <&cpg 716>; 2632 status = "disabled"; 2633 2634 ports { 2635 #address-cells = <1>; 2636 #size-cells = <0>; 2637 2638 port@0 { 2639 reg = <0>; 2640 }; 2641 2642 port@1 { 2643 #address-cells = <1>; 2644 #size-cells = <0>; 2645 2646 reg = <1>; 2647 2648 csi40vin0: endpoint@0 { 2649 reg = <0>; 2650 remote-endpoint = <&vin0csi40>; 2651 }; 2652 csi40vin1: endpoint@1 { 2653 reg = <1>; 2654 remote-endpoint = <&vin1csi40>; 2655 }; 2656 csi40vin2: endpoint@2 { 2657 reg = <2>; 2658 remote-endpoint = <&vin2csi40>; 2659 }; 2660 csi40vin3: endpoint@3 { 2661 reg = <3>; 2662 remote-endpoint = <&vin3csi40>; 2663 }; 2664 csi40vin4: endpoint@4 { 2665 reg = <4>; 2666 remote-endpoint = <&vin4csi40>; 2667 }; 2668 csi40vin5: endpoint@5 { 2669 reg = <5>; 2670 remote-endpoint = <&vin5csi40>; 2671 }; 2672 csi40vin6: endpoint@6 { 2673 reg = <6>; 2674 remote-endpoint = <&vin6csi40>; 2675 }; 2676 csi40vin7: endpoint@7 { 2677 reg = <7>; 2678 remote-endpoint = <&vin7csi40>; 2679 }; 2680 }; 2681 }; 2682 }; 2683 2684 hdmi0: hdmi@fead0000 { 2685 compatible = "renesas,r8a77965-hdmi", 2686 "renesas,rcar-gen3-hdmi"; 2687 reg = <0 0xfead0000 0 0x10000>; 2688 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2689 clocks = <&cpg CPG_MOD 729>, 2690 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2691 clock-names = "iahb", "isfr"; 2692 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2693 resets = <&cpg 729>; 2694 status = "disabled"; 2695 2696 ports { 2697 #address-cells = <1>; 2698 #size-cells = <0>; 2699 port@0 { 2700 reg = <0>; 2701 dw_hdmi0_in: endpoint { 2702 remote-endpoint = <&du_out_hdmi0>; 2703 }; 2704 }; 2705 port@1 { 2706 reg = <1>; 2707 }; 2708 }; 2709 }; 2710 2711 du: display@feb00000 { 2712 compatible = "renesas,du-r8a77965"; 2713 reg = <0 0xfeb00000 0 0x80000>; 2714 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2715 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2716 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2717 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2718 <&cpg CPG_MOD 721>; 2719 clock-names = "du.0", "du.1", "du.3"; 2720 resets = <&cpg 724>, <&cpg 722>; 2721 reset-names = "du.0", "du.3"; 2722 2723 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; 2724 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2725 2726 status = "disabled"; 2727 2728 ports { 2729 #address-cells = <1>; 2730 #size-cells = <0>; 2731 2732 port@0 { 2733 reg = <0>; 2734 du_out_rgb: endpoint { 2735 }; 2736 }; 2737 port@1 { 2738 reg = <1>; 2739 du_out_hdmi0: endpoint { 2740 remote-endpoint = <&dw_hdmi0_in>; 2741 }; 2742 }; 2743 port@2 { 2744 reg = <2>; 2745 du_out_lvds0: endpoint { 2746 remote-endpoint = <&lvds0_in>; 2747 }; 2748 }; 2749 }; 2750 }; 2751 2752 lvds0: lvds@feb90000 { 2753 compatible = "renesas,r8a77965-lvds"; 2754 reg = <0 0xfeb90000 0 0x14>; 2755 clocks = <&cpg CPG_MOD 727>; 2756 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2757 resets = <&cpg 727>; 2758 status = "disabled"; 2759 2760 ports { 2761 #address-cells = <1>; 2762 #size-cells = <0>; 2763 2764 port@0 { 2765 reg = <0>; 2766 lvds0_in: endpoint { 2767 remote-endpoint = <&du_out_lvds0>; 2768 }; 2769 }; 2770 port@1 { 2771 reg = <1>; 2772 lvds0_out: endpoint { 2773 }; 2774 }; 2775 }; 2776 }; 2777 2778 prr: chipid@fff00044 { 2779 compatible = "renesas,prr"; 2780 reg = <0 0xfff00044 0 4>; 2781 }; 2782 }; 2783 2784 thermal-zones { 2785 sensor_thermal1: sensor-thermal1 { 2786 polling-delay-passive = <250>; 2787 polling-delay = <1000>; 2788 thermal-sensors = <&tsc 0>; 2789 sustainable-power = <2439>; 2790 2791 trips { 2792 sensor1_crit: sensor1-crit { 2793 temperature = <120000>; 2794 hysteresis = <1000>; 2795 type = "critical"; 2796 }; 2797 }; 2798 }; 2799 2800 sensor_thermal2: sensor-thermal2 { 2801 polling-delay-passive = <250>; 2802 polling-delay = <1000>; 2803 thermal-sensors = <&tsc 1>; 2804 sustainable-power = <2439>; 2805 2806 trips { 2807 sensor2_crit: sensor2-crit { 2808 temperature = <120000>; 2809 hysteresis = <1000>; 2810 type = "critical"; 2811 }; 2812 }; 2813 }; 2814 2815 sensor_thermal3: sensor-thermal3 { 2816 polling-delay-passive = <250>; 2817 polling-delay = <1000>; 2818 thermal-sensors = <&tsc 2>; 2819 sustainable-power = <2439>; 2820 2821 trips { 2822 target: trip-point1 { 2823 /* miliCelsius */ 2824 temperature = <100000>; 2825 hysteresis = <1000>; 2826 type = "passive"; 2827 }; 2828 2829 sensor3_crit: sensor3-crit { 2830 temperature = <120000>; 2831 hysteresis = <1000>; 2832 type = "critical"; 2833 }; 2834 }; 2835 2836 cooling-maps { 2837 map0 { 2838 trip = <&target>; 2839 cooling-device = <&a57_0 2 4>; 2840 contribution = <1024>; 2841 }; 2842 }; 2843 }; 2844 }; 2845 2846 timer { 2847 compatible = "arm,armv8-timer"; 2848 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2849 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2850 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2851 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2852 }; 2853 2854 /* External USB clocks - can be overridden by the board */ 2855 usb3s0_clk: usb3s0 { 2856 compatible = "fixed-clock"; 2857 #clock-cells = <0>; 2858 clock-frequency = <0>; 2859 }; 2860 2861 usb_extal_clk: usb_extal { 2862 compatible = "fixed-clock"; 2863 #clock-cells = <0>; 2864 clock-frequency = <0>; 2865 }; 2866}; 2867