1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 16 17#define SOC_HAS_SATA 18 19/ { 20 compatible = "renesas,r8a77965"; 21 #address-cells = <2>; 22 #size-cells = <2>; 23 24 aliases { 25 i2c0 = &i2c0; 26 i2c1 = &i2c1; 27 i2c2 = &i2c2; 28 i2c3 = &i2c3; 29 i2c4 = &i2c4; 30 i2c5 = &i2c5; 31 i2c6 = &i2c6; 32 i2c7 = &i2c_dvfs; 33 }; 34 35 /* 36 * The external audio clocks are configured as 0 Hz fixed frequency 37 * clocks by default. 38 * Boards that provide audio clocks should override them. 39 */ 40 audio_clk_a: audio_clk_a { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <0>; 44 }; 45 46 audio_clk_b: audio_clk_b { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 50 }; 51 52 audio_clk_c: audio_clk_c { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 /* External CAN clock - to be overridden by boards that provide it */ 59 can_clk: can { 60 compatible = "fixed-clock"; 61 #clock-cells = <0>; 62 clock-frequency = <0>; 63 }; 64 65 cluster0_opp: opp-table-0 { 66 compatible = "operating-points-v2"; 67 opp-shared; 68 69 opp-500000000 { 70 opp-hz = /bits/ 64 <500000000>; 71 opp-microvolt = <830000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1000000000 { 75 opp-hz = /bits/ 64 <1000000000>; 76 opp-microvolt = <830000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1500000000 { 80 opp-hz = /bits/ 64 <1500000000>; 81 opp-microvolt = <830000>; 82 clock-latency-ns = <300000>; 83 opp-suspend; 84 }; 85 opp-1600000000 { 86 opp-hz = /bits/ 64 <1600000000>; 87 opp-microvolt = <900000>; 88 clock-latency-ns = <300000>; 89 turbo-mode; 90 }; 91 opp-1700000000 { 92 opp-hz = /bits/ 64 <1700000000>; 93 opp-microvolt = <900000>; 94 clock-latency-ns = <300000>; 95 turbo-mode; 96 }; 97 opp-1800000000 { 98 opp-hz = /bits/ 64 <1800000000>; 99 opp-microvolt = <960000>; 100 clock-latency-ns = <300000>; 101 turbo-mode; 102 }; 103 }; 104 105 cpus { 106 #address-cells = <1>; 107 #size-cells = <0>; 108 109 a57_0: cpu@0 { 110 compatible = "arm,cortex-a57"; 111 reg = <0x0>; 112 device_type = "cpu"; 113 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 114 next-level-cache = <&L2_CA57>; 115 enable-method = "psci"; 116 cpu-idle-states = <&CPU_SLEEP_0>; 117 #cooling-cells = <2>; 118 dynamic-power-coefficient = <854>; 119 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 120 operating-points-v2 = <&cluster0_opp>; 121 }; 122 123 a57_1: cpu@1 { 124 compatible = "arm,cortex-a57"; 125 reg = <0x1>; 126 device_type = "cpu"; 127 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 128 next-level-cache = <&L2_CA57>; 129 enable-method = "psci"; 130 cpu-idle-states = <&CPU_SLEEP_0>; 131 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 132 operating-points-v2 = <&cluster0_opp>; 133 }; 134 135 L2_CA57: cache-controller-0 { 136 compatible = "cache"; 137 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 138 cache-unified; 139 cache-level = <2>; 140 }; 141 142 idle-states { 143 entry-method = "psci"; 144 145 CPU_SLEEP_0: cpu-sleep-0 { 146 compatible = "arm,idle-state"; 147 arm,psci-suspend-param = <0x0010000>; 148 local-timer-stop; 149 entry-latency-us = <400>; 150 exit-latency-us = <500>; 151 min-residency-us = <4000>; 152 }; 153 }; 154 }; 155 156 extal_clk: extal { 157 compatible = "fixed-clock"; 158 #clock-cells = <0>; 159 /* This value must be overridden by the board */ 160 clock-frequency = <0>; 161 }; 162 163 extalr_clk: extalr { 164 compatible = "fixed-clock"; 165 #clock-cells = <0>; 166 /* This value must be overridden by the board */ 167 clock-frequency = <0>; 168 }; 169 170 /* External PCIe clock - can be overridden by the board */ 171 pcie_bus_clk: pcie_bus { 172 compatible = "fixed-clock"; 173 #clock-cells = <0>; 174 clock-frequency = <0>; 175 }; 176 177 pmu_a57 { 178 compatible = "arm,cortex-a57-pmu"; 179 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 180 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 181 interrupt-affinity = <&a57_0>, 182 <&a57_1>; 183 }; 184 185 psci { 186 compatible = "arm,psci-1.0", "arm,psci-0.2"; 187 method = "smc"; 188 }; 189 190 /* External SCIF clock - to be overridden by boards that provide it */ 191 scif_clk: scif { 192 compatible = "fixed-clock"; 193 #clock-cells = <0>; 194 clock-frequency = <0>; 195 }; 196 197 soc { 198 compatible = "simple-bus"; 199 interrupt-parent = <&gic>; 200 #address-cells = <2>; 201 #size-cells = <2>; 202 ranges; 203 204 rwdt: watchdog@e6020000 { 205 compatible = "renesas,r8a77965-wdt", 206 "renesas,rcar-gen3-wdt"; 207 reg = <0 0xe6020000 0 0x0c>; 208 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 209 clocks = <&cpg CPG_MOD 402>; 210 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 211 resets = <&cpg 402>; 212 status = "disabled"; 213 }; 214 215 gpio0: gpio@e6050000 { 216 compatible = "renesas,gpio-r8a77965", 217 "renesas,rcar-gen3-gpio"; 218 reg = <0 0xe6050000 0 0x50>; 219 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 220 #gpio-cells = <2>; 221 gpio-controller; 222 gpio-ranges = <&pfc 0 0 16>; 223 #interrupt-cells = <2>; 224 interrupt-controller; 225 clocks = <&cpg CPG_MOD 912>; 226 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 227 resets = <&cpg 912>; 228 }; 229 230 gpio1: gpio@e6051000 { 231 compatible = "renesas,gpio-r8a77965", 232 "renesas,rcar-gen3-gpio"; 233 reg = <0 0xe6051000 0 0x50>; 234 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 235 #gpio-cells = <2>; 236 gpio-controller; 237 gpio-ranges = <&pfc 0 32 29>; 238 #interrupt-cells = <2>; 239 interrupt-controller; 240 clocks = <&cpg CPG_MOD 911>; 241 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 242 resets = <&cpg 911>; 243 }; 244 245 gpio2: gpio@e6052000 { 246 compatible = "renesas,gpio-r8a77965", 247 "renesas,rcar-gen3-gpio"; 248 reg = <0 0xe6052000 0 0x50>; 249 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 250 #gpio-cells = <2>; 251 gpio-controller; 252 gpio-ranges = <&pfc 0 64 15>; 253 #interrupt-cells = <2>; 254 interrupt-controller; 255 clocks = <&cpg CPG_MOD 910>; 256 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 257 resets = <&cpg 910>; 258 }; 259 260 gpio3: gpio@e6053000 { 261 compatible = "renesas,gpio-r8a77965", 262 "renesas,rcar-gen3-gpio"; 263 reg = <0 0xe6053000 0 0x50>; 264 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 265 #gpio-cells = <2>; 266 gpio-controller; 267 gpio-ranges = <&pfc 0 96 16>; 268 #interrupt-cells = <2>; 269 interrupt-controller; 270 clocks = <&cpg CPG_MOD 909>; 271 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 272 resets = <&cpg 909>; 273 }; 274 275 gpio4: gpio@e6054000 { 276 compatible = "renesas,gpio-r8a77965", 277 "renesas,rcar-gen3-gpio"; 278 reg = <0 0xe6054000 0 0x50>; 279 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 280 #gpio-cells = <2>; 281 gpio-controller; 282 gpio-ranges = <&pfc 0 128 18>; 283 #interrupt-cells = <2>; 284 interrupt-controller; 285 clocks = <&cpg CPG_MOD 908>; 286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 287 resets = <&cpg 908>; 288 }; 289 290 gpio5: gpio@e6055000 { 291 compatible = "renesas,gpio-r8a77965", 292 "renesas,rcar-gen3-gpio"; 293 reg = <0 0xe6055000 0 0x50>; 294 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 295 #gpio-cells = <2>; 296 gpio-controller; 297 gpio-ranges = <&pfc 0 160 26>; 298 #interrupt-cells = <2>; 299 interrupt-controller; 300 clocks = <&cpg CPG_MOD 907>; 301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 302 resets = <&cpg 907>; 303 }; 304 305 gpio6: gpio@e6055400 { 306 compatible = "renesas,gpio-r8a77965", 307 "renesas,rcar-gen3-gpio"; 308 reg = <0 0xe6055400 0 0x50>; 309 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 310 #gpio-cells = <2>; 311 gpio-controller; 312 gpio-ranges = <&pfc 0 192 32>; 313 #interrupt-cells = <2>; 314 interrupt-controller; 315 clocks = <&cpg CPG_MOD 906>; 316 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 317 resets = <&cpg 906>; 318 }; 319 320 gpio7: gpio@e6055800 { 321 compatible = "renesas,gpio-r8a77965", 322 "renesas,rcar-gen3-gpio"; 323 reg = <0 0xe6055800 0 0x50>; 324 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 325 #gpio-cells = <2>; 326 gpio-controller; 327 gpio-ranges = <&pfc 0 224 4>; 328 #interrupt-cells = <2>; 329 interrupt-controller; 330 clocks = <&cpg CPG_MOD 905>; 331 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 332 resets = <&cpg 905>; 333 }; 334 335 pfc: pinctrl@e6060000 { 336 compatible = "renesas,pfc-r8a77965"; 337 reg = <0 0xe6060000 0 0x50c>; 338 }; 339 340 cmt0: timer@e60f0000 { 341 compatible = "renesas,r8a77965-cmt0", 342 "renesas,rcar-gen3-cmt0"; 343 reg = <0 0xe60f0000 0 0x1004>; 344 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 346 clocks = <&cpg CPG_MOD 303>; 347 clock-names = "fck"; 348 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 349 resets = <&cpg 303>; 350 status = "disabled"; 351 }; 352 353 cmt1: timer@e6130000 { 354 compatible = "renesas,r8a77965-cmt1", 355 "renesas,rcar-gen3-cmt1"; 356 reg = <0 0xe6130000 0 0x1004>; 357 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 364 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 365 clocks = <&cpg CPG_MOD 302>; 366 clock-names = "fck"; 367 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 368 resets = <&cpg 302>; 369 status = "disabled"; 370 }; 371 372 cmt2: timer@e6140000 { 373 compatible = "renesas,r8a77965-cmt1", 374 "renesas,rcar-gen3-cmt1"; 375 reg = <0 0xe6140000 0 0x1004>; 376 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 378 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 379 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 380 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 381 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 383 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 384 clocks = <&cpg CPG_MOD 301>; 385 clock-names = "fck"; 386 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 387 resets = <&cpg 301>; 388 status = "disabled"; 389 }; 390 391 cmt3: timer@e6148000 { 392 compatible = "renesas,r8a77965-cmt1", 393 "renesas,rcar-gen3-cmt1"; 394 reg = <0 0xe6148000 0 0x1004>; 395 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 403 clocks = <&cpg CPG_MOD 300>; 404 clock-names = "fck"; 405 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 406 resets = <&cpg 300>; 407 status = "disabled"; 408 }; 409 410 cpg: clock-controller@e6150000 { 411 compatible = "renesas,r8a77965-cpg-mssr"; 412 reg = <0 0xe6150000 0 0x1000>; 413 clocks = <&extal_clk>, <&extalr_clk>; 414 clock-names = "extal", "extalr"; 415 #clock-cells = <2>; 416 #power-domain-cells = <0>; 417 #reset-cells = <1>; 418 }; 419 420 rst: reset-controller@e6160000 { 421 compatible = "renesas,r8a77965-rst"; 422 reg = <0 0xe6160000 0 0x0200>; 423 }; 424 425 sysc: system-controller@e6180000 { 426 compatible = "renesas,r8a77965-sysc"; 427 reg = <0 0xe6180000 0 0x0400>; 428 #power-domain-cells = <1>; 429 }; 430 431 tsc: thermal@e6198000 { 432 compatible = "renesas,r8a77965-thermal"; 433 reg = <0 0xe6198000 0 0x100>, 434 <0 0xe61a0000 0 0x100>, 435 <0 0xe61a8000 0 0x100>; 436 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 437 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 438 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 439 clocks = <&cpg CPG_MOD 522>; 440 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 441 resets = <&cpg 522>; 442 #thermal-sensor-cells = <1>; 443 }; 444 445 intc_ex: interrupt-controller@e61c0000 { 446 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 447 #interrupt-cells = <2>; 448 interrupt-controller; 449 reg = <0 0xe61c0000 0 0x200>; 450 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 451 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 454 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 455 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 456 clocks = <&cpg CPG_MOD 407>; 457 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 458 resets = <&cpg 407>; 459 }; 460 461 tmu0: timer@e61e0000 { 462 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 463 reg = <0 0xe61e0000 0 0x30>; 464 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 465 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 466 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 467 clocks = <&cpg CPG_MOD 125>; 468 clock-names = "fck"; 469 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 470 resets = <&cpg 125>; 471 status = "disabled"; 472 }; 473 474 tmu1: timer@e6fc0000 { 475 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 476 reg = <0 0xe6fc0000 0 0x30>; 477 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 478 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 480 clocks = <&cpg CPG_MOD 124>; 481 clock-names = "fck"; 482 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 483 resets = <&cpg 124>; 484 status = "disabled"; 485 }; 486 487 tmu2: timer@e6fd0000 { 488 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 489 reg = <0 0xe6fd0000 0 0x30>; 490 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 492 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 493 clocks = <&cpg CPG_MOD 123>; 494 clock-names = "fck"; 495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 496 resets = <&cpg 123>; 497 status = "disabled"; 498 }; 499 500 tmu3: timer@e6fe0000 { 501 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 502 reg = <0 0xe6fe0000 0 0x30>; 503 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 504 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 505 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 506 clocks = <&cpg CPG_MOD 122>; 507 clock-names = "fck"; 508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 509 resets = <&cpg 122>; 510 status = "disabled"; 511 }; 512 513 tmu4: timer@ffc00000 { 514 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 515 reg = <0 0xffc00000 0 0x30>; 516 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 518 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 519 clocks = <&cpg CPG_MOD 121>; 520 clock-names = "fck"; 521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 522 resets = <&cpg 121>; 523 status = "disabled"; 524 }; 525 526 i2c0: i2c@e6500000 { 527 #address-cells = <1>; 528 #size-cells = <0>; 529 compatible = "renesas,i2c-r8a77965", 530 "renesas,rcar-gen3-i2c"; 531 reg = <0 0xe6500000 0 0x40>; 532 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 533 clocks = <&cpg CPG_MOD 931>; 534 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 535 resets = <&cpg 931>; 536 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 537 <&dmac2 0x91>, <&dmac2 0x90>; 538 dma-names = "tx", "rx", "tx", "rx"; 539 i2c-scl-internal-delay-ns = <110>; 540 status = "disabled"; 541 }; 542 543 i2c1: i2c@e6508000 { 544 #address-cells = <1>; 545 #size-cells = <0>; 546 compatible = "renesas,i2c-r8a77965", 547 "renesas,rcar-gen3-i2c"; 548 reg = <0 0xe6508000 0 0x40>; 549 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 550 clocks = <&cpg CPG_MOD 930>; 551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 552 resets = <&cpg 930>; 553 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 554 <&dmac2 0x93>, <&dmac2 0x92>; 555 dma-names = "tx", "rx", "tx", "rx"; 556 i2c-scl-internal-delay-ns = <6>; 557 status = "disabled"; 558 }; 559 560 i2c2: i2c@e6510000 { 561 #address-cells = <1>; 562 #size-cells = <0>; 563 compatible = "renesas,i2c-r8a77965", 564 "renesas,rcar-gen3-i2c"; 565 reg = <0 0xe6510000 0 0x40>; 566 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&cpg CPG_MOD 929>; 568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 569 resets = <&cpg 929>; 570 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 571 <&dmac2 0x95>, <&dmac2 0x94>; 572 dma-names = "tx", "rx", "tx", "rx"; 573 i2c-scl-internal-delay-ns = <6>; 574 status = "disabled"; 575 }; 576 577 i2c3: i2c@e66d0000 { 578 #address-cells = <1>; 579 #size-cells = <0>; 580 compatible = "renesas,i2c-r8a77965", 581 "renesas,rcar-gen3-i2c"; 582 reg = <0 0xe66d0000 0 0x40>; 583 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 584 clocks = <&cpg CPG_MOD 928>; 585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 586 resets = <&cpg 928>; 587 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 588 dma-names = "tx", "rx"; 589 i2c-scl-internal-delay-ns = <110>; 590 status = "disabled"; 591 }; 592 593 i2c4: i2c@e66d8000 { 594 #address-cells = <1>; 595 #size-cells = <0>; 596 compatible = "renesas,i2c-r8a77965", 597 "renesas,rcar-gen3-i2c"; 598 reg = <0 0xe66d8000 0 0x40>; 599 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 600 clocks = <&cpg CPG_MOD 927>; 601 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 602 resets = <&cpg 927>; 603 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 604 dma-names = "tx", "rx"; 605 i2c-scl-internal-delay-ns = <110>; 606 status = "disabled"; 607 }; 608 609 i2c5: i2c@e66e0000 { 610 #address-cells = <1>; 611 #size-cells = <0>; 612 compatible = "renesas,i2c-r8a77965", 613 "renesas,rcar-gen3-i2c"; 614 reg = <0 0xe66e0000 0 0x40>; 615 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 616 clocks = <&cpg CPG_MOD 919>; 617 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 618 resets = <&cpg 919>; 619 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 620 dma-names = "tx", "rx"; 621 i2c-scl-internal-delay-ns = <110>; 622 status = "disabled"; 623 }; 624 625 i2c6: i2c@e66e8000 { 626 #address-cells = <1>; 627 #size-cells = <0>; 628 compatible = "renesas,i2c-r8a77965", 629 "renesas,rcar-gen3-i2c"; 630 reg = <0 0xe66e8000 0 0x40>; 631 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 632 clocks = <&cpg CPG_MOD 918>; 633 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 634 resets = <&cpg 918>; 635 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 636 dma-names = "tx", "rx"; 637 i2c-scl-internal-delay-ns = <6>; 638 status = "disabled"; 639 }; 640 641 i2c_dvfs: i2c@e60b0000 { 642 #address-cells = <1>; 643 #size-cells = <0>; 644 compatible = "renesas,iic-r8a77965", 645 "renesas,rcar-gen3-iic", 646 "renesas,rmobile-iic"; 647 reg = <0 0xe60b0000 0 0x425>; 648 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 649 clocks = <&cpg CPG_MOD 926>; 650 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 651 resets = <&cpg 926>; 652 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 653 dma-names = "tx", "rx"; 654 status = "disabled"; 655 }; 656 657 hscif0: serial@e6540000 { 658 compatible = "renesas,hscif-r8a77965", 659 "renesas,rcar-gen3-hscif", 660 "renesas,hscif"; 661 reg = <0 0xe6540000 0 0x60>; 662 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 663 clocks = <&cpg CPG_MOD 520>, 664 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 665 <&scif_clk>; 666 clock-names = "fck", "brg_int", "scif_clk"; 667 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 668 <&dmac2 0x31>, <&dmac2 0x30>; 669 dma-names = "tx", "rx", "tx", "rx"; 670 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 671 resets = <&cpg 520>; 672 status = "disabled"; 673 }; 674 675 hscif1: serial@e6550000 { 676 compatible = "renesas,hscif-r8a77965", 677 "renesas,rcar-gen3-hscif", 678 "renesas,hscif"; 679 reg = <0 0xe6550000 0 0x60>; 680 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 681 clocks = <&cpg CPG_MOD 519>, 682 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 683 <&scif_clk>; 684 clock-names = "fck", "brg_int", "scif_clk"; 685 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 686 <&dmac2 0x33>, <&dmac2 0x32>; 687 dma-names = "tx", "rx", "tx", "rx"; 688 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 689 resets = <&cpg 519>; 690 status = "disabled"; 691 }; 692 693 hscif2: serial@e6560000 { 694 compatible = "renesas,hscif-r8a77965", 695 "renesas,rcar-gen3-hscif", 696 "renesas,hscif"; 697 reg = <0 0xe6560000 0 0x60>; 698 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 699 clocks = <&cpg CPG_MOD 518>, 700 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 701 <&scif_clk>; 702 clock-names = "fck", "brg_int", "scif_clk"; 703 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 704 <&dmac2 0x35>, <&dmac2 0x34>; 705 dma-names = "tx", "rx", "tx", "rx"; 706 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 707 resets = <&cpg 518>; 708 status = "disabled"; 709 }; 710 711 hscif3: serial@e66a0000 { 712 compatible = "renesas,hscif-r8a77965", 713 "renesas,rcar-gen3-hscif", 714 "renesas,hscif"; 715 reg = <0 0xe66a0000 0 0x60>; 716 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 717 clocks = <&cpg CPG_MOD 517>, 718 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 719 <&scif_clk>; 720 clock-names = "fck", "brg_int", "scif_clk"; 721 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 722 dma-names = "tx", "rx"; 723 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 724 resets = <&cpg 517>; 725 status = "disabled"; 726 }; 727 728 hscif4: serial@e66b0000 { 729 compatible = "renesas,hscif-r8a77965", 730 "renesas,rcar-gen3-hscif", 731 "renesas,hscif"; 732 reg = <0 0xe66b0000 0 0x60>; 733 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 734 clocks = <&cpg CPG_MOD 516>, 735 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 736 <&scif_clk>; 737 clock-names = "fck", "brg_int", "scif_clk"; 738 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 739 dma-names = "tx", "rx"; 740 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 741 resets = <&cpg 516>; 742 status = "disabled"; 743 }; 744 745 hsusb: usb@e6590000 { 746 compatible = "renesas,usbhs-r8a77965", 747 "renesas,rcar-gen3-usbhs"; 748 reg = <0 0xe6590000 0 0x200>; 749 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 750 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 751 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 752 <&usb_dmac1 0>, <&usb_dmac1 1>; 753 dma-names = "ch0", "ch1", "ch2", "ch3"; 754 renesas,buswait = <11>; 755 phys = <&usb2_phy0 3>; 756 phy-names = "usb"; 757 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 758 resets = <&cpg 704>, <&cpg 703>; 759 status = "disabled"; 760 }; 761 762 usb_dmac0: dma-controller@e65a0000 { 763 compatible = "renesas,r8a77965-usb-dmac", 764 "renesas,usb-dmac"; 765 reg = <0 0xe65a0000 0 0x100>; 766 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 768 interrupt-names = "ch0", "ch1"; 769 clocks = <&cpg CPG_MOD 330>; 770 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 771 resets = <&cpg 330>; 772 #dma-cells = <1>; 773 dma-channels = <2>; 774 }; 775 776 usb_dmac1: dma-controller@e65b0000 { 777 compatible = "renesas,r8a77965-usb-dmac", 778 "renesas,usb-dmac"; 779 reg = <0 0xe65b0000 0 0x100>; 780 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 782 interrupt-names = "ch0", "ch1"; 783 clocks = <&cpg CPG_MOD 331>; 784 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 785 resets = <&cpg 331>; 786 #dma-cells = <1>; 787 dma-channels = <2>; 788 }; 789 790 usb3_phy0: usb-phy@e65ee000 { 791 compatible = "renesas,r8a77965-usb3-phy", 792 "renesas,rcar-gen3-usb3-phy"; 793 reg = <0 0xe65ee000 0 0x90>; 794 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 795 <&usb_extal_clk>; 796 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 797 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 798 resets = <&cpg 328>; 799 #phy-cells = <0>; 800 status = "disabled"; 801 }; 802 803 arm_cc630p: crypto@e6601000 { 804 compatible = "arm,cryptocell-630p-ree"; 805 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 806 reg = <0x0 0xe6601000 0 0x1000>; 807 clocks = <&cpg CPG_MOD 229>; 808 resets = <&cpg 229>; 809 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 810 }; 811 812 dmac0: dma-controller@e6700000 { 813 compatible = "renesas,dmac-r8a77965", 814 "renesas,rcar-dmac"; 815 reg = <0 0xe6700000 0 0x10000>; 816 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 833 interrupt-names = "error", 834 "ch0", "ch1", "ch2", "ch3", 835 "ch4", "ch5", "ch6", "ch7", 836 "ch8", "ch9", "ch10", "ch11", 837 "ch12", "ch13", "ch14", "ch15"; 838 clocks = <&cpg CPG_MOD 219>; 839 clock-names = "fck"; 840 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 841 resets = <&cpg 219>; 842 #dma-cells = <1>; 843 dma-channels = <16>; 844 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 845 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 846 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 847 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 848 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 849 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 850 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 851 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 852 }; 853 854 dmac1: dma-controller@e7300000 { 855 compatible = "renesas,dmac-r8a77965", 856 "renesas,rcar-dmac"; 857 reg = <0 0xe7300000 0 0x10000>; 858 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 875 interrupt-names = "error", 876 "ch0", "ch1", "ch2", "ch3", 877 "ch4", "ch5", "ch6", "ch7", 878 "ch8", "ch9", "ch10", "ch11", 879 "ch12", "ch13", "ch14", "ch15"; 880 clocks = <&cpg CPG_MOD 218>; 881 clock-names = "fck"; 882 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 883 resets = <&cpg 218>; 884 #dma-cells = <1>; 885 dma-channels = <16>; 886 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 887 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 888 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 889 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 890 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 891 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 892 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 893 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 894 }; 895 896 dmac2: dma-controller@e7310000 { 897 compatible = "renesas,dmac-r8a77965", 898 "renesas,rcar-dmac"; 899 reg = <0 0xe7310000 0 0x10000>; 900 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 906 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 907 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 908 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 909 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 914 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 915 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 916 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 917 interrupt-names = "error", 918 "ch0", "ch1", "ch2", "ch3", 919 "ch4", "ch5", "ch6", "ch7", 920 "ch8", "ch9", "ch10", "ch11", 921 "ch12", "ch13", "ch14", "ch15"; 922 clocks = <&cpg CPG_MOD 217>; 923 clock-names = "fck"; 924 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 925 resets = <&cpg 217>; 926 #dma-cells = <1>; 927 dma-channels = <16>; 928 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 929 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 930 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 931 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 932 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 933 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 934 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 935 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 936 }; 937 938 ipmmu_ds0: iommu@e6740000 { 939 compatible = "renesas,ipmmu-r8a77965"; 940 reg = <0 0xe6740000 0 0x1000>; 941 renesas,ipmmu-main = <&ipmmu_mm 0>; 942 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 943 #iommu-cells = <1>; 944 }; 945 946 ipmmu_ds1: iommu@e7740000 { 947 compatible = "renesas,ipmmu-r8a77965"; 948 reg = <0 0xe7740000 0 0x1000>; 949 renesas,ipmmu-main = <&ipmmu_mm 1>; 950 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 951 #iommu-cells = <1>; 952 }; 953 954 ipmmu_hc: iommu@e6570000 { 955 compatible = "renesas,ipmmu-r8a77965"; 956 reg = <0 0xe6570000 0 0x1000>; 957 renesas,ipmmu-main = <&ipmmu_mm 2>; 958 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 959 #iommu-cells = <1>; 960 }; 961 962 ipmmu_mm: iommu@e67b0000 { 963 compatible = "renesas,ipmmu-r8a77965"; 964 reg = <0 0xe67b0000 0 0x1000>; 965 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 967 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 968 #iommu-cells = <1>; 969 }; 970 971 ipmmu_mp: iommu@ec670000 { 972 compatible = "renesas,ipmmu-r8a77965"; 973 reg = <0 0xec670000 0 0x1000>; 974 renesas,ipmmu-main = <&ipmmu_mm 4>; 975 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 976 #iommu-cells = <1>; 977 }; 978 979 ipmmu_pv0: iommu@fd800000 { 980 compatible = "renesas,ipmmu-r8a77965"; 981 reg = <0 0xfd800000 0 0x1000>; 982 renesas,ipmmu-main = <&ipmmu_mm 6>; 983 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 984 #iommu-cells = <1>; 985 }; 986 987 ipmmu_rt: iommu@ffc80000 { 988 compatible = "renesas,ipmmu-r8a77965"; 989 reg = <0 0xffc80000 0 0x1000>; 990 renesas,ipmmu-main = <&ipmmu_mm 10>; 991 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 992 #iommu-cells = <1>; 993 }; 994 995 ipmmu_vc0: iommu@fe6b0000 { 996 compatible = "renesas,ipmmu-r8a77965"; 997 reg = <0 0xfe6b0000 0 0x1000>; 998 renesas,ipmmu-main = <&ipmmu_mm 12>; 999 power-domains = <&sysc R8A77965_PD_A3VC>; 1000 #iommu-cells = <1>; 1001 }; 1002 1003 ipmmu_vi0: iommu@febd0000 { 1004 compatible = "renesas,ipmmu-r8a77965"; 1005 reg = <0 0xfebd0000 0 0x1000>; 1006 renesas,ipmmu-main = <&ipmmu_mm 14>; 1007 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1008 #iommu-cells = <1>; 1009 }; 1010 1011 ipmmu_vp0: iommu@fe990000 { 1012 compatible = "renesas,ipmmu-r8a77965"; 1013 reg = <0 0xfe990000 0 0x1000>; 1014 renesas,ipmmu-main = <&ipmmu_mm 16>; 1015 power-domains = <&sysc R8A77965_PD_A3VP>; 1016 #iommu-cells = <1>; 1017 }; 1018 1019 avb: ethernet@e6800000 { 1020 compatible = "renesas,etheravb-r8a77965", 1021 "renesas,etheravb-rcar-gen3"; 1022 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1023 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1046 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1047 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1048 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1049 "ch4", "ch5", "ch6", "ch7", 1050 "ch8", "ch9", "ch10", "ch11", 1051 "ch12", "ch13", "ch14", "ch15", 1052 "ch16", "ch17", "ch18", "ch19", 1053 "ch20", "ch21", "ch22", "ch23", 1054 "ch24"; 1055 clocks = <&cpg CPG_MOD 812>; 1056 clock-names = "fck"; 1057 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1058 resets = <&cpg 812>; 1059 phy-mode = "rgmii"; 1060 rx-internal-delay-ps = <0>; 1061 tx-internal-delay-ps = <0>; 1062 iommus = <&ipmmu_ds0 16>; 1063 #address-cells = <1>; 1064 #size-cells = <0>; 1065 status = "disabled"; 1066 }; 1067 1068 can0: can@e6c30000 { 1069 compatible = "renesas,can-r8a77965", 1070 "renesas,rcar-gen3-can"; 1071 reg = <0 0xe6c30000 0 0x1000>; 1072 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1073 clocks = <&cpg CPG_MOD 916>, 1074 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1075 <&can_clk>; 1076 clock-names = "clkp1", "clkp2", "can_clk"; 1077 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1078 assigned-clock-rates = <40000000>; 1079 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1080 resets = <&cpg 916>; 1081 status = "disabled"; 1082 }; 1083 1084 can1: can@e6c38000 { 1085 compatible = "renesas,can-r8a77965", 1086 "renesas,rcar-gen3-can"; 1087 reg = <0 0xe6c38000 0 0x1000>; 1088 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1089 clocks = <&cpg CPG_MOD 915>, 1090 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1091 <&can_clk>; 1092 clock-names = "clkp1", "clkp2", "can_clk"; 1093 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1094 assigned-clock-rates = <40000000>; 1095 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1096 resets = <&cpg 915>; 1097 status = "disabled"; 1098 }; 1099 1100 canfd: can@e66c0000 { 1101 compatible = "renesas,r8a77965-canfd", 1102 "renesas,rcar-gen3-canfd"; 1103 reg = <0 0xe66c0000 0 0x8000>; 1104 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1105 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1106 clocks = <&cpg CPG_MOD 914>, 1107 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1108 <&can_clk>; 1109 clock-names = "fck", "canfd", "can_clk"; 1110 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1111 assigned-clock-rates = <40000000>; 1112 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1113 resets = <&cpg 914>; 1114 status = "disabled"; 1115 1116 channel0 { 1117 status = "disabled"; 1118 }; 1119 1120 channel1 { 1121 status = "disabled"; 1122 }; 1123 }; 1124 1125 pwm0: pwm@e6e30000 { 1126 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1127 reg = <0 0xe6e30000 0 8>; 1128 #pwm-cells = <2>; 1129 clocks = <&cpg CPG_MOD 523>; 1130 resets = <&cpg 523>; 1131 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1132 status = "disabled"; 1133 }; 1134 1135 pwm1: pwm@e6e31000 { 1136 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1137 reg = <0 0xe6e31000 0 8>; 1138 #pwm-cells = <2>; 1139 clocks = <&cpg CPG_MOD 523>; 1140 resets = <&cpg 523>; 1141 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1142 status = "disabled"; 1143 }; 1144 1145 pwm2: pwm@e6e32000 { 1146 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1147 reg = <0 0xe6e32000 0 8>; 1148 #pwm-cells = <2>; 1149 clocks = <&cpg CPG_MOD 523>; 1150 resets = <&cpg 523>; 1151 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1152 status = "disabled"; 1153 }; 1154 1155 pwm3: pwm@e6e33000 { 1156 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1157 reg = <0 0xe6e33000 0 8>; 1158 #pwm-cells = <2>; 1159 clocks = <&cpg CPG_MOD 523>; 1160 resets = <&cpg 523>; 1161 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1162 status = "disabled"; 1163 }; 1164 1165 pwm4: pwm@e6e34000 { 1166 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1167 reg = <0 0xe6e34000 0 8>; 1168 #pwm-cells = <2>; 1169 clocks = <&cpg CPG_MOD 523>; 1170 resets = <&cpg 523>; 1171 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1172 status = "disabled"; 1173 }; 1174 1175 pwm5: pwm@e6e35000 { 1176 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1177 reg = <0 0xe6e35000 0 8>; 1178 #pwm-cells = <2>; 1179 clocks = <&cpg CPG_MOD 523>; 1180 resets = <&cpg 523>; 1181 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1182 status = "disabled"; 1183 }; 1184 1185 pwm6: pwm@e6e36000 { 1186 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1187 reg = <0 0xe6e36000 0 8>; 1188 #pwm-cells = <2>; 1189 clocks = <&cpg CPG_MOD 523>; 1190 resets = <&cpg 523>; 1191 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1192 status = "disabled"; 1193 }; 1194 1195 scif0: serial@e6e60000 { 1196 compatible = "renesas,scif-r8a77965", 1197 "renesas,rcar-gen3-scif", "renesas,scif"; 1198 reg = <0 0xe6e60000 0 64>; 1199 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1200 clocks = <&cpg CPG_MOD 207>, 1201 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1202 <&scif_clk>; 1203 clock-names = "fck", "brg_int", "scif_clk"; 1204 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1205 <&dmac2 0x51>, <&dmac2 0x50>; 1206 dma-names = "tx", "rx", "tx", "rx"; 1207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1208 resets = <&cpg 207>; 1209 status = "disabled"; 1210 }; 1211 1212 scif1: serial@e6e68000 { 1213 compatible = "renesas,scif-r8a77965", 1214 "renesas,rcar-gen3-scif", "renesas,scif"; 1215 reg = <0 0xe6e68000 0 64>; 1216 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1217 clocks = <&cpg CPG_MOD 206>, 1218 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1219 <&scif_clk>; 1220 clock-names = "fck", "brg_int", "scif_clk"; 1221 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1222 <&dmac2 0x53>, <&dmac2 0x52>; 1223 dma-names = "tx", "rx", "tx", "rx"; 1224 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1225 resets = <&cpg 206>; 1226 status = "disabled"; 1227 }; 1228 1229 scif2: serial@e6e88000 { 1230 compatible = "renesas,scif-r8a77965", 1231 "renesas,rcar-gen3-scif", "renesas,scif"; 1232 reg = <0 0xe6e88000 0 64>; 1233 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1234 clocks = <&cpg CPG_MOD 310>, 1235 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1236 <&scif_clk>; 1237 clock-names = "fck", "brg_int", "scif_clk"; 1238 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1239 <&dmac2 0x13>, <&dmac2 0x12>; 1240 dma-names = "tx", "rx", "tx", "rx"; 1241 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1242 resets = <&cpg 310>; 1243 status = "disabled"; 1244 }; 1245 1246 scif3: serial@e6c50000 { 1247 compatible = "renesas,scif-r8a77965", 1248 "renesas,rcar-gen3-scif", "renesas,scif"; 1249 reg = <0 0xe6c50000 0 64>; 1250 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1251 clocks = <&cpg CPG_MOD 204>, 1252 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1253 <&scif_clk>; 1254 clock-names = "fck", "brg_int", "scif_clk"; 1255 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1256 dma-names = "tx", "rx"; 1257 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1258 resets = <&cpg 204>; 1259 status = "disabled"; 1260 }; 1261 1262 scif4: serial@e6c40000 { 1263 compatible = "renesas,scif-r8a77965", 1264 "renesas,rcar-gen3-scif", "renesas,scif"; 1265 reg = <0 0xe6c40000 0 64>; 1266 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1267 clocks = <&cpg CPG_MOD 203>, 1268 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1269 <&scif_clk>; 1270 clock-names = "fck", "brg_int", "scif_clk"; 1271 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1272 dma-names = "tx", "rx"; 1273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1274 resets = <&cpg 203>; 1275 status = "disabled"; 1276 }; 1277 1278 scif5: serial@e6f30000 { 1279 compatible = "renesas,scif-r8a77965", 1280 "renesas,rcar-gen3-scif", "renesas,scif"; 1281 reg = <0 0xe6f30000 0 64>; 1282 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1283 clocks = <&cpg CPG_MOD 202>, 1284 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1285 <&scif_clk>; 1286 clock-names = "fck", "brg_int", "scif_clk"; 1287 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1288 <&dmac2 0x5b>, <&dmac2 0x5a>; 1289 dma-names = "tx", "rx", "tx", "rx"; 1290 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1291 resets = <&cpg 202>; 1292 status = "disabled"; 1293 }; 1294 1295 tpu: pwm@e6e80000 { 1296 compatible = "renesas,tpu-r8a77965", "renesas,tpu"; 1297 reg = <0 0xe6e80000 0 0x148>; 1298 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1299 clocks = <&cpg CPG_MOD 304>; 1300 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1301 resets = <&cpg 304>; 1302 #pwm-cells = <3>; 1303 status = "disabled"; 1304 }; 1305 1306 msiof0: spi@e6e90000 { 1307 compatible = "renesas,msiof-r8a77965", 1308 "renesas,rcar-gen3-msiof"; 1309 reg = <0 0xe6e90000 0 0x0064>; 1310 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1311 clocks = <&cpg CPG_MOD 211>; 1312 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1313 <&dmac2 0x41>, <&dmac2 0x40>; 1314 dma-names = "tx", "rx", "tx", "rx"; 1315 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1316 resets = <&cpg 211>; 1317 #address-cells = <1>; 1318 #size-cells = <0>; 1319 status = "disabled"; 1320 }; 1321 1322 msiof1: spi@e6ea0000 { 1323 compatible = "renesas,msiof-r8a77965", 1324 "renesas,rcar-gen3-msiof"; 1325 reg = <0 0xe6ea0000 0 0x0064>; 1326 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1327 clocks = <&cpg CPG_MOD 210>; 1328 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1329 <&dmac2 0x43>, <&dmac2 0x42>; 1330 dma-names = "tx", "rx", "tx", "rx"; 1331 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1332 resets = <&cpg 210>; 1333 #address-cells = <1>; 1334 #size-cells = <0>; 1335 status = "disabled"; 1336 }; 1337 1338 msiof2: spi@e6c00000 { 1339 compatible = "renesas,msiof-r8a77965", 1340 "renesas,rcar-gen3-msiof"; 1341 reg = <0 0xe6c00000 0 0x0064>; 1342 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1343 clocks = <&cpg CPG_MOD 209>; 1344 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1345 dma-names = "tx", "rx"; 1346 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1347 resets = <&cpg 209>; 1348 #address-cells = <1>; 1349 #size-cells = <0>; 1350 status = "disabled"; 1351 }; 1352 1353 msiof3: spi@e6c10000 { 1354 compatible = "renesas,msiof-r8a77965", 1355 "renesas,rcar-gen3-msiof"; 1356 reg = <0 0xe6c10000 0 0x0064>; 1357 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1358 clocks = <&cpg CPG_MOD 208>; 1359 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1360 dma-names = "tx", "rx"; 1361 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1362 resets = <&cpg 208>; 1363 #address-cells = <1>; 1364 #size-cells = <0>; 1365 status = "disabled"; 1366 }; 1367 1368 vin0: video@e6ef0000 { 1369 compatible = "renesas,vin-r8a77965"; 1370 reg = <0 0xe6ef0000 0 0x1000>; 1371 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1372 clocks = <&cpg CPG_MOD 811>; 1373 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1374 resets = <&cpg 811>; 1375 renesas,id = <0>; 1376 status = "disabled"; 1377 1378 ports { 1379 #address-cells = <1>; 1380 #size-cells = <0>; 1381 1382 port@1 { 1383 #address-cells = <1>; 1384 #size-cells = <0>; 1385 1386 reg = <1>; 1387 1388 vin0csi20: endpoint@0 { 1389 reg = <0>; 1390 remote-endpoint = <&csi20vin0>; 1391 }; 1392 vin0csi40: endpoint@2 { 1393 reg = <2>; 1394 remote-endpoint = <&csi40vin0>; 1395 }; 1396 }; 1397 }; 1398 }; 1399 1400 vin1: video@e6ef1000 { 1401 compatible = "renesas,vin-r8a77965"; 1402 reg = <0 0xe6ef1000 0 0x1000>; 1403 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1404 clocks = <&cpg CPG_MOD 810>; 1405 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1406 resets = <&cpg 810>; 1407 renesas,id = <1>; 1408 status = "disabled"; 1409 1410 ports { 1411 #address-cells = <1>; 1412 #size-cells = <0>; 1413 1414 port@1 { 1415 #address-cells = <1>; 1416 #size-cells = <0>; 1417 1418 reg = <1>; 1419 1420 vin1csi20: endpoint@0 { 1421 reg = <0>; 1422 remote-endpoint = <&csi20vin1>; 1423 }; 1424 vin1csi40: endpoint@2 { 1425 reg = <2>; 1426 remote-endpoint = <&csi40vin1>; 1427 }; 1428 }; 1429 }; 1430 }; 1431 1432 vin2: video@e6ef2000 { 1433 compatible = "renesas,vin-r8a77965"; 1434 reg = <0 0xe6ef2000 0 0x1000>; 1435 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1436 clocks = <&cpg CPG_MOD 809>; 1437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1438 resets = <&cpg 809>; 1439 renesas,id = <2>; 1440 status = "disabled"; 1441 1442 ports { 1443 #address-cells = <1>; 1444 #size-cells = <0>; 1445 1446 port@1 { 1447 #address-cells = <1>; 1448 #size-cells = <0>; 1449 1450 reg = <1>; 1451 1452 vin2csi20: endpoint@0 { 1453 reg = <0>; 1454 remote-endpoint = <&csi20vin2>; 1455 }; 1456 vin2csi40: endpoint@2 { 1457 reg = <2>; 1458 remote-endpoint = <&csi40vin2>; 1459 }; 1460 }; 1461 }; 1462 }; 1463 1464 vin3: video@e6ef3000 { 1465 compatible = "renesas,vin-r8a77965"; 1466 reg = <0 0xe6ef3000 0 0x1000>; 1467 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1468 clocks = <&cpg CPG_MOD 808>; 1469 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1470 resets = <&cpg 808>; 1471 renesas,id = <3>; 1472 status = "disabled"; 1473 1474 ports { 1475 #address-cells = <1>; 1476 #size-cells = <0>; 1477 1478 port@1 { 1479 #address-cells = <1>; 1480 #size-cells = <0>; 1481 1482 reg = <1>; 1483 1484 vin3csi20: endpoint@0 { 1485 reg = <0>; 1486 remote-endpoint = <&csi20vin3>; 1487 }; 1488 vin3csi40: endpoint@2 { 1489 reg = <2>; 1490 remote-endpoint = <&csi40vin3>; 1491 }; 1492 }; 1493 }; 1494 }; 1495 1496 vin4: video@e6ef4000 { 1497 compatible = "renesas,vin-r8a77965"; 1498 reg = <0 0xe6ef4000 0 0x1000>; 1499 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1500 clocks = <&cpg CPG_MOD 807>; 1501 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1502 resets = <&cpg 807>; 1503 renesas,id = <4>; 1504 status = "disabled"; 1505 1506 ports { 1507 #address-cells = <1>; 1508 #size-cells = <0>; 1509 1510 port@1 { 1511 #address-cells = <1>; 1512 #size-cells = <0>; 1513 1514 reg = <1>; 1515 1516 vin4csi20: endpoint@0 { 1517 reg = <0>; 1518 remote-endpoint = <&csi20vin4>; 1519 }; 1520 vin4csi40: endpoint@2 { 1521 reg = <2>; 1522 remote-endpoint = <&csi40vin4>; 1523 }; 1524 }; 1525 }; 1526 }; 1527 1528 vin5: video@e6ef5000 { 1529 compatible = "renesas,vin-r8a77965"; 1530 reg = <0 0xe6ef5000 0 0x1000>; 1531 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1532 clocks = <&cpg CPG_MOD 806>; 1533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1534 resets = <&cpg 806>; 1535 renesas,id = <5>; 1536 status = "disabled"; 1537 1538 ports { 1539 #address-cells = <1>; 1540 #size-cells = <0>; 1541 1542 port@1 { 1543 #address-cells = <1>; 1544 #size-cells = <0>; 1545 1546 reg = <1>; 1547 1548 vin5csi20: endpoint@0 { 1549 reg = <0>; 1550 remote-endpoint = <&csi20vin5>; 1551 }; 1552 vin5csi40: endpoint@2 { 1553 reg = <2>; 1554 remote-endpoint = <&csi40vin5>; 1555 }; 1556 }; 1557 }; 1558 }; 1559 1560 vin6: video@e6ef6000 { 1561 compatible = "renesas,vin-r8a77965"; 1562 reg = <0 0xe6ef6000 0 0x1000>; 1563 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1564 clocks = <&cpg CPG_MOD 805>; 1565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1566 resets = <&cpg 805>; 1567 renesas,id = <6>; 1568 status = "disabled"; 1569 1570 ports { 1571 #address-cells = <1>; 1572 #size-cells = <0>; 1573 1574 port@1 { 1575 #address-cells = <1>; 1576 #size-cells = <0>; 1577 1578 reg = <1>; 1579 1580 vin6csi20: endpoint@0 { 1581 reg = <0>; 1582 remote-endpoint = <&csi20vin6>; 1583 }; 1584 vin6csi40: endpoint@2 { 1585 reg = <2>; 1586 remote-endpoint = <&csi40vin6>; 1587 }; 1588 }; 1589 }; 1590 }; 1591 1592 vin7: video@e6ef7000 { 1593 compatible = "renesas,vin-r8a77965"; 1594 reg = <0 0xe6ef7000 0 0x1000>; 1595 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1596 clocks = <&cpg CPG_MOD 804>; 1597 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1598 resets = <&cpg 804>; 1599 renesas,id = <7>; 1600 status = "disabled"; 1601 1602 ports { 1603 #address-cells = <1>; 1604 #size-cells = <0>; 1605 1606 port@1 { 1607 #address-cells = <1>; 1608 #size-cells = <0>; 1609 1610 reg = <1>; 1611 1612 vin7csi20: endpoint@0 { 1613 reg = <0>; 1614 remote-endpoint = <&csi20vin7>; 1615 }; 1616 vin7csi40: endpoint@2 { 1617 reg = <2>; 1618 remote-endpoint = <&csi40vin7>; 1619 }; 1620 }; 1621 }; 1622 }; 1623 1624 drif00: rif@e6f40000 { 1625 compatible = "renesas,r8a77965-drif", 1626 "renesas,rcar-gen3-drif"; 1627 reg = <0 0xe6f40000 0 0x84>; 1628 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1629 clocks = <&cpg CPG_MOD 515>; 1630 clock-names = "fck"; 1631 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1632 dma-names = "rx", "rx"; 1633 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1634 resets = <&cpg 515>; 1635 renesas,bonding = <&drif01>; 1636 status = "disabled"; 1637 }; 1638 1639 drif01: rif@e6f50000 { 1640 compatible = "renesas,r8a77965-drif", 1641 "renesas,rcar-gen3-drif"; 1642 reg = <0 0xe6f50000 0 0x84>; 1643 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1644 clocks = <&cpg CPG_MOD 514>; 1645 clock-names = "fck"; 1646 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1647 dma-names = "rx", "rx"; 1648 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1649 resets = <&cpg 514>; 1650 renesas,bonding = <&drif00>; 1651 status = "disabled"; 1652 }; 1653 1654 drif10: rif@e6f60000 { 1655 compatible = "renesas,r8a77965-drif", 1656 "renesas,rcar-gen3-drif"; 1657 reg = <0 0xe6f60000 0 0x84>; 1658 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1659 clocks = <&cpg CPG_MOD 513>; 1660 clock-names = "fck"; 1661 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1662 dma-names = "rx", "rx"; 1663 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1664 resets = <&cpg 513>; 1665 renesas,bonding = <&drif11>; 1666 status = "disabled"; 1667 }; 1668 1669 drif11: rif@e6f70000 { 1670 compatible = "renesas,r8a77965-drif", 1671 "renesas,rcar-gen3-drif"; 1672 reg = <0 0xe6f70000 0 0x84>; 1673 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1674 clocks = <&cpg CPG_MOD 512>; 1675 clock-names = "fck"; 1676 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1677 dma-names = "rx", "rx"; 1678 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1679 resets = <&cpg 512>; 1680 renesas,bonding = <&drif10>; 1681 status = "disabled"; 1682 }; 1683 1684 drif20: rif@e6f80000 { 1685 compatible = "renesas,r8a77965-drif", 1686 "renesas,rcar-gen3-drif"; 1687 reg = <0 0xe6f80000 0 0x84>; 1688 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1689 clocks = <&cpg CPG_MOD 511>; 1690 clock-names = "fck"; 1691 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1692 dma-names = "rx", "rx"; 1693 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1694 resets = <&cpg 511>; 1695 renesas,bonding = <&drif21>; 1696 status = "disabled"; 1697 }; 1698 1699 drif21: rif@e6f90000 { 1700 compatible = "renesas,r8a77965-drif", 1701 "renesas,rcar-gen3-drif"; 1702 reg = <0 0xe6f90000 0 0x84>; 1703 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1704 clocks = <&cpg CPG_MOD 510>; 1705 clock-names = "fck"; 1706 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1707 dma-names = "rx", "rx"; 1708 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1709 resets = <&cpg 510>; 1710 renesas,bonding = <&drif20>; 1711 status = "disabled"; 1712 }; 1713 1714 drif30: rif@e6fa0000 { 1715 compatible = "renesas,r8a77965-drif", 1716 "renesas,rcar-gen3-drif"; 1717 reg = <0 0xe6fa0000 0 0x84>; 1718 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1719 clocks = <&cpg CPG_MOD 509>; 1720 clock-names = "fck"; 1721 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1722 dma-names = "rx", "rx"; 1723 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1724 resets = <&cpg 509>; 1725 renesas,bonding = <&drif31>; 1726 status = "disabled"; 1727 }; 1728 1729 drif31: rif@e6fb0000 { 1730 compatible = "renesas,r8a77965-drif", 1731 "renesas,rcar-gen3-drif"; 1732 reg = <0 0xe6fb0000 0 0x84>; 1733 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1734 clocks = <&cpg CPG_MOD 508>; 1735 clock-names = "fck"; 1736 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1737 dma-names = "rx", "rx"; 1738 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1739 resets = <&cpg 508>; 1740 renesas,bonding = <&drif30>; 1741 status = "disabled"; 1742 }; 1743 1744 rcar_sound: sound@ec500000 { 1745 /* 1746 * #sound-dai-cells is required 1747 * 1748 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1749 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1750 */ 1751 /* 1752 * #clock-cells is required for audio_clkout0/1/2/3 1753 * 1754 * clkout : #clock-cells = <0>; <&rcar_sound>; 1755 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1756 */ 1757 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1758 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1759 <0 0xec5a0000 0 0x100>, /* ADG */ 1760 <0 0xec540000 0 0x1000>, /* SSIU */ 1761 <0 0xec541000 0 0x280>, /* SSI */ 1762 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1763 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1764 1765 clocks = <&cpg CPG_MOD 1005>, 1766 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1767 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1768 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1769 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1770 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1771 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1772 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1773 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1774 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1775 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1776 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1777 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1778 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1779 <&audio_clk_a>, <&audio_clk_b>, 1780 <&audio_clk_c>, 1781 <&cpg CPG_CORE R8A77965_CLK_S0D4>; 1782 clock-names = "ssi-all", 1783 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1784 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1785 "ssi.1", "ssi.0", 1786 "src.9", "src.8", "src.7", "src.6", 1787 "src.5", "src.4", "src.3", "src.2", 1788 "src.1", "src.0", 1789 "mix.1", "mix.0", 1790 "ctu.1", "ctu.0", 1791 "dvc.0", "dvc.1", 1792 "clk_a", "clk_b", "clk_c", "clk_i"; 1793 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1794 resets = <&cpg 1005>, 1795 <&cpg 1006>, <&cpg 1007>, 1796 <&cpg 1008>, <&cpg 1009>, 1797 <&cpg 1010>, <&cpg 1011>, 1798 <&cpg 1012>, <&cpg 1013>, 1799 <&cpg 1014>, <&cpg 1015>; 1800 reset-names = "ssi-all", 1801 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1802 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1803 "ssi.1", "ssi.0"; 1804 status = "disabled"; 1805 1806 rcar_sound,dvc { 1807 dvc0: dvc-0 { 1808 dmas = <&audma1 0xbc>; 1809 dma-names = "tx"; 1810 }; 1811 dvc1: dvc-1 { 1812 dmas = <&audma1 0xbe>; 1813 dma-names = "tx"; 1814 }; 1815 }; 1816 1817 rcar_sound,mix { 1818 mix0: mix-0 { }; 1819 mix1: mix-1 { }; 1820 }; 1821 1822 rcar_sound,ctu { 1823 ctu00: ctu-0 { }; 1824 ctu01: ctu-1 { }; 1825 ctu02: ctu-2 { }; 1826 ctu03: ctu-3 { }; 1827 ctu10: ctu-4 { }; 1828 ctu11: ctu-5 { }; 1829 ctu12: ctu-6 { }; 1830 ctu13: ctu-7 { }; 1831 }; 1832 1833 rcar_sound,src { 1834 src0: src-0 { 1835 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1836 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1837 dma-names = "rx", "tx"; 1838 }; 1839 src1: src-1 { 1840 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1841 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1842 dma-names = "rx", "tx"; 1843 }; 1844 src2: src-2 { 1845 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1846 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1847 dma-names = "rx", "tx"; 1848 }; 1849 src3: src-3 { 1850 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1851 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1852 dma-names = "rx", "tx"; 1853 }; 1854 src4: src-4 { 1855 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1856 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1857 dma-names = "rx", "tx"; 1858 }; 1859 src5: src-5 { 1860 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1861 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1862 dma-names = "rx", "tx"; 1863 }; 1864 src6: src-6 { 1865 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1866 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1867 dma-names = "rx", "tx"; 1868 }; 1869 src7: src-7 { 1870 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1871 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1872 dma-names = "rx", "tx"; 1873 }; 1874 src8: src-8 { 1875 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1876 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1877 dma-names = "rx", "tx"; 1878 }; 1879 src9: src-9 { 1880 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1881 dmas = <&audma0 0x97>, <&audma1 0xba>; 1882 dma-names = "rx", "tx"; 1883 }; 1884 }; 1885 1886 rcar_sound,ssiu { 1887 ssiu00: ssiu-0 { 1888 dmas = <&audma0 0x15>, <&audma1 0x16>; 1889 dma-names = "rx", "tx"; 1890 }; 1891 ssiu01: ssiu-1 { 1892 dmas = <&audma0 0x35>, <&audma1 0x36>; 1893 dma-names = "rx", "tx"; 1894 }; 1895 ssiu02: ssiu-2 { 1896 dmas = <&audma0 0x37>, <&audma1 0x38>; 1897 dma-names = "rx", "tx"; 1898 }; 1899 ssiu03: ssiu-3 { 1900 dmas = <&audma0 0x47>, <&audma1 0x48>; 1901 dma-names = "rx", "tx"; 1902 }; 1903 ssiu04: ssiu-4 { 1904 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 ssiu05: ssiu-5 { 1908 dmas = <&audma0 0x43>, <&audma1 0x44>; 1909 dma-names = "rx", "tx"; 1910 }; 1911 ssiu06: ssiu-6 { 1912 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1913 dma-names = "rx", "tx"; 1914 }; 1915 ssiu07: ssiu-7 { 1916 dmas = <&audma0 0x53>, <&audma1 0x54>; 1917 dma-names = "rx", "tx"; 1918 }; 1919 ssiu10: ssiu-8 { 1920 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1921 dma-names = "rx", "tx"; 1922 }; 1923 ssiu11: ssiu-9 { 1924 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 ssiu12: ssiu-10 { 1928 dmas = <&audma0 0x57>, <&audma1 0x58>; 1929 dma-names = "rx", "tx"; 1930 }; 1931 ssiu13: ssiu-11 { 1932 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1933 dma-names = "rx", "tx"; 1934 }; 1935 ssiu14: ssiu-12 { 1936 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1937 dma-names = "rx", "tx"; 1938 }; 1939 ssiu15: ssiu-13 { 1940 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1941 dma-names = "rx", "tx"; 1942 }; 1943 ssiu16: ssiu-14 { 1944 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1945 dma-names = "rx", "tx"; 1946 }; 1947 ssiu17: ssiu-15 { 1948 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1949 dma-names = "rx", "tx"; 1950 }; 1951 ssiu20: ssiu-16 { 1952 dmas = <&audma0 0x63>, <&audma1 0x64>; 1953 dma-names = "rx", "tx"; 1954 }; 1955 ssiu21: ssiu-17 { 1956 dmas = <&audma0 0x67>, <&audma1 0x68>; 1957 dma-names = "rx", "tx"; 1958 }; 1959 ssiu22: ssiu-18 { 1960 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1961 dma-names = "rx", "tx"; 1962 }; 1963 ssiu23: ssiu-19 { 1964 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1965 dma-names = "rx", "tx"; 1966 }; 1967 ssiu24: ssiu-20 { 1968 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1969 dma-names = "rx", "tx"; 1970 }; 1971 ssiu25: ssiu-21 { 1972 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1973 dma-names = "rx", "tx"; 1974 }; 1975 ssiu26: ssiu-22 { 1976 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1977 dma-names = "rx", "tx"; 1978 }; 1979 ssiu27: ssiu-23 { 1980 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1981 dma-names = "rx", "tx"; 1982 }; 1983 ssiu30: ssiu-24 { 1984 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1985 dma-names = "rx", "tx"; 1986 }; 1987 ssiu31: ssiu-25 { 1988 dmas = <&audma0 0x21>, <&audma1 0x22>; 1989 dma-names = "rx", "tx"; 1990 }; 1991 ssiu32: ssiu-26 { 1992 dmas = <&audma0 0x23>, <&audma1 0x24>; 1993 dma-names = "rx", "tx"; 1994 }; 1995 ssiu33: ssiu-27 { 1996 dmas = <&audma0 0x25>, <&audma1 0x26>; 1997 dma-names = "rx", "tx"; 1998 }; 1999 ssiu34: ssiu-28 { 2000 dmas = <&audma0 0x27>, <&audma1 0x28>; 2001 dma-names = "rx", "tx"; 2002 }; 2003 ssiu35: ssiu-29 { 2004 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2005 dma-names = "rx", "tx"; 2006 }; 2007 ssiu36: ssiu-30 { 2008 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2009 dma-names = "rx", "tx"; 2010 }; 2011 ssiu37: ssiu-31 { 2012 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2013 dma-names = "rx", "tx"; 2014 }; 2015 ssiu40: ssiu-32 { 2016 dmas = <&audma0 0x71>, <&audma1 0x72>; 2017 dma-names = "rx", "tx"; 2018 }; 2019 ssiu41: ssiu-33 { 2020 dmas = <&audma0 0x17>, <&audma1 0x18>; 2021 dma-names = "rx", "tx"; 2022 }; 2023 ssiu42: ssiu-34 { 2024 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2025 dma-names = "rx", "tx"; 2026 }; 2027 ssiu43: ssiu-35 { 2028 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2029 dma-names = "rx", "tx"; 2030 }; 2031 ssiu44: ssiu-36 { 2032 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2033 dma-names = "rx", "tx"; 2034 }; 2035 ssiu45: ssiu-37 { 2036 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2037 dma-names = "rx", "tx"; 2038 }; 2039 ssiu46: ssiu-38 { 2040 dmas = <&audma0 0x31>, <&audma1 0x32>; 2041 dma-names = "rx", "tx"; 2042 }; 2043 ssiu47: ssiu-39 { 2044 dmas = <&audma0 0x33>, <&audma1 0x34>; 2045 dma-names = "rx", "tx"; 2046 }; 2047 ssiu50: ssiu-40 { 2048 dmas = <&audma0 0x73>, <&audma1 0x74>; 2049 dma-names = "rx", "tx"; 2050 }; 2051 ssiu60: ssiu-41 { 2052 dmas = <&audma0 0x75>, <&audma1 0x76>; 2053 dma-names = "rx", "tx"; 2054 }; 2055 ssiu70: ssiu-42 { 2056 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2057 dma-names = "rx", "tx"; 2058 }; 2059 ssiu80: ssiu-43 { 2060 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2061 dma-names = "rx", "tx"; 2062 }; 2063 ssiu90: ssiu-44 { 2064 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2065 dma-names = "rx", "tx"; 2066 }; 2067 ssiu91: ssiu-45 { 2068 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2069 dma-names = "rx", "tx"; 2070 }; 2071 ssiu92: ssiu-46 { 2072 dmas = <&audma0 0x81>, <&audma1 0x82>; 2073 dma-names = "rx", "tx"; 2074 }; 2075 ssiu93: ssiu-47 { 2076 dmas = <&audma0 0x83>, <&audma1 0x84>; 2077 dma-names = "rx", "tx"; 2078 }; 2079 ssiu94: ssiu-48 { 2080 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2081 dma-names = "rx", "tx"; 2082 }; 2083 ssiu95: ssiu-49 { 2084 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2085 dma-names = "rx", "tx"; 2086 }; 2087 ssiu96: ssiu-50 { 2088 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2089 dma-names = "rx", "tx"; 2090 }; 2091 ssiu97: ssiu-51 { 2092 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2093 dma-names = "rx", "tx"; 2094 }; 2095 }; 2096 2097 rcar_sound,ssi { 2098 ssi0: ssi-0 { 2099 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2100 dmas = <&audma0 0x01>, <&audma1 0x02>; 2101 dma-names = "rx", "tx"; 2102 }; 2103 ssi1: ssi-1 { 2104 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2105 dmas = <&audma0 0x03>, <&audma1 0x04>; 2106 dma-names = "rx", "tx"; 2107 }; 2108 ssi2: ssi-2 { 2109 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2110 dmas = <&audma0 0x05>, <&audma1 0x06>; 2111 dma-names = "rx", "tx"; 2112 }; 2113 ssi3: ssi-3 { 2114 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2115 dmas = <&audma0 0x07>, <&audma1 0x08>; 2116 dma-names = "rx", "tx"; 2117 }; 2118 ssi4: ssi-4 { 2119 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2120 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2121 dma-names = "rx", "tx"; 2122 }; 2123 ssi5: ssi-5 { 2124 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2125 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2126 dma-names = "rx", "tx"; 2127 }; 2128 ssi6: ssi-6 { 2129 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2130 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2131 dma-names = "rx", "tx"; 2132 }; 2133 ssi7: ssi-7 { 2134 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2135 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2136 dma-names = "rx", "tx"; 2137 }; 2138 ssi8: ssi-8 { 2139 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2140 dmas = <&audma0 0x11>, <&audma1 0x12>; 2141 dma-names = "rx", "tx"; 2142 }; 2143 ssi9: ssi-9 { 2144 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2145 dmas = <&audma0 0x13>, <&audma1 0x14>; 2146 dma-names = "rx", "tx"; 2147 }; 2148 }; 2149 }; 2150 2151 mlp: mlp@ec520000 { 2152 compatible = "renesas,r8a77965-mlp", 2153 "renesas,rcar-gen3-mlp"; 2154 reg = <0 0xec520000 0 0x800>; 2155 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2156 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2157 clocks = <&cpg CPG_MOD 802>; 2158 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2159 resets = <&cpg 802>; 2160 status = "disabled"; 2161 }; 2162 2163 audma0: dma-controller@ec700000 { 2164 compatible = "renesas,dmac-r8a77965", 2165 "renesas,rcar-dmac"; 2166 reg = <0 0xec700000 0 0x10000>; 2167 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2168 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2169 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2170 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2171 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2172 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2173 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2174 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2175 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2176 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2177 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2178 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2179 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2180 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2181 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2182 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2183 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2184 interrupt-names = "error", 2185 "ch0", "ch1", "ch2", "ch3", 2186 "ch4", "ch5", "ch6", "ch7", 2187 "ch8", "ch9", "ch10", "ch11", 2188 "ch12", "ch13", "ch14", "ch15"; 2189 clocks = <&cpg CPG_MOD 502>; 2190 clock-names = "fck"; 2191 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2192 resets = <&cpg 502>; 2193 #dma-cells = <1>; 2194 dma-channels = <16>; 2195 }; 2196 2197 audma1: dma-controller@ec720000 { 2198 compatible = "renesas,dmac-r8a77965", 2199 "renesas,rcar-dmac"; 2200 reg = <0 0xec720000 0 0x10000>; 2201 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2202 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2203 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2204 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2205 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2206 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2207 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2208 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2209 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2210 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2211 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2212 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2213 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2214 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2215 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2216 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2217 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2218 interrupt-names = "error", 2219 "ch0", "ch1", "ch2", "ch3", 2220 "ch4", "ch5", "ch6", "ch7", 2221 "ch8", "ch9", "ch10", "ch11", 2222 "ch12", "ch13", "ch14", "ch15"; 2223 clocks = <&cpg CPG_MOD 501>; 2224 clock-names = "fck"; 2225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2226 resets = <&cpg 501>; 2227 #dma-cells = <1>; 2228 dma-channels = <16>; 2229 }; 2230 2231 xhci0: usb@ee000000 { 2232 compatible = "renesas,xhci-r8a77965", 2233 "renesas,rcar-gen3-xhci"; 2234 reg = <0 0xee000000 0 0xc00>; 2235 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2236 clocks = <&cpg CPG_MOD 328>; 2237 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2238 resets = <&cpg 328>; 2239 status = "disabled"; 2240 }; 2241 2242 usb3_peri0: usb@ee020000 { 2243 compatible = "renesas,r8a77965-usb3-peri", 2244 "renesas,rcar-gen3-usb3-peri"; 2245 reg = <0 0xee020000 0 0x400>; 2246 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2247 clocks = <&cpg CPG_MOD 328>; 2248 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2249 resets = <&cpg 328>; 2250 status = "disabled"; 2251 }; 2252 2253 ohci0: usb@ee080000 { 2254 compatible = "generic-ohci"; 2255 reg = <0 0xee080000 0 0x100>; 2256 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2257 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2258 phys = <&usb2_phy0 1>; 2259 phy-names = "usb"; 2260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2261 resets = <&cpg 703>, <&cpg 704>; 2262 status = "disabled"; 2263 }; 2264 2265 ohci1: usb@ee0a0000 { 2266 compatible = "generic-ohci"; 2267 reg = <0 0xee0a0000 0 0x100>; 2268 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2269 clocks = <&cpg CPG_MOD 702>; 2270 phys = <&usb2_phy1 1>; 2271 phy-names = "usb"; 2272 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2273 resets = <&cpg 702>; 2274 status = "disabled"; 2275 }; 2276 2277 ehci0: usb@ee080100 { 2278 compatible = "generic-ehci"; 2279 reg = <0 0xee080100 0 0x100>; 2280 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2281 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2282 phys = <&usb2_phy0 2>; 2283 phy-names = "usb"; 2284 companion = <&ohci0>; 2285 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2286 resets = <&cpg 703>, <&cpg 704>; 2287 status = "disabled"; 2288 }; 2289 2290 ehci1: usb@ee0a0100 { 2291 compatible = "generic-ehci"; 2292 reg = <0 0xee0a0100 0 0x100>; 2293 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2294 clocks = <&cpg CPG_MOD 702>; 2295 phys = <&usb2_phy1 2>; 2296 phy-names = "usb"; 2297 companion = <&ohci1>; 2298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2299 resets = <&cpg 702>; 2300 status = "disabled"; 2301 }; 2302 2303 usb2_phy0: usb-phy@ee080200 { 2304 compatible = "renesas,usb2-phy-r8a77965", 2305 "renesas,rcar-gen3-usb2-phy"; 2306 reg = <0 0xee080200 0 0x700>; 2307 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2308 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2309 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2310 resets = <&cpg 703>, <&cpg 704>; 2311 #phy-cells = <1>; 2312 status = "disabled"; 2313 }; 2314 2315 usb2_phy1: usb-phy@ee0a0200 { 2316 compatible = "renesas,usb2-phy-r8a77965", 2317 "renesas,rcar-gen3-usb2-phy"; 2318 reg = <0 0xee0a0200 0 0x700>; 2319 clocks = <&cpg CPG_MOD 702>; 2320 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2321 resets = <&cpg 702>; 2322 #phy-cells = <1>; 2323 status = "disabled"; 2324 }; 2325 2326 sdhi0: mmc@ee100000 { 2327 compatible = "renesas,sdhi-r8a77965", 2328 "renesas,rcar-gen3-sdhi"; 2329 reg = <0 0xee100000 0 0x2000>; 2330 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2331 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>; 2332 clock-names = "core", "clkh"; 2333 max-frequency = <200000000>; 2334 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2335 resets = <&cpg 314>; 2336 iommus = <&ipmmu_ds1 32>; 2337 status = "disabled"; 2338 }; 2339 2340 sdhi1: mmc@ee120000 { 2341 compatible = "renesas,sdhi-r8a77965", 2342 "renesas,rcar-gen3-sdhi"; 2343 reg = <0 0xee120000 0 0x2000>; 2344 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2345 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>; 2346 clock-names = "core", "clkh"; 2347 max-frequency = <200000000>; 2348 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2349 resets = <&cpg 313>; 2350 iommus = <&ipmmu_ds1 33>; 2351 status = "disabled"; 2352 }; 2353 2354 sdhi2: mmc@ee140000 { 2355 compatible = "renesas,sdhi-r8a77965", 2356 "renesas,rcar-gen3-sdhi"; 2357 reg = <0 0xee140000 0 0x2000>; 2358 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2359 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>; 2360 clock-names = "core", "clkh"; 2361 max-frequency = <200000000>; 2362 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2363 resets = <&cpg 312>; 2364 iommus = <&ipmmu_ds1 34>; 2365 status = "disabled"; 2366 }; 2367 2368 sdhi3: mmc@ee160000 { 2369 compatible = "renesas,sdhi-r8a77965", 2370 "renesas,rcar-gen3-sdhi"; 2371 reg = <0 0xee160000 0 0x2000>; 2372 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2373 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>; 2374 clock-names = "core", "clkh"; 2375 max-frequency = <200000000>; 2376 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2377 resets = <&cpg 311>; 2378 iommus = <&ipmmu_ds1 35>; 2379 status = "disabled"; 2380 }; 2381 2382 rpc: spi@ee200000 { 2383 compatible = "renesas,r8a77965-rpc-if", 2384 "renesas,rcar-gen3-rpc-if"; 2385 reg = <0 0xee200000 0 0x200>, 2386 <0 0x08000000 0 0x04000000>, 2387 <0 0xee208000 0 0x100>; 2388 reg-names = "regs", "dirmap", "wbuf"; 2389 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2390 clocks = <&cpg CPG_MOD 917>; 2391 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2392 resets = <&cpg 917>; 2393 #address-cells = <1>; 2394 #size-cells = <0>; 2395 status = "disabled"; 2396 }; 2397 2398 sata: sata@ee300000 { 2399 compatible = "renesas,sata-r8a77965", 2400 "renesas,rcar-gen3-sata"; 2401 reg = <0 0xee300000 0 0x200000>; 2402 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2403 clocks = <&cpg CPG_MOD 815>; 2404 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2405 resets = <&cpg 815>; 2406 status = "disabled"; 2407 }; 2408 2409 gic: interrupt-controller@f1010000 { 2410 compatible = "arm,gic-400"; 2411 #interrupt-cells = <3>; 2412 #address-cells = <0>; 2413 interrupt-controller; 2414 reg = <0x0 0xf1010000 0 0x1000>, 2415 <0x0 0xf1020000 0 0x20000>, 2416 <0x0 0xf1040000 0 0x20000>, 2417 <0x0 0xf1060000 0 0x20000>; 2418 interrupts = <GIC_PPI 9 2419 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2420 clocks = <&cpg CPG_MOD 408>; 2421 clock-names = "clk"; 2422 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2423 resets = <&cpg 408>; 2424 }; 2425 2426 pciec0: pcie@fe000000 { 2427 compatible = "renesas,pcie-r8a77965", 2428 "renesas,pcie-rcar-gen3"; 2429 reg = <0 0xfe000000 0 0x80000>; 2430 #address-cells = <3>; 2431 #size-cells = <2>; 2432 bus-range = <0x00 0xff>; 2433 device_type = "pci"; 2434 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2435 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2436 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2437 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2438 /* Map all possible DDR as inbound ranges */ 2439 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2440 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2441 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2442 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2443 #interrupt-cells = <1>; 2444 interrupt-map-mask = <0 0 0 0>; 2445 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2446 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2447 clock-names = "pcie", "pcie_bus"; 2448 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2449 resets = <&cpg 319>; 2450 status = "disabled"; 2451 }; 2452 2453 pciec1: pcie@ee800000 { 2454 compatible = "renesas,pcie-r8a77965", 2455 "renesas,pcie-rcar-gen3"; 2456 reg = <0 0xee800000 0 0x80000>; 2457 #address-cells = <3>; 2458 #size-cells = <2>; 2459 bus-range = <0x00 0xff>; 2460 device_type = "pci"; 2461 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2462 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2463 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2464 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2465 /* Map all possible DDR as inbound ranges */ 2466 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2467 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2468 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2469 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2470 #interrupt-cells = <1>; 2471 interrupt-map-mask = <0 0 0 0>; 2472 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2473 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2474 clock-names = "pcie", "pcie_bus"; 2475 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2476 resets = <&cpg 318>; 2477 status = "disabled"; 2478 }; 2479 2480 fdp1@fe940000 { 2481 compatible = "renesas,fdp1"; 2482 reg = <0 0xfe940000 0 0x2400>; 2483 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2484 clocks = <&cpg CPG_MOD 119>; 2485 power-domains = <&sysc R8A77965_PD_A3VP>; 2486 resets = <&cpg 119>; 2487 renesas,fcp = <&fcpf0>; 2488 }; 2489 2490 fcpf0: fcp@fe950000 { 2491 compatible = "renesas,fcpf"; 2492 reg = <0 0xfe950000 0 0x200>; 2493 clocks = <&cpg CPG_MOD 615>; 2494 power-domains = <&sysc R8A77965_PD_A3VP>; 2495 resets = <&cpg 615>; 2496 }; 2497 2498 vspb: vsp@fe960000 { 2499 compatible = "renesas,vsp2"; 2500 reg = <0 0xfe960000 0 0x8000>; 2501 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2502 clocks = <&cpg CPG_MOD 626>; 2503 power-domains = <&sysc R8A77965_PD_A3VP>; 2504 resets = <&cpg 626>; 2505 2506 renesas,fcp = <&fcpvb0>; 2507 }; 2508 2509 vspi0: vsp@fe9a0000 { 2510 compatible = "renesas,vsp2"; 2511 reg = <0 0xfe9a0000 0 0x8000>; 2512 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2513 clocks = <&cpg CPG_MOD 631>; 2514 power-domains = <&sysc R8A77965_PD_A3VP>; 2515 resets = <&cpg 631>; 2516 2517 renesas,fcp = <&fcpvi0>; 2518 }; 2519 2520 vspd0: vsp@fea20000 { 2521 compatible = "renesas,vsp2"; 2522 reg = <0 0xfea20000 0 0x5000>; 2523 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2524 clocks = <&cpg CPG_MOD 623>; 2525 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2526 resets = <&cpg 623>; 2527 2528 renesas,fcp = <&fcpvd0>; 2529 }; 2530 2531 vspd1: vsp@fea28000 { 2532 compatible = "renesas,vsp2"; 2533 reg = <0 0xfea28000 0 0x5000>; 2534 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2535 clocks = <&cpg CPG_MOD 622>; 2536 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2537 resets = <&cpg 622>; 2538 2539 renesas,fcp = <&fcpvd1>; 2540 }; 2541 2542 fcpvb0: fcp@fe96f000 { 2543 compatible = "renesas,fcpv"; 2544 reg = <0 0xfe96f000 0 0x200>; 2545 clocks = <&cpg CPG_MOD 607>; 2546 power-domains = <&sysc R8A77965_PD_A3VP>; 2547 resets = <&cpg 607>; 2548 }; 2549 2550 fcpvd0: fcp@fea27000 { 2551 compatible = "renesas,fcpv"; 2552 reg = <0 0xfea27000 0 0x200>; 2553 clocks = <&cpg CPG_MOD 603>; 2554 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2555 resets = <&cpg 603>; 2556 }; 2557 2558 fcpvd1: fcp@fea2f000 { 2559 compatible = "renesas,fcpv"; 2560 reg = <0 0xfea2f000 0 0x200>; 2561 clocks = <&cpg CPG_MOD 602>; 2562 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2563 resets = <&cpg 602>; 2564 }; 2565 2566 fcpvi0: fcp@fe9af000 { 2567 compatible = "renesas,fcpv"; 2568 reg = <0 0xfe9af000 0 0x200>; 2569 clocks = <&cpg CPG_MOD 611>; 2570 power-domains = <&sysc R8A77965_PD_A3VP>; 2571 resets = <&cpg 611>; 2572 }; 2573 2574 cmm0: cmm@fea40000 { 2575 compatible = "renesas,r8a77965-cmm", 2576 "renesas,rcar-gen3-cmm"; 2577 reg = <0 0xfea40000 0 0x1000>; 2578 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2579 clocks = <&cpg CPG_MOD 711>; 2580 resets = <&cpg 711>; 2581 }; 2582 2583 cmm1: cmm@fea50000 { 2584 compatible = "renesas,r8a77965-cmm", 2585 "renesas,rcar-gen3-cmm"; 2586 reg = <0 0xfea50000 0 0x1000>; 2587 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2588 clocks = <&cpg CPG_MOD 710>; 2589 resets = <&cpg 710>; 2590 }; 2591 2592 cmm3: cmm@fea70000 { 2593 compatible = "renesas,r8a77965-cmm", 2594 "renesas,rcar-gen3-cmm"; 2595 reg = <0 0xfea70000 0 0x1000>; 2596 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2597 clocks = <&cpg CPG_MOD 708>; 2598 resets = <&cpg 708>; 2599 }; 2600 2601 csi20: csi2@fea80000 { 2602 compatible = "renesas,r8a77965-csi2"; 2603 reg = <0 0xfea80000 0 0x10000>; 2604 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2605 clocks = <&cpg CPG_MOD 714>; 2606 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2607 resets = <&cpg 714>; 2608 status = "disabled"; 2609 2610 ports { 2611 #address-cells = <1>; 2612 #size-cells = <0>; 2613 2614 port@0 { 2615 reg = <0>; 2616 }; 2617 2618 port@1 { 2619 #address-cells = <1>; 2620 #size-cells = <0>; 2621 2622 reg = <1>; 2623 2624 csi20vin0: endpoint@0 { 2625 reg = <0>; 2626 remote-endpoint = <&vin0csi20>; 2627 }; 2628 csi20vin1: endpoint@1 { 2629 reg = <1>; 2630 remote-endpoint = <&vin1csi20>; 2631 }; 2632 csi20vin2: endpoint@2 { 2633 reg = <2>; 2634 remote-endpoint = <&vin2csi20>; 2635 }; 2636 csi20vin3: endpoint@3 { 2637 reg = <3>; 2638 remote-endpoint = <&vin3csi20>; 2639 }; 2640 csi20vin4: endpoint@4 { 2641 reg = <4>; 2642 remote-endpoint = <&vin4csi20>; 2643 }; 2644 csi20vin5: endpoint@5 { 2645 reg = <5>; 2646 remote-endpoint = <&vin5csi20>; 2647 }; 2648 csi20vin6: endpoint@6 { 2649 reg = <6>; 2650 remote-endpoint = <&vin6csi20>; 2651 }; 2652 csi20vin7: endpoint@7 { 2653 reg = <7>; 2654 remote-endpoint = <&vin7csi20>; 2655 }; 2656 }; 2657 }; 2658 }; 2659 2660 csi40: csi2@feaa0000 { 2661 compatible = "renesas,r8a77965-csi2"; 2662 reg = <0 0xfeaa0000 0 0x10000>; 2663 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2664 clocks = <&cpg CPG_MOD 716>; 2665 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2666 resets = <&cpg 716>; 2667 status = "disabled"; 2668 2669 ports { 2670 #address-cells = <1>; 2671 #size-cells = <0>; 2672 2673 port@0 { 2674 reg = <0>; 2675 }; 2676 2677 port@1 { 2678 #address-cells = <1>; 2679 #size-cells = <0>; 2680 2681 reg = <1>; 2682 2683 csi40vin0: endpoint@0 { 2684 reg = <0>; 2685 remote-endpoint = <&vin0csi40>; 2686 }; 2687 csi40vin1: endpoint@1 { 2688 reg = <1>; 2689 remote-endpoint = <&vin1csi40>; 2690 }; 2691 csi40vin2: endpoint@2 { 2692 reg = <2>; 2693 remote-endpoint = <&vin2csi40>; 2694 }; 2695 csi40vin3: endpoint@3 { 2696 reg = <3>; 2697 remote-endpoint = <&vin3csi40>; 2698 }; 2699 csi40vin4: endpoint@4 { 2700 reg = <4>; 2701 remote-endpoint = <&vin4csi40>; 2702 }; 2703 csi40vin5: endpoint@5 { 2704 reg = <5>; 2705 remote-endpoint = <&vin5csi40>; 2706 }; 2707 csi40vin6: endpoint@6 { 2708 reg = <6>; 2709 remote-endpoint = <&vin6csi40>; 2710 }; 2711 csi40vin7: endpoint@7 { 2712 reg = <7>; 2713 remote-endpoint = <&vin7csi40>; 2714 }; 2715 }; 2716 }; 2717 }; 2718 2719 hdmi0: hdmi@fead0000 { 2720 compatible = "renesas,r8a77965-hdmi", 2721 "renesas,rcar-gen3-hdmi"; 2722 reg = <0 0xfead0000 0 0x10000>; 2723 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2724 clocks = <&cpg CPG_MOD 729>, 2725 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2726 clock-names = "iahb", "isfr"; 2727 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2728 resets = <&cpg 729>; 2729 status = "disabled"; 2730 2731 ports { 2732 #address-cells = <1>; 2733 #size-cells = <0>; 2734 port@0 { 2735 reg = <0>; 2736 dw_hdmi0_in: endpoint { 2737 remote-endpoint = <&du_out_hdmi0>; 2738 }; 2739 }; 2740 port@1 { 2741 reg = <1>; 2742 }; 2743 }; 2744 }; 2745 2746 du: display@feb00000 { 2747 compatible = "renesas,du-r8a77965"; 2748 reg = <0 0xfeb00000 0 0x80000>; 2749 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2750 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2751 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2752 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2753 <&cpg CPG_MOD 721>; 2754 clock-names = "du.0", "du.1", "du.3"; 2755 resets = <&cpg 724>, <&cpg 722>; 2756 reset-names = "du.0", "du.3"; 2757 2758 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; 2759 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2760 2761 status = "disabled"; 2762 2763 ports { 2764 #address-cells = <1>; 2765 #size-cells = <0>; 2766 2767 port@0 { 2768 reg = <0>; 2769 }; 2770 port@1 { 2771 reg = <1>; 2772 du_out_hdmi0: endpoint { 2773 remote-endpoint = <&dw_hdmi0_in>; 2774 }; 2775 }; 2776 port@2 { 2777 reg = <2>; 2778 du_out_lvds0: endpoint { 2779 remote-endpoint = <&lvds0_in>; 2780 }; 2781 }; 2782 }; 2783 }; 2784 2785 lvds0: lvds@feb90000 { 2786 compatible = "renesas,r8a77965-lvds"; 2787 reg = <0 0xfeb90000 0 0x14>; 2788 clocks = <&cpg CPG_MOD 727>; 2789 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2790 resets = <&cpg 727>; 2791 status = "disabled"; 2792 2793 ports { 2794 #address-cells = <1>; 2795 #size-cells = <0>; 2796 2797 port@0 { 2798 reg = <0>; 2799 lvds0_in: endpoint { 2800 remote-endpoint = <&du_out_lvds0>; 2801 }; 2802 }; 2803 port@1 { 2804 reg = <1>; 2805 }; 2806 }; 2807 }; 2808 2809 prr: chipid@fff00044 { 2810 compatible = "renesas,prr"; 2811 reg = <0 0xfff00044 0 4>; 2812 }; 2813 }; 2814 2815 thermal-zones { 2816 sensor1_thermal: sensor1-thermal { 2817 polling-delay-passive = <250>; 2818 polling-delay = <1000>; 2819 thermal-sensors = <&tsc 0>; 2820 sustainable-power = <2439>; 2821 2822 trips { 2823 sensor1_crit: sensor1-crit { 2824 temperature = <120000>; 2825 hysteresis = <1000>; 2826 type = "critical"; 2827 }; 2828 }; 2829 }; 2830 2831 sensor2_thermal: sensor2-thermal { 2832 polling-delay-passive = <250>; 2833 polling-delay = <1000>; 2834 thermal-sensors = <&tsc 1>; 2835 sustainable-power = <2439>; 2836 2837 trips { 2838 sensor2_crit: sensor2-crit { 2839 temperature = <120000>; 2840 hysteresis = <1000>; 2841 type = "critical"; 2842 }; 2843 }; 2844 }; 2845 2846 sensor3_thermal: sensor3-thermal { 2847 polling-delay-passive = <250>; 2848 polling-delay = <1000>; 2849 thermal-sensors = <&tsc 2>; 2850 sustainable-power = <2439>; 2851 2852 trips { 2853 target: trip-point1 { 2854 /* miliCelsius */ 2855 temperature = <100000>; 2856 hysteresis = <1000>; 2857 type = "passive"; 2858 }; 2859 2860 sensor3_crit: sensor3-crit { 2861 temperature = <120000>; 2862 hysteresis = <1000>; 2863 type = "critical"; 2864 }; 2865 }; 2866 2867 cooling-maps { 2868 map0 { 2869 trip = <&target>; 2870 cooling-device = <&a57_0 2 4>; 2871 contribution = <1024>; 2872 }; 2873 }; 2874 }; 2875 }; 2876 2877 timer { 2878 compatible = "arm,armv8-timer"; 2879 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2880 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2881 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2882 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2883 }; 2884 2885 /* External USB clocks - can be overridden by the board */ 2886 usb3s0_clk: usb3s0 { 2887 compatible = "fixed-clock"; 2888 #clock-cells = <0>; 2889 clock-frequency = <0>; 2890 }; 2891 2892 usb_extal_clk: usb_extal { 2893 compatible = "fixed-clock"; 2894 #clock-cells = <0>; 2895 clock-frequency = <0>; 2896 }; 2897}; 2898