1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I 10 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cluster0_opp: opp_table0 { 64 compatible = "operating-points-v2"; 65 opp-shared; 66 67 opp-500000000 { 68 opp-hz = /bits/ 64 <500000000>; 69 opp-microvolt = <830000>; 70 clock-latency-ns = <300000>; 71 }; 72 opp-1000000000 { 73 opp-hz = /bits/ 64 <1000000000>; 74 opp-microvolt = <830000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1500000000 { 78 opp-hz = /bits/ 64 <1500000000>; 79 opp-microvolt = <830000>; 80 clock-latency-ns = <300000>; 81 opp-suspend; 82 }; 83 opp-1600000000 { 84 opp-hz = /bits/ 64 <1600000000>; 85 opp-microvolt = <900000>; 86 clock-latency-ns = <300000>; 87 turbo-mode; 88 }; 89 opp-1700000000 { 90 opp-hz = /bits/ 64 <1700000000>; 91 opp-microvolt = <900000>; 92 clock-latency-ns = <300000>; 93 turbo-mode; 94 }; 95 opp-1800000000 { 96 opp-hz = /bits/ 64 <1800000000>; 97 opp-microvolt = <960000>; 98 clock-latency-ns = <300000>; 99 turbo-mode; 100 }; 101 }; 102 103 cpus { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 a57_0: cpu@0 { 108 compatible = "arm,cortex-a57", "arm,armv8"; 109 reg = <0x0>; 110 device_type = "cpu"; 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 112 next-level-cache = <&L2_CA57>; 113 enable-method = "psci"; 114 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 115 operating-points-v2 = <&cluster0_opp>; 116 }; 117 118 a57_1: cpu@1 { 119 compatible = "arm,cortex-a57", "arm,armv8"; 120 reg = <0x1>; 121 device_type = "cpu"; 122 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 123 next-level-cache = <&L2_CA57>; 124 enable-method = "psci"; 125 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 126 operating-points-v2 = <&cluster0_opp>; 127 }; 128 129 L2_CA57: cache-controller-0 { 130 compatible = "cache"; 131 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 132 cache-unified; 133 cache-level = <2>; 134 }; 135 }; 136 137 extal_clk: extal { 138 compatible = "fixed-clock"; 139 #clock-cells = <0>; 140 /* This value must be overridden by the board */ 141 clock-frequency = <0>; 142 }; 143 144 extalr_clk: extalr { 145 compatible = "fixed-clock"; 146 #clock-cells = <0>; 147 /* This value must be overridden by the board */ 148 clock-frequency = <0>; 149 }; 150 151 /* External PCIe clock - can be overridden by the board */ 152 pcie_bus_clk: pcie_bus { 153 compatible = "fixed-clock"; 154 #clock-cells = <0>; 155 clock-frequency = <0>; 156 }; 157 158 pmu_a57 { 159 compatible = "arm,cortex-a57-pmu"; 160 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 161 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 162 interrupt-affinity = <&a57_0>, 163 <&a57_1>; 164 }; 165 166 psci { 167 compatible = "arm,psci-1.0", "arm,psci-0.2"; 168 method = "smc"; 169 }; 170 171 /* External SCIF clock - to be overridden by boards that provide it */ 172 scif_clk: scif { 173 compatible = "fixed-clock"; 174 #clock-cells = <0>; 175 clock-frequency = <0>; 176 }; 177 178 soc { 179 compatible = "simple-bus"; 180 interrupt-parent = <&gic>; 181 #address-cells = <2>; 182 #size-cells = <2>; 183 ranges; 184 185 rwdt: watchdog@e6020000 { 186 compatible = "renesas,r8a77965-wdt", 187 "renesas,rcar-gen3-wdt"; 188 reg = <0 0xe6020000 0 0x0c>; 189 clocks = <&cpg CPG_MOD 402>; 190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 191 resets = <&cpg 402>; 192 status = "disabled"; 193 }; 194 195 gpio0: gpio@e6050000 { 196 compatible = "renesas,gpio-r8a77965", 197 "renesas,rcar-gen3-gpio"; 198 reg = <0 0xe6050000 0 0x50>; 199 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 200 #gpio-cells = <2>; 201 gpio-controller; 202 gpio-ranges = <&pfc 0 0 16>; 203 #interrupt-cells = <2>; 204 interrupt-controller; 205 clocks = <&cpg CPG_MOD 912>; 206 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 207 resets = <&cpg 912>; 208 }; 209 210 gpio1: gpio@e6051000 { 211 compatible = "renesas,gpio-r8a77965", 212 "renesas,rcar-gen3-gpio"; 213 reg = <0 0xe6051000 0 0x50>; 214 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 215 #gpio-cells = <2>; 216 gpio-controller; 217 gpio-ranges = <&pfc 0 32 29>; 218 #interrupt-cells = <2>; 219 interrupt-controller; 220 clocks = <&cpg CPG_MOD 911>; 221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 222 resets = <&cpg 911>; 223 }; 224 225 gpio2: gpio@e6052000 { 226 compatible = "renesas,gpio-r8a77965", 227 "renesas,rcar-gen3-gpio"; 228 reg = <0 0xe6052000 0 0x50>; 229 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 230 #gpio-cells = <2>; 231 gpio-controller; 232 gpio-ranges = <&pfc 0 64 15>; 233 #interrupt-cells = <2>; 234 interrupt-controller; 235 clocks = <&cpg CPG_MOD 910>; 236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 237 resets = <&cpg 910>; 238 }; 239 240 gpio3: gpio@e6053000 { 241 compatible = "renesas,gpio-r8a77965", 242 "renesas,rcar-gen3-gpio"; 243 reg = <0 0xe6053000 0 0x50>; 244 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 245 #gpio-cells = <2>; 246 gpio-controller; 247 gpio-ranges = <&pfc 0 96 16>; 248 #interrupt-cells = <2>; 249 interrupt-controller; 250 clocks = <&cpg CPG_MOD 909>; 251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 252 resets = <&cpg 909>; 253 }; 254 255 gpio4: gpio@e6054000 { 256 compatible = "renesas,gpio-r8a77965", 257 "renesas,rcar-gen3-gpio"; 258 reg = <0 0xe6054000 0 0x50>; 259 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 260 #gpio-cells = <2>; 261 gpio-controller; 262 gpio-ranges = <&pfc 0 128 18>; 263 #interrupt-cells = <2>; 264 interrupt-controller; 265 clocks = <&cpg CPG_MOD 908>; 266 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 267 resets = <&cpg 908>; 268 }; 269 270 gpio5: gpio@e6055000 { 271 compatible = "renesas,gpio-r8a77965", 272 "renesas,rcar-gen3-gpio"; 273 reg = <0 0xe6055000 0 0x50>; 274 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 275 #gpio-cells = <2>; 276 gpio-controller; 277 gpio-ranges = <&pfc 0 160 26>; 278 #interrupt-cells = <2>; 279 interrupt-controller; 280 clocks = <&cpg CPG_MOD 907>; 281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 282 resets = <&cpg 907>; 283 }; 284 285 gpio6: gpio@e6055400 { 286 compatible = "renesas,gpio-r8a77965", 287 "renesas,rcar-gen3-gpio"; 288 reg = <0 0xe6055400 0 0x50>; 289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 290 #gpio-cells = <2>; 291 gpio-controller; 292 gpio-ranges = <&pfc 0 192 32>; 293 #interrupt-cells = <2>; 294 interrupt-controller; 295 clocks = <&cpg CPG_MOD 906>; 296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 297 resets = <&cpg 906>; 298 }; 299 300 gpio7: gpio@e6055800 { 301 compatible = "renesas,gpio-r8a77965", 302 "renesas,rcar-gen3-gpio"; 303 reg = <0 0xe6055800 0 0x50>; 304 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 305 #gpio-cells = <2>; 306 gpio-controller; 307 gpio-ranges = <&pfc 0 224 4>; 308 #interrupt-cells = <2>; 309 interrupt-controller; 310 clocks = <&cpg CPG_MOD 905>; 311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 312 resets = <&cpg 905>; 313 }; 314 315 pfc: pin-controller@e6060000 { 316 compatible = "renesas,pfc-r8a77965"; 317 reg = <0 0xe6060000 0 0x50c>; 318 }; 319 320 cpg: clock-controller@e6150000 { 321 compatible = "renesas,r8a77965-cpg-mssr"; 322 reg = <0 0xe6150000 0 0x1000>; 323 clocks = <&extal_clk>, <&extalr_clk>; 324 clock-names = "extal", "extalr"; 325 #clock-cells = <2>; 326 #power-domain-cells = <0>; 327 #reset-cells = <1>; 328 }; 329 330 rst: reset-controller@e6160000 { 331 compatible = "renesas,r8a77965-rst"; 332 reg = <0 0xe6160000 0 0x0200>; 333 }; 334 335 sysc: system-controller@e6180000 { 336 compatible = "renesas,r8a77965-sysc"; 337 reg = <0 0xe6180000 0 0x0400>; 338 #power-domain-cells = <1>; 339 }; 340 341 tsc: thermal@e6198000 { 342 compatible = "renesas,r8a77965-thermal"; 343 reg = <0 0xe6198000 0 0x100>, 344 <0 0xe61a0000 0 0x100>, 345 <0 0xe61a8000 0 0x100>; 346 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 349 clocks = <&cpg CPG_MOD 522>; 350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 351 resets = <&cpg 522>; 352 #thermal-sensor-cells = <1>; 353 status = "okay"; 354 }; 355 356 intc_ex: interrupt-controller@e61c0000 { 357 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 358 #interrupt-cells = <2>; 359 interrupt-controller; 360 reg = <0 0xe61c0000 0 0x200>; 361 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 362 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 363 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 364 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 365 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 366 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 367 clocks = <&cpg CPG_MOD 407>; 368 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 369 resets = <&cpg 407>; 370 }; 371 372 i2c0: i2c@e6500000 { 373 #address-cells = <1>; 374 #size-cells = <0>; 375 compatible = "renesas,i2c-r8a77965", 376 "renesas,rcar-gen3-i2c"; 377 reg = <0 0xe6500000 0 0x40>; 378 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 379 clocks = <&cpg CPG_MOD 931>; 380 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 381 resets = <&cpg 931>; 382 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 383 <&dmac2 0x91>, <&dmac2 0x90>; 384 dma-names = "tx", "rx", "tx", "rx"; 385 i2c-scl-internal-delay-ns = <110>; 386 status = "disabled"; 387 }; 388 389 i2c1: i2c@e6508000 { 390 #address-cells = <1>; 391 #size-cells = <0>; 392 compatible = "renesas,i2c-r8a77965", 393 "renesas,rcar-gen3-i2c"; 394 reg = <0 0xe6508000 0 0x40>; 395 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 396 clocks = <&cpg CPG_MOD 930>; 397 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 398 resets = <&cpg 930>; 399 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 400 <&dmac2 0x93>, <&dmac2 0x92>; 401 dma-names = "tx", "rx", "tx", "rx"; 402 i2c-scl-internal-delay-ns = <6>; 403 status = "disabled"; 404 }; 405 406 i2c2: i2c@e6510000 { 407 #address-cells = <1>; 408 #size-cells = <0>; 409 compatible = "renesas,i2c-r8a77965", 410 "renesas,rcar-gen3-i2c"; 411 reg = <0 0xe6510000 0 0x40>; 412 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 413 clocks = <&cpg CPG_MOD 929>; 414 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 415 resets = <&cpg 929>; 416 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 417 <&dmac2 0x95>, <&dmac2 0x94>; 418 dma-names = "tx", "rx", "tx", "rx"; 419 i2c-scl-internal-delay-ns = <6>; 420 status = "disabled"; 421 }; 422 423 i2c3: i2c@e66d0000 { 424 #address-cells = <1>; 425 #size-cells = <0>; 426 compatible = "renesas,i2c-r8a77965", 427 "renesas,rcar-gen3-i2c"; 428 reg = <0 0xe66d0000 0 0x40>; 429 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 430 clocks = <&cpg CPG_MOD 928>; 431 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 432 resets = <&cpg 928>; 433 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 434 dma-names = "tx", "rx"; 435 i2c-scl-internal-delay-ns = <110>; 436 status = "disabled"; 437 }; 438 439 i2c4: i2c@e66d8000 { 440 #address-cells = <1>; 441 #size-cells = <0>; 442 compatible = "renesas,i2c-r8a77965", 443 "renesas,rcar-gen3-i2c"; 444 reg = <0 0xe66d8000 0 0x40>; 445 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 446 clocks = <&cpg CPG_MOD 927>; 447 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 448 resets = <&cpg 927>; 449 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 450 dma-names = "tx", "rx"; 451 i2c-scl-internal-delay-ns = <110>; 452 status = "disabled"; 453 }; 454 455 i2c5: i2c@e66e0000 { 456 #address-cells = <1>; 457 #size-cells = <0>; 458 compatible = "renesas,i2c-r8a77965", 459 "renesas,rcar-gen3-i2c"; 460 reg = <0 0xe66e0000 0 0x40>; 461 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 462 clocks = <&cpg CPG_MOD 919>; 463 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 464 resets = <&cpg 919>; 465 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 466 dma-names = "tx", "rx"; 467 i2c-scl-internal-delay-ns = <110>; 468 status = "disabled"; 469 }; 470 471 i2c6: i2c@e66e8000 { 472 #address-cells = <1>; 473 #size-cells = <0>; 474 compatible = "renesas,i2c-r8a77965", 475 "renesas,rcar-gen3-i2c"; 476 reg = <0 0xe66e8000 0 0x40>; 477 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 478 clocks = <&cpg CPG_MOD 918>; 479 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 480 resets = <&cpg 918>; 481 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 482 dma-names = "tx", "rx"; 483 i2c-scl-internal-delay-ns = <6>; 484 status = "disabled"; 485 }; 486 487 i2c_dvfs: i2c@e60b0000 { 488 #address-cells = <1>; 489 #size-cells = <0>; 490 compatible = "renesas,iic-r8a77965", 491 "renesas,rcar-gen3-iic", 492 "renesas,rmobile-iic"; 493 reg = <0 0xe60b0000 0 0x425>; 494 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 495 clocks = <&cpg CPG_MOD 926>; 496 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 497 resets = <&cpg 926>; 498 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 499 dma-names = "tx", "rx"; 500 status = "disabled"; 501 }; 502 503 hscif0: serial@e6540000 { 504 compatible = "renesas,hscif-r8a77965", 505 "renesas,rcar-gen3-hscif", 506 "renesas,hscif"; 507 reg = <0 0xe6540000 0 0x60>; 508 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 509 clocks = <&cpg CPG_MOD 520>, 510 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 511 <&scif_clk>; 512 clock-names = "fck", "brg_int", "scif_clk"; 513 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 514 <&dmac2 0x31>, <&dmac2 0x30>; 515 dma-names = "tx", "rx", "tx", "rx"; 516 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 517 resets = <&cpg 520>; 518 status = "disabled"; 519 }; 520 521 hscif1: serial@e6550000 { 522 compatible = "renesas,hscif-r8a77965", 523 "renesas,rcar-gen3-hscif", 524 "renesas,hscif"; 525 reg = <0 0xe6550000 0 0x60>; 526 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 527 clocks = <&cpg CPG_MOD 519>, 528 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 529 <&scif_clk>; 530 clock-names = "fck", "brg_int", "scif_clk"; 531 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 532 <&dmac2 0x33>, <&dmac2 0x32>; 533 dma-names = "tx", "rx", "tx", "rx"; 534 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 535 resets = <&cpg 519>; 536 status = "disabled"; 537 }; 538 539 hscif2: serial@e6560000 { 540 compatible = "renesas,hscif-r8a77965", 541 "renesas,rcar-gen3-hscif", 542 "renesas,hscif"; 543 reg = <0 0xe6560000 0 0x60>; 544 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 545 clocks = <&cpg CPG_MOD 518>, 546 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 547 <&scif_clk>; 548 clock-names = "fck", "brg_int", "scif_clk"; 549 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 550 <&dmac2 0x35>, <&dmac2 0x34>; 551 dma-names = "tx", "rx", "tx", "rx"; 552 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 553 resets = <&cpg 518>; 554 status = "disabled"; 555 }; 556 557 hscif3: serial@e66a0000 { 558 compatible = "renesas,hscif-r8a77965", 559 "renesas,rcar-gen3-hscif", 560 "renesas,hscif"; 561 reg = <0 0xe66a0000 0 0x60>; 562 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 563 clocks = <&cpg CPG_MOD 517>, 564 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 565 <&scif_clk>; 566 clock-names = "fck", "brg_int", "scif_clk"; 567 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 568 dma-names = "tx", "rx"; 569 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 570 resets = <&cpg 517>; 571 status = "disabled"; 572 }; 573 574 hscif4: serial@e66b0000 { 575 compatible = "renesas,hscif-r8a77965", 576 "renesas,rcar-gen3-hscif", 577 "renesas,hscif"; 578 reg = <0 0xe66b0000 0 0x60>; 579 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 580 clocks = <&cpg CPG_MOD 516>, 581 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 582 <&scif_clk>; 583 clock-names = "fck", "brg_int", "scif_clk"; 584 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 585 dma-names = "tx", "rx"; 586 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 587 resets = <&cpg 516>; 588 status = "disabled"; 589 }; 590 591 hsusb: usb@e6590000 { 592 compatible = "renesas,usbhs-r8a77965", 593 "renesas,rcar-gen3-usbhs"; 594 reg = <0 0xe6590000 0 0x100>; 595 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 596 clocks = <&cpg CPG_MOD 704>; 597 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 598 <&usb_dmac1 0>, <&usb_dmac1 1>; 599 dma-names = "ch0", "ch1", "ch2", "ch3"; 600 renesas,buswait = <11>; 601 phys = <&usb2_phy0>; 602 phy-names = "usb"; 603 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 604 resets = <&cpg 704>; 605 status = "disabled"; 606 }; 607 608 usb_dmac0: dma-controller@e65a0000 { 609 compatible = "renesas,r8a77965-usb-dmac", 610 "renesas,usb-dmac"; 611 reg = <0 0xe65a0000 0 0x100>; 612 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 613 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 614 interrupt-names = "ch0", "ch1"; 615 clocks = <&cpg CPG_MOD 330>; 616 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 617 resets = <&cpg 330>; 618 #dma-cells = <1>; 619 dma-channels = <2>; 620 }; 621 622 usb_dmac1: dma-controller@e65b0000 { 623 compatible = "renesas,r8a77965-usb-dmac", 624 "renesas,usb-dmac"; 625 reg = <0 0xe65b0000 0 0x100>; 626 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 627 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 628 interrupt-names = "ch0", "ch1"; 629 clocks = <&cpg CPG_MOD 331>; 630 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 631 resets = <&cpg 331>; 632 #dma-cells = <1>; 633 dma-channels = <2>; 634 }; 635 636 usb3_phy0: usb-phy@e65ee000 { 637 compatible = "renesas,r8a77965-usb3-phy", 638 "renesas,rcar-gen3-usb3-phy"; 639 reg = <0 0xe65ee000 0 0x90>; 640 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 641 <&usb_extal_clk>; 642 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 643 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 644 resets = <&cpg 328>; 645 #phy-cells = <0>; 646 status = "disabled"; 647 }; 648 649 dmac0: dma-controller@e6700000 { 650 compatible = "renesas,dmac-r8a77965", 651 "renesas,rcar-dmac"; 652 reg = <0 0xe6700000 0 0x10000>; 653 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 654 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 655 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 656 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 657 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 660 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 661 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 662 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 663 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 664 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 665 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 666 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 667 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 668 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 669 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 670 interrupt-names = "error", 671 "ch0", "ch1", "ch2", "ch3", 672 "ch4", "ch5", "ch6", "ch7", 673 "ch8", "ch9", "ch10", "ch11", 674 "ch12", "ch13", "ch14", "ch15"; 675 clocks = <&cpg CPG_MOD 219>; 676 clock-names = "fck"; 677 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 678 resets = <&cpg 219>; 679 #dma-cells = <1>; 680 dma-channels = <16>; 681 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 682 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 683 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 684 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 685 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 686 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 687 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 688 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 689 }; 690 691 dmac1: dma-controller@e7300000 { 692 compatible = "renesas,dmac-r8a77965", 693 "renesas,rcar-dmac"; 694 reg = <0 0xe7300000 0 0x10000>; 695 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 696 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 697 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 698 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 699 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 700 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 701 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 702 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 703 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 704 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 705 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 706 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 707 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 708 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 709 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 710 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 711 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 712 interrupt-names = "error", 713 "ch0", "ch1", "ch2", "ch3", 714 "ch4", "ch5", "ch6", "ch7", 715 "ch8", "ch9", "ch10", "ch11", 716 "ch12", "ch13", "ch14", "ch15"; 717 clocks = <&cpg CPG_MOD 218>; 718 clock-names = "fck"; 719 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 720 resets = <&cpg 218>; 721 #dma-cells = <1>; 722 dma-channels = <16>; 723 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 724 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 725 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 726 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 727 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 728 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 729 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 730 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 731 }; 732 733 dmac2: dma-controller@e7310000 { 734 compatible = "renesas,dmac-r8a77965", 735 "renesas,rcar-dmac"; 736 reg = <0 0xe7310000 0 0x10000>; 737 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 738 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 739 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 740 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 741 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 742 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 743 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 744 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 745 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 746 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 747 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 748 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 749 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 750 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 751 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 752 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 753 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 754 interrupt-names = "error", 755 "ch0", "ch1", "ch2", "ch3", 756 "ch4", "ch5", "ch6", "ch7", 757 "ch8", "ch9", "ch10", "ch11", 758 "ch12", "ch13", "ch14", "ch15"; 759 clocks = <&cpg CPG_MOD 217>; 760 clock-names = "fck"; 761 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 762 resets = <&cpg 217>; 763 #dma-cells = <1>; 764 dma-channels = <16>; 765 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 766 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 767 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 768 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 769 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 770 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 771 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 772 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 773 }; 774 775 ipmmu_ds0: mmu@e6740000 { 776 compatible = "renesas,ipmmu-r8a77965"; 777 reg = <0 0xe6740000 0 0x1000>; 778 renesas,ipmmu-main = <&ipmmu_mm 0>; 779 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 780 #iommu-cells = <1>; 781 }; 782 783 ipmmu_ds1: mmu@e7740000 { 784 compatible = "renesas,ipmmu-r8a77965"; 785 reg = <0 0xe7740000 0 0x1000>; 786 renesas,ipmmu-main = <&ipmmu_mm 1>; 787 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 788 #iommu-cells = <1>; 789 }; 790 791 ipmmu_hc: mmu@e6570000 { 792 compatible = "renesas,ipmmu-r8a77965"; 793 reg = <0 0xe6570000 0 0x1000>; 794 renesas,ipmmu-main = <&ipmmu_mm 2>; 795 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 796 #iommu-cells = <1>; 797 }; 798 799 ipmmu_ir: mmu@ff8b0000 { 800 compatible = "renesas,ipmmu-r8a77965"; 801 reg = <0 0xff8b0000 0 0x1000>; 802 renesas,ipmmu-main = <&ipmmu_mm 3>; 803 power-domains = <&sysc R8A77965_PD_A3IR>; 804 #iommu-cells = <1>; 805 }; 806 807 ipmmu_mm: mmu@e67b0000 { 808 compatible = "renesas,ipmmu-r8a77965"; 809 reg = <0 0xe67b0000 0 0x1000>; 810 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 812 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 813 #iommu-cells = <1>; 814 }; 815 816 ipmmu_mp: mmu@ec670000 { 817 compatible = "renesas,ipmmu-r8a77965"; 818 reg = <0 0xec670000 0 0x1000>; 819 renesas,ipmmu-main = <&ipmmu_mm 4>; 820 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 821 #iommu-cells = <1>; 822 }; 823 824 ipmmu_pv0: mmu@fd800000 { 825 compatible = "renesas,ipmmu-r8a77965"; 826 reg = <0 0xfd800000 0 0x1000>; 827 renesas,ipmmu-main = <&ipmmu_mm 6>; 828 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 829 #iommu-cells = <1>; 830 }; 831 832 ipmmu_rt: mmu@ffc80000 { 833 compatible = "renesas,ipmmu-r8a77965"; 834 reg = <0 0xffc80000 0 0x1000>; 835 renesas,ipmmu-main = <&ipmmu_mm 10>; 836 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 837 #iommu-cells = <1>; 838 }; 839 840 ipmmu_vc0: mmu@fe6b0000 { 841 compatible = "renesas,ipmmu-r8a77965"; 842 reg = <0 0xfe6b0000 0 0x1000>; 843 renesas,ipmmu-main = <&ipmmu_mm 12>; 844 power-domains = <&sysc R8A77965_PD_A3VC>; 845 #iommu-cells = <1>; 846 }; 847 848 ipmmu_vi0: mmu@febd0000 { 849 compatible = "renesas,ipmmu-r8a77965"; 850 reg = <0 0xfebd0000 0 0x1000>; 851 renesas,ipmmu-main = <&ipmmu_mm 14>; 852 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 853 #iommu-cells = <1>; 854 }; 855 856 ipmmu_vp0: mmu@fe990000 { 857 compatible = "renesas,ipmmu-r8a77965"; 858 reg = <0 0xfe990000 0 0x1000>; 859 renesas,ipmmu-main = <&ipmmu_mm 16>; 860 power-domains = <&sysc R8A77965_PD_A3VP>; 861 #iommu-cells = <1>; 862 }; 863 864 avb: ethernet@e6800000 { 865 compatible = "renesas,etheravb-r8a77965", 866 "renesas,etheravb-rcar-gen3"; 867 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 868 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 893 interrupt-names = "ch0", "ch1", "ch2", "ch3", 894 "ch4", "ch5", "ch6", "ch7", 895 "ch8", "ch9", "ch10", "ch11", 896 "ch12", "ch13", "ch14", "ch15", 897 "ch16", "ch17", "ch18", "ch19", 898 "ch20", "ch21", "ch22", "ch23", 899 "ch24"; 900 clocks = <&cpg CPG_MOD 812>; 901 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 902 resets = <&cpg 812>; 903 phy-mode = "rgmii"; 904 #address-cells = <1>; 905 #size-cells = <0>; 906 status = "disabled"; 907 }; 908 909 can0: can@e6c30000 { 910 reg = <0 0xe6c30000 0 0x1000>; 911 /* placeholder */ 912 }; 913 914 can1: can@e6c38000 { 915 reg = <0 0xe6c38000 0 0x1000>; 916 /* placeholder */ 917 }; 918 919 pwm0: pwm@e6e30000 { 920 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 921 reg = <0 0xe6e30000 0 8>; 922 #pwm-cells = <2>; 923 clocks = <&cpg CPG_MOD 523>; 924 resets = <&cpg 523>; 925 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 926 status = "disabled"; 927 }; 928 929 pwm1: pwm@e6e31000 { 930 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 931 reg = <0 0xe6e31000 0 8>; 932 #pwm-cells = <2>; 933 clocks = <&cpg CPG_MOD 523>; 934 resets = <&cpg 523>; 935 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 936 status = "disabled"; 937 }; 938 939 pwm2: pwm@e6e32000 { 940 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 941 reg = <0 0xe6e32000 0 8>; 942 #pwm-cells = <2>; 943 clocks = <&cpg CPG_MOD 523>; 944 resets = <&cpg 523>; 945 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 946 status = "disabled"; 947 }; 948 949 pwm3: pwm@e6e33000 { 950 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 951 reg = <0 0xe6e33000 0 8>; 952 #pwm-cells = <2>; 953 clocks = <&cpg CPG_MOD 523>; 954 resets = <&cpg 523>; 955 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 956 status = "disabled"; 957 }; 958 959 pwm4: pwm@e6e34000 { 960 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 961 reg = <0 0xe6e34000 0 8>; 962 #pwm-cells = <2>; 963 clocks = <&cpg CPG_MOD 523>; 964 resets = <&cpg 523>; 965 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 966 status = "disabled"; 967 }; 968 969 pwm5: pwm@e6e35000 { 970 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 971 reg = <0 0xe6e35000 0 8>; 972 #pwm-cells = <2>; 973 clocks = <&cpg CPG_MOD 523>; 974 resets = <&cpg 523>; 975 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 976 status = "disabled"; 977 }; 978 979 pwm6: pwm@e6e36000 { 980 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 981 reg = <0 0xe6e36000 0 8>; 982 #pwm-cells = <2>; 983 clocks = <&cpg CPG_MOD 523>; 984 resets = <&cpg 523>; 985 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 986 status = "disabled"; 987 }; 988 989 scif0: serial@e6e60000 { 990 compatible = "renesas,scif-r8a77965", 991 "renesas,rcar-gen3-scif", "renesas,scif"; 992 reg = <0 0xe6e60000 0 64>; 993 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 994 clocks = <&cpg CPG_MOD 207>, 995 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 996 <&scif_clk>; 997 clock-names = "fck", "brg_int", "scif_clk"; 998 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 999 <&dmac2 0x51>, <&dmac2 0x50>; 1000 dma-names = "tx", "rx", "tx", "rx"; 1001 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1002 resets = <&cpg 207>; 1003 status = "disabled"; 1004 }; 1005 1006 scif1: serial@e6e68000 { 1007 compatible = "renesas,scif-r8a77965", 1008 "renesas,rcar-gen3-scif", "renesas,scif"; 1009 reg = <0 0xe6e68000 0 64>; 1010 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1011 clocks = <&cpg CPG_MOD 206>, 1012 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1013 <&scif_clk>; 1014 clock-names = "fck", "brg_int", "scif_clk"; 1015 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1016 <&dmac2 0x53>, <&dmac2 0x52>; 1017 dma-names = "tx", "rx", "tx", "rx"; 1018 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1019 resets = <&cpg 206>; 1020 status = "disabled"; 1021 }; 1022 1023 scif2: serial@e6e88000 { 1024 compatible = "renesas,scif-r8a77965", 1025 "renesas,rcar-gen3-scif", "renesas,scif"; 1026 reg = <0 0xe6e88000 0 64>; 1027 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1028 clocks = <&cpg CPG_MOD 310>, 1029 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1030 <&scif_clk>; 1031 clock-names = "fck", "brg_int", "scif_clk"; 1032 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1033 resets = <&cpg 310>; 1034 status = "disabled"; 1035 }; 1036 1037 scif3: serial@e6c50000 { 1038 compatible = "renesas,scif-r8a77965", 1039 "renesas,rcar-gen3-scif", "renesas,scif"; 1040 reg = <0 0xe6c50000 0 64>; 1041 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1042 clocks = <&cpg CPG_MOD 204>, 1043 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1044 <&scif_clk>; 1045 clock-names = "fck", "brg_int", "scif_clk"; 1046 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1047 dma-names = "tx", "rx"; 1048 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1049 resets = <&cpg 204>; 1050 status = "disabled"; 1051 }; 1052 1053 scif4: serial@e6c40000 { 1054 compatible = "renesas,scif-r8a77965", 1055 "renesas,rcar-gen3-scif", "renesas,scif"; 1056 reg = <0 0xe6c40000 0 64>; 1057 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1058 clocks = <&cpg CPG_MOD 203>, 1059 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1060 <&scif_clk>; 1061 clock-names = "fck", "brg_int", "scif_clk"; 1062 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1063 dma-names = "tx", "rx"; 1064 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1065 resets = <&cpg 203>; 1066 status = "disabled"; 1067 }; 1068 1069 scif5: serial@e6f30000 { 1070 compatible = "renesas,scif-r8a77965", 1071 "renesas,rcar-gen3-scif", "renesas,scif"; 1072 reg = <0 0xe6f30000 0 64>; 1073 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1074 clocks = <&cpg CPG_MOD 202>, 1075 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1076 <&scif_clk>; 1077 clock-names = "fck", "brg_int", "scif_clk"; 1078 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1079 <&dmac2 0x5b>, <&dmac2 0x5a>; 1080 dma-names = "tx", "rx", "tx", "rx"; 1081 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1082 resets = <&cpg 202>; 1083 status = "disabled"; 1084 }; 1085 1086 msiof0: spi@e6e90000 { 1087 compatible = "renesas,msiof-r8a77965", 1088 "renesas,rcar-gen3-msiof"; 1089 reg = <0 0xe6e90000 0 0x0064>; 1090 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1091 clocks = <&cpg CPG_MOD 211>; 1092 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1093 <&dmac2 0x41>, <&dmac2 0x40>; 1094 dma-names = "tx", "rx", "tx", "rx"; 1095 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1096 resets = <&cpg 211>; 1097 #address-cells = <1>; 1098 #size-cells = <0>; 1099 status = "disabled"; 1100 }; 1101 1102 msiof1: spi@e6ea0000 { 1103 compatible = "renesas,msiof-r8a77965", 1104 "renesas,rcar-gen3-msiof"; 1105 reg = <0 0xe6ea0000 0 0x0064>; 1106 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1107 clocks = <&cpg CPG_MOD 210>; 1108 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1109 <&dmac2 0x43>, <&dmac2 0x42>; 1110 dma-names = "tx", "rx", "tx", "rx"; 1111 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1112 resets = <&cpg 210>; 1113 #address-cells = <1>; 1114 #size-cells = <0>; 1115 status = "disabled"; 1116 }; 1117 1118 msiof2: spi@e6c00000 { 1119 compatible = "renesas,msiof-r8a77965", 1120 "renesas,rcar-gen3-msiof"; 1121 reg = <0 0xe6c00000 0 0x0064>; 1122 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1123 clocks = <&cpg CPG_MOD 209>; 1124 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1125 dma-names = "tx", "rx"; 1126 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1127 resets = <&cpg 209>; 1128 #address-cells = <1>; 1129 #size-cells = <0>; 1130 status = "disabled"; 1131 }; 1132 1133 msiof3: spi@e6c10000 { 1134 compatible = "renesas,msiof-r8a77965", 1135 "renesas,rcar-gen3-msiof"; 1136 reg = <0 0xe6c10000 0 0x0064>; 1137 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1138 clocks = <&cpg CPG_MOD 208>; 1139 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1140 dma-names = "tx", "rx"; 1141 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1142 resets = <&cpg 208>; 1143 #address-cells = <1>; 1144 #size-cells = <0>; 1145 status = "disabled"; 1146 }; 1147 1148 vin0: video@e6ef0000 { 1149 compatible = "renesas,vin-r8a77965"; 1150 reg = <0 0xe6ef0000 0 0x1000>; 1151 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1152 clocks = <&cpg CPG_MOD 811>; 1153 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1154 resets = <&cpg 811>; 1155 renesas,id = <0>; 1156 status = "disabled"; 1157 1158 ports { 1159 #address-cells = <1>; 1160 #size-cells = <0>; 1161 1162 port@1 { 1163 #address-cells = <1>; 1164 #size-cells = <0>; 1165 1166 reg = <1>; 1167 1168 vin0csi20: endpoint@0 { 1169 reg = <0>; 1170 remote-endpoint = <&csi20vin0>; 1171 }; 1172 vin0csi40: endpoint@2 { 1173 reg = <2>; 1174 remote-endpoint = <&csi40vin0>; 1175 }; 1176 }; 1177 }; 1178 }; 1179 1180 vin1: video@e6ef1000 { 1181 compatible = "renesas,vin-r8a77965"; 1182 reg = <0 0xe6ef1000 0 0x1000>; 1183 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1184 clocks = <&cpg CPG_MOD 810>; 1185 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1186 resets = <&cpg 810>; 1187 renesas,id = <1>; 1188 status = "disabled"; 1189 1190 ports { 1191 #address-cells = <1>; 1192 #size-cells = <0>; 1193 1194 port@1 { 1195 #address-cells = <1>; 1196 #size-cells = <0>; 1197 1198 reg = <1>; 1199 1200 vin1csi20: endpoint@0 { 1201 reg = <0>; 1202 remote-endpoint = <&csi20vin1>; 1203 }; 1204 vin1csi40: endpoint@2 { 1205 reg = <2>; 1206 remote-endpoint = <&csi40vin1>; 1207 }; 1208 }; 1209 }; 1210 }; 1211 1212 vin2: video@e6ef2000 { 1213 compatible = "renesas,vin-r8a77965"; 1214 reg = <0 0xe6ef2000 0 0x1000>; 1215 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1216 clocks = <&cpg CPG_MOD 809>; 1217 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1218 resets = <&cpg 809>; 1219 renesas,id = <2>; 1220 status = "disabled"; 1221 1222 ports { 1223 #address-cells = <1>; 1224 #size-cells = <0>; 1225 1226 port@1 { 1227 #address-cells = <1>; 1228 #size-cells = <0>; 1229 1230 reg = <1>; 1231 1232 vin2csi20: endpoint@0 { 1233 reg = <0>; 1234 remote-endpoint = <&csi20vin2>; 1235 }; 1236 vin2csi40: endpoint@2 { 1237 reg = <2>; 1238 remote-endpoint = <&csi40vin2>; 1239 }; 1240 }; 1241 }; 1242 }; 1243 1244 vin3: video@e6ef3000 { 1245 compatible = "renesas,vin-r8a77965"; 1246 reg = <0 0xe6ef3000 0 0x1000>; 1247 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1248 clocks = <&cpg CPG_MOD 808>; 1249 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1250 resets = <&cpg 808>; 1251 renesas,id = <3>; 1252 status = "disabled"; 1253 1254 ports { 1255 #address-cells = <1>; 1256 #size-cells = <0>; 1257 1258 port@1 { 1259 #address-cells = <1>; 1260 #size-cells = <0>; 1261 1262 reg = <1>; 1263 1264 vin3csi20: endpoint@0 { 1265 reg = <0>; 1266 remote-endpoint = <&csi20vin3>; 1267 }; 1268 vin3csi40: endpoint@2 { 1269 reg = <2>; 1270 remote-endpoint = <&csi40vin3>; 1271 }; 1272 }; 1273 }; 1274 }; 1275 1276 vin4: video@e6ef4000 { 1277 compatible = "renesas,vin-r8a77965"; 1278 reg = <0 0xe6ef4000 0 0x1000>; 1279 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1280 clocks = <&cpg CPG_MOD 807>; 1281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1282 resets = <&cpg 807>; 1283 renesas,id = <4>; 1284 status = "disabled"; 1285 1286 ports { 1287 #address-cells = <1>; 1288 #size-cells = <0>; 1289 1290 port@1 { 1291 #address-cells = <1>; 1292 #size-cells = <0>; 1293 1294 reg = <1>; 1295 1296 vin4csi20: endpoint@0 { 1297 reg = <0>; 1298 remote-endpoint = <&csi20vin4>; 1299 }; 1300 vin4csi40: endpoint@2 { 1301 reg = <2>; 1302 remote-endpoint = <&csi40vin4>; 1303 }; 1304 }; 1305 }; 1306 }; 1307 1308 vin5: video@e6ef5000 { 1309 compatible = "renesas,vin-r8a77965"; 1310 reg = <0 0xe6ef5000 0 0x1000>; 1311 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1312 clocks = <&cpg CPG_MOD 806>; 1313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1314 resets = <&cpg 806>; 1315 renesas,id = <5>; 1316 status = "disabled"; 1317 1318 ports { 1319 #address-cells = <1>; 1320 #size-cells = <0>; 1321 1322 port@1 { 1323 #address-cells = <1>; 1324 #size-cells = <0>; 1325 1326 reg = <1>; 1327 1328 vin5csi20: endpoint@0 { 1329 reg = <0>; 1330 remote-endpoint = <&csi20vin5>; 1331 }; 1332 vin5csi40: endpoint@2 { 1333 reg = <2>; 1334 remote-endpoint = <&csi40vin5>; 1335 }; 1336 }; 1337 }; 1338 }; 1339 1340 vin6: video@e6ef6000 { 1341 compatible = "renesas,vin-r8a77965"; 1342 reg = <0 0xe6ef6000 0 0x1000>; 1343 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1344 clocks = <&cpg CPG_MOD 805>; 1345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1346 resets = <&cpg 805>; 1347 renesas,id = <6>; 1348 status = "disabled"; 1349 1350 ports { 1351 #address-cells = <1>; 1352 #size-cells = <0>; 1353 1354 port@1 { 1355 #address-cells = <1>; 1356 #size-cells = <0>; 1357 1358 reg = <1>; 1359 1360 vin6csi20: endpoint@0 { 1361 reg = <0>; 1362 remote-endpoint = <&csi20vin6>; 1363 }; 1364 vin6csi40: endpoint@2 { 1365 reg = <2>; 1366 remote-endpoint = <&csi40vin6>; 1367 }; 1368 }; 1369 }; 1370 }; 1371 1372 vin7: video@e6ef7000 { 1373 compatible = "renesas,vin-r8a77965"; 1374 reg = <0 0xe6ef7000 0 0x1000>; 1375 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1376 clocks = <&cpg CPG_MOD 804>; 1377 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1378 resets = <&cpg 804>; 1379 renesas,id = <7>; 1380 status = "disabled"; 1381 1382 ports { 1383 #address-cells = <1>; 1384 #size-cells = <0>; 1385 1386 port@1 { 1387 #address-cells = <1>; 1388 #size-cells = <0>; 1389 1390 reg = <1>; 1391 1392 vin7csi20: endpoint@0 { 1393 reg = <0>; 1394 remote-endpoint = <&csi20vin7>; 1395 }; 1396 vin7csi40: endpoint@2 { 1397 reg = <2>; 1398 remote-endpoint = <&csi40vin7>; 1399 }; 1400 }; 1401 }; 1402 }; 1403 1404 rcar_sound: sound@ec500000 { 1405 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1406 <0 0xec5a0000 0 0x100>, /* ADG */ 1407 <0 0xec540000 0 0x1000>, /* SSIU */ 1408 <0 0xec541000 0 0x280>, /* SSI */ 1409 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1410 /* placeholder */ 1411 1412 rcar_sound,dvc { 1413 dvc0: dvc-0 { 1414 }; 1415 dvc1: dvc-1 { 1416 }; 1417 }; 1418 1419 rcar_sound,src { 1420 src0: src-0 { 1421 }; 1422 src1: src-1 { 1423 }; 1424 }; 1425 1426 rcar_sound,ssi { 1427 ssi0: ssi-0 { 1428 }; 1429 ssi1: ssi-1 { 1430 }; 1431 }; 1432 1433 ports { 1434 #address-cells = <1>; 1435 #size-cells = <0>; 1436 port@0 { 1437 reg = <0>; 1438 }; 1439 port@1 { 1440 reg = <1>; 1441 }; 1442 }; 1443 }; 1444 1445 xhci0: usb@ee000000 { 1446 compatible = "renesas,xhci-r8a77965", 1447 "renesas,rcar-gen3-xhci"; 1448 reg = <0 0xee000000 0 0xc00>; 1449 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1450 clocks = <&cpg CPG_MOD 328>; 1451 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1452 resets = <&cpg 328>; 1453 status = "disabled"; 1454 }; 1455 1456 usb3_peri0: usb@ee020000 { 1457 compatible = "renesas,r8a77965-usb3-peri", 1458 "renesas,rcar-gen3-usb3-peri"; 1459 reg = <0 0xee020000 0 0x400>; 1460 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1461 clocks = <&cpg CPG_MOD 328>; 1462 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1463 resets = <&cpg 328>; 1464 status = "disabled"; 1465 }; 1466 1467 ohci0: usb@ee080000 { 1468 compatible = "generic-ohci"; 1469 reg = <0 0xee080000 0 0x100>; 1470 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1471 clocks = <&cpg CPG_MOD 703>; 1472 phys = <&usb2_phy0>; 1473 phy-names = "usb"; 1474 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1475 resets = <&cpg 703>; 1476 status = "disabled"; 1477 }; 1478 1479 ohci1: usb@ee0a0000 { 1480 compatible = "generic-ohci"; 1481 reg = <0 0xee0a0000 0 0x100>; 1482 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1483 clocks = <&cpg CPG_MOD 702>; 1484 phys = <&usb2_phy1>; 1485 phy-names = "usb"; 1486 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1487 resets = <&cpg 702>; 1488 status = "disabled"; 1489 }; 1490 1491 ehci0: usb@ee080100 { 1492 compatible = "generic-ehci"; 1493 reg = <0 0xee080100 0 0x100>; 1494 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1495 clocks = <&cpg CPG_MOD 703>; 1496 phys = <&usb2_phy0>; 1497 phy-names = "usb"; 1498 companion = <&ohci0>; 1499 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1500 resets = <&cpg 703>; 1501 status = "disabled"; 1502 }; 1503 1504 ehci1: usb@ee0a0100 { 1505 compatible = "generic-ehci"; 1506 reg = <0 0xee0a0100 0 0x100>; 1507 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1508 clocks = <&cpg CPG_MOD 702>; 1509 phys = <&usb2_phy1>; 1510 phy-names = "usb"; 1511 companion = <&ohci1>; 1512 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1513 resets = <&cpg 702>; 1514 status = "disabled"; 1515 }; 1516 1517 usb2_phy0: usb-phy@ee080200 { 1518 compatible = "renesas,usb2-phy-r8a77965", 1519 "renesas,rcar-gen3-usb2-phy"; 1520 reg = <0 0xee080200 0 0x700>; 1521 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1522 clocks = <&cpg CPG_MOD 703>; 1523 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1524 resets = <&cpg 703>; 1525 #phy-cells = <0>; 1526 status = "disabled"; 1527 }; 1528 1529 usb2_phy1: usb-phy@ee0a0200 { 1530 compatible = "renesas,usb2-phy-r8a77965", 1531 "renesas,rcar-gen3-usb2-phy"; 1532 reg = <0 0xee0a0200 0 0x700>; 1533 clocks = <&cpg CPG_MOD 702>; 1534 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1535 resets = <&cpg 702>; 1536 #phy-cells = <0>; 1537 status = "disabled"; 1538 }; 1539 1540 sdhi0: sd@ee100000 { 1541 compatible = "renesas,sdhi-r8a77965", 1542 "renesas,rcar-gen3-sdhi"; 1543 reg = <0 0xee100000 0 0x2000>; 1544 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1545 clocks = <&cpg CPG_MOD 314>; 1546 max-frequency = <200000000>; 1547 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1548 resets = <&cpg 314>; 1549 status = "disabled"; 1550 }; 1551 1552 sdhi1: sd@ee120000 { 1553 compatible = "renesas,sdhi-r8a77965", 1554 "renesas,rcar-gen3-sdhi"; 1555 reg = <0 0xee120000 0 0x2000>; 1556 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1557 clocks = <&cpg CPG_MOD 313>; 1558 max-frequency = <200000000>; 1559 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1560 resets = <&cpg 313>; 1561 status = "disabled"; 1562 }; 1563 1564 sdhi2: sd@ee140000 { 1565 compatible = "renesas,sdhi-r8a77965", 1566 "renesas,rcar-gen3-sdhi"; 1567 reg = <0 0xee140000 0 0x2000>; 1568 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1569 clocks = <&cpg CPG_MOD 312>; 1570 max-frequency = <200000000>; 1571 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1572 resets = <&cpg 312>; 1573 status = "disabled"; 1574 }; 1575 1576 sdhi3: sd@ee160000 { 1577 compatible = "renesas,sdhi-r8a77965", 1578 "renesas,rcar-gen3-sdhi"; 1579 reg = <0 0xee160000 0 0x2000>; 1580 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1581 clocks = <&cpg CPG_MOD 311>; 1582 max-frequency = <200000000>; 1583 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1584 resets = <&cpg 311>; 1585 status = "disabled"; 1586 }; 1587 1588 sata: sata@ee300000 { 1589 compatible = "renesas,sata-r8a77965", 1590 "renesas,rcar-gen3-sata"; 1591 reg = <0 0xee300000 0 0x200000>; 1592 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1593 clocks = <&cpg CPG_MOD 815>; 1594 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1595 resets = <&cpg 815>; 1596 status = "disabled"; 1597 }; 1598 1599 gic: interrupt-controller@f1010000 { 1600 compatible = "arm,gic-400"; 1601 #interrupt-cells = <3>; 1602 #address-cells = <0>; 1603 interrupt-controller; 1604 reg = <0x0 0xf1010000 0 0x1000>, 1605 <0x0 0xf1020000 0 0x20000>, 1606 <0x0 0xf1040000 0 0x20000>, 1607 <0x0 0xf1060000 0 0x20000>; 1608 interrupts = <GIC_PPI 9 1609 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1610 clocks = <&cpg CPG_MOD 408>; 1611 clock-names = "clk"; 1612 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1613 resets = <&cpg 408>; 1614 }; 1615 1616 pciec0: pcie@fe000000 { 1617 compatible = "renesas,pcie-r8a77965", 1618 "renesas,pcie-rcar-gen3"; 1619 reg = <0 0xfe000000 0 0x80000>; 1620 #address-cells = <3>; 1621 #size-cells = <2>; 1622 bus-range = <0x00 0xff>; 1623 device_type = "pci"; 1624 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1625 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1626 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1627 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1628 /* Map all possible DDR as inbound ranges */ 1629 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1630 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1631 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1632 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1633 #interrupt-cells = <1>; 1634 interrupt-map-mask = <0 0 0 0>; 1635 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1636 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1637 clock-names = "pcie", "pcie_bus"; 1638 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1639 resets = <&cpg 319>; 1640 status = "disabled"; 1641 }; 1642 1643 pciec1: pcie@ee800000 { 1644 compatible = "renesas,pcie-r8a77965", 1645 "renesas,pcie-rcar-gen3"; 1646 reg = <0 0xee800000 0 0x80000>; 1647 #address-cells = <3>; 1648 #size-cells = <2>; 1649 bus-range = <0x00 0xff>; 1650 device_type = "pci"; 1651 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 1652 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 1653 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 1654 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 1655 /* Map all possible DDR as inbound ranges */ 1656 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1657 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 1658 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 1659 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 1660 #interrupt-cells = <1>; 1661 interrupt-map-mask = <0 0 0 0>; 1662 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1663 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 1664 clock-names = "pcie", "pcie_bus"; 1665 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1666 resets = <&cpg 318>; 1667 status = "disabled"; 1668 }; 1669 1670 fdp1@fe940000 { 1671 compatible = "renesas,fdp1"; 1672 reg = <0 0xfe940000 0 0x2400>; 1673 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1674 clocks = <&cpg CPG_MOD 119>; 1675 power-domains = <&sysc R8A77965_PD_A3VP>; 1676 resets = <&cpg 119>; 1677 renesas,fcp = <&fcpf0>; 1678 }; 1679 1680 fcpf0: fcp@fe950000 { 1681 compatible = "renesas,fcpf"; 1682 reg = <0 0xfe950000 0 0x200>; 1683 clocks = <&cpg CPG_MOD 615>; 1684 power-domains = <&sysc R8A77965_PD_A3VP>; 1685 resets = <&cpg 615>; 1686 }; 1687 1688 vspb: vsp@fe960000 { 1689 compatible = "renesas,vsp2"; 1690 reg = <0 0xfe960000 0 0x8000>; 1691 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1692 clocks = <&cpg CPG_MOD 626>; 1693 power-domains = <&sysc R8A77965_PD_A3VP>; 1694 resets = <&cpg 626>; 1695 1696 renesas,fcp = <&fcpvb0>; 1697 }; 1698 1699 fcpvb0: fcp@fe96f000 { 1700 compatible = "renesas,fcpv"; 1701 reg = <0 0xfe96f000 0 0x200>; 1702 clocks = <&cpg CPG_MOD 607>; 1703 power-domains = <&sysc R8A77965_PD_A3VP>; 1704 resets = <&cpg 607>; 1705 }; 1706 1707 vspi0: vsp@fe9a0000 { 1708 compatible = "renesas,vsp2"; 1709 reg = <0 0xfe9a0000 0 0x8000>; 1710 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1711 clocks = <&cpg CPG_MOD 631>; 1712 power-domains = <&sysc R8A77965_PD_A3VP>; 1713 resets = <&cpg 631>; 1714 1715 renesas,fcp = <&fcpvi0>; 1716 }; 1717 1718 fcpvi0: fcp@fe9af000 { 1719 compatible = "renesas,fcpv"; 1720 reg = <0 0xfe9af000 0 0x200>; 1721 clocks = <&cpg CPG_MOD 611>; 1722 power-domains = <&sysc R8A77965_PD_A3VP>; 1723 resets = <&cpg 611>; 1724 }; 1725 1726 vspd0: vsp@fea20000 { 1727 compatible = "renesas,vsp2"; 1728 reg = <0 0xfea20000 0 0x5000>; 1729 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1730 clocks = <&cpg CPG_MOD 623>; 1731 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1732 resets = <&cpg 623>; 1733 1734 renesas,fcp = <&fcpvd0>; 1735 }; 1736 1737 fcpvd0: fcp@fea27000 { 1738 compatible = "renesas,fcpv"; 1739 reg = <0 0xfea27000 0 0x200>; 1740 clocks = <&cpg CPG_MOD 603>; 1741 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1742 resets = <&cpg 603>; 1743 }; 1744 1745 vspd1: vsp@fea28000 { 1746 compatible = "renesas,vsp2"; 1747 reg = <0 0xfea28000 0 0x5000>; 1748 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1749 clocks = <&cpg CPG_MOD 622>; 1750 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1751 resets = <&cpg 622>; 1752 1753 renesas,fcp = <&fcpvd1>; 1754 }; 1755 1756 fcpvd1: fcp@fea2f000 { 1757 compatible = "renesas,fcpv"; 1758 reg = <0 0xfea2f000 0 0x200>; 1759 clocks = <&cpg CPG_MOD 602>; 1760 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1761 resets = <&cpg 602>; 1762 }; 1763 1764 csi20: csi2@fea80000 { 1765 compatible = "renesas,r8a77965-csi2"; 1766 reg = <0 0xfea80000 0 0x10000>; 1767 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1768 clocks = <&cpg CPG_MOD 714>; 1769 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1770 resets = <&cpg 714>; 1771 status = "disabled"; 1772 1773 ports { 1774 #address-cells = <1>; 1775 #size-cells = <0>; 1776 1777 port@1 { 1778 #address-cells = <1>; 1779 #size-cells = <0>; 1780 1781 reg = <1>; 1782 1783 csi20vin0: endpoint@0 { 1784 reg = <0>; 1785 remote-endpoint = <&vin0csi20>; 1786 }; 1787 csi20vin1: endpoint@1 { 1788 reg = <1>; 1789 remote-endpoint = <&vin1csi20>; 1790 }; 1791 csi20vin2: endpoint@2 { 1792 reg = <2>; 1793 remote-endpoint = <&vin2csi20>; 1794 }; 1795 csi20vin3: endpoint@3 { 1796 reg = <3>; 1797 remote-endpoint = <&vin3csi20>; 1798 }; 1799 csi20vin4: endpoint@4 { 1800 reg = <4>; 1801 remote-endpoint = <&vin4csi20>; 1802 }; 1803 csi20vin5: endpoint@5 { 1804 reg = <5>; 1805 remote-endpoint = <&vin5csi20>; 1806 }; 1807 csi20vin6: endpoint@6 { 1808 reg = <6>; 1809 remote-endpoint = <&vin6csi20>; 1810 }; 1811 csi20vin7: endpoint@7 { 1812 reg = <7>; 1813 remote-endpoint = <&vin7csi20>; 1814 }; 1815 }; 1816 }; 1817 }; 1818 1819 csi40: csi2@feaa0000 { 1820 compatible = "renesas,r8a77965-csi2"; 1821 reg = <0 0xfeaa0000 0 0x10000>; 1822 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1823 clocks = <&cpg CPG_MOD 716>; 1824 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1825 resets = <&cpg 716>; 1826 status = "disabled"; 1827 1828 ports { 1829 #address-cells = <1>; 1830 #size-cells = <0>; 1831 1832 port@1 { 1833 #address-cells = <1>; 1834 #size-cells = <0>; 1835 1836 reg = <1>; 1837 1838 csi40vin0: endpoint@0 { 1839 reg = <0>; 1840 remote-endpoint = <&vin0csi40>; 1841 }; 1842 csi40vin1: endpoint@1 { 1843 reg = <1>; 1844 remote-endpoint = <&vin1csi40>; 1845 }; 1846 csi40vin2: endpoint@2 { 1847 reg = <2>; 1848 remote-endpoint = <&vin2csi40>; 1849 }; 1850 csi40vin3: endpoint@3 { 1851 reg = <3>; 1852 remote-endpoint = <&vin3csi40>; 1853 }; 1854 csi40vin4: endpoint@4 { 1855 reg = <4>; 1856 remote-endpoint = <&vin4csi40>; 1857 }; 1858 csi40vin5: endpoint@5 { 1859 reg = <5>; 1860 remote-endpoint = <&vin5csi40>; 1861 }; 1862 csi40vin6: endpoint@6 { 1863 reg = <6>; 1864 remote-endpoint = <&vin6csi40>; 1865 }; 1866 csi40vin7: endpoint@7 { 1867 reg = <7>; 1868 remote-endpoint = <&vin7csi40>; 1869 }; 1870 }; 1871 }; 1872 }; 1873 1874 hdmi0: hdmi@fead0000 { 1875 compatible = "renesas,r8a77965-hdmi", 1876 "renesas,rcar-gen3-hdmi"; 1877 reg = <0 0xfead0000 0 0x10000>; 1878 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 1879 clocks = <&cpg CPG_MOD 729>, 1880 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 1881 clock-names = "iahb", "isfr"; 1882 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1883 resets = <&cpg 729>; 1884 status = "disabled"; 1885 1886 ports { 1887 #address-cells = <1>; 1888 #size-cells = <0>; 1889 port@0 { 1890 reg = <0>; 1891 dw_hdmi0_in: endpoint { 1892 remote-endpoint = <&du_out_hdmi0>; 1893 }; 1894 }; 1895 port@1 { 1896 reg = <1>; 1897 }; 1898 }; 1899 }; 1900 1901 du: display@feb00000 { 1902 compatible = "renesas,du-r8a77965"; 1903 reg = <0 0xfeb00000 0 0x80000>; 1904 reg-names = "du"; 1905 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1906 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1907 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 1908 clocks = <&cpg CPG_MOD 724>, 1909 <&cpg CPG_MOD 723>, 1910 <&cpg CPG_MOD 721>; 1911 clock-names = "du.0", "du.1", "du.3"; 1912 status = "disabled"; 1913 1914 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; 1915 1916 ports { 1917 #address-cells = <1>; 1918 #size-cells = <0>; 1919 1920 port@0 { 1921 reg = <0>; 1922 du_out_rgb: endpoint { 1923 }; 1924 }; 1925 port@1 { 1926 reg = <1>; 1927 du_out_hdmi0: endpoint { 1928 remote-endpoint = <&dw_hdmi0_in>; 1929 }; 1930 }; 1931 port@2 { 1932 reg = <2>; 1933 du_out_lvds0: endpoint { 1934 }; 1935 }; 1936 }; 1937 }; 1938 1939 prr: chipid@fff00044 { 1940 compatible = "renesas,prr"; 1941 reg = <0 0xfff00044 0 4>; 1942 }; 1943 }; 1944 1945 thermal-zones { 1946 sensor_thermal1: sensor-thermal1 { 1947 polling-delay-passive = <250>; 1948 polling-delay = <1000>; 1949 thermal-sensors = <&tsc 0>; 1950 1951 trips { 1952 sensor1_crit: sensor1-crit { 1953 temperature = <120000>; 1954 hysteresis = <1000>; 1955 type = "critical"; 1956 }; 1957 }; 1958 }; 1959 1960 sensor_thermal2: sensor-thermal2 { 1961 polling-delay-passive = <250>; 1962 polling-delay = <1000>; 1963 thermal-sensors = <&tsc 1>; 1964 1965 trips { 1966 sensor2_crit: sensor2-crit { 1967 temperature = <120000>; 1968 hysteresis = <1000>; 1969 type = "critical"; 1970 }; 1971 }; 1972 }; 1973 1974 sensor_thermal3: sensor-thermal3 { 1975 polling-delay-passive = <250>; 1976 polling-delay = <1000>; 1977 thermal-sensors = <&tsc 2>; 1978 1979 trips { 1980 sensor3_crit: sensor3-crit { 1981 temperature = <120000>; 1982 hysteresis = <1000>; 1983 type = "critical"; 1984 }; 1985 }; 1986 }; 1987 }; 1988 1989 timer { 1990 compatible = "arm,armv8-timer"; 1991 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1992 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1993 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1994 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1995 }; 1996 1997 /* External USB clocks - can be overridden by the board */ 1998 usb3s0_clk: usb3s0 { 1999 compatible = "fixed-clock"; 2000 #clock-cells = <0>; 2001 clock-frequency = <0>; 2002 }; 2003 2004 usb_extal_clk: usb_extal { 2005 compatible = "fixed-clock"; 2006 #clock-cells = <0>; 2007 clock-frequency = <0>; 2008 }; 2009}; 2010