1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77961-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77961-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A77961_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a77961"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 /* 20 * The external audio clocks are configured as 0 Hz fixed frequency 21 * clocks by default. 22 * Boards that provide audio clocks should override them. 23 */ 24 audio_clk_a: audio_clk_a { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; 27 clock-frequency = <0>; 28 }; 29 30 audio_clk_b: audio_clk_b { 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; 33 clock-frequency = <0>; 34 }; 35 36 audio_clk_c: audio_clk_c { 37 compatible = "fixed-clock"; 38 #clock-cells = <0>; 39 clock-frequency = <0>; 40 }; 41 42 /* External CAN clock - to be overridden by boards that provide it */ 43 can_clk: can { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 47 }; 48 49 cluster0_opp: opp_table0 { 50 compatible = "operating-points-v2"; 51 opp-shared; 52 53 opp-500000000 { 54 opp-hz = /bits/ 64 <500000000>; 55 opp-microvolt = <820000>; 56 clock-latency-ns = <300000>; 57 }; 58 opp-1000000000 { 59 opp-hz = /bits/ 64 <1000000000>; 60 opp-microvolt = <820000>; 61 clock-latency-ns = <300000>; 62 }; 63 opp-1500000000 { 64 opp-hz = /bits/ 64 <1500000000>; 65 opp-microvolt = <820000>; 66 clock-latency-ns = <300000>; 67 }; 68 opp-1600000000 { 69 opp-hz = /bits/ 64 <1600000000>; 70 opp-microvolt = <900000>; 71 clock-latency-ns = <300000>; 72 turbo-mode; 73 }; 74 opp-1700000000 { 75 opp-hz = /bits/ 64 <1700000000>; 76 opp-microvolt = <900000>; 77 clock-latency-ns = <300000>; 78 turbo-mode; 79 }; 80 opp-1800000000 { 81 opp-hz = /bits/ 64 <1800000000>; 82 opp-microvolt = <960000>; 83 clock-latency-ns = <300000>; 84 turbo-mode; 85 }; 86 }; 87 88 cluster1_opp: opp_table1 { 89 compatible = "operating-points-v2"; 90 opp-shared; 91 92 opp-800000000 { 93 opp-hz = /bits/ 64 <800000000>; 94 opp-microvolt = <820000>; 95 clock-latency-ns = <300000>; 96 }; 97 opp-1000000000 { 98 opp-hz = /bits/ 64 <1000000000>; 99 opp-microvolt = <820000>; 100 clock-latency-ns = <300000>; 101 }; 102 opp-1200000000 { 103 opp-hz = /bits/ 64 <1200000000>; 104 opp-microvolt = <820000>; 105 clock-latency-ns = <300000>; 106 }; 107 opp-1300000000 { 108 opp-hz = /bits/ 64 <1300000000>; 109 opp-microvolt = <820000>; 110 clock-latency-ns = <300000>; 111 turbo-mode; 112 }; 113 }; 114 115 cpus { 116 #address-cells = <1>; 117 #size-cells = <0>; 118 119 cpu-map { 120 cluster0 { 121 core0 { 122 cpu = <&a57_0>; 123 }; 124 core1 { 125 cpu = <&a57_1>; 126 }; 127 }; 128 129 cluster1 { 130 core0 { 131 cpu = <&a53_0>; 132 }; 133 core1 { 134 cpu = <&a53_1>; 135 }; 136 core2 { 137 cpu = <&a53_2>; 138 }; 139 core3 { 140 cpu = <&a53_3>; 141 }; 142 }; 143 }; 144 145 a57_0: cpu@0 { 146 compatible = "arm,cortex-a57"; 147 reg = <0x0>; 148 device_type = "cpu"; 149 power-domains = <&sysc R8A77961_PD_CA57_CPU0>; 150 next-level-cache = <&L2_CA57>; 151 enable-method = "psci"; 152 cpu-idle-states = <&CPU_SLEEP_0>; 153 dynamic-power-coefficient = <854>; 154 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>; 155 operating-points-v2 = <&cluster0_opp>; 156 capacity-dmips-mhz = <1024>; 157 #cooling-cells = <2>; 158 }; 159 160 a57_1: cpu@1 { 161 compatible = "arm,cortex-a57"; 162 reg = <0x1>; 163 device_type = "cpu"; 164 power-domains = <&sysc R8A77961_PD_CA57_CPU1>; 165 next-level-cache = <&L2_CA57>; 166 enable-method = "psci"; 167 cpu-idle-states = <&CPU_SLEEP_0>; 168 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>; 169 operating-points-v2 = <&cluster0_opp>; 170 capacity-dmips-mhz = <1024>; 171 #cooling-cells = <2>; 172 }; 173 174 a53_0: cpu@100 { 175 compatible = "arm,cortex-a53"; 176 reg = <0x100>; 177 device_type = "cpu"; 178 power-domains = <&sysc R8A77961_PD_CA53_CPU0>; 179 next-level-cache = <&L2_CA53>; 180 enable-method = "psci"; 181 cpu-idle-states = <&CPU_SLEEP_1>; 182 #cooling-cells = <2>; 183 dynamic-power-coefficient = <277>; 184 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 185 operating-points-v2 = <&cluster1_opp>; 186 capacity-dmips-mhz = <535>; 187 }; 188 189 a53_1: cpu@101 { 190 compatible = "arm,cortex-a53"; 191 reg = <0x101>; 192 device_type = "cpu"; 193 power-domains = <&sysc R8A77961_PD_CA53_CPU1>; 194 next-level-cache = <&L2_CA53>; 195 enable-method = "psci"; 196 cpu-idle-states = <&CPU_SLEEP_1>; 197 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 198 operating-points-v2 = <&cluster1_opp>; 199 capacity-dmips-mhz = <535>; 200 }; 201 202 a53_2: cpu@102 { 203 compatible = "arm,cortex-a53"; 204 reg = <0x102>; 205 device_type = "cpu"; 206 power-domains = <&sysc R8A77961_PD_CA53_CPU2>; 207 next-level-cache = <&L2_CA53>; 208 enable-method = "psci"; 209 cpu-idle-states = <&CPU_SLEEP_1>; 210 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 211 operating-points-v2 = <&cluster1_opp>; 212 capacity-dmips-mhz = <535>; 213 }; 214 215 a53_3: cpu@103 { 216 compatible = "arm,cortex-a53"; 217 reg = <0x103>; 218 device_type = "cpu"; 219 power-domains = <&sysc R8A77961_PD_CA53_CPU3>; 220 next-level-cache = <&L2_CA53>; 221 enable-method = "psci"; 222 cpu-idle-states = <&CPU_SLEEP_1>; 223 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 224 operating-points-v2 = <&cluster1_opp>; 225 capacity-dmips-mhz = <535>; 226 }; 227 228 L2_CA57: cache-controller-0 { 229 compatible = "cache"; 230 power-domains = <&sysc R8A77961_PD_CA57_SCU>; 231 cache-unified; 232 cache-level = <2>; 233 }; 234 235 L2_CA53: cache-controller-1 { 236 compatible = "cache"; 237 power-domains = <&sysc R8A77961_PD_CA53_SCU>; 238 cache-unified; 239 cache-level = <2>; 240 }; 241 242 idle-states { 243 entry-method = "psci"; 244 245 CPU_SLEEP_0: cpu-sleep-0 { 246 compatible = "arm,idle-state"; 247 arm,psci-suspend-param = <0x0010000>; 248 local-timer-stop; 249 entry-latency-us = <400>; 250 exit-latency-us = <500>; 251 min-residency-us = <4000>; 252 }; 253 254 CPU_SLEEP_1: cpu-sleep-1 { 255 compatible = "arm,idle-state"; 256 arm,psci-suspend-param = <0x0010000>; 257 local-timer-stop; 258 entry-latency-us = <700>; 259 exit-latency-us = <700>; 260 min-residency-us = <5000>; 261 }; 262 }; 263 }; 264 265 extal_clk: extal { 266 compatible = "fixed-clock"; 267 #clock-cells = <0>; 268 /* This value must be overridden by the board */ 269 clock-frequency = <0>; 270 }; 271 272 extalr_clk: extalr { 273 compatible = "fixed-clock"; 274 #clock-cells = <0>; 275 /* This value must be overridden by the board */ 276 clock-frequency = <0>; 277 }; 278 279 /* External PCIe clock - can be overridden by the board */ 280 pcie_bus_clk: pcie_bus { 281 compatible = "fixed-clock"; 282 #clock-cells = <0>; 283 clock-frequency = <0>; 284 }; 285 286 pmu_a53 { 287 compatible = "arm,cortex-a53-pmu"; 288 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 289 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 290 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 291 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 292 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 293 }; 294 295 pmu_a57 { 296 compatible = "arm,cortex-a57-pmu"; 297 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 298 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 299 interrupt-affinity = <&a57_0>, <&a57_1>; 300 }; 301 302 psci { 303 compatible = "arm,psci-1.0", "arm,psci-0.2"; 304 method = "smc"; 305 }; 306 307 /* External SCIF clock - to be overridden by boards that provide it */ 308 scif_clk: scif { 309 compatible = "fixed-clock"; 310 #clock-cells = <0>; 311 clock-frequency = <0>; 312 }; 313 314 soc { 315 compatible = "simple-bus"; 316 interrupt-parent = <&gic>; 317 #address-cells = <2>; 318 #size-cells = <2>; 319 ranges; 320 321 rwdt: watchdog@e6020000 { 322 compatible = "renesas,r8a77961-wdt", 323 "renesas,rcar-gen3-wdt"; 324 reg = <0 0xe6020000 0 0x0c>; 325 clocks = <&cpg CPG_MOD 402>; 326 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 327 resets = <&cpg 402>; 328 status = "disabled"; 329 }; 330 331 gpio0: gpio@e6050000 { 332 compatible = "renesas,gpio-r8a77961", 333 "renesas,rcar-gen3-gpio"; 334 reg = <0 0xe6050000 0 0x50>; 335 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 336 #gpio-cells = <2>; 337 gpio-controller; 338 gpio-ranges = <&pfc 0 0 16>; 339 #interrupt-cells = <2>; 340 interrupt-controller; 341 clocks = <&cpg CPG_MOD 912>; 342 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 343 resets = <&cpg 912>; 344 }; 345 346 gpio1: gpio@e6051000 { 347 compatible = "renesas,gpio-r8a77961", 348 "renesas,rcar-gen3-gpio"; 349 reg = <0 0xe6051000 0 0x50>; 350 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 351 #gpio-cells = <2>; 352 gpio-controller; 353 gpio-ranges = <&pfc 0 32 29>; 354 #interrupt-cells = <2>; 355 interrupt-controller; 356 clocks = <&cpg CPG_MOD 911>; 357 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 358 resets = <&cpg 911>; 359 }; 360 361 gpio2: gpio@e6052000 { 362 compatible = "renesas,gpio-r8a77961", 363 "renesas,rcar-gen3-gpio"; 364 reg = <0 0xe6052000 0 0x50>; 365 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 366 #gpio-cells = <2>; 367 gpio-controller; 368 gpio-ranges = <&pfc 0 64 15>; 369 #interrupt-cells = <2>; 370 interrupt-controller; 371 clocks = <&cpg CPG_MOD 910>; 372 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 373 resets = <&cpg 910>; 374 }; 375 376 gpio3: gpio@e6053000 { 377 compatible = "renesas,gpio-r8a77961", 378 "renesas,rcar-gen3-gpio"; 379 reg = <0 0xe6053000 0 0x50>; 380 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 381 #gpio-cells = <2>; 382 gpio-controller; 383 gpio-ranges = <&pfc 0 96 16>; 384 #interrupt-cells = <2>; 385 interrupt-controller; 386 clocks = <&cpg CPG_MOD 909>; 387 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 388 resets = <&cpg 909>; 389 }; 390 391 gpio4: gpio@e6054000 { 392 compatible = "renesas,gpio-r8a77961", 393 "renesas,rcar-gen3-gpio"; 394 reg = <0 0xe6054000 0 0x50>; 395 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 396 #gpio-cells = <2>; 397 gpio-controller; 398 gpio-ranges = <&pfc 0 128 18>; 399 #interrupt-cells = <2>; 400 interrupt-controller; 401 clocks = <&cpg CPG_MOD 908>; 402 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 403 resets = <&cpg 908>; 404 }; 405 406 gpio5: gpio@e6055000 { 407 compatible = "renesas,gpio-r8a77961", 408 "renesas,rcar-gen3-gpio"; 409 reg = <0 0xe6055000 0 0x50>; 410 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 411 #gpio-cells = <2>; 412 gpio-controller; 413 gpio-ranges = <&pfc 0 160 26>; 414 #interrupt-cells = <2>; 415 interrupt-controller; 416 clocks = <&cpg CPG_MOD 907>; 417 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 418 resets = <&cpg 907>; 419 }; 420 421 gpio6: gpio@e6055400 { 422 compatible = "renesas,gpio-r8a77961", 423 "renesas,rcar-gen3-gpio"; 424 reg = <0 0xe6055400 0 0x50>; 425 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 426 #gpio-cells = <2>; 427 gpio-controller; 428 gpio-ranges = <&pfc 0 192 32>; 429 #interrupt-cells = <2>; 430 interrupt-controller; 431 clocks = <&cpg CPG_MOD 906>; 432 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 433 resets = <&cpg 906>; 434 }; 435 436 gpio7: gpio@e6055800 { 437 compatible = "renesas,gpio-r8a77961", 438 "renesas,rcar-gen3-gpio"; 439 reg = <0 0xe6055800 0 0x50>; 440 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 441 #gpio-cells = <2>; 442 gpio-controller; 443 gpio-ranges = <&pfc 0 224 4>; 444 #interrupt-cells = <2>; 445 interrupt-controller; 446 clocks = <&cpg CPG_MOD 905>; 447 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 448 resets = <&cpg 905>; 449 }; 450 451 pfc: pinctrl@e6060000 { 452 compatible = "renesas,pfc-r8a77961"; 453 reg = <0 0xe6060000 0 0x50c>; 454 }; 455 456 cmt0: timer@e60f0000 { 457 compatible = "renesas,r8a77961-cmt0", 458 "renesas,rcar-gen3-cmt0"; 459 reg = <0 0xe60f0000 0 0x1004>; 460 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 461 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 462 clocks = <&cpg CPG_MOD 303>; 463 clock-names = "fck"; 464 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 465 resets = <&cpg 303>; 466 status = "disabled"; 467 }; 468 469 cmt1: timer@e6130000 { 470 compatible = "renesas,r8a77961-cmt1", 471 "renesas,rcar-gen3-cmt1"; 472 reg = <0 0xe6130000 0 0x1004>; 473 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 474 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 475 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 476 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 477 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 478 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 480 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 481 clocks = <&cpg CPG_MOD 302>; 482 clock-names = "fck"; 483 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 484 resets = <&cpg 302>; 485 status = "disabled"; 486 }; 487 488 cmt2: timer@e6140000 { 489 compatible = "renesas,r8a77961-cmt1", 490 "renesas,rcar-gen3-cmt1"; 491 reg = <0 0xe6140000 0 0x1004>; 492 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 493 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 494 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 495 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 496 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 497 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 498 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 499 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 500 clocks = <&cpg CPG_MOD 301>; 501 clock-names = "fck"; 502 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 503 resets = <&cpg 301>; 504 status = "disabled"; 505 }; 506 507 cmt3: timer@e6148000 { 508 compatible = "renesas,r8a77961-cmt1", 509 "renesas,rcar-gen3-cmt1"; 510 reg = <0 0xe6148000 0 0x1004>; 511 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 513 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 514 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 518 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 519 clocks = <&cpg CPG_MOD 300>; 520 clock-names = "fck"; 521 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 522 resets = <&cpg 300>; 523 status = "disabled"; 524 }; 525 526 cpg: clock-controller@e6150000 { 527 compatible = "renesas,r8a77961-cpg-mssr"; 528 reg = <0 0xe6150000 0 0x1000>; 529 clocks = <&extal_clk>, <&extalr_clk>; 530 clock-names = "extal", "extalr"; 531 #clock-cells = <2>; 532 #power-domain-cells = <0>; 533 #reset-cells = <1>; 534 }; 535 536 rst: reset-controller@e6160000 { 537 compatible = "renesas,r8a77961-rst"; 538 reg = <0 0xe6160000 0 0x0200>; 539 }; 540 541 sysc: system-controller@e6180000 { 542 compatible = "renesas,r8a77961-sysc"; 543 reg = <0 0xe6180000 0 0x0400>; 544 #power-domain-cells = <1>; 545 }; 546 547 tsc: thermal@e6198000 { 548 compatible = "renesas,r8a77961-thermal"; 549 reg = <0 0xe6198000 0 0x100>, 550 <0 0xe61a0000 0 0x100>, 551 <0 0xe61a8000 0 0x100>; 552 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 553 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 554 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 555 clocks = <&cpg CPG_MOD 522>; 556 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 557 resets = <&cpg 522>; 558 #thermal-sensor-cells = <1>; 559 }; 560 561 intc_ex: interrupt-controller@e61c0000 { 562 #interrupt-cells = <2>; 563 interrupt-controller; 564 reg = <0 0xe61c0000 0 0x200>; 565 /* placeholder */ 566 }; 567 568 tmu0: timer@e61e0000 { 569 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 570 reg = <0 0xe61e0000 0 0x30>; 571 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 572 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 573 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 574 clocks = <&cpg CPG_MOD 125>; 575 clock-names = "fck"; 576 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 577 resets = <&cpg 125>; 578 status = "disabled"; 579 }; 580 581 tmu1: timer@e6fc0000 { 582 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 583 reg = <0 0xe6fc0000 0 0x30>; 584 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 585 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 586 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 587 clocks = <&cpg CPG_MOD 124>; 588 clock-names = "fck"; 589 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 590 resets = <&cpg 124>; 591 status = "disabled"; 592 }; 593 594 tmu2: timer@e6fd0000 { 595 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 596 reg = <0 0xe6fd0000 0 0x30>; 597 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 598 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 599 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 600 clocks = <&cpg CPG_MOD 123>; 601 clock-names = "fck"; 602 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 603 resets = <&cpg 123>; 604 status = "disabled"; 605 }; 606 607 tmu3: timer@e6fe0000 { 608 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 609 reg = <0 0xe6fe0000 0 0x30>; 610 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 611 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 612 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 613 clocks = <&cpg CPG_MOD 122>; 614 clock-names = "fck"; 615 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 616 resets = <&cpg 122>; 617 status = "disabled"; 618 }; 619 620 tmu4: timer@ffc00000 { 621 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 622 reg = <0 0xffc00000 0 0x30>; 623 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 624 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 626 clocks = <&cpg CPG_MOD 121>; 627 clock-names = "fck"; 628 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 629 resets = <&cpg 121>; 630 status = "disabled"; 631 }; 632 633 i2c0: i2c@e6500000 { 634 #address-cells = <1>; 635 #size-cells = <0>; 636 compatible = "renesas,i2c-r8a77961", 637 "renesas,rcar-gen3-i2c"; 638 reg = <0 0xe6500000 0 0x40>; 639 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 640 clocks = <&cpg CPG_MOD 931>; 641 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 642 resets = <&cpg 931>; 643 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 644 <&dmac2 0x91>, <&dmac2 0x90>; 645 dma-names = "tx", "rx", "tx", "rx"; 646 i2c-scl-internal-delay-ns = <110>; 647 status = "disabled"; 648 }; 649 650 i2c1: i2c@e6508000 { 651 #address-cells = <1>; 652 #size-cells = <0>; 653 compatible = "renesas,i2c-r8a77961", 654 "renesas,rcar-gen3-i2c"; 655 reg = <0 0xe6508000 0 0x40>; 656 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 657 clocks = <&cpg CPG_MOD 930>; 658 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 659 resets = <&cpg 930>; 660 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 661 <&dmac2 0x93>, <&dmac2 0x92>; 662 dma-names = "tx", "rx", "tx", "rx"; 663 i2c-scl-internal-delay-ns = <6>; 664 status = "disabled"; 665 }; 666 667 i2c2: i2c@e6510000 { 668 #address-cells = <1>; 669 #size-cells = <0>; 670 compatible = "renesas,i2c-r8a77961", 671 "renesas,rcar-gen3-i2c"; 672 reg = <0 0xe6510000 0 0x40>; 673 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 674 clocks = <&cpg CPG_MOD 929>; 675 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 676 resets = <&cpg 929>; 677 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 678 <&dmac2 0x95>, <&dmac2 0x94>; 679 dma-names = "tx", "rx", "tx", "rx"; 680 i2c-scl-internal-delay-ns = <6>; 681 status = "disabled"; 682 }; 683 684 i2c3: i2c@e66d0000 { 685 #address-cells = <1>; 686 #size-cells = <0>; 687 compatible = "renesas,i2c-r8a77961", 688 "renesas,rcar-gen3-i2c"; 689 reg = <0 0xe66d0000 0 0x40>; 690 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 691 clocks = <&cpg CPG_MOD 928>; 692 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 693 resets = <&cpg 928>; 694 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 695 dma-names = "tx", "rx"; 696 i2c-scl-internal-delay-ns = <110>; 697 status = "disabled"; 698 }; 699 700 i2c4: i2c@e66d8000 { 701 #address-cells = <1>; 702 #size-cells = <0>; 703 compatible = "renesas,i2c-r8a77961", 704 "renesas,rcar-gen3-i2c"; 705 reg = <0 0xe66d8000 0 0x40>; 706 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 707 clocks = <&cpg CPG_MOD 927>; 708 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 709 resets = <&cpg 927>; 710 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 711 dma-names = "tx", "rx"; 712 i2c-scl-internal-delay-ns = <110>; 713 status = "disabled"; 714 }; 715 716 i2c5: i2c@e66e0000 { 717 #address-cells = <1>; 718 #size-cells = <0>; 719 compatible = "renesas,i2c-r8a77961", 720 "renesas,rcar-gen3-i2c"; 721 reg = <0 0xe66e0000 0 0x40>; 722 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 723 clocks = <&cpg CPG_MOD 919>; 724 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 725 resets = <&cpg 919>; 726 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 727 dma-names = "tx", "rx"; 728 i2c-scl-internal-delay-ns = <110>; 729 status = "disabled"; 730 }; 731 732 i2c6: i2c@e66e8000 { 733 #address-cells = <1>; 734 #size-cells = <0>; 735 compatible = "renesas,i2c-r8a77961", 736 "renesas,rcar-gen3-i2c"; 737 reg = <0 0xe66e8000 0 0x40>; 738 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 739 clocks = <&cpg CPG_MOD 918>; 740 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 741 resets = <&cpg 918>; 742 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 743 dma-names = "tx", "rx"; 744 i2c-scl-internal-delay-ns = <6>; 745 status = "disabled"; 746 }; 747 748 i2c_dvfs: i2c@e60b0000 { 749 #address-cells = <1>; 750 #size-cells = <0>; 751 compatible = "renesas,iic-r8a77961", 752 "renesas,rcar-gen3-iic", 753 "renesas,rmobile-iic"; 754 reg = <0 0xe60b0000 0 0x425>; 755 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 756 clocks = <&cpg CPG_MOD 926>; 757 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 758 resets = <&cpg 926>; 759 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 760 dma-names = "tx", "rx"; 761 status = "disabled"; 762 }; 763 764 hscif0: serial@e6540000 { 765 compatible = "renesas,hscif-r8a77961", 766 "renesas,rcar-gen3-hscif", 767 "renesas,hscif"; 768 reg = <0 0xe6540000 0 0x60>; 769 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 770 clocks = <&cpg CPG_MOD 520>, 771 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 772 <&scif_clk>; 773 clock-names = "fck", "brg_int", "scif_clk"; 774 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 775 <&dmac2 0x31>, <&dmac2 0x30>; 776 dma-names = "tx", "rx", "tx", "rx"; 777 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 778 resets = <&cpg 520>; 779 status = "disabled"; 780 }; 781 782 hscif1: serial@e6550000 { 783 compatible = "renesas,hscif-r8a77961", 784 "renesas,rcar-gen3-hscif", 785 "renesas,hscif"; 786 reg = <0 0xe6550000 0 0x60>; 787 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 788 clocks = <&cpg CPG_MOD 519>, 789 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 790 <&scif_clk>; 791 clock-names = "fck", "brg_int", "scif_clk"; 792 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 793 <&dmac2 0x33>, <&dmac2 0x32>; 794 dma-names = "tx", "rx", "tx", "rx"; 795 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 796 resets = <&cpg 519>; 797 status = "disabled"; 798 }; 799 800 hscif2: serial@e6560000 { 801 compatible = "renesas,hscif-r8a77961", 802 "renesas,rcar-gen3-hscif", 803 "renesas,hscif"; 804 reg = <0 0xe6560000 0 0x60>; 805 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 806 clocks = <&cpg CPG_MOD 518>, 807 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 808 <&scif_clk>; 809 clock-names = "fck", "brg_int", "scif_clk"; 810 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 811 <&dmac2 0x35>, <&dmac2 0x34>; 812 dma-names = "tx", "rx", "tx", "rx"; 813 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 814 resets = <&cpg 518>; 815 status = "disabled"; 816 }; 817 818 hscif3: serial@e66a0000 { 819 compatible = "renesas,hscif-r8a77961", 820 "renesas,rcar-gen3-hscif", 821 "renesas,hscif"; 822 reg = <0 0xe66a0000 0 0x60>; 823 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 824 clocks = <&cpg CPG_MOD 517>, 825 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 826 <&scif_clk>; 827 clock-names = "fck", "brg_int", "scif_clk"; 828 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 829 dma-names = "tx", "rx"; 830 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 831 resets = <&cpg 517>; 832 status = "disabled"; 833 }; 834 835 hscif4: serial@e66b0000 { 836 compatible = "renesas,hscif-r8a77961", 837 "renesas,rcar-gen3-hscif", 838 "renesas,hscif"; 839 reg = <0 0xe66b0000 0 0x60>; 840 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 841 clocks = <&cpg CPG_MOD 516>, 842 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 843 <&scif_clk>; 844 clock-names = "fck", "brg_int", "scif_clk"; 845 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 846 dma-names = "tx", "rx"; 847 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 848 resets = <&cpg 516>; 849 status = "disabled"; 850 }; 851 852 hsusb: usb@e6590000 { 853 compatible = "renesas,usbhs-r8a77961", 854 "renesas,rcar-gen3-usbhs"; 855 reg = <0 0xe6590000 0 0x200>; 856 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 857 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 858 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 859 <&usb_dmac1 0>, <&usb_dmac1 1>; 860 dma-names = "ch0", "ch1", "ch2", "ch3"; 861 renesas,buswait = <11>; 862 phys = <&usb2_phy0 3>; 863 phy-names = "usb"; 864 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 865 resets = <&cpg 704>, <&cpg 703>; 866 status = "disabled"; 867 }; 868 869 usb_dmac0: dma-controller@e65a0000 { 870 compatible = "renesas,r8a77961-usb-dmac", 871 "renesas,usb-dmac"; 872 reg = <0 0xe65a0000 0 0x100>; 873 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 875 interrupt-names = "ch0", "ch1"; 876 clocks = <&cpg CPG_MOD 330>; 877 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 878 resets = <&cpg 330>; 879 #dma-cells = <1>; 880 dma-channels = <2>; 881 }; 882 883 usb_dmac1: dma-controller@e65b0000 { 884 compatible = "renesas,r8a77961-usb-dmac", 885 "renesas,usb-dmac"; 886 reg = <0 0xe65b0000 0 0x100>; 887 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 889 interrupt-names = "ch0", "ch1"; 890 clocks = <&cpg CPG_MOD 331>; 891 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 892 resets = <&cpg 331>; 893 #dma-cells = <1>; 894 dma-channels = <2>; 895 }; 896 897 usb3_phy0: usb-phy@e65ee000 { 898 compatible = "renesas,r8a77961-usb3-phy", 899 "renesas,rcar-gen3-usb3-phy"; 900 reg = <0 0xe65ee000 0 0x90>; 901 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 902 <&usb_extal_clk>; 903 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 904 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 905 resets = <&cpg 328>; 906 #phy-cells = <0>; 907 status = "disabled"; 908 }; 909 910 arm_cc630p: crypto@e6601000 { 911 compatible = "arm,cryptocell-630p-ree"; 912 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 913 reg = <0x0 0xe6601000 0 0x1000>; 914 clocks = <&cpg CPG_MOD 229>; 915 resets = <&cpg 229>; 916 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 917 }; 918 919 dmac0: dma-controller@e6700000 { 920 compatible = "renesas,dmac-r8a77961", 921 "renesas,rcar-dmac"; 922 reg = <0 0xe6700000 0 0x10000>; 923 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 924 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 926 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 927 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 928 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 929 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 930 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 931 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 932 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 933 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 936 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 937 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 938 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 939 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 940 interrupt-names = "error", 941 "ch0", "ch1", "ch2", "ch3", 942 "ch4", "ch5", "ch6", "ch7", 943 "ch8", "ch9", "ch10", "ch11", 944 "ch12", "ch13", "ch14", "ch15"; 945 clocks = <&cpg CPG_MOD 219>; 946 clock-names = "fck"; 947 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 948 resets = <&cpg 219>; 949 #dma-cells = <1>; 950 dma-channels = <16>; 951 }; 952 953 dmac1: dma-controller@e7300000 { 954 compatible = "renesas,dmac-r8a77961", 955 "renesas,rcar-dmac"; 956 reg = <0 0xe7300000 0 0x10000>; 957 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 974 interrupt-names = "error", 975 "ch0", "ch1", "ch2", "ch3", 976 "ch4", "ch5", "ch6", "ch7", 977 "ch8", "ch9", "ch10", "ch11", 978 "ch12", "ch13", "ch14", "ch15"; 979 clocks = <&cpg CPG_MOD 218>; 980 clock-names = "fck"; 981 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 982 resets = <&cpg 218>; 983 #dma-cells = <1>; 984 dma-channels = <16>; 985 }; 986 987 dmac2: dma-controller@e7310000 { 988 compatible = "renesas,dmac-r8a77961", 989 "renesas,rcar-dmac"; 990 reg = <0 0xe7310000 0 0x10000>; 991 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1004 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1005 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1006 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1007 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1008 interrupt-names = "error", 1009 "ch0", "ch1", "ch2", "ch3", 1010 "ch4", "ch5", "ch6", "ch7", 1011 "ch8", "ch9", "ch10", "ch11", 1012 "ch12", "ch13", "ch14", "ch15"; 1013 clocks = <&cpg CPG_MOD 217>; 1014 clock-names = "fck"; 1015 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1016 resets = <&cpg 217>; 1017 #dma-cells = <1>; 1018 dma-channels = <16>; 1019 }; 1020 1021 ipmmu_ds0: iommu@e6740000 { 1022 compatible = "renesas,ipmmu-r8a77961"; 1023 reg = <0 0xe6740000 0 0x1000>; 1024 renesas,ipmmu-main = <&ipmmu_mm 0>; 1025 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1026 #iommu-cells = <1>; 1027 }; 1028 1029 ipmmu_ds1: iommu@e7740000 { 1030 compatible = "renesas,ipmmu-r8a77961"; 1031 reg = <0 0xe7740000 0 0x1000>; 1032 renesas,ipmmu-main = <&ipmmu_mm 1>; 1033 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1034 #iommu-cells = <1>; 1035 }; 1036 1037 ipmmu_hc: iommu@e6570000 { 1038 compatible = "renesas,ipmmu-r8a77961"; 1039 reg = <0 0xe6570000 0 0x1000>; 1040 renesas,ipmmu-main = <&ipmmu_mm 2>; 1041 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1042 #iommu-cells = <1>; 1043 }; 1044 1045 ipmmu_ir: iommu@ff8b0000 { 1046 compatible = "renesas,ipmmu-r8a77961"; 1047 reg = <0 0xff8b0000 0 0x1000>; 1048 renesas,ipmmu-main = <&ipmmu_mm 3>; 1049 power-domains = <&sysc R8A77961_PD_A3IR>; 1050 #iommu-cells = <1>; 1051 }; 1052 1053 ipmmu_mm: iommu@e67b0000 { 1054 compatible = "renesas,ipmmu-r8a77961"; 1055 reg = <0 0xe67b0000 0 0x1000>; 1056 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1057 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1058 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1059 #iommu-cells = <1>; 1060 }; 1061 1062 ipmmu_mp: iommu@ec670000 { 1063 compatible = "renesas,ipmmu-r8a77961"; 1064 reg = <0 0xec670000 0 0x1000>; 1065 renesas,ipmmu-main = <&ipmmu_mm 4>; 1066 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1067 #iommu-cells = <1>; 1068 }; 1069 1070 ipmmu_pv0: iommu@fd800000 { 1071 compatible = "renesas,ipmmu-r8a77961"; 1072 reg = <0 0xfd800000 0 0x1000>; 1073 renesas,ipmmu-main = <&ipmmu_mm 5>; 1074 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1075 #iommu-cells = <1>; 1076 }; 1077 1078 ipmmu_pv1: iommu@fd950000 { 1079 compatible = "renesas,ipmmu-r8a77961"; 1080 reg = <0 0xfd950000 0 0x1000>; 1081 renesas,ipmmu-main = <&ipmmu_mm 6>; 1082 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1083 #iommu-cells = <1>; 1084 }; 1085 1086 ipmmu_rt: iommu@ffc80000 { 1087 compatible = "renesas,ipmmu-r8a77961"; 1088 reg = <0 0xffc80000 0 0x1000>; 1089 renesas,ipmmu-main = <&ipmmu_mm 7>; 1090 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1091 #iommu-cells = <1>; 1092 }; 1093 1094 ipmmu_vc0: iommu@fe6b0000 { 1095 compatible = "renesas,ipmmu-r8a77961"; 1096 reg = <0 0xfe6b0000 0 0x1000>; 1097 renesas,ipmmu-main = <&ipmmu_mm 8>; 1098 power-domains = <&sysc R8A77961_PD_A3VC>; 1099 #iommu-cells = <1>; 1100 }; 1101 1102 ipmmu_vi0: iommu@febd0000 { 1103 compatible = "renesas,ipmmu-r8a77961"; 1104 reg = <0 0xfebd0000 0 0x1000>; 1105 renesas,ipmmu-main = <&ipmmu_mm 9>; 1106 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1107 #iommu-cells = <1>; 1108 }; 1109 1110 avb: ethernet@e6800000 { 1111 compatible = "renesas,etheravb-r8a77961", 1112 "renesas,etheravb-rcar-gen3"; 1113 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1114 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1115 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1116 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1117 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1118 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1119 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1120 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1121 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1122 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1123 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1124 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1125 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1126 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1127 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1128 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1129 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1130 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1131 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1132 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1133 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1134 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1135 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1136 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1137 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1138 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1139 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1140 "ch4", "ch5", "ch6", "ch7", 1141 "ch8", "ch9", "ch10", "ch11", 1142 "ch12", "ch13", "ch14", "ch15", 1143 "ch16", "ch17", "ch18", "ch19", 1144 "ch20", "ch21", "ch22", "ch23", 1145 "ch24"; 1146 clocks = <&cpg CPG_MOD 812>; 1147 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1148 resets = <&cpg 812>; 1149 phy-mode = "rgmii"; 1150 rx-internal-delay-ps = <0>; 1151 tx-internal-delay-ps = <0>; 1152 #address-cells = <1>; 1153 #size-cells = <0>; 1154 status = "disabled"; 1155 }; 1156 1157 can0: can@e6c30000 { 1158 compatible = "renesas,can-r8a77961", 1159 "renesas,rcar-gen3-can"; 1160 reg = <0 0xe6c30000 0 0x1000>; 1161 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1162 clocks = <&cpg CPG_MOD 916>, 1163 <&cpg CPG_CORE R8A77961_CLK_CANFD>, 1164 <&can_clk>; 1165 clock-names = "clkp1", "clkp2", "can_clk"; 1166 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>; 1167 assigned-clock-rates = <40000000>; 1168 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1169 resets = <&cpg 916>; 1170 status = "disabled"; 1171 }; 1172 1173 can1: can@e6c38000 { 1174 compatible = "renesas,can-r8a77961", 1175 "renesas,rcar-gen3-can"; 1176 reg = <0 0xe6c38000 0 0x1000>; 1177 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1178 clocks = <&cpg CPG_MOD 915>, 1179 <&cpg CPG_CORE R8A77961_CLK_CANFD>, 1180 <&can_clk>; 1181 clock-names = "clkp1", "clkp2", "can_clk"; 1182 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>; 1183 assigned-clock-rates = <40000000>; 1184 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1185 resets = <&cpg 915>; 1186 status = "disabled"; 1187 }; 1188 1189 pwm0: pwm@e6e30000 { 1190 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1191 reg = <0 0xe6e30000 0 8>; 1192 #pwm-cells = <2>; 1193 clocks = <&cpg CPG_MOD 523>; 1194 resets = <&cpg 523>; 1195 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1196 status = "disabled"; 1197 }; 1198 1199 pwm1: pwm@e6e31000 { 1200 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1201 reg = <0 0xe6e31000 0 8>; 1202 #pwm-cells = <2>; 1203 clocks = <&cpg CPG_MOD 523>; 1204 resets = <&cpg 523>; 1205 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1206 status = "disabled"; 1207 }; 1208 1209 pwm2: pwm@e6e32000 { 1210 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1211 reg = <0 0xe6e32000 0 8>; 1212 #pwm-cells = <2>; 1213 clocks = <&cpg CPG_MOD 523>; 1214 resets = <&cpg 523>; 1215 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1216 status = "disabled"; 1217 }; 1218 1219 pwm3: pwm@e6e33000 { 1220 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1221 reg = <0 0xe6e33000 0 8>; 1222 #pwm-cells = <2>; 1223 clocks = <&cpg CPG_MOD 523>; 1224 resets = <&cpg 523>; 1225 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1226 status = "disabled"; 1227 }; 1228 1229 pwm4: pwm@e6e34000 { 1230 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1231 reg = <0 0xe6e34000 0 8>; 1232 #pwm-cells = <2>; 1233 clocks = <&cpg CPG_MOD 523>; 1234 resets = <&cpg 523>; 1235 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1236 status = "disabled"; 1237 }; 1238 1239 pwm5: pwm@e6e35000 { 1240 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1241 reg = <0 0xe6e35000 0 8>; 1242 #pwm-cells = <2>; 1243 clocks = <&cpg CPG_MOD 523>; 1244 resets = <&cpg 523>; 1245 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1246 status = "disabled"; 1247 }; 1248 1249 pwm6: pwm@e6e36000 { 1250 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1251 reg = <0 0xe6e36000 0 8>; 1252 #pwm-cells = <2>; 1253 clocks = <&cpg CPG_MOD 523>; 1254 resets = <&cpg 523>; 1255 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1256 status = "disabled"; 1257 }; 1258 1259 scif0: serial@e6e60000 { 1260 compatible = "renesas,scif-r8a77961", 1261 "renesas,rcar-gen3-scif", "renesas,scif"; 1262 reg = <0 0xe6e60000 0 64>; 1263 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1264 clocks = <&cpg CPG_MOD 207>, 1265 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1266 <&scif_clk>; 1267 clock-names = "fck", "brg_int", "scif_clk"; 1268 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1269 <&dmac2 0x51>, <&dmac2 0x50>; 1270 dma-names = "tx", "rx", "tx", "rx"; 1271 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1272 resets = <&cpg 207>; 1273 status = "disabled"; 1274 }; 1275 1276 scif1: serial@e6e68000 { 1277 compatible = "renesas,scif-r8a77961", 1278 "renesas,rcar-gen3-scif", "renesas,scif"; 1279 reg = <0 0xe6e68000 0 64>; 1280 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1281 clocks = <&cpg CPG_MOD 206>, 1282 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1283 <&scif_clk>; 1284 clock-names = "fck", "brg_int", "scif_clk"; 1285 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1286 <&dmac2 0x53>, <&dmac2 0x52>; 1287 dma-names = "tx", "rx", "tx", "rx"; 1288 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1289 resets = <&cpg 206>; 1290 status = "disabled"; 1291 }; 1292 1293 scif2: serial@e6e88000 { 1294 compatible = "renesas,scif-r8a77961", 1295 "renesas,rcar-gen3-scif", "renesas,scif"; 1296 reg = <0 0xe6e88000 0 64>; 1297 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1298 clocks = <&cpg CPG_MOD 310>, 1299 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1300 <&scif_clk>; 1301 clock-names = "fck", "brg_int", "scif_clk"; 1302 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1303 <&dmac2 0x13>, <&dmac2 0x12>; 1304 dma-names = "tx", "rx", "tx", "rx"; 1305 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1306 resets = <&cpg 310>; 1307 status = "disabled"; 1308 }; 1309 1310 scif3: serial@e6c50000 { 1311 compatible = "renesas,scif-r8a77961", 1312 "renesas,rcar-gen3-scif", "renesas,scif"; 1313 reg = <0 0xe6c50000 0 64>; 1314 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1315 clocks = <&cpg CPG_MOD 204>, 1316 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1317 <&scif_clk>; 1318 clock-names = "fck", "brg_int", "scif_clk"; 1319 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1320 dma-names = "tx", "rx"; 1321 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1322 resets = <&cpg 204>; 1323 status = "disabled"; 1324 }; 1325 1326 scif4: serial@e6c40000 { 1327 compatible = "renesas,scif-r8a77961", 1328 "renesas,rcar-gen3-scif", "renesas,scif"; 1329 reg = <0 0xe6c40000 0 64>; 1330 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1331 clocks = <&cpg CPG_MOD 203>, 1332 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1333 <&scif_clk>; 1334 clock-names = "fck", "brg_int", "scif_clk"; 1335 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1336 dma-names = "tx", "rx"; 1337 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1338 resets = <&cpg 203>; 1339 status = "disabled"; 1340 }; 1341 1342 scif5: serial@e6f30000 { 1343 compatible = "renesas,scif-r8a77961", 1344 "renesas,rcar-gen3-scif", "renesas,scif"; 1345 reg = <0 0xe6f30000 0 64>; 1346 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1347 clocks = <&cpg CPG_MOD 202>, 1348 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1349 <&scif_clk>; 1350 clock-names = "fck", "brg_int", "scif_clk"; 1351 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1352 <&dmac2 0x5b>, <&dmac2 0x5a>; 1353 dma-names = "tx", "rx", "tx", "rx"; 1354 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1355 resets = <&cpg 202>; 1356 status = "disabled"; 1357 }; 1358 1359 msiof0: spi@e6e90000 { 1360 compatible = "renesas,msiof-r8a77961", 1361 "renesas,rcar-gen3-msiof"; 1362 reg = <0 0xe6e90000 0 0x0064>; 1363 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1364 clocks = <&cpg CPG_MOD 211>; 1365 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1366 <&dmac2 0x41>, <&dmac2 0x40>; 1367 dma-names = "tx", "rx", "tx", "rx"; 1368 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1369 resets = <&cpg 211>; 1370 #address-cells = <1>; 1371 #size-cells = <0>; 1372 status = "disabled"; 1373 }; 1374 1375 msiof1: spi@e6ea0000 { 1376 compatible = "renesas,msiof-r8a77961", 1377 "renesas,rcar-gen3-msiof"; 1378 reg = <0 0xe6ea0000 0 0x0064>; 1379 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1380 clocks = <&cpg CPG_MOD 210>; 1381 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1382 <&dmac2 0x43>, <&dmac2 0x42>; 1383 dma-names = "tx", "rx", "tx", "rx"; 1384 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1385 resets = <&cpg 210>; 1386 #address-cells = <1>; 1387 #size-cells = <0>; 1388 status = "disabled"; 1389 }; 1390 1391 msiof2: spi@e6c00000 { 1392 compatible = "renesas,msiof-r8a77961", 1393 "renesas,rcar-gen3-msiof"; 1394 reg = <0 0xe6c00000 0 0x0064>; 1395 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1396 clocks = <&cpg CPG_MOD 209>; 1397 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1398 dma-names = "tx", "rx"; 1399 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1400 resets = <&cpg 209>; 1401 #address-cells = <1>; 1402 #size-cells = <0>; 1403 status = "disabled"; 1404 }; 1405 1406 msiof3: spi@e6c10000 { 1407 compatible = "renesas,msiof-r8a77961", 1408 "renesas,rcar-gen3-msiof"; 1409 reg = <0 0xe6c10000 0 0x0064>; 1410 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1411 clocks = <&cpg CPG_MOD 208>; 1412 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1413 dma-names = "tx", "rx"; 1414 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1415 resets = <&cpg 208>; 1416 #address-cells = <1>; 1417 #size-cells = <0>; 1418 status = "disabled"; 1419 }; 1420 1421 vin0: video@e6ef0000 { 1422 compatible = "renesas,vin-r8a77961"; 1423 reg = <0 0xe6ef0000 0 0x1000>; 1424 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1425 clocks = <&cpg CPG_MOD 811>; 1426 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1427 resets = <&cpg 811>; 1428 renesas,id = <0>; 1429 status = "disabled"; 1430 1431 ports { 1432 #address-cells = <1>; 1433 #size-cells = <0>; 1434 1435 port@1 { 1436 #address-cells = <1>; 1437 #size-cells = <0>; 1438 1439 reg = <1>; 1440 1441 vin0csi20: endpoint@0 { 1442 reg = <0>; 1443 remote-endpoint = <&csi20vin0>; 1444 }; 1445 vin0csi40: endpoint@2 { 1446 reg = <2>; 1447 remote-endpoint = <&csi40vin0>; 1448 }; 1449 }; 1450 }; 1451 }; 1452 1453 vin1: video@e6ef1000 { 1454 compatible = "renesas,vin-r8a77961"; 1455 reg = <0 0xe6ef1000 0 0x1000>; 1456 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1457 clocks = <&cpg CPG_MOD 810>; 1458 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1459 resets = <&cpg 810>; 1460 renesas,id = <1>; 1461 status = "disabled"; 1462 1463 ports { 1464 #address-cells = <1>; 1465 #size-cells = <0>; 1466 1467 port@1 { 1468 #address-cells = <1>; 1469 #size-cells = <0>; 1470 1471 reg = <1>; 1472 1473 vin1csi20: endpoint@0 { 1474 reg = <0>; 1475 remote-endpoint = <&csi20vin1>; 1476 }; 1477 vin1csi40: endpoint@2 { 1478 reg = <2>; 1479 remote-endpoint = <&csi40vin1>; 1480 }; 1481 }; 1482 }; 1483 }; 1484 1485 vin2: video@e6ef2000 { 1486 compatible = "renesas,vin-r8a77961"; 1487 reg = <0 0xe6ef2000 0 0x1000>; 1488 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1489 clocks = <&cpg CPG_MOD 809>; 1490 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1491 resets = <&cpg 809>; 1492 renesas,id = <2>; 1493 status = "disabled"; 1494 1495 ports { 1496 #address-cells = <1>; 1497 #size-cells = <0>; 1498 1499 port@1 { 1500 #address-cells = <1>; 1501 #size-cells = <0>; 1502 1503 reg = <1>; 1504 1505 vin2csi20: endpoint@0 { 1506 reg = <0>; 1507 remote-endpoint = <&csi20vin2>; 1508 }; 1509 vin2csi40: endpoint@2 { 1510 reg = <2>; 1511 remote-endpoint = <&csi40vin2>; 1512 }; 1513 }; 1514 }; 1515 }; 1516 1517 vin3: video@e6ef3000 { 1518 compatible = "renesas,vin-r8a77961"; 1519 reg = <0 0xe6ef3000 0 0x1000>; 1520 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1521 clocks = <&cpg CPG_MOD 808>; 1522 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1523 resets = <&cpg 808>; 1524 renesas,id = <3>; 1525 status = "disabled"; 1526 1527 ports { 1528 #address-cells = <1>; 1529 #size-cells = <0>; 1530 1531 port@1 { 1532 #address-cells = <1>; 1533 #size-cells = <0>; 1534 1535 reg = <1>; 1536 1537 vin3csi20: endpoint@0 { 1538 reg = <0>; 1539 remote-endpoint = <&csi20vin3>; 1540 }; 1541 vin3csi40: endpoint@2 { 1542 reg = <2>; 1543 remote-endpoint = <&csi40vin3>; 1544 }; 1545 }; 1546 }; 1547 }; 1548 1549 vin4: video@e6ef4000 { 1550 compatible = "renesas,vin-r8a77961"; 1551 reg = <0 0xe6ef4000 0 0x1000>; 1552 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1553 clocks = <&cpg CPG_MOD 807>; 1554 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1555 resets = <&cpg 807>; 1556 renesas,id = <4>; 1557 status = "disabled"; 1558 1559 ports { 1560 #address-cells = <1>; 1561 #size-cells = <0>; 1562 1563 port@1 { 1564 #address-cells = <1>; 1565 #size-cells = <0>; 1566 1567 reg = <1>; 1568 1569 vin4csi20: endpoint@0 { 1570 reg = <0>; 1571 remote-endpoint = <&csi20vin4>; 1572 }; 1573 vin4csi40: endpoint@2 { 1574 reg = <2>; 1575 remote-endpoint = <&csi40vin4>; 1576 }; 1577 }; 1578 }; 1579 }; 1580 1581 vin5: video@e6ef5000 { 1582 compatible = "renesas,vin-r8a77961"; 1583 reg = <0 0xe6ef5000 0 0x1000>; 1584 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1585 clocks = <&cpg CPG_MOD 806>; 1586 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1587 resets = <&cpg 806>; 1588 renesas,id = <5>; 1589 status = "disabled"; 1590 1591 ports { 1592 #address-cells = <1>; 1593 #size-cells = <0>; 1594 1595 port@1 { 1596 #address-cells = <1>; 1597 #size-cells = <0>; 1598 1599 reg = <1>; 1600 1601 vin5csi20: endpoint@0 { 1602 reg = <0>; 1603 remote-endpoint = <&csi20vin5>; 1604 }; 1605 vin5csi40: endpoint@2 { 1606 reg = <2>; 1607 remote-endpoint = <&csi40vin5>; 1608 }; 1609 }; 1610 }; 1611 }; 1612 1613 vin6: video@e6ef6000 { 1614 compatible = "renesas,vin-r8a77961"; 1615 reg = <0 0xe6ef6000 0 0x1000>; 1616 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1617 clocks = <&cpg CPG_MOD 805>; 1618 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1619 resets = <&cpg 805>; 1620 renesas,id = <6>; 1621 status = "disabled"; 1622 1623 ports { 1624 #address-cells = <1>; 1625 #size-cells = <0>; 1626 1627 port@1 { 1628 #address-cells = <1>; 1629 #size-cells = <0>; 1630 1631 reg = <1>; 1632 1633 vin6csi20: endpoint@0 { 1634 reg = <0>; 1635 remote-endpoint = <&csi20vin6>; 1636 }; 1637 vin6csi40: endpoint@2 { 1638 reg = <2>; 1639 remote-endpoint = <&csi40vin6>; 1640 }; 1641 }; 1642 }; 1643 }; 1644 1645 vin7: video@e6ef7000 { 1646 compatible = "renesas,vin-r8a77961"; 1647 reg = <0 0xe6ef7000 0 0x1000>; 1648 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1649 clocks = <&cpg CPG_MOD 804>; 1650 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1651 resets = <&cpg 804>; 1652 renesas,id = <7>; 1653 status = "disabled"; 1654 1655 ports { 1656 #address-cells = <1>; 1657 #size-cells = <0>; 1658 1659 port@1 { 1660 #address-cells = <1>; 1661 #size-cells = <0>; 1662 1663 reg = <1>; 1664 1665 vin7csi20: endpoint@0 { 1666 reg = <0>; 1667 remote-endpoint = <&csi20vin7>; 1668 }; 1669 vin7csi40: endpoint@2 { 1670 reg = <2>; 1671 remote-endpoint = <&csi40vin7>; 1672 }; 1673 }; 1674 }; 1675 }; 1676 1677 rcar_sound: sound@ec500000 { 1678 /* 1679 * #sound-dai-cells is required 1680 * 1681 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1682 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1683 */ 1684 /* 1685 * #clock-cells is required for audio_clkout0/1/2/3 1686 * 1687 * clkout : #clock-cells = <0>; <&rcar_sound>; 1688 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1689 */ 1690 compatible = "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3"; 1691 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1692 <0 0xec5a0000 0 0x100>, /* ADG */ 1693 <0 0xec540000 0 0x1000>, /* SSIU */ 1694 <0 0xec541000 0 0x280>, /* SSI */ 1695 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1696 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1697 1698 clocks = <&cpg CPG_MOD 1005>, 1699 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1700 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1701 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1702 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1703 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1704 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1705 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1706 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1707 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1708 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1709 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1710 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1711 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1712 <&audio_clk_a>, <&audio_clk_b>, 1713 <&audio_clk_c>, 1714 <&cpg CPG_CORE R8A77961_CLK_S0D4>; 1715 clock-names = "ssi-all", 1716 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1717 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1718 "ssi.1", "ssi.0", 1719 "src.9", "src.8", "src.7", "src.6", 1720 "src.5", "src.4", "src.3", "src.2", 1721 "src.1", "src.0", 1722 "mix.1", "mix.0", 1723 "ctu.1", "ctu.0", 1724 "dvc.0", "dvc.1", 1725 "clk_a", "clk_b", "clk_c", "clk_i"; 1726 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1727 resets = <&cpg 1005>, 1728 <&cpg 1006>, <&cpg 1007>, 1729 <&cpg 1008>, <&cpg 1009>, 1730 <&cpg 1010>, <&cpg 1011>, 1731 <&cpg 1012>, <&cpg 1013>, 1732 <&cpg 1014>, <&cpg 1015>; 1733 reset-names = "ssi-all", 1734 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1735 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1736 "ssi.1", "ssi.0"; 1737 status = "disabled"; 1738 1739 rcar_sound,ctu { 1740 ctu00: ctu-0 { }; 1741 ctu01: ctu-1 { }; 1742 ctu02: ctu-2 { }; 1743 ctu03: ctu-3 { }; 1744 ctu10: ctu-4 { }; 1745 ctu11: ctu-5 { }; 1746 ctu12: ctu-6 { }; 1747 ctu13: ctu-7 { }; 1748 }; 1749 1750 rcar_sound,dvc { 1751 dvc0: dvc-0 { 1752 dmas = <&audma1 0xbc>; 1753 dma-names = "tx"; 1754 }; 1755 dvc1: dvc-1 { 1756 dmas = <&audma1 0xbe>; 1757 dma-names = "tx"; 1758 }; 1759 }; 1760 1761 rcar_sound,mix { 1762 mix0: mix-0 { }; 1763 mix1: mix-1 { }; 1764 }; 1765 1766 rcar_sound,src { 1767 src0: src-0 { 1768 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1769 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1770 dma-names = "rx", "tx"; 1771 }; 1772 src1: src-1 { 1773 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1774 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1775 dma-names = "rx", "tx"; 1776 }; 1777 src2: src-2 { 1778 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1779 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1780 dma-names = "rx", "tx"; 1781 }; 1782 src3: src-3 { 1783 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1784 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1785 dma-names = "rx", "tx"; 1786 }; 1787 src4: src-4 { 1788 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1789 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1790 dma-names = "rx", "tx"; 1791 }; 1792 src5: src-5 { 1793 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1794 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1795 dma-names = "rx", "tx"; 1796 }; 1797 src6: src-6 { 1798 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1799 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1800 dma-names = "rx", "tx"; 1801 }; 1802 src7: src-7 { 1803 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1804 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1805 dma-names = "rx", "tx"; 1806 }; 1807 src8: src-8 { 1808 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1809 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1810 dma-names = "rx", "tx"; 1811 }; 1812 src9: src-9 { 1813 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1814 dmas = <&audma0 0x97>, <&audma1 0xba>; 1815 dma-names = "rx", "tx"; 1816 }; 1817 }; 1818 1819 rcar_sound,ssi { 1820 ssi0: ssi-0 { 1821 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1822 dmas = <&audma0 0x01>, <&audma1 0x02>; 1823 dma-names = "rx", "tx"; 1824 }; 1825 ssi1: ssi-1 { 1826 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1827 dmas = <&audma0 0x03>, <&audma1 0x04>; 1828 dma-names = "rx", "tx"; 1829 }; 1830 ssi2: ssi-2 { 1831 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1832 dmas = <&audma0 0x05>, <&audma1 0x06>; 1833 dma-names = "rx", "tx"; 1834 }; 1835 ssi3: ssi-3 { 1836 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1837 dmas = <&audma0 0x07>, <&audma1 0x08>; 1838 dma-names = "rx", "tx"; 1839 }; 1840 ssi4: ssi-4 { 1841 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1842 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1843 dma-names = "rx", "tx"; 1844 }; 1845 ssi5: ssi-5 { 1846 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1847 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1848 dma-names = "rx", "tx"; 1849 }; 1850 ssi6: ssi-6 { 1851 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1852 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1853 dma-names = "rx", "tx"; 1854 }; 1855 ssi7: ssi-7 { 1856 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1857 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1858 dma-names = "rx", "tx"; 1859 }; 1860 ssi8: ssi-8 { 1861 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1862 dmas = <&audma0 0x11>, <&audma1 0x12>; 1863 dma-names = "rx", "tx"; 1864 }; 1865 ssi9: ssi-9 { 1866 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1867 dmas = <&audma0 0x13>, <&audma1 0x14>; 1868 dma-names = "rx", "tx"; 1869 }; 1870 }; 1871 1872 rcar_sound,ssiu { 1873 ssiu00: ssiu-0 { 1874 dmas = <&audma0 0x15>, <&audma1 0x16>; 1875 dma-names = "rx", "tx"; 1876 }; 1877 ssiu01: ssiu-1 { 1878 dmas = <&audma0 0x35>, <&audma1 0x36>; 1879 dma-names = "rx", "tx"; 1880 }; 1881 ssiu02: ssiu-2 { 1882 dmas = <&audma0 0x37>, <&audma1 0x38>; 1883 dma-names = "rx", "tx"; 1884 }; 1885 ssiu03: ssiu-3 { 1886 dmas = <&audma0 0x47>, <&audma1 0x48>; 1887 dma-names = "rx", "tx"; 1888 }; 1889 ssiu04: ssiu-4 { 1890 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1891 dma-names = "rx", "tx"; 1892 }; 1893 ssiu05: ssiu-5 { 1894 dmas = <&audma0 0x43>, <&audma1 0x44>; 1895 dma-names = "rx", "tx"; 1896 }; 1897 ssiu06: ssiu-6 { 1898 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1899 dma-names = "rx", "tx"; 1900 }; 1901 ssiu07: ssiu-7 { 1902 dmas = <&audma0 0x53>, <&audma1 0x54>; 1903 dma-names = "rx", "tx"; 1904 }; 1905 ssiu10: ssiu-8 { 1906 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1907 dma-names = "rx", "tx"; 1908 }; 1909 ssiu11: ssiu-9 { 1910 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1911 dma-names = "rx", "tx"; 1912 }; 1913 ssiu12: ssiu-10 { 1914 dmas = <&audma0 0x57>, <&audma1 0x58>; 1915 dma-names = "rx", "tx"; 1916 }; 1917 ssiu13: ssiu-11 { 1918 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1919 dma-names = "rx", "tx"; 1920 }; 1921 ssiu14: ssiu-12 { 1922 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1923 dma-names = "rx", "tx"; 1924 }; 1925 ssiu15: ssiu-13 { 1926 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1927 dma-names = "rx", "tx"; 1928 }; 1929 ssiu16: ssiu-14 { 1930 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1931 dma-names = "rx", "tx"; 1932 }; 1933 ssiu17: ssiu-15 { 1934 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1935 dma-names = "rx", "tx"; 1936 }; 1937 ssiu20: ssiu-16 { 1938 dmas = <&audma0 0x63>, <&audma1 0x64>; 1939 dma-names = "rx", "tx"; 1940 }; 1941 ssiu21: ssiu-17 { 1942 dmas = <&audma0 0x67>, <&audma1 0x68>; 1943 dma-names = "rx", "tx"; 1944 }; 1945 ssiu22: ssiu-18 { 1946 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1947 dma-names = "rx", "tx"; 1948 }; 1949 ssiu23: ssiu-19 { 1950 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1951 dma-names = "rx", "tx"; 1952 }; 1953 ssiu24: ssiu-20 { 1954 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1955 dma-names = "rx", "tx"; 1956 }; 1957 ssiu25: ssiu-21 { 1958 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1959 dma-names = "rx", "tx"; 1960 }; 1961 ssiu26: ssiu-22 { 1962 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1963 dma-names = "rx", "tx"; 1964 }; 1965 ssiu27: ssiu-23 { 1966 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1967 dma-names = "rx", "tx"; 1968 }; 1969 ssiu30: ssiu-24 { 1970 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1971 dma-names = "rx", "tx"; 1972 }; 1973 ssiu31: ssiu-25 { 1974 dmas = <&audma0 0x21>, <&audma1 0x22>; 1975 dma-names = "rx", "tx"; 1976 }; 1977 ssiu32: ssiu-26 { 1978 dmas = <&audma0 0x23>, <&audma1 0x24>; 1979 dma-names = "rx", "tx"; 1980 }; 1981 ssiu33: ssiu-27 { 1982 dmas = <&audma0 0x25>, <&audma1 0x26>; 1983 dma-names = "rx", "tx"; 1984 }; 1985 ssiu34: ssiu-28 { 1986 dmas = <&audma0 0x27>, <&audma1 0x28>; 1987 dma-names = "rx", "tx"; 1988 }; 1989 ssiu35: ssiu-29 { 1990 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1991 dma-names = "rx", "tx"; 1992 }; 1993 ssiu36: ssiu-30 { 1994 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1995 dma-names = "rx", "tx"; 1996 }; 1997 ssiu37: ssiu-31 { 1998 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 1999 dma-names = "rx", "tx"; 2000 }; 2001 ssiu40: ssiu-32 { 2002 dmas = <&audma0 0x71>, <&audma1 0x72>; 2003 dma-names = "rx", "tx"; 2004 }; 2005 ssiu41: ssiu-33 { 2006 dmas = <&audma0 0x17>, <&audma1 0x18>; 2007 dma-names = "rx", "tx"; 2008 }; 2009 ssiu42: ssiu-34 { 2010 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2011 dma-names = "rx", "tx"; 2012 }; 2013 ssiu43: ssiu-35 { 2014 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2015 dma-names = "rx", "tx"; 2016 }; 2017 ssiu44: ssiu-36 { 2018 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2019 dma-names = "rx", "tx"; 2020 }; 2021 ssiu45: ssiu-37 { 2022 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2023 dma-names = "rx", "tx"; 2024 }; 2025 ssiu46: ssiu-38 { 2026 dmas = <&audma0 0x31>, <&audma1 0x32>; 2027 dma-names = "rx", "tx"; 2028 }; 2029 ssiu47: ssiu-39 { 2030 dmas = <&audma0 0x33>, <&audma1 0x34>; 2031 dma-names = "rx", "tx"; 2032 }; 2033 ssiu50: ssiu-40 { 2034 dmas = <&audma0 0x73>, <&audma1 0x74>; 2035 dma-names = "rx", "tx"; 2036 }; 2037 ssiu60: ssiu-41 { 2038 dmas = <&audma0 0x75>, <&audma1 0x76>; 2039 dma-names = "rx", "tx"; 2040 }; 2041 ssiu70: ssiu-42 { 2042 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2043 dma-names = "rx", "tx"; 2044 }; 2045 ssiu80: ssiu-43 { 2046 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2047 dma-names = "rx", "tx"; 2048 }; 2049 ssiu90: ssiu-44 { 2050 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2051 dma-names = "rx", "tx"; 2052 }; 2053 ssiu91: ssiu-45 { 2054 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2055 dma-names = "rx", "tx"; 2056 }; 2057 ssiu92: ssiu-46 { 2058 dmas = <&audma0 0x81>, <&audma1 0x82>; 2059 dma-names = "rx", "tx"; 2060 }; 2061 ssiu93: ssiu-47 { 2062 dmas = <&audma0 0x83>, <&audma1 0x84>; 2063 dma-names = "rx", "tx"; 2064 }; 2065 ssiu94: ssiu-48 { 2066 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2067 dma-names = "rx", "tx"; 2068 }; 2069 ssiu95: ssiu-49 { 2070 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2071 dma-names = "rx", "tx"; 2072 }; 2073 ssiu96: ssiu-50 { 2074 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2075 dma-names = "rx", "tx"; 2076 }; 2077 ssiu97: ssiu-51 { 2078 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2079 dma-names = "rx", "tx"; 2080 }; 2081 }; 2082 }; 2083 2084 audma0: dma-controller@ec700000 { 2085 compatible = "renesas,dmac-r8a77961", 2086 "renesas,rcar-dmac"; 2087 reg = <0 0xec700000 0 0x10000>; 2088 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2089 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2090 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2091 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2092 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2093 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2094 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2095 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2096 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2097 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2098 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2099 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2100 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2101 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2102 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2103 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2104 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2105 interrupt-names = "error", 2106 "ch0", "ch1", "ch2", "ch3", 2107 "ch4", "ch5", "ch6", "ch7", 2108 "ch8", "ch9", "ch10", "ch11", 2109 "ch12", "ch13", "ch14", "ch15"; 2110 clocks = <&cpg CPG_MOD 502>; 2111 clock-names = "fck"; 2112 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2113 resets = <&cpg 502>; 2114 #dma-cells = <1>; 2115 dma-channels = <16>; 2116 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2117 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2118 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2119 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2120 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2121 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2122 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2123 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2124 }; 2125 2126 audma1: dma-controller@ec720000 { 2127 compatible = "renesas,dmac-r8a77961", 2128 "renesas,rcar-dmac"; 2129 reg = <0 0xec720000 0 0x10000>; 2130 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2131 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2132 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2133 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2134 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2135 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2136 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2137 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2138 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2139 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2140 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2141 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2142 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2143 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2144 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2145 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2146 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2147 interrupt-names = "error", 2148 "ch0", "ch1", "ch2", "ch3", 2149 "ch4", "ch5", "ch6", "ch7", 2150 "ch8", "ch9", "ch10", "ch11", 2151 "ch12", "ch13", "ch14", "ch15"; 2152 clocks = <&cpg CPG_MOD 501>; 2153 clock-names = "fck"; 2154 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2155 resets = <&cpg 501>; 2156 #dma-cells = <1>; 2157 dma-channels = <16>; 2158 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2159 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2160 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2161 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2162 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2163 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2164 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2165 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2166 }; 2167 2168 xhci0: usb@ee000000 { 2169 compatible = "renesas,xhci-r8a77961", 2170 "renesas,rcar-gen3-xhci"; 2171 reg = <0 0xee000000 0 0xc00>; 2172 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2173 clocks = <&cpg CPG_MOD 328>; 2174 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2175 resets = <&cpg 328>; 2176 status = "disabled"; 2177 }; 2178 2179 usb3_peri0: usb@ee020000 { 2180 compatible = "renesas,r8a77961-usb3-peri", 2181 "renesas,rcar-gen3-usb3-peri"; 2182 reg = <0 0xee020000 0 0x400>; 2183 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2184 clocks = <&cpg CPG_MOD 328>; 2185 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2186 resets = <&cpg 328>; 2187 status = "disabled"; 2188 }; 2189 2190 ohci0: usb@ee080000 { 2191 compatible = "generic-ohci"; 2192 reg = <0 0xee080000 0 0x100>; 2193 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2194 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2195 phys = <&usb2_phy0 1>; 2196 phy-names = "usb"; 2197 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2198 resets = <&cpg 703>, <&cpg 704>; 2199 status = "disabled"; 2200 }; 2201 2202 ohci1: usb@ee0a0000 { 2203 compatible = "generic-ohci"; 2204 reg = <0 0xee0a0000 0 0x100>; 2205 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2206 clocks = <&cpg CPG_MOD 702>; 2207 phys = <&usb2_phy1 1>; 2208 phy-names = "usb"; 2209 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2210 resets = <&cpg 702>; 2211 status = "disabled"; 2212 }; 2213 2214 ehci0: usb@ee080100 { 2215 compatible = "generic-ehci"; 2216 reg = <0 0xee080100 0 0x100>; 2217 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2218 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2219 phys = <&usb2_phy0 2>; 2220 phy-names = "usb"; 2221 companion = <&ohci0>; 2222 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2223 resets = <&cpg 703>, <&cpg 704>; 2224 status = "disabled"; 2225 }; 2226 2227 ehci1: usb@ee0a0100 { 2228 compatible = "generic-ehci"; 2229 reg = <0 0xee0a0100 0 0x100>; 2230 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2231 clocks = <&cpg CPG_MOD 702>; 2232 phys = <&usb2_phy1 2>; 2233 phy-names = "usb"; 2234 companion = <&ohci1>; 2235 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2236 resets = <&cpg 702>; 2237 status = "disabled"; 2238 }; 2239 2240 usb2_phy0: usb-phy@ee080200 { 2241 compatible = "renesas,usb2-phy-r8a77961", 2242 "renesas,rcar-gen3-usb2-phy"; 2243 reg = <0 0xee080200 0 0x700>; 2244 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2245 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2246 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2247 resets = <&cpg 703>, <&cpg 704>; 2248 #phy-cells = <1>; 2249 status = "disabled"; 2250 }; 2251 2252 usb2_phy1: usb-phy@ee0a0200 { 2253 compatible = "renesas,usb2-phy-r8a77961", 2254 "renesas,rcar-gen3-usb2-phy"; 2255 reg = <0 0xee0a0200 0 0x700>; 2256 clocks = <&cpg CPG_MOD 702>; 2257 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2258 resets = <&cpg 702>; 2259 #phy-cells = <1>; 2260 status = "disabled"; 2261 }; 2262 2263 sdhi0: mmc@ee100000 { 2264 compatible = "renesas,sdhi-r8a77961", 2265 "renesas,rcar-gen3-sdhi"; 2266 reg = <0 0xee100000 0 0x2000>; 2267 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2268 clocks = <&cpg CPG_MOD 314>; 2269 max-frequency = <200000000>; 2270 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2271 resets = <&cpg 314>; 2272 status = "disabled"; 2273 }; 2274 2275 sdhi1: mmc@ee120000 { 2276 compatible = "renesas,sdhi-r8a77961", 2277 "renesas,rcar-gen3-sdhi"; 2278 reg = <0 0xee120000 0 0x2000>; 2279 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2280 clocks = <&cpg CPG_MOD 313>; 2281 max-frequency = <200000000>; 2282 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2283 resets = <&cpg 313>; 2284 status = "disabled"; 2285 }; 2286 2287 sdhi2: mmc@ee140000 { 2288 compatible = "renesas,sdhi-r8a77961", 2289 "renesas,rcar-gen3-sdhi"; 2290 reg = <0 0xee140000 0 0x2000>; 2291 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2292 clocks = <&cpg CPG_MOD 312>; 2293 max-frequency = <200000000>; 2294 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2295 resets = <&cpg 312>; 2296 status = "disabled"; 2297 }; 2298 2299 sdhi3: mmc@ee160000 { 2300 compatible = "renesas,sdhi-r8a77961", 2301 "renesas,rcar-gen3-sdhi"; 2302 reg = <0 0xee160000 0 0x2000>; 2303 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2304 clocks = <&cpg CPG_MOD 311>; 2305 max-frequency = <200000000>; 2306 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2307 resets = <&cpg 311>; 2308 status = "disabled"; 2309 }; 2310 2311 gic: interrupt-controller@f1010000 { 2312 compatible = "arm,gic-400"; 2313 #interrupt-cells = <3>; 2314 #address-cells = <0>; 2315 interrupt-controller; 2316 reg = <0x0 0xf1010000 0 0x1000>, 2317 <0x0 0xf1020000 0 0x20000>, 2318 <0x0 0xf1040000 0 0x20000>, 2319 <0x0 0xf1060000 0 0x20000>; 2320 interrupts = <GIC_PPI 9 2321 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2322 clocks = <&cpg CPG_MOD 408>; 2323 clock-names = "clk"; 2324 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2325 resets = <&cpg 408>; 2326 }; 2327 2328 pciec0: pcie@fe000000 { 2329 compatible = "renesas,pcie-r8a77961", 2330 "renesas,pcie-rcar-gen3"; 2331 reg = <0 0xfe000000 0 0x80000>; 2332 #address-cells = <3>; 2333 #size-cells = <2>; 2334 bus-range = <0x00 0xff>; 2335 device_type = "pci"; 2336 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2337 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2338 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2339 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2340 /* Map all possible DDR as inbound ranges */ 2341 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2342 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2343 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2344 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2345 #interrupt-cells = <1>; 2346 interrupt-map-mask = <0 0 0 0>; 2347 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2348 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2349 clock-names = "pcie", "pcie_bus"; 2350 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2351 resets = <&cpg 319>; 2352 status = "disabled"; 2353 }; 2354 2355 pciec1: pcie@ee800000 { 2356 compatible = "renesas,pcie-r8a77961", 2357 "renesas,pcie-rcar-gen3"; 2358 reg = <0 0xee800000 0 0x80000>; 2359 #address-cells = <3>; 2360 #size-cells = <2>; 2361 bus-range = <0x00 0xff>; 2362 device_type = "pci"; 2363 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2364 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2365 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2366 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2367 /* Map all possible DDR as inbound ranges */ 2368 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2369 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2370 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2371 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2372 #interrupt-cells = <1>; 2373 interrupt-map-mask = <0 0 0 0>; 2374 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2375 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2376 clock-names = "pcie", "pcie_bus"; 2377 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2378 resets = <&cpg 318>; 2379 status = "disabled"; 2380 }; 2381 2382 fcpf0: fcp@fe950000 { 2383 compatible = "renesas,fcpf"; 2384 reg = <0 0xfe950000 0 0x200>; 2385 clocks = <&cpg CPG_MOD 615>; 2386 power-domains = <&sysc R8A77961_PD_A3VC>; 2387 resets = <&cpg 615>; 2388 }; 2389 2390 fcpvb0: fcp@fe96f000 { 2391 compatible = "renesas,fcpv"; 2392 reg = <0 0xfe96f000 0 0x200>; 2393 clocks = <&cpg CPG_MOD 607>; 2394 power-domains = <&sysc R8A77961_PD_A3VC>; 2395 resets = <&cpg 607>; 2396 }; 2397 2398 fcpvi0: fcp@fe9af000 { 2399 compatible = "renesas,fcpv"; 2400 reg = <0 0xfe9af000 0 0x200>; 2401 clocks = <&cpg CPG_MOD 611>; 2402 power-domains = <&sysc R8A77961_PD_A3VC>; 2403 resets = <&cpg 611>; 2404 iommus = <&ipmmu_vc0 19>; 2405 }; 2406 2407 fcpvd0: fcp@fea27000 { 2408 compatible = "renesas,fcpv"; 2409 reg = <0 0xfea27000 0 0x200>; 2410 clocks = <&cpg CPG_MOD 603>; 2411 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2412 resets = <&cpg 603>; 2413 iommus = <&ipmmu_vi0 8>; 2414 }; 2415 2416 fcpvd1: fcp@fea2f000 { 2417 compatible = "renesas,fcpv"; 2418 reg = <0 0xfea2f000 0 0x200>; 2419 clocks = <&cpg CPG_MOD 602>; 2420 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2421 resets = <&cpg 602>; 2422 iommus = <&ipmmu_vi0 9>; 2423 }; 2424 2425 fcpvd2: fcp@fea37000 { 2426 compatible = "renesas,fcpv"; 2427 reg = <0 0xfea37000 0 0x200>; 2428 clocks = <&cpg CPG_MOD 601>; 2429 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2430 resets = <&cpg 601>; 2431 iommus = <&ipmmu_vi0 10>; 2432 }; 2433 2434 vspb: vsp@fe960000 { 2435 compatible = "renesas,vsp2"; 2436 reg = <0 0xfe960000 0 0x8000>; 2437 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2438 clocks = <&cpg CPG_MOD 626>; 2439 power-domains = <&sysc R8A77961_PD_A3VC>; 2440 resets = <&cpg 626>; 2441 2442 renesas,fcp = <&fcpvb0>; 2443 }; 2444 2445 vspd0: vsp@fea20000 { 2446 compatible = "renesas,vsp2"; 2447 reg = <0 0xfea20000 0 0x5000>; 2448 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2449 clocks = <&cpg CPG_MOD 623>; 2450 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2451 resets = <&cpg 623>; 2452 2453 renesas,fcp = <&fcpvd0>; 2454 }; 2455 2456 vspd1: vsp@fea28000 { 2457 compatible = "renesas,vsp2"; 2458 reg = <0 0xfea28000 0 0x5000>; 2459 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2460 clocks = <&cpg CPG_MOD 622>; 2461 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2462 resets = <&cpg 622>; 2463 2464 renesas,fcp = <&fcpvd1>; 2465 }; 2466 2467 vspd2: vsp@fea30000 { 2468 compatible = "renesas,vsp2"; 2469 reg = <0 0xfea30000 0 0x5000>; 2470 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2471 clocks = <&cpg CPG_MOD 621>; 2472 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2473 resets = <&cpg 621>; 2474 2475 renesas,fcp = <&fcpvd2>; 2476 }; 2477 2478 vspi0: vsp@fe9a0000 { 2479 compatible = "renesas,vsp2"; 2480 reg = <0 0xfe9a0000 0 0x8000>; 2481 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2482 clocks = <&cpg CPG_MOD 631>; 2483 power-domains = <&sysc R8A77961_PD_A3VC>; 2484 resets = <&cpg 631>; 2485 2486 renesas,fcp = <&fcpvi0>; 2487 }; 2488 2489 csi20: csi2@fea80000 { 2490 compatible = "renesas,r8a77961-csi2"; 2491 reg = <0 0xfea80000 0 0x10000>; 2492 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2493 clocks = <&cpg CPG_MOD 714>; 2494 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2495 resets = <&cpg 714>; 2496 status = "disabled"; 2497 2498 ports { 2499 #address-cells = <1>; 2500 #size-cells = <0>; 2501 2502 port@1 { 2503 #address-cells = <1>; 2504 #size-cells = <0>; 2505 2506 reg = <1>; 2507 2508 csi20vin0: endpoint@0 { 2509 reg = <0>; 2510 remote-endpoint = <&vin0csi20>; 2511 }; 2512 csi20vin1: endpoint@1 { 2513 reg = <1>; 2514 remote-endpoint = <&vin1csi20>; 2515 }; 2516 csi20vin2: endpoint@2 { 2517 reg = <2>; 2518 remote-endpoint = <&vin2csi20>; 2519 }; 2520 csi20vin3: endpoint@3 { 2521 reg = <3>; 2522 remote-endpoint = <&vin3csi20>; 2523 }; 2524 csi20vin4: endpoint@4 { 2525 reg = <4>; 2526 remote-endpoint = <&vin4csi20>; 2527 }; 2528 csi20vin5: endpoint@5 { 2529 reg = <5>; 2530 remote-endpoint = <&vin5csi20>; 2531 }; 2532 csi20vin6: endpoint@6 { 2533 reg = <6>; 2534 remote-endpoint = <&vin6csi20>; 2535 }; 2536 csi20vin7: endpoint@7 { 2537 reg = <7>; 2538 remote-endpoint = <&vin7csi20>; 2539 }; 2540 }; 2541 }; 2542 }; 2543 2544 csi40: csi2@feaa0000 { 2545 compatible = "renesas,r8a77961-csi2"; 2546 reg = <0 0xfeaa0000 0 0x10000>; 2547 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2548 clocks = <&cpg CPG_MOD 716>; 2549 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2550 resets = <&cpg 716>; 2551 status = "disabled"; 2552 2553 ports { 2554 #address-cells = <1>; 2555 #size-cells = <0>; 2556 2557 port@1 { 2558 #address-cells = <1>; 2559 #size-cells = <0>; 2560 2561 reg = <1>; 2562 2563 csi40vin0: endpoint@0 { 2564 reg = <0>; 2565 remote-endpoint = <&vin0csi40>; 2566 }; 2567 csi40vin1: endpoint@1 { 2568 reg = <1>; 2569 remote-endpoint = <&vin1csi40>; 2570 }; 2571 csi40vin2: endpoint@2 { 2572 reg = <2>; 2573 remote-endpoint = <&vin2csi40>; 2574 }; 2575 csi40vin3: endpoint@3 { 2576 reg = <3>; 2577 remote-endpoint = <&vin3csi40>; 2578 }; 2579 csi40vin4: endpoint@4 { 2580 reg = <4>; 2581 remote-endpoint = <&vin4csi40>; 2582 }; 2583 csi40vin5: endpoint@5 { 2584 reg = <5>; 2585 remote-endpoint = <&vin5csi40>; 2586 }; 2587 csi40vin6: endpoint@6 { 2588 reg = <6>; 2589 remote-endpoint = <&vin6csi40>; 2590 }; 2591 csi40vin7: endpoint@7 { 2592 reg = <7>; 2593 remote-endpoint = <&vin7csi40>; 2594 }; 2595 }; 2596 2597 }; 2598 }; 2599 2600 hdmi0: hdmi@fead0000 { 2601 compatible = "renesas,r8a77961-hdmi", "renesas,rcar-gen3-hdmi"; 2602 reg = <0 0xfead0000 0 0x10000>; 2603 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2604 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A77961_CLK_HDMI>; 2605 clock-names = "iahb", "isfr"; 2606 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2607 resets = <&cpg 729>; 2608 status = "disabled"; 2609 2610 ports { 2611 #address-cells = <1>; 2612 #size-cells = <0>; 2613 port@0 { 2614 reg = <0>; 2615 dw_hdmi0_in: endpoint { 2616 remote-endpoint = <&du_out_hdmi0>; 2617 }; 2618 }; 2619 port@1 { 2620 reg = <1>; 2621 }; 2622 port@2 { 2623 /* HDMI sound */ 2624 reg = <2>; 2625 }; 2626 }; 2627 }; 2628 2629 du: display@feb00000 { 2630 compatible = "renesas,du-r8a77961"; 2631 reg = <0 0xfeb00000 0 0x70000>; 2632 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2633 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2634 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2635 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2636 <&cpg CPG_MOD 722>; 2637 clock-names = "du.0", "du.1", "du.2"; 2638 resets = <&cpg 724>, <&cpg 722>; 2639 reset-names = "du.0", "du.2"; 2640 2641 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2642 status = "disabled"; 2643 2644 ports { 2645 #address-cells = <1>; 2646 #size-cells = <0>; 2647 2648 port@0 { 2649 reg = <0>; 2650 du_out_rgb: endpoint { 2651 }; 2652 }; 2653 port@1 { 2654 reg = <1>; 2655 du_out_hdmi0: endpoint { 2656 remote-endpoint = <&dw_hdmi0_in>; 2657 }; 2658 }; 2659 port@2 { 2660 reg = <2>; 2661 du_out_lvds0: endpoint { 2662 }; 2663 }; 2664 }; 2665 }; 2666 2667 prr: chipid@fff00044 { 2668 compatible = "renesas,prr"; 2669 reg = <0 0xfff00044 0 4>; 2670 }; 2671 }; 2672 2673 thermal-zones { 2674 sensor_thermal1: sensor-thermal1 { 2675 polling-delay-passive = <250>; 2676 polling-delay = <1000>; 2677 thermal-sensors = <&tsc 0>; 2678 sustainable-power = <3874>; 2679 2680 trips { 2681 sensor1_crit: sensor1-crit { 2682 temperature = <120000>; 2683 hysteresis = <1000>; 2684 type = "critical"; 2685 }; 2686 }; 2687 }; 2688 2689 sensor_thermal2: sensor-thermal2 { 2690 polling-delay-passive = <250>; 2691 polling-delay = <1000>; 2692 thermal-sensors = <&tsc 1>; 2693 sustainable-power = <3874>; 2694 2695 trips { 2696 sensor2_crit: sensor2-crit { 2697 temperature = <120000>; 2698 hysteresis = <1000>; 2699 type = "critical"; 2700 }; 2701 }; 2702 }; 2703 2704 sensor_thermal3: sensor-thermal3 { 2705 polling-delay-passive = <250>; 2706 polling-delay = <1000>; 2707 thermal-sensors = <&tsc 2>; 2708 sustainable-power = <3874>; 2709 2710 cooling-maps { 2711 map0 { 2712 trip = <&target>; 2713 cooling-device = <&a57_0 2 4>; 2714 contribution = <1024>; 2715 }; 2716 map1 { 2717 trip = <&target>; 2718 cooling-device = <&a53_0 0 2>; 2719 contribution = <1024>; 2720 }; 2721 }; 2722 trips { 2723 target: trip-point1 { 2724 temperature = <100000>; 2725 hysteresis = <1000>; 2726 type = "passive"; 2727 }; 2728 2729 sensor3_crit: sensor3-crit { 2730 temperature = <120000>; 2731 hysteresis = <1000>; 2732 type = "critical"; 2733 }; 2734 }; 2735 }; 2736 }; 2737 2738 timer { 2739 compatible = "arm,armv8-timer"; 2740 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2741 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2742 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2743 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 2744 }; 2745 2746 /* External USB clocks - can be overridden by the board */ 2747 usb3s0_clk: usb3s0 { 2748 compatible = "fixed-clock"; 2749 #clock-cells = <0>; 2750 clock-frequency = <0>; 2751 }; 2752 2753 usb_extal_clk: usb_extal { 2754 compatible = "fixed-clock"; 2755 #clock-cells = <0>; 2756 clock-frequency = <0>; 2757 }; 2758}; 2759