1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the RZ/G2E (R8A774C0) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a774c0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a774c0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* 18 * The external audio clocks are configured as 0 Hz fixed frequency 19 * clocks by default. 20 * Boards that provide audio clocks should override them. 21 */ 22 audio_clk_a: audio_clk_a { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; 26 }; 27 28 audio_clk_b: audio_clk_b { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_c: audio_clk_c { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 /* External CAN clock - to be overridden by boards that provide it */ 41 can_clk: can { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 cluster1_opp: opp_table10 { 48 compatible = "operating-points-v2"; 49 opp-shared; 50 opp-800000000 { 51 opp-hz = /bits/ 64 <800000000>; 52 opp-microvolt = <820000>; 53 clock-latency-ns = <300000>; 54 }; 55 opp-1000000000 { 56 opp-hz = /bits/ 64 <1000000000>; 57 opp-microvolt = <820000>; 58 clock-latency-ns = <300000>; 59 }; 60 opp-1200000000 { 61 opp-hz = /bits/ 64 <1200000000>; 62 opp-microvolt = <820000>; 63 clock-latency-ns = <300000>; 64 opp-suspend; 65 }; 66 }; 67 68 cpus { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 72 a53_0: cpu@0 { 73 compatible = "arm,cortex-a53", "arm,armv8"; 74 reg = <0>; 75 device_type = "cpu"; 76 power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; 77 next-level-cache = <&L2_CA53>; 78 enable-method = "psci"; 79 clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; 80 operating-points-v2 = <&cluster1_opp>; 81 }; 82 83 a53_1: cpu@1 { 84 compatible = "arm,cortex-a53", "arm,armv8"; 85 reg = <1>; 86 device_type = "cpu"; 87 power-domains = <&sysc R8A774C0_PD_CA53_CPU1>; 88 next-level-cache = <&L2_CA53>; 89 enable-method = "psci"; 90 clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; 91 operating-points-v2 = <&cluster1_opp>; 92 }; 93 94 L2_CA53: cache-controller-0 { 95 compatible = "cache"; 96 power-domains = <&sysc R8A774C0_PD_CA53_SCU>; 97 cache-unified; 98 cache-level = <2>; 99 }; 100 }; 101 102 extal_clk: extal { 103 compatible = "fixed-clock"; 104 #clock-cells = <0>; 105 /* This value must be overridden by the board */ 106 clock-frequency = <0>; 107 }; 108 109 /* External PCIe clock - can be overridden by the board */ 110 pcie_bus_clk: pcie_bus { 111 compatible = "fixed-clock"; 112 #clock-cells = <0>; 113 clock-frequency = <0>; 114 }; 115 116 pmu_a53 { 117 compatible = "arm,cortex-a53-pmu"; 118 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 119 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 120 interrupt-affinity = <&a53_0>, <&a53_1>; 121 }; 122 123 psci { 124 compatible = "arm,psci-1.0", "arm,psci-0.2"; 125 method = "smc"; 126 }; 127 128 /* External SCIF clock - to be overridden by boards that provide it */ 129 scif_clk: scif { 130 compatible = "fixed-clock"; 131 #clock-cells = <0>; 132 clock-frequency = <0>; 133 }; 134 135 soc: soc { 136 compatible = "simple-bus"; 137 interrupt-parent = <&gic>; 138 #address-cells = <2>; 139 #size-cells = <2>; 140 ranges; 141 142 rwdt: watchdog@e6020000 { 143 compatible = "renesas,r8a774c0-wdt", 144 "renesas,rcar-gen3-wdt"; 145 reg = <0 0xe6020000 0 0x0c>; 146 clocks = <&cpg CPG_MOD 402>; 147 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 148 resets = <&cpg 402>; 149 status = "disabled"; 150 }; 151 152 gpio0: gpio@e6050000 { 153 compatible = "renesas,gpio-r8a774c0", 154 "renesas,rcar-gen3-gpio"; 155 reg = <0 0xe6050000 0 0x50>; 156 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 157 #gpio-cells = <2>; 158 gpio-controller; 159 gpio-ranges = <&pfc 0 0 18>; 160 #interrupt-cells = <2>; 161 interrupt-controller; 162 clocks = <&cpg CPG_MOD 912>; 163 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 164 resets = <&cpg 912>; 165 }; 166 167 gpio1: gpio@e6051000 { 168 compatible = "renesas,gpio-r8a774c0", 169 "renesas,rcar-gen3-gpio"; 170 reg = <0 0xe6051000 0 0x50>; 171 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 172 #gpio-cells = <2>; 173 gpio-controller; 174 gpio-ranges = <&pfc 0 32 23>; 175 #interrupt-cells = <2>; 176 interrupt-controller; 177 clocks = <&cpg CPG_MOD 911>; 178 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 179 resets = <&cpg 911>; 180 }; 181 182 gpio2: gpio@e6052000 { 183 compatible = "renesas,gpio-r8a774c0", 184 "renesas,rcar-gen3-gpio"; 185 reg = <0 0xe6052000 0 0x50>; 186 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 187 #gpio-cells = <2>; 188 gpio-controller; 189 gpio-ranges = <&pfc 0 64 26>; 190 #interrupt-cells = <2>; 191 interrupt-controller; 192 clocks = <&cpg CPG_MOD 910>; 193 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 194 resets = <&cpg 910>; 195 }; 196 197 gpio3: gpio@e6053000 { 198 compatible = "renesas,gpio-r8a774c0", 199 "renesas,rcar-gen3-gpio"; 200 reg = <0 0xe6053000 0 0x50>; 201 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 202 #gpio-cells = <2>; 203 gpio-controller; 204 gpio-ranges = <&pfc 0 96 16>; 205 #interrupt-cells = <2>; 206 interrupt-controller; 207 clocks = <&cpg CPG_MOD 909>; 208 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 209 resets = <&cpg 909>; 210 }; 211 212 gpio4: gpio@e6054000 { 213 compatible = "renesas,gpio-r8a774c0", 214 "renesas,rcar-gen3-gpio"; 215 reg = <0 0xe6054000 0 0x50>; 216 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 217 #gpio-cells = <2>; 218 gpio-controller; 219 gpio-ranges = <&pfc 0 128 11>; 220 #interrupt-cells = <2>; 221 interrupt-controller; 222 clocks = <&cpg CPG_MOD 908>; 223 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 224 resets = <&cpg 908>; 225 }; 226 227 gpio5: gpio@e6055000 { 228 compatible = "renesas,gpio-r8a774c0", 229 "renesas,rcar-gen3-gpio"; 230 reg = <0 0xe6055000 0 0x50>; 231 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 232 #gpio-cells = <2>; 233 gpio-controller; 234 gpio-ranges = <&pfc 0 160 20>; 235 #interrupt-cells = <2>; 236 interrupt-controller; 237 clocks = <&cpg CPG_MOD 907>; 238 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 239 resets = <&cpg 907>; 240 }; 241 242 gpio6: gpio@e6055400 { 243 compatible = "renesas,gpio-r8a774c0", 244 "renesas,rcar-gen3-gpio"; 245 reg = <0 0xe6055400 0 0x50>; 246 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 247 #gpio-cells = <2>; 248 gpio-controller; 249 gpio-ranges = <&pfc 0 192 18>; 250 #interrupt-cells = <2>; 251 interrupt-controller; 252 clocks = <&cpg CPG_MOD 906>; 253 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 254 resets = <&cpg 906>; 255 }; 256 257 pfc: pin-controller@e6060000 { 258 compatible = "renesas,pfc-r8a774c0"; 259 reg = <0 0xe6060000 0 0x508>; 260 }; 261 262 cmt0: timer@e60f0000 { 263 compatible = "renesas,r8a774c0-cmt0", 264 "renesas,rcar-gen3-cmt0"; 265 reg = <0 0xe60f0000 0 0x1004>; 266 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 267 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 268 clocks = <&cpg CPG_MOD 303>; 269 clock-names = "fck"; 270 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 271 resets = <&cpg 303>; 272 status = "disabled"; 273 }; 274 275 cmt1: timer@e6130000 { 276 compatible = "renesas,r8a774c0-cmt1", 277 "renesas,rcar-gen3-cmt1"; 278 reg = <0 0xe6130000 0 0x1004>; 279 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 280 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 281 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 282 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 283 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 284 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 285 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 286 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 287 clocks = <&cpg CPG_MOD 302>; 288 clock-names = "fck"; 289 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 290 resets = <&cpg 302>; 291 status = "disabled"; 292 }; 293 294 cmt2: timer@e6140000 { 295 compatible = "renesas,r8a774c0-cmt1", 296 "renesas,rcar-gen3-cmt1"; 297 reg = <0 0xe6140000 0 0x1004>; 298 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 301 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 302 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 303 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 304 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 305 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 306 clocks = <&cpg CPG_MOD 301>; 307 clock-names = "fck"; 308 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 309 resets = <&cpg 301>; 310 status = "disabled"; 311 }; 312 313 cmt3: timer@e6148000 { 314 compatible = "renesas,r8a774c0-cmt1", 315 "renesas,rcar-gen3-cmt1"; 316 reg = <0 0xe6148000 0 0x1004>; 317 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 325 clocks = <&cpg CPG_MOD 300>; 326 clock-names = "fck"; 327 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 328 resets = <&cpg 300>; 329 status = "disabled"; 330 }; 331 332 cpg: clock-controller@e6150000 { 333 compatible = "renesas,r8a774c0-cpg-mssr"; 334 reg = <0 0xe6150000 0 0x1000>; 335 clocks = <&extal_clk>; 336 clock-names = "extal"; 337 #clock-cells = <2>; 338 #power-domain-cells = <0>; 339 #reset-cells = <1>; 340 }; 341 342 rst: reset-controller@e6160000 { 343 compatible = "renesas,r8a774c0-rst"; 344 reg = <0 0xe6160000 0 0x0200>; 345 }; 346 347 sysc: system-controller@e6180000 { 348 compatible = "renesas,r8a774c0-sysc"; 349 reg = <0 0xe6180000 0 0x0400>; 350 #power-domain-cells = <1>; 351 }; 352 353 thermal: thermal@e6190000 { 354 compatible = "renesas,thermal-r8a774c0"; 355 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 356 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 359 clocks = <&cpg CPG_MOD 522>; 360 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 361 resets = <&cpg 522>; 362 #thermal-sensor-cells = <0>; 363 }; 364 365 intc_ex: interrupt-controller@e61c0000 { 366 compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc"; 367 #interrupt-cells = <2>; 368 interrupt-controller; 369 reg = <0 0xe61c0000 0 0x200>; 370 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 371 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 372 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 373 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 374 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 375 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 376 clocks = <&cpg CPG_MOD 407>; 377 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 378 resets = <&cpg 407>; 379 }; 380 381 tmu0: timer@e61e0000 { 382 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 383 reg = <0 0xe61e0000 0 0x30>; 384 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 387 clocks = <&cpg CPG_MOD 125>; 388 clock-names = "fck"; 389 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 390 resets = <&cpg 125>; 391 status = "disabled"; 392 }; 393 394 tmu1: timer@e6fc0000 { 395 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 396 reg = <0 0xe6fc0000 0 0x30>; 397 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 400 clocks = <&cpg CPG_MOD 124>; 401 clock-names = "fck"; 402 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 403 resets = <&cpg 124>; 404 status = "disabled"; 405 }; 406 407 tmu2: timer@e6fd0000 { 408 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 409 reg = <0 0xe6fd0000 0 0x30>; 410 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 411 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 412 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 413 clocks = <&cpg CPG_MOD 123>; 414 clock-names = "fck"; 415 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 416 resets = <&cpg 123>; 417 status = "disabled"; 418 }; 419 420 tmu3: timer@e6fe0000 { 421 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 422 reg = <0 0xe6fe0000 0 0x30>; 423 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 424 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 425 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 426 clocks = <&cpg CPG_MOD 122>; 427 clock-names = "fck"; 428 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 429 resets = <&cpg 122>; 430 status = "disabled"; 431 }; 432 433 tmu4: timer@ffc00000 { 434 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 435 reg = <0 0xffc00000 0 0x30>; 436 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 437 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 438 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 439 clocks = <&cpg CPG_MOD 121>; 440 clock-names = "fck"; 441 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 442 resets = <&cpg 121>; 443 status = "disabled"; 444 }; 445 446 i2c0: i2c@e6500000 { 447 #address-cells = <1>; 448 #size-cells = <0>; 449 compatible = "renesas,i2c-r8a774c0", 450 "renesas,rcar-gen3-i2c"; 451 reg = <0 0xe6500000 0 0x40>; 452 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 453 clocks = <&cpg CPG_MOD 931>; 454 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 455 resets = <&cpg 931>; 456 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 457 <&dmac2 0x91>, <&dmac2 0x90>; 458 dma-names = "tx", "rx", "tx", "rx"; 459 i2c-scl-internal-delay-ns = <110>; 460 status = "disabled"; 461 }; 462 463 i2c1: i2c@e6508000 { 464 #address-cells = <1>; 465 #size-cells = <0>; 466 compatible = "renesas,i2c-r8a774c0", 467 "renesas,rcar-gen3-i2c"; 468 reg = <0 0xe6508000 0 0x40>; 469 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 470 clocks = <&cpg CPG_MOD 930>; 471 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 472 resets = <&cpg 930>; 473 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 474 <&dmac2 0x93>, <&dmac2 0x92>; 475 dma-names = "tx", "rx", "tx", "rx"; 476 i2c-scl-internal-delay-ns = <6>; 477 status = "disabled"; 478 }; 479 480 i2c2: i2c@e6510000 { 481 #address-cells = <1>; 482 #size-cells = <0>; 483 compatible = "renesas,i2c-r8a774c0", 484 "renesas,rcar-gen3-i2c"; 485 reg = <0 0xe6510000 0 0x40>; 486 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 487 clocks = <&cpg CPG_MOD 929>; 488 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 489 resets = <&cpg 929>; 490 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 491 <&dmac2 0x95>, <&dmac2 0x94>; 492 dma-names = "tx", "rx", "tx", "rx"; 493 i2c-scl-internal-delay-ns = <6>; 494 status = "disabled"; 495 }; 496 497 i2c3: i2c@e66d0000 { 498 #address-cells = <1>; 499 #size-cells = <0>; 500 compatible = "renesas,i2c-r8a774c0", 501 "renesas,rcar-gen3-i2c"; 502 reg = <0 0xe66d0000 0 0x40>; 503 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 504 clocks = <&cpg CPG_MOD 928>; 505 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 506 resets = <&cpg 928>; 507 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 508 dma-names = "tx", "rx"; 509 i2c-scl-internal-delay-ns = <110>; 510 status = "disabled"; 511 }; 512 513 i2c4: i2c@e66d8000 { 514 #address-cells = <1>; 515 #size-cells = <0>; 516 compatible = "renesas,i2c-r8a774c0", 517 "renesas,rcar-gen3-i2c"; 518 reg = <0 0xe66d8000 0 0x40>; 519 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 520 clocks = <&cpg CPG_MOD 927>; 521 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 522 resets = <&cpg 927>; 523 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 524 dma-names = "tx", "rx"; 525 i2c-scl-internal-delay-ns = <6>; 526 status = "disabled"; 527 }; 528 529 i2c5: i2c@e66e0000 { 530 #address-cells = <1>; 531 #size-cells = <0>; 532 compatible = "renesas,i2c-r8a774c0", 533 "renesas,rcar-gen3-i2c"; 534 reg = <0 0xe66e0000 0 0x40>; 535 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 536 clocks = <&cpg CPG_MOD 919>; 537 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 538 resets = <&cpg 919>; 539 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 540 dma-names = "tx", "rx"; 541 i2c-scl-internal-delay-ns = <6>; 542 status = "disabled"; 543 }; 544 545 i2c6: i2c@e66e8000 { 546 #address-cells = <1>; 547 #size-cells = <0>; 548 compatible = "renesas,i2c-r8a774c0", 549 "renesas,rcar-gen3-i2c"; 550 reg = <0 0xe66e8000 0 0x40>; 551 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 552 clocks = <&cpg CPG_MOD 918>; 553 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 554 resets = <&cpg 918>; 555 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 556 dma-names = "tx", "rx"; 557 i2c-scl-internal-delay-ns = <6>; 558 status = "disabled"; 559 }; 560 561 i2c7: i2c@e6690000 { 562 #address-cells = <1>; 563 #size-cells = <0>; 564 compatible = "renesas,i2c-r8a774c0", 565 "renesas,rcar-gen3-i2c"; 566 reg = <0 0xe6690000 0 0x40>; 567 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 568 clocks = <&cpg CPG_MOD 1003>; 569 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 570 resets = <&cpg 1003>; 571 i2c-scl-internal-delay-ns = <6>; 572 status = "disabled"; 573 }; 574 575 i2c_dvfs: i2c@e60b0000 { 576 #address-cells = <1>; 577 #size-cells = <0>; 578 compatible = "renesas,iic-r8a774c0"; 579 reg = <0 0xe60b0000 0 0x15>; 580 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 581 clocks = <&cpg CPG_MOD 926>; 582 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 583 resets = <&cpg 926>; 584 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 585 dma-names = "tx", "rx"; 586 status = "disabled"; 587 }; 588 589 hscif0: serial@e6540000 { 590 compatible = "renesas,hscif-r8a774c0", 591 "renesas,rcar-gen3-hscif", 592 "renesas,hscif"; 593 reg = <0 0xe6540000 0 0x60>; 594 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 520>, 596 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 597 <&scif_clk>; 598 clock-names = "fck", "brg_int", "scif_clk"; 599 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 600 <&dmac2 0x31>, <&dmac2 0x30>; 601 dma-names = "tx", "rx", "tx", "rx"; 602 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 603 resets = <&cpg 520>; 604 status = "disabled"; 605 }; 606 607 hscif1: serial@e6550000 { 608 compatible = "renesas,hscif-r8a774c0", 609 "renesas,rcar-gen3-hscif", 610 "renesas,hscif"; 611 reg = <0 0xe6550000 0 0x60>; 612 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 613 clocks = <&cpg CPG_MOD 519>, 614 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 615 <&scif_clk>; 616 clock-names = "fck", "brg_int", "scif_clk"; 617 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 618 <&dmac2 0x33>, <&dmac2 0x32>; 619 dma-names = "tx", "rx", "tx", "rx"; 620 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 621 resets = <&cpg 519>; 622 status = "disabled"; 623 }; 624 625 hscif2: serial@e6560000 { 626 compatible = "renesas,hscif-r8a774c0", 627 "renesas,rcar-gen3-hscif", 628 "renesas,hscif"; 629 reg = <0 0xe6560000 0 0x60>; 630 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 631 clocks = <&cpg CPG_MOD 518>, 632 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 633 <&scif_clk>; 634 clock-names = "fck", "brg_int", "scif_clk"; 635 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 636 <&dmac2 0x35>, <&dmac2 0x34>; 637 dma-names = "tx", "rx", "tx", "rx"; 638 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 639 resets = <&cpg 518>; 640 status = "disabled"; 641 }; 642 643 hscif3: serial@e66a0000 { 644 compatible = "renesas,hscif-r8a774c0", 645 "renesas,rcar-gen3-hscif", 646 "renesas,hscif"; 647 reg = <0 0xe66a0000 0 0x60>; 648 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 649 clocks = <&cpg CPG_MOD 517>, 650 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 651 <&scif_clk>; 652 clock-names = "fck", "brg_int", "scif_clk"; 653 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 654 dma-names = "tx", "rx"; 655 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 656 resets = <&cpg 517>; 657 status = "disabled"; 658 }; 659 660 hscif4: serial@e66b0000 { 661 compatible = "renesas,hscif-r8a774c0", 662 "renesas,rcar-gen3-hscif", 663 "renesas,hscif"; 664 reg = <0 0xe66b0000 0 0x60>; 665 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 666 clocks = <&cpg CPG_MOD 516>, 667 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 668 <&scif_clk>; 669 clock-names = "fck", "brg_int", "scif_clk"; 670 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 671 dma-names = "tx", "rx"; 672 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 673 resets = <&cpg 516>; 674 status = "disabled"; 675 }; 676 677 hsusb: usb@e6590000 { 678 compatible = "renesas,usbhs-r8a774c0", 679 "renesas,rcar-gen3-usbhs"; 680 reg = <0 0xe6590000 0 0x200>; 681 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 682 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 683 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 684 <&usb_dmac1 0>, <&usb_dmac1 1>; 685 dma-names = "ch0", "ch1", "ch2", "ch3"; 686 renesas,buswait = <11>; 687 phys = <&usb2_phy0>; 688 phy-names = "usb"; 689 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 690 resets = <&cpg 704>, <&cpg 703>; 691 status = "disabled"; 692 }; 693 694 usb_dmac0: dma-controller@e65a0000 { 695 compatible = "renesas,r8a774c0-usb-dmac", 696 "renesas,usb-dmac"; 697 reg = <0 0xe65a0000 0 0x100>; 698 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 699 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 700 interrupt-names = "ch0", "ch1"; 701 clocks = <&cpg CPG_MOD 330>; 702 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 703 resets = <&cpg 330>; 704 #dma-cells = <1>; 705 dma-channels = <2>; 706 }; 707 708 usb_dmac1: dma-controller@e65b0000 { 709 compatible = "renesas,r8a774c0-usb-dmac", 710 "renesas,usb-dmac"; 711 reg = <0 0xe65b0000 0 0x100>; 712 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 713 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 714 interrupt-names = "ch0", "ch1"; 715 clocks = <&cpg CPG_MOD 331>; 716 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 717 resets = <&cpg 331>; 718 #dma-cells = <1>; 719 dma-channels = <2>; 720 }; 721 722 dmac0: dma-controller@e6700000 { 723 compatible = "renesas,dmac-r8a774c0", 724 "renesas,rcar-dmac"; 725 reg = <0 0xe6700000 0 0x10000>; 726 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 727 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 728 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 729 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 730 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 731 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 732 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 733 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 734 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 735 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 736 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 737 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 738 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 739 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 740 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 741 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 742 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 743 interrupt-names = "error", 744 "ch0", "ch1", "ch2", "ch3", 745 "ch4", "ch5", "ch6", "ch7", 746 "ch8", "ch9", "ch10", "ch11", 747 "ch12", "ch13", "ch14", "ch15"; 748 clocks = <&cpg CPG_MOD 219>; 749 clock-names = "fck"; 750 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 751 resets = <&cpg 219>; 752 #dma-cells = <1>; 753 dma-channels = <16>; 754 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 755 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 756 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 757 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 758 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 759 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 760 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 761 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 762 }; 763 764 dmac1: dma-controller@e7300000 { 765 compatible = "renesas,dmac-r8a774c0", 766 "renesas,rcar-dmac"; 767 reg = <0 0xe7300000 0 0x10000>; 768 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 769 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 770 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 771 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 772 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 773 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 774 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 775 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 776 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 777 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 778 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 779 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 780 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 781 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 782 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 783 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 784 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 785 interrupt-names = "error", 786 "ch0", "ch1", "ch2", "ch3", 787 "ch4", "ch5", "ch6", "ch7", 788 "ch8", "ch9", "ch10", "ch11", 789 "ch12", "ch13", "ch14", "ch15"; 790 clocks = <&cpg CPG_MOD 218>; 791 clock-names = "fck"; 792 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 793 resets = <&cpg 218>; 794 #dma-cells = <1>; 795 dma-channels = <16>; 796 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 797 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 798 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 799 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 800 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 801 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 802 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 803 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 804 }; 805 806 dmac2: dma-controller@e7310000 { 807 compatible = "renesas,dmac-r8a774c0", 808 "renesas,rcar-dmac"; 809 reg = <0 0xe7310000 0 0x10000>; 810 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 811 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 812 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 813 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 814 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 815 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 816 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 817 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 818 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 819 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 820 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 821 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 822 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 823 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 824 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 825 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 826 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 827 interrupt-names = "error", 828 "ch0", "ch1", "ch2", "ch3", 829 "ch4", "ch5", "ch6", "ch7", 830 "ch8", "ch9", "ch10", "ch11", 831 "ch12", "ch13", "ch14", "ch15"; 832 clocks = <&cpg CPG_MOD 217>; 833 clock-names = "fck"; 834 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 835 resets = <&cpg 217>; 836 #dma-cells = <1>; 837 dma-channels = <16>; 838 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 839 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 840 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 841 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 842 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 843 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 844 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 845 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 846 }; 847 848 ipmmu_ds0: mmu@e6740000 { 849 compatible = "renesas,ipmmu-r8a774c0"; 850 reg = <0 0xe6740000 0 0x1000>; 851 renesas,ipmmu-main = <&ipmmu_mm 0>; 852 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 853 #iommu-cells = <1>; 854 }; 855 856 ipmmu_ds1: mmu@e7740000 { 857 compatible = "renesas,ipmmu-r8a774c0"; 858 reg = <0 0xe7740000 0 0x1000>; 859 renesas,ipmmu-main = <&ipmmu_mm 1>; 860 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 861 #iommu-cells = <1>; 862 }; 863 864 ipmmu_hc: mmu@e6570000 { 865 compatible = "renesas,ipmmu-r8a774c0"; 866 reg = <0 0xe6570000 0 0x1000>; 867 renesas,ipmmu-main = <&ipmmu_mm 2>; 868 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 869 #iommu-cells = <1>; 870 }; 871 872 ipmmu_mm: mmu@e67b0000 { 873 compatible = "renesas,ipmmu-r8a774c0"; 874 reg = <0 0xe67b0000 0 0x1000>; 875 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 877 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 878 #iommu-cells = <1>; 879 }; 880 881 ipmmu_mp: mmu@ec670000 { 882 compatible = "renesas,ipmmu-r8a774c0"; 883 reg = <0 0xec670000 0 0x1000>; 884 renesas,ipmmu-main = <&ipmmu_mm 4>; 885 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 886 #iommu-cells = <1>; 887 }; 888 889 ipmmu_pv0: mmu@fd800000 { 890 compatible = "renesas,ipmmu-r8a774c0"; 891 reg = <0 0xfd800000 0 0x1000>; 892 renesas,ipmmu-main = <&ipmmu_mm 6>; 893 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 894 #iommu-cells = <1>; 895 }; 896 897 ipmmu_vc0: mmu@fe6b0000 { 898 compatible = "renesas,ipmmu-r8a774c0"; 899 reg = <0 0xfe6b0000 0 0x1000>; 900 renesas,ipmmu-main = <&ipmmu_mm 12>; 901 power-domains = <&sysc R8A774C0_PD_A3VC>; 902 #iommu-cells = <1>; 903 }; 904 905 ipmmu_vi0: mmu@febd0000 { 906 compatible = "renesas,ipmmu-r8a774c0"; 907 reg = <0 0xfebd0000 0 0x1000>; 908 renesas,ipmmu-main = <&ipmmu_mm 14>; 909 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 910 #iommu-cells = <1>; 911 }; 912 913 ipmmu_vp0: mmu@fe990000 { 914 compatible = "renesas,ipmmu-r8a774c0"; 915 reg = <0 0xfe990000 0 0x1000>; 916 renesas,ipmmu-main = <&ipmmu_mm 16>; 917 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 918 #iommu-cells = <1>; 919 }; 920 921 avb: ethernet@e6800000 { 922 compatible = "renesas,etheravb-r8a774c0", 923 "renesas,etheravb-rcar-gen3"; 924 reg = <0 0xe6800000 0 0x800>; 925 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 926 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 927 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 928 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 929 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 930 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 931 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 932 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 933 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 936 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 937 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 938 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 939 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 940 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 941 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 942 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 943 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 944 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 945 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 949 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 950 interrupt-names = "ch0", "ch1", "ch2", "ch3", 951 "ch4", "ch5", "ch6", "ch7", 952 "ch8", "ch9", "ch10", "ch11", 953 "ch12", "ch13", "ch14", "ch15", 954 "ch16", "ch17", "ch18", "ch19", 955 "ch20", "ch21", "ch22", "ch23", 956 "ch24"; 957 clocks = <&cpg CPG_MOD 812>; 958 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 959 resets = <&cpg 812>; 960 phy-mode = "rgmii"; 961 iommus = <&ipmmu_ds0 16>; 962 #address-cells = <1>; 963 #size-cells = <0>; 964 status = "disabled"; 965 }; 966 967 can0: can@e6c30000 { 968 compatible = "renesas,can-r8a774c0", 969 "renesas,rcar-gen3-can"; 970 reg = <0 0xe6c30000 0 0x1000>; 971 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 972 clocks = <&cpg CPG_MOD 916>, <&can_clk>; 973 clock-names = "clkp1", "can_clk"; 974 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 975 resets = <&cpg 916>; 976 status = "disabled"; 977 }; 978 979 can1: can@e6c38000 { 980 compatible = "renesas,can-r8a774c0", 981 "renesas,rcar-gen3-can"; 982 reg = <0 0xe6c38000 0 0x1000>; 983 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 984 clocks = <&cpg CPG_MOD 915>, <&can_clk>; 985 clock-names = "clkp1", "can_clk"; 986 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 987 resets = <&cpg 915>; 988 status = "disabled"; 989 }; 990 991 pwm0: pwm@e6e30000 { 992 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 993 reg = <0 0xe6e30000 0 0x8>; 994 clocks = <&cpg CPG_MOD 523>; 995 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 996 resets = <&cpg 523>; 997 #pwm-cells = <2>; 998 status = "disabled"; 999 }; 1000 1001 pwm1: pwm@e6e31000 { 1002 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1003 reg = <0 0xe6e31000 0 0x8>; 1004 clocks = <&cpg CPG_MOD 523>; 1005 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1006 resets = <&cpg 523>; 1007 #pwm-cells = <2>; 1008 status = "disabled"; 1009 }; 1010 1011 pwm2: pwm@e6e32000 { 1012 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1013 reg = <0 0xe6e32000 0 0x8>; 1014 clocks = <&cpg CPG_MOD 523>; 1015 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1016 resets = <&cpg 523>; 1017 #pwm-cells = <2>; 1018 status = "disabled"; 1019 }; 1020 1021 pwm3: pwm@e6e33000 { 1022 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1023 reg = <0 0xe6e33000 0 0x8>; 1024 clocks = <&cpg CPG_MOD 523>; 1025 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1026 resets = <&cpg 523>; 1027 #pwm-cells = <2>; 1028 status = "disabled"; 1029 }; 1030 1031 pwm4: pwm@e6e34000 { 1032 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1033 reg = <0 0xe6e34000 0 0x8>; 1034 clocks = <&cpg CPG_MOD 523>; 1035 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1036 resets = <&cpg 523>; 1037 #pwm-cells = <2>; 1038 status = "disabled"; 1039 }; 1040 1041 pwm5: pwm@e6e35000 { 1042 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1043 reg = <0 0xe6e35000 0 0x8>; 1044 clocks = <&cpg CPG_MOD 523>; 1045 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1046 resets = <&cpg 523>; 1047 #pwm-cells = <2>; 1048 status = "disabled"; 1049 }; 1050 1051 pwm6: pwm@e6e36000 { 1052 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1053 reg = <0 0xe6e36000 0 0x8>; 1054 clocks = <&cpg CPG_MOD 523>; 1055 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1056 resets = <&cpg 523>; 1057 #pwm-cells = <2>; 1058 status = "disabled"; 1059 }; 1060 1061 scif0: serial@e6e60000 { 1062 compatible = "renesas,scif-r8a774c0", 1063 "renesas,rcar-gen3-scif", "renesas,scif"; 1064 reg = <0 0xe6e60000 0 64>; 1065 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1066 clocks = <&cpg CPG_MOD 207>, 1067 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1068 <&scif_clk>; 1069 clock-names = "fck", "brg_int", "scif_clk"; 1070 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1071 <&dmac2 0x51>, <&dmac2 0x50>; 1072 dma-names = "tx", "rx", "tx", "rx"; 1073 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1074 resets = <&cpg 207>; 1075 status = "disabled"; 1076 }; 1077 1078 scif1: serial@e6e68000 { 1079 compatible = "renesas,scif-r8a774c0", 1080 "renesas,rcar-gen3-scif", "renesas,scif"; 1081 reg = <0 0xe6e68000 0 64>; 1082 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1083 clocks = <&cpg CPG_MOD 206>, 1084 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1085 <&scif_clk>; 1086 clock-names = "fck", "brg_int", "scif_clk"; 1087 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1088 <&dmac2 0x53>, <&dmac2 0x52>; 1089 dma-names = "tx", "rx", "tx", "rx"; 1090 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1091 resets = <&cpg 206>; 1092 status = "disabled"; 1093 }; 1094 1095 scif2: serial@e6e88000 { 1096 compatible = "renesas,scif-r8a774c0", 1097 "renesas,rcar-gen3-scif", "renesas,scif"; 1098 reg = <0 0xe6e88000 0 64>; 1099 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1100 clocks = <&cpg CPG_MOD 310>, 1101 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1102 <&scif_clk>; 1103 clock-names = "fck", "brg_int", "scif_clk"; 1104 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1105 <&dmac2 0x13>, <&dmac2 0x12>; 1106 dma-names = "tx", "rx", "tx", "rx"; 1107 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1108 resets = <&cpg 310>; 1109 status = "disabled"; 1110 }; 1111 1112 scif3: serial@e6c50000 { 1113 compatible = "renesas,scif-r8a774c0", 1114 "renesas,rcar-gen3-scif", "renesas,scif"; 1115 reg = <0 0xe6c50000 0 64>; 1116 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1117 clocks = <&cpg CPG_MOD 204>, 1118 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1119 <&scif_clk>; 1120 clock-names = "fck", "brg_int", "scif_clk"; 1121 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1122 dma-names = "tx", "rx"; 1123 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1124 resets = <&cpg 204>; 1125 status = "disabled"; 1126 }; 1127 1128 scif4: serial@e6c40000 { 1129 compatible = "renesas,scif-r8a774c0", 1130 "renesas,rcar-gen3-scif", "renesas,scif"; 1131 reg = <0 0xe6c40000 0 64>; 1132 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1133 clocks = <&cpg CPG_MOD 203>, 1134 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1135 <&scif_clk>; 1136 clock-names = "fck", "brg_int", "scif_clk"; 1137 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1138 dma-names = "tx", "rx"; 1139 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1140 resets = <&cpg 203>; 1141 status = "disabled"; 1142 }; 1143 1144 scif5: serial@e6f30000 { 1145 compatible = "renesas,scif-r8a774c0", 1146 "renesas,rcar-gen3-scif", "renesas,scif"; 1147 reg = <0 0xe6f30000 0 64>; 1148 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1149 clocks = <&cpg CPG_MOD 202>, 1150 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1151 <&scif_clk>; 1152 clock-names = "fck", "brg_int", "scif_clk"; 1153 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1154 dma-names = "tx", "rx"; 1155 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1156 resets = <&cpg 202>; 1157 status = "disabled"; 1158 }; 1159 1160 msiof0: spi@e6e90000 { 1161 compatible = "renesas,msiof-r8a774c0", 1162 "renesas,rcar-gen3-msiof"; 1163 reg = <0 0xe6e90000 0 0x0064>; 1164 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1165 clocks = <&cpg CPG_MOD 211>; 1166 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1167 <&dmac2 0x41>, <&dmac2 0x40>; 1168 dma-names = "tx", "rx", "tx", "rx"; 1169 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1170 resets = <&cpg 211>; 1171 #address-cells = <1>; 1172 #size-cells = <0>; 1173 status = "disabled"; 1174 }; 1175 1176 msiof1: spi@e6ea0000 { 1177 compatible = "renesas,msiof-r8a774c0", 1178 "renesas,rcar-gen3-msiof"; 1179 reg = <0 0xe6ea0000 0 0x0064>; 1180 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1181 clocks = <&cpg CPG_MOD 210>; 1182 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1183 <&dmac2 0x43>, <&dmac2 0x42>; 1184 dma-names = "tx", "rx", "tx", "rx"; 1185 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1186 resets = <&cpg 210>; 1187 #address-cells = <1>; 1188 #size-cells = <0>; 1189 status = "disabled"; 1190 }; 1191 1192 msiof2: spi@e6c00000 { 1193 compatible = "renesas,msiof-r8a774c0", 1194 "renesas,rcar-gen3-msiof"; 1195 reg = <0 0xe6c00000 0 0x0064>; 1196 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1197 clocks = <&cpg CPG_MOD 209>; 1198 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1199 dma-names = "tx", "rx"; 1200 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1201 resets = <&cpg 209>; 1202 #address-cells = <1>; 1203 #size-cells = <0>; 1204 status = "disabled"; 1205 }; 1206 1207 msiof3: spi@e6c10000 { 1208 compatible = "renesas,msiof-r8a774c0", 1209 "renesas,rcar-gen3-msiof"; 1210 reg = <0 0xe6c10000 0 0x0064>; 1211 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1212 clocks = <&cpg CPG_MOD 208>; 1213 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1214 dma-names = "tx", "rx"; 1215 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1216 resets = <&cpg 208>; 1217 #address-cells = <1>; 1218 #size-cells = <0>; 1219 status = "disabled"; 1220 }; 1221 1222 vin4: video@e6ef4000 { 1223 compatible = "renesas,vin-r8a774c0"; 1224 reg = <0 0xe6ef4000 0 0x1000>; 1225 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1226 clocks = <&cpg CPG_MOD 807>; 1227 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1228 resets = <&cpg 807>; 1229 renesas,id = <4>; 1230 status = "disabled"; 1231 1232 ports { 1233 #address-cells = <1>; 1234 #size-cells = <0>; 1235 1236 port@1 { 1237 #address-cells = <1>; 1238 #size-cells = <0>; 1239 1240 reg = <1>; 1241 1242 vin4csi40: endpoint@2 { 1243 reg = <2>; 1244 remote-endpoint= <&csi40vin4>; 1245 }; 1246 }; 1247 }; 1248 }; 1249 1250 vin5: video@e6ef5000 { 1251 compatible = "renesas,vin-r8a774c0"; 1252 reg = <0 0xe6ef5000 0 0x1000>; 1253 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1254 clocks = <&cpg CPG_MOD 806>; 1255 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1256 resets = <&cpg 806>; 1257 renesas,id = <5>; 1258 status = "disabled"; 1259 1260 ports { 1261 #address-cells = <1>; 1262 #size-cells = <0>; 1263 1264 port@1 { 1265 #address-cells = <1>; 1266 #size-cells = <0>; 1267 1268 reg = <1>; 1269 1270 vin5csi40: endpoint@2 { 1271 reg = <2>; 1272 remote-endpoint= <&csi40vin5>; 1273 }; 1274 }; 1275 }; 1276 }; 1277 1278 rcar_sound: sound@ec500000 { 1279 /* 1280 * #sound-dai-cells is required 1281 * 1282 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1283 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1284 */ 1285 /* 1286 * #clock-cells is required for audio_clkout0/1/2/3 1287 * 1288 * clkout : #clock-cells = <0>; <&rcar_sound>; 1289 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1290 */ 1291 compatible = "renesas,rcar_sound-r8a774c0", 1292 "renesas,rcar_sound-gen3"; 1293 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1294 <0 0xec5a0000 0 0x100>, /* ADG */ 1295 <0 0xec540000 0 0x1000>, /* SSIU */ 1296 <0 0xec541000 0 0x280>, /* SSI */ 1297 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1298 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1299 1300 clocks = <&cpg CPG_MOD 1005>, 1301 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1302 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1303 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1304 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1305 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1306 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1307 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1308 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1309 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1310 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1311 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1312 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1313 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1314 <&audio_clk_a>, <&audio_clk_b>, 1315 <&audio_clk_c>, 1316 <&cpg CPG_CORE R8A774C0_CLK_ZA2>; 1317 clock-names = "ssi-all", 1318 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1319 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1320 "ssi.1", "ssi.0", 1321 "src.9", "src.8", "src.7", "src.6", 1322 "src.5", "src.4", "src.3", "src.2", 1323 "src.1", "src.0", 1324 "mix.1", "mix.0", 1325 "ctu.1", "ctu.0", 1326 "dvc.0", "dvc.1", 1327 "clk_a", "clk_b", "clk_c", "clk_i"; 1328 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1329 resets = <&cpg 1005>, 1330 <&cpg 1006>, <&cpg 1007>, 1331 <&cpg 1008>, <&cpg 1009>, 1332 <&cpg 1010>, <&cpg 1011>, 1333 <&cpg 1012>, <&cpg 1013>, 1334 <&cpg 1014>, <&cpg 1015>; 1335 reset-names = "ssi-all", 1336 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1337 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1338 "ssi.1", "ssi.0"; 1339 status = "disabled"; 1340 1341 rcar_sound,dvc { 1342 dvc0: dvc-0 { 1343 dmas = <&audma0 0xbc>; 1344 dma-names = "tx"; 1345 }; 1346 dvc1: dvc-1 { 1347 dmas = <&audma0 0xbe>; 1348 dma-names = "tx"; 1349 }; 1350 }; 1351 1352 rcar_sound,mix { 1353 mix0: mix-0 { }; 1354 mix1: mix-1 { }; 1355 }; 1356 1357 rcar_sound,ctu { 1358 ctu00: ctu-0 { }; 1359 ctu01: ctu-1 { }; 1360 ctu02: ctu-2 { }; 1361 ctu03: ctu-3 { }; 1362 ctu10: ctu-4 { }; 1363 ctu11: ctu-5 { }; 1364 ctu12: ctu-6 { }; 1365 ctu13: ctu-7 { }; 1366 }; 1367 1368 rcar_sound,src { 1369 src0: src-0 { 1370 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1371 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1372 dma-names = "rx", "tx"; 1373 }; 1374 src1: src-1 { 1375 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1376 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1377 dma-names = "rx", "tx"; 1378 }; 1379 src2: src-2 { 1380 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1381 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1382 dma-names = "rx", "tx"; 1383 }; 1384 src3: src-3 { 1385 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1386 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1387 dma-names = "rx", "tx"; 1388 }; 1389 src4: src-4 { 1390 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1391 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1392 dma-names = "rx", "tx"; 1393 }; 1394 src5: src-5 { 1395 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1396 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1397 dma-names = "rx", "tx"; 1398 }; 1399 src6: src-6 { 1400 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1401 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1402 dma-names = "rx", "tx"; 1403 }; 1404 src7: src-7 { 1405 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1406 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1407 dma-names = "rx", "tx"; 1408 }; 1409 src8: src-8 { 1410 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1411 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1412 dma-names = "rx", "tx"; 1413 }; 1414 src9: src-9 { 1415 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1416 dmas = <&audma0 0x97>, <&audma0 0xba>; 1417 dma-names = "rx", "tx"; 1418 }; 1419 }; 1420 1421 rcar_sound,ssi { 1422 ssi0: ssi-0 { 1423 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1424 dmas = <&audma0 0x01>, <&audma0 0x02>, 1425 <&audma0 0x15>, <&audma0 0x16>; 1426 dma-names = "rx", "tx", "rxu", "txu"; 1427 }; 1428 ssi1: ssi-1 { 1429 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1430 dmas = <&audma0 0x03>, <&audma0 0x04>, 1431 <&audma0 0x49>, <&audma0 0x4a>; 1432 dma-names = "rx", "tx", "rxu", "txu"; 1433 }; 1434 ssi2: ssi-2 { 1435 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1436 dmas = <&audma0 0x05>, <&audma0 0x06>, 1437 <&audma0 0x63>, <&audma0 0x64>; 1438 dma-names = "rx", "tx", "rxu", "txu"; 1439 }; 1440 ssi3: ssi-3 { 1441 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1442 dmas = <&audma0 0x07>, <&audma0 0x08>, 1443 <&audma0 0x6f>, <&audma0 0x70>; 1444 dma-names = "rx", "tx", "rxu", "txu"; 1445 }; 1446 ssi4: ssi-4 { 1447 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1448 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1449 <&audma0 0x71>, <&audma0 0x72>; 1450 dma-names = "rx", "tx", "rxu", "txu"; 1451 }; 1452 ssi5: ssi-5 { 1453 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1454 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1455 <&audma0 0x73>, <&audma0 0x74>; 1456 dma-names = "rx", "tx", "rxu", "txu"; 1457 }; 1458 ssi6: ssi-6 { 1459 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1460 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1461 <&audma0 0x75>, <&audma0 0x76>; 1462 dma-names = "rx", "tx", "rxu", "txu"; 1463 }; 1464 ssi7: ssi-7 { 1465 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1466 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1467 <&audma0 0x79>, <&audma0 0x7a>; 1468 dma-names = "rx", "tx", "rxu", "txu"; 1469 }; 1470 ssi8: ssi-8 { 1471 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1472 dmas = <&audma0 0x11>, <&audma0 0x12>, 1473 <&audma0 0x7b>, <&audma0 0x7c>; 1474 dma-names = "rx", "tx", "rxu", "txu"; 1475 }; 1476 ssi9: ssi-9 { 1477 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1478 dmas = <&audma0 0x13>, <&audma0 0x14>, 1479 <&audma0 0x7d>, <&audma0 0x7e>; 1480 dma-names = "rx", "tx", "rxu", "txu"; 1481 }; 1482 }; 1483 }; 1484 1485 audma0: dma-controller@ec700000 { 1486 compatible = "renesas,dmac-r8a774c0", 1487 "renesas,rcar-dmac"; 1488 reg = <0 0xec700000 0 0x10000>; 1489 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1490 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1491 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1492 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1493 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1494 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1495 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1496 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1497 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1498 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1499 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1500 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1501 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1502 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1503 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1504 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1505 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1506 interrupt-names = "error", 1507 "ch0", "ch1", "ch2", "ch3", 1508 "ch4", "ch5", "ch6", "ch7", 1509 "ch8", "ch9", "ch10", "ch11", 1510 "ch12", "ch13", "ch14", "ch15"; 1511 clocks = <&cpg CPG_MOD 502>; 1512 clock-names = "fck"; 1513 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1514 resets = <&cpg 502>; 1515 #dma-cells = <1>; 1516 dma-channels = <16>; 1517 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1518 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1519 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1520 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1521 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1522 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1523 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1524 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1525 }; 1526 1527 xhci0: usb@ee000000 { 1528 compatible = "renesas,xhci-r8a774c0", 1529 "renesas,rcar-gen3-xhci"; 1530 reg = <0 0xee000000 0 0xc00>; 1531 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1532 clocks = <&cpg CPG_MOD 328>; 1533 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1534 resets = <&cpg 328>; 1535 status = "disabled"; 1536 }; 1537 1538 usb3_peri0: usb@ee020000 { 1539 compatible = "renesas,r8a774c0-usb3-peri", 1540 "renesas,rcar-gen3-usb3-peri"; 1541 reg = <0 0xee020000 0 0x400>; 1542 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1543 clocks = <&cpg CPG_MOD 328>; 1544 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1545 resets = <&cpg 328>; 1546 status = "disabled"; 1547 }; 1548 1549 ohci0: usb@ee080000 { 1550 compatible = "generic-ohci"; 1551 reg = <0 0xee080000 0 0x100>; 1552 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1553 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1554 phys = <&usb2_phy0>; 1555 phy-names = "usb"; 1556 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1557 resets = <&cpg 703>, <&cpg 704>; 1558 status = "disabled"; 1559 }; 1560 1561 ehci0: usb@ee080100 { 1562 compatible = "generic-ehci"; 1563 reg = <0 0xee080100 0 0x100>; 1564 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1565 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1566 phys = <&usb2_phy0>; 1567 phy-names = "usb"; 1568 companion = <&ohci0>; 1569 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1570 resets = <&cpg 703>, <&cpg 704>; 1571 status = "disabled"; 1572 }; 1573 1574 usb2_phy0: usb-phy@ee080200 { 1575 compatible = "renesas,usb2-phy-r8a774c0", 1576 "renesas,rcar-gen3-usb2-phy"; 1577 reg = <0 0xee080200 0 0x700>; 1578 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1579 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1580 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1581 resets = <&cpg 703>, <&cpg 704>; 1582 #phy-cells = <0>; 1583 status = "disabled"; 1584 }; 1585 1586 sdhi0: sd@ee100000 { 1587 compatible = "renesas,sdhi-r8a774c0", 1588 "renesas,rcar-gen3-sdhi"; 1589 reg = <0 0xee100000 0 0x2000>; 1590 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1591 clocks = <&cpg CPG_MOD 314>; 1592 max-frequency = <200000000>; 1593 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1594 resets = <&cpg 314>; 1595 status = "disabled"; 1596 }; 1597 1598 sdhi1: sd@ee120000 { 1599 compatible = "renesas,sdhi-r8a774c0", 1600 "renesas,rcar-gen3-sdhi"; 1601 reg = <0 0xee120000 0 0x2000>; 1602 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1603 clocks = <&cpg CPG_MOD 313>; 1604 max-frequency = <200000000>; 1605 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1606 resets = <&cpg 313>; 1607 status = "disabled"; 1608 }; 1609 1610 sdhi3: sd@ee160000 { 1611 compatible = "renesas,sdhi-r8a774c0", 1612 "renesas,rcar-gen3-sdhi"; 1613 reg = <0 0xee160000 0 0x2000>; 1614 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1615 clocks = <&cpg CPG_MOD 311>; 1616 max-frequency = <200000000>; 1617 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1618 resets = <&cpg 311>; 1619 status = "disabled"; 1620 }; 1621 1622 gic: interrupt-controller@f1010000 { 1623 compatible = "arm,gic-400"; 1624 #interrupt-cells = <3>; 1625 #address-cells = <0>; 1626 interrupt-controller; 1627 reg = <0x0 0xf1010000 0 0x1000>, 1628 <0x0 0xf1020000 0 0x20000>, 1629 <0x0 0xf1040000 0 0x20000>, 1630 <0x0 0xf1060000 0 0x20000>; 1631 interrupts = <GIC_PPI 9 1632 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1633 clocks = <&cpg CPG_MOD 408>; 1634 clock-names = "clk"; 1635 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1636 resets = <&cpg 408>; 1637 }; 1638 1639 pciec0: pcie@fe000000 { 1640 compatible = "renesas,pcie-r8a774c0", 1641 "renesas,pcie-rcar-gen3"; 1642 reg = <0 0xfe000000 0 0x80000>; 1643 #address-cells = <3>; 1644 #size-cells = <2>; 1645 bus-range = <0x00 0xff>; 1646 device_type = "pci"; 1647 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1648 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1649 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1650 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1651 /* Map all possible DDR as inbound ranges */ 1652 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1653 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1654 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1655 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1656 #interrupt-cells = <1>; 1657 interrupt-map-mask = <0 0 0 0>; 1658 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1659 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1660 clock-names = "pcie", "pcie_bus"; 1661 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1662 resets = <&cpg 319>; 1663 status = "disabled"; 1664 }; 1665 1666 vspb0: vsp@fe960000 { 1667 compatible = "renesas,vsp2"; 1668 reg = <0 0xfe960000 0 0x8000>; 1669 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1670 clocks = <&cpg CPG_MOD 626>; 1671 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1672 resets = <&cpg 626>; 1673 renesas,fcp = <&fcpvb0>; 1674 }; 1675 1676 fcpvb0: fcp@fe96f000 { 1677 compatible = "renesas,fcpv"; 1678 reg = <0 0xfe96f000 0 0x200>; 1679 clocks = <&cpg CPG_MOD 607>; 1680 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1681 resets = <&cpg 607>; 1682 iommus = <&ipmmu_vp0 5>; 1683 }; 1684 1685 vspi0: vsp@fe9a0000 { 1686 compatible = "renesas,vsp2"; 1687 reg = <0 0xfe9a0000 0 0x8000>; 1688 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1689 clocks = <&cpg CPG_MOD 631>; 1690 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1691 resets = <&cpg 631>; 1692 renesas,fcp = <&fcpvi0>; 1693 }; 1694 1695 fcpvi0: fcp@fe9af000 { 1696 compatible = "renesas,fcpv"; 1697 reg = <0 0xfe9af000 0 0x200>; 1698 clocks = <&cpg CPG_MOD 611>; 1699 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1700 resets = <&cpg 611>; 1701 iommus = <&ipmmu_vp0 8>; 1702 }; 1703 1704 vspd0: vsp@fea20000 { 1705 compatible = "renesas,vsp2"; 1706 reg = <0 0xfea20000 0 0x7000>; 1707 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1708 clocks = <&cpg CPG_MOD 623>; 1709 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1710 resets = <&cpg 623>; 1711 renesas,fcp = <&fcpvd0>; 1712 }; 1713 1714 fcpvd0: fcp@fea27000 { 1715 compatible = "renesas,fcpv"; 1716 reg = <0 0xfea27000 0 0x200>; 1717 clocks = <&cpg CPG_MOD 603>; 1718 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1719 resets = <&cpg 603>; 1720 iommus = <&ipmmu_vi0 8>; 1721 }; 1722 1723 vspd1: vsp@fea28000 { 1724 compatible = "renesas,vsp2"; 1725 reg = <0 0xfea28000 0 0x7000>; 1726 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1727 clocks = <&cpg CPG_MOD 622>; 1728 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1729 resets = <&cpg 622>; 1730 renesas,fcp = <&fcpvd1>; 1731 }; 1732 1733 fcpvd1: fcp@fea2f000 { 1734 compatible = "renesas,fcpv"; 1735 reg = <0 0xfea2f000 0 0x200>; 1736 clocks = <&cpg CPG_MOD 602>; 1737 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1738 resets = <&cpg 602>; 1739 iommus = <&ipmmu_vi0 9>; 1740 }; 1741 1742 csi40: csi2@feaa0000 { 1743 compatible = "renesas,r8a774c0-csi2", 1744 "renesas,rcar-gen3-csi2"; 1745 reg = <0 0xfeaa0000 0 0x10000>; 1746 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1747 clocks = <&cpg CPG_MOD 716>; 1748 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1749 resets = <&cpg 716>; 1750 status = "disabled"; 1751 1752 ports { 1753 #address-cells = <1>; 1754 #size-cells = <0>; 1755 1756 port@1 { 1757 #address-cells = <1>; 1758 #size-cells = <0>; 1759 1760 reg = <1>; 1761 1762 csi40vin4: endpoint@0 { 1763 reg = <0>; 1764 remote-endpoint = <&vin4csi40>; 1765 }; 1766 csi40vin5: endpoint@1 { 1767 reg = <1>; 1768 remote-endpoint = <&vin5csi40>; 1769 }; 1770 }; 1771 }; 1772 }; 1773 1774 du: display@feb00000 { 1775 compatible = "renesas,du-r8a774c0"; 1776 reg = <0 0xfeb00000 0 0x80000>; 1777 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1778 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1779 clocks = <&cpg CPG_MOD 724>, 1780 <&cpg CPG_MOD 723>; 1781 clock-names = "du.0", "du.1"; 1782 vsps = <&vspd0 0 &vspd1 0>; 1783 status = "disabled"; 1784 1785 ports { 1786 #address-cells = <1>; 1787 #size-cells = <0>; 1788 1789 port@0 { 1790 reg = <0>; 1791 du_out_rgb: endpoint { 1792 }; 1793 }; 1794 1795 port@1 { 1796 reg = <1>; 1797 du_out_lvds0: endpoint { 1798 remote-endpoint = <&lvds0_in>; 1799 }; 1800 }; 1801 1802 port@2 { 1803 reg = <2>; 1804 du_out_lvds1: endpoint { 1805 remote-endpoint = <&lvds1_in>; 1806 }; 1807 }; 1808 }; 1809 }; 1810 1811 lvds0: lvds-encoder@feb90000 { 1812 compatible = "renesas,r8a774c0-lvds"; 1813 reg = <0 0xfeb90000 0 0x20>; 1814 clocks = <&cpg CPG_MOD 727>; 1815 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1816 resets = <&cpg 727>; 1817 status = "disabled"; 1818 1819 ports { 1820 #address-cells = <1>; 1821 #size-cells = <0>; 1822 1823 port@0 { 1824 reg = <0>; 1825 lvds0_in: endpoint { 1826 remote-endpoint = <&du_out_lvds0>; 1827 }; 1828 }; 1829 1830 port@1 { 1831 reg = <1>; 1832 lvds0_out: endpoint { 1833 }; 1834 }; 1835 }; 1836 }; 1837 1838 lvds1: lvds-encoder@feb90100 { 1839 compatible = "renesas,r8a774c0-lvds"; 1840 reg = <0 0xfeb90100 0 0x20>; 1841 clocks = <&cpg CPG_MOD 727>; 1842 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1843 resets = <&cpg 726>; 1844 status = "disabled"; 1845 1846 ports { 1847 #address-cells = <1>; 1848 #size-cells = <0>; 1849 1850 port@0 { 1851 reg = <0>; 1852 lvds1_in: endpoint { 1853 remote-endpoint = <&du_out_lvds1>; 1854 }; 1855 }; 1856 1857 port@1 { 1858 reg = <1>; 1859 lvds1_out: endpoint { 1860 }; 1861 }; 1862 }; 1863 }; 1864 1865 prr: chipid@fff00044 { 1866 compatible = "renesas,prr"; 1867 reg = <0 0xfff00044 0 4>; 1868 }; 1869 }; 1870 1871 thermal-zones { 1872 cpu-thermal { 1873 polling-delay-passive = <250>; 1874 polling-delay = <1000>; 1875 thermal-sensors = <&thermal>; 1876 1877 trips { 1878 cpu-crit { 1879 temperature = <120000>; 1880 hysteresis = <2000>; 1881 type = "critical"; 1882 }; 1883 }; 1884 1885 cooling-maps { 1886 }; 1887 }; 1888 }; 1889 1890 timer { 1891 compatible = "arm,armv8-timer"; 1892 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1893 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1894 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1895 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1896 }; 1897 1898 /* External USB clocks - can be overridden by the board */ 1899 usb3s0_clk: usb3s0 { 1900 compatible = "fixed-clock"; 1901 #clock-cells = <0>; 1902 clock-frequency = <0>; 1903 }; 1904 1905 usb_extal_clk: usb_extal { 1906 compatible = "fixed-clock"; 1907 #clock-cells = <0>; 1908 clock-frequency = <0>; 1909 }; 1910}; 1911