1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8/dts-v1/;
9#include "r8a774c0.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/display/tda998x.h>
12
13/ {
14	model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
15	compatible = "si-linux,cat874", "renesas,r8a774c0";
16
17	aliases {
18		serial0 = &scif2;
19		serial1 = &hscif2;
20	};
21
22	chosen {
23		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
24		stdout-path = "serial0:115200n8";
25	};
26
27	hdmi-out {
28		compatible = "hdmi-connector";
29		type = "a";
30
31		port {
32			hdmi_con_out: endpoint {
33				remote-endpoint = <&tda19988_out>;
34			};
35		};
36	};
37
38	leds {
39		compatible = "gpio-leds";
40
41		led0 {
42			gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
43			label = "LED0";
44		};
45
46		led1 {
47			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
48			label = "LED1";
49		};
50
51		led2 {
52			gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
53			label = "LED2";
54		};
55
56		led3 {
57			gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
58			label = "LED3";
59		};
60	};
61
62	memory@48000000 {
63		device_type = "memory";
64		/* first 128MB is reserved for secure area. */
65		reg = <0x0 0x48000000 0x0 0x78000000>;
66	};
67
68	reg_12p0v: regulator-12p0v {
69		compatible = "regulator-fixed";
70		regulator-name = "D12.0V";
71		regulator-min-microvolt = <12000000>;
72		regulator-max-microvolt = <12000000>;
73		regulator-boot-on;
74		regulator-always-on;
75	};
76
77	sound: sound {
78		compatible = "simple-audio-card";
79
80		simple-audio-card,name = "CAT874 HDMI sound";
81		simple-audio-card,format = "i2s";
82		simple-audio-card,bitclock-master = <&sndcpu>;
83		simple-audio-card,frame-master = <&sndcpu>;
84
85		sndcpu: simple-audio-card,cpu {
86			sound-dai = <&rcar_sound>;
87		};
88
89		sndcodec: simple-audio-card,codec {
90			sound-dai = <&tda19988>;
91		};
92	};
93
94	vcc_sdhi0: regulator-vcc-sdhi0 {
95		compatible = "regulator-fixed";
96
97		regulator-name = "SDHI0 Vcc";
98		regulator-min-microvolt = <3300000>;
99		regulator-max-microvolt = <3300000>;
100		regulator-always-on;
101		regulator-boot-on;
102	};
103
104	vccq_sdhi0: regulator-vccq-sdhi0 {
105		compatible = "regulator-gpio";
106
107		regulator-name = "SDHI0 VccQ";
108		regulator-min-microvolt = <1800000>;
109		regulator-max-microvolt = <3300000>;
110
111		gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
112		gpios-states = <1>;
113		states = <3300000 1
114			  1800000 0>;
115	};
116
117	wlan_en_reg: fixedregulator {
118		compatible = "regulator-fixed";
119		regulator-name = "wlan-en-regulator";
120		regulator-min-microvolt = <1800000>;
121		regulator-max-microvolt = <1800000>;
122		startup-delay-us = <70000>;
123
124		gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
125		enable-active-high;
126	};
127
128	x13_clk: x13 {
129		compatible = "fixed-clock";
130		#clock-cells = <0>;
131		clock-frequency = <74250000>;
132	};
133};
134
135&audio_clk_a {
136	clock-frequency = <22579200>;
137};
138
139&du {
140	pinctrl-0 = <&du_pins>;
141	pinctrl-names = "default";
142	status = "okay";
143
144	clocks = <&cpg CPG_MOD 724>,
145		 <&cpg CPG_MOD 723>,
146		 <&x13_clk>;
147	clock-names = "du.0", "du.1", "dclkin.0";
148
149	ports {
150		port@0 {
151			endpoint {
152				remote-endpoint = <&tda19988_in>;
153			};
154		};
155	};
156};
157
158&ehci0 {
159	dr_mode = "host";
160	status = "okay";
161};
162
163&extal_clk {
164	clock-frequency = <48000000>;
165};
166
167&hscif2 {
168	pinctrl-0 = <&hscif2_pins>;
169	pinctrl-names = "default";
170
171	uart-has-rtscts;
172	status = "okay";
173
174	bluetooth {
175		compatible = "ti,wl1837-st";
176		enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
177	};
178};
179
180&i2c0 {
181	status = "okay";
182	clock-frequency = <100000>;
183
184	hd3ss3220@47 {
185		compatible = "ti,hd3ss3220";
186		reg = <0x47>;
187		interrupt-parent = <&gpio6>;
188		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
189
190		connector {
191			compatible = "usb-c-connector";
192			label = "USB-C";
193			data-role = "dual";
194
195			ports {
196				#address-cells = <1>;
197				#size-cells = <0>;
198
199				port@1 {
200					reg = <1>;
201					hd3ss3220_ep: endpoint {
202						remote-endpoint = <&usb3_role_switch>;
203					};
204				};
205			};
206		};
207	};
208
209	tda19988: tda19988@70 {
210		compatible = "nxp,tda998x";
211		reg = <0x70>;
212		interrupt-parent = <&gpio1>;
213		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
214
215		video-ports = <0x234501>;
216
217		#sound-dai-cells = <0>;
218		audio-ports = <TDA998x_I2S 0x03>;
219		clocks = <&rcar_sound 1>;
220
221		ports {
222			#address-cells = <1>;
223			#size-cells = <0>;
224
225			port@0 {
226				reg = <0>;
227				tda19988_in: endpoint {
228					remote-endpoint = <&du_out_rgb>;
229				};
230			};
231
232			port@1 {
233				reg = <1>;
234				tda19988_out: endpoint {
235					remote-endpoint = <&hdmi_con_out>;
236				};
237			};
238		};
239	};
240};
241
242&i2c1 {
243	pinctrl-0 = <&i2c1_pins>;
244	pinctrl-names = "default";
245
246	status = "okay";
247	clock-frequency = <400000>;
248
249	rtc@32 {
250		compatible = "epson,rx8571";
251		reg = <0x32>;
252	};
253};
254
255&lvds0 {
256	status = "okay";
257
258	clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
259	clock-names = "fck", "dclkin.0", "extal";
260};
261
262&ohci0 {
263	dr_mode = "host";
264	status = "okay";
265};
266
267&pcie_bus_clk {
268	clock-frequency = <100000000>;
269};
270
271&pciec0 {
272	/* Map all possible DDR as inbound ranges */
273	dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
274};
275
276&pfc {
277	du_pins: du {
278		groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp",
279			 "du_clk_in_0";
280		function = "du";
281	};
282
283	i2c1_pins: i2c1 {
284		groups = "i2c1_b";
285		function = "i2c1";
286	};
287
288	hscif2_pins: hscif2 {
289		groups = "hscif2_data_a", "hscif2_ctrl_a";
290		function = "hscif2";
291	};
292
293	scif2_pins: scif2 {
294		groups = "scif2_data_a";
295		function = "scif2";
296	};
297
298	sdhi0_pins: sd0 {
299		groups = "sdhi0_data4", "sdhi0_ctrl";
300		function = "sdhi0";
301		power-source = <3300>;
302	};
303
304	sdhi0_pins_uhs: sd0_uhs {
305		groups = "sdhi0_data4", "sdhi0_ctrl";
306		function = "sdhi0";
307		power-source = <1800>;
308	};
309
310	sdhi3_pins: sd3 {
311		groups = "sdhi3_data4", "sdhi3_ctrl";
312		function = "sdhi3";
313		power-source = <1800>;
314	};
315
316	sound_pins: sound {
317		groups = "ssi01239_ctrl", "ssi0_data";
318		function = "ssi";
319	};
320
321	sound_clk_pins: sound_clk {
322		groups = "audio_clkout1_a";
323		function = "audio_clk";
324	};
325
326	usb30_pins: usb30 {
327		groups = "usb30", "usb30_id";
328		function = "usb30";
329	};
330};
331
332&rcar_sound {
333	pinctrl-0 = <&sound_pins &sound_clk_pins>;
334	pinctrl-names = "default";
335
336	/* Single DAI */
337	#sound-dai-cells = <0>;
338
339	/* audio_clkout0/1/2/3 */
340	#clock-cells = <1>;
341	clock-frequency = <11289600>;
342
343	status = "okay";
344
345	rcar_sound,dai {
346		dai0 {
347			playback = <&ssi0 &src0 &dvc0>;
348		};
349	};
350};
351
352&rwdt {
353	timeout-sec = <60>;
354	status = "okay";
355};
356
357&scif2 {
358	pinctrl-0 = <&scif2_pins>;
359	pinctrl-names = "default";
360
361	status = "okay";
362};
363
364&sdhi0 {
365	pinctrl-0 = <&sdhi0_pins>;
366	pinctrl-1 = <&sdhi0_pins_uhs>;
367	pinctrl-names = "default", "state_uhs";
368
369	vmmc-supply = <&vcc_sdhi0>;
370	vqmmc-supply = <&vccq_sdhi0>;
371	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
372	bus-width = <4>;
373	sd-uhs-sdr50;
374	sd-uhs-sdr104;
375	status = "okay";
376};
377
378&sdhi3 {
379	status = "okay";
380	pinctrl-0 = <&sdhi3_pins>;
381	pinctrl-names = "default";
382
383	vmmc-supply = <&wlan_en_reg>;
384	bus-width = <4>;
385	non-removable;
386	cap-power-off-card;
387	keep-power-in-suspend;
388
389	#address-cells = <1>;
390	#size-cells = <0>;
391	wlcore: wlcore@2 {
392		compatible = "ti,wl1837";
393		reg = <2>;
394		interrupt-parent = <&gpio1>;
395		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
396	};
397};
398
399&usb2_phy0 {
400	renesas,no-otg-pins;
401	status = "okay";
402};
403
404&usb3_peri0 {
405	companion = <&xhci0>;
406	status = "okay";
407	usb-role-switch;
408
409	port {
410		usb3_role_switch: endpoint {
411			remote-endpoint = <&hd3ss3220_ep>;
412		};
413	};
414};
415
416&xhci0 {
417	pinctrl-0 = <&usb30_pins>;
418	pinctrl-names = "default";
419
420	status = "okay";
421};
422