1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8/dts-v1/;
9#include "r8a774c0.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/display/tda998x.h>
12
13/ {
14	model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
15	compatible = "si-linux,cat874", "renesas,r8a774c0";
16
17	aliases {
18		serial0 = &scif2;
19		serial1 = &hscif2;
20	};
21
22	chosen {
23		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
24		stdout-path = "serial0:115200n8";
25	};
26
27	hdmi-out {
28		compatible = "hdmi-connector";
29		type = "a";
30
31		port {
32			hdmi_con_out: endpoint {
33				remote-endpoint = <&tda19988_out>;
34			};
35		};
36	};
37
38	leds {
39		compatible = "gpio-leds";
40
41		led0 {
42			gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
43			label = "LED0";
44		};
45
46		led1 {
47			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
48			label = "LED1";
49		};
50
51		led2 {
52			gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
53			label = "LED2";
54		};
55
56		led3 {
57			gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
58			label = "LED3";
59		};
60	};
61
62	memory@48000000 {
63		device_type = "memory";
64		/* first 128MB is reserved for secure area. */
65		reg = <0x0 0x48000000 0x0 0x78000000>;
66	};
67
68	sound: sound {
69		compatible = "simple-audio-card";
70
71		simple-audio-card,name = "CAT874 HDMI sound";
72		simple-audio-card,format = "i2s";
73		simple-audio-card,bitclock-master = <&sndcpu>;
74		simple-audio-card,frame-master = <&sndcpu>;
75
76		sndcpu: simple-audio-card,cpu {
77			sound-dai = <&rcar_sound>;
78		};
79
80		sndcodec: simple-audio-card,codec {
81			sound-dai = <&tda19988>;
82		};
83	};
84
85	vcc_sdhi0: regulator-vcc-sdhi0 {
86		compatible = "regulator-fixed";
87
88		regulator-name = "SDHI0 Vcc";
89		regulator-min-microvolt = <3300000>;
90		regulator-max-microvolt = <3300000>;
91		regulator-always-on;
92		regulator-boot-on;
93	};
94
95	vccq_sdhi0: regulator-vccq-sdhi0 {
96		compatible = "regulator-gpio";
97
98		regulator-name = "SDHI0 VccQ";
99		regulator-min-microvolt = <1800000>;
100		regulator-max-microvolt = <3300000>;
101
102		gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
103		gpios-states = <1>;
104		states = <3300000 1
105			  1800000 0>;
106	};
107
108	wlan_en_reg: fixedregulator {
109		compatible = "regulator-fixed";
110		regulator-name = "wlan-en-regulator";
111		regulator-min-microvolt = <1800000>;
112		regulator-max-microvolt = <1800000>;
113		startup-delay-us = <70000>;
114
115		gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
116		enable-active-high;
117	};
118
119	x13_clk: x13 {
120		compatible = "fixed-clock";
121		#clock-cells = <0>;
122		clock-frequency = <74250000>;
123	};
124};
125
126&audio_clk_a {
127	clock-frequency = <22579200>;
128};
129
130&du {
131	pinctrl-0 = <&du_pins>;
132	pinctrl-names = "default";
133	status = "okay";
134
135	clocks = <&cpg CPG_MOD 724>,
136		 <&cpg CPG_MOD 723>,
137		 <&x13_clk>;
138	clock-names = "du.0", "du.1", "dclkin.0";
139
140	ports {
141		port@0 {
142			endpoint {
143				remote-endpoint = <&tda19988_in>;
144			};
145		};
146	};
147};
148
149&ehci0 {
150	dr_mode = "host";
151	status = "okay";
152};
153
154&extal_clk {
155	clock-frequency = <48000000>;
156};
157
158&hscif2 {
159	pinctrl-0 = <&hscif2_pins>;
160	pinctrl-names = "default";
161
162	uart-has-rtscts;
163	status = "okay";
164
165	bluetooth {
166		compatible = "ti,wl1837-st";
167		enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
168	};
169};
170
171&i2c0 {
172	status = "okay";
173	clock-frequency = <100000>;
174
175	hd3ss3220@47 {
176		compatible = "ti,hd3ss3220";
177		reg = <0x47>;
178		interrupt-parent = <&gpio6>;
179		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
180
181		connector {
182			compatible = "usb-c-connector";
183			label = "USB-C";
184			data-role = "dual";
185
186			ports {
187				#address-cells = <1>;
188				#size-cells = <0>;
189
190				port@1 {
191					reg = <1>;
192					hd3ss3220_ep: endpoint {
193						remote-endpoint = <&usb3_role_switch>;
194					};
195				};
196			};
197		};
198	};
199
200	tda19988: tda19988@70 {
201		compatible = "nxp,tda998x";
202		reg = <0x70>;
203		interrupt-parent = <&gpio1>;
204		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
205
206		video-ports = <0x234501>;
207
208		#sound-dai-cells = <0>;
209		audio-ports = <TDA998x_I2S 0x03>;
210		clocks = <&rcar_sound 1>;
211
212		ports {
213			#address-cells = <1>;
214			#size-cells = <0>;
215
216			port@0 {
217				reg = <0>;
218				tda19988_in: endpoint {
219					remote-endpoint = <&du_out_rgb>;
220				};
221			};
222
223			port@1 {
224				reg = <1>;
225				tda19988_out: endpoint {
226					remote-endpoint = <&hdmi_con_out>;
227				};
228			};
229		};
230	};
231};
232
233&i2c1 {
234	pinctrl-0 = <&i2c1_pins>;
235	pinctrl-names = "default";
236
237	status = "okay";
238	clock-frequency = <400000>;
239
240	rtc@32 {
241		compatible = "epson,rx8571";
242		reg = <0x32>;
243	};
244};
245
246&lvds0 {
247	status = "okay";
248
249	clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
250	clock-names = "fck", "dclkin.0", "extal";
251};
252
253&ohci0 {
254	dr_mode = "host";
255	status = "okay";
256};
257
258&pcie_bus_clk {
259	clock-frequency = <100000000>;
260};
261
262&pciec0 {
263	/* Map all possible DDR as inbound ranges */
264	dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
265};
266
267&pfc {
268	du_pins: du {
269		groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp",
270			 "du_clk_in_0";
271		function = "du";
272	};
273
274	i2c1_pins: i2c1 {
275		groups = "i2c1_b";
276		function = "i2c1";
277	};
278
279	hscif2_pins: hscif2 {
280		groups = "hscif2_data_a", "hscif2_ctrl_a";
281		function = "hscif2";
282	};
283
284	scif2_pins: scif2 {
285		groups = "scif2_data_a";
286		function = "scif2";
287	};
288
289	sdhi0_pins: sd0 {
290		groups = "sdhi0_data4", "sdhi0_ctrl";
291		function = "sdhi0";
292		power-source = <3300>;
293	};
294
295	sdhi0_pins_uhs: sd0_uhs {
296		groups = "sdhi0_data4", "sdhi0_ctrl";
297		function = "sdhi0";
298		power-source = <1800>;
299	};
300
301	sdhi3_pins: sd3 {
302		groups = "sdhi3_data4", "sdhi3_ctrl";
303		function = "sdhi3";
304		power-source = <1800>;
305	};
306
307	sound_pins: sound {
308		groups = "ssi01239_ctrl", "ssi0_data";
309		function = "ssi";
310	};
311
312	sound_clk_pins: sound_clk {
313		groups = "audio_clkout1_a";
314		function = "audio_clk";
315	};
316
317	usb30_pins: usb30 {
318		groups = "usb30", "usb30_id";
319		function = "usb30";
320	};
321};
322
323&rcar_sound {
324	pinctrl-0 = <&sound_pins &sound_clk_pins>;
325	pinctrl-names = "default";
326
327	/* Single DAI */
328	#sound-dai-cells = <0>;
329
330	/* audio_clkout0/1/2/3 */
331	#clock-cells = <1>;
332	clock-frequency = <11289600>;
333
334	status = "okay";
335
336	rcar_sound,dai {
337		dai0 {
338			playback = <&ssi0 &src0 &dvc0>;
339		};
340	};
341};
342
343&rwdt {
344	timeout-sec = <60>;
345	status = "okay";
346};
347
348&scif2 {
349	pinctrl-0 = <&scif2_pins>;
350	pinctrl-names = "default";
351
352	status = "okay";
353};
354
355&sdhi0 {
356	pinctrl-0 = <&sdhi0_pins>;
357	pinctrl-1 = <&sdhi0_pins_uhs>;
358	pinctrl-names = "default", "state_uhs";
359
360	vmmc-supply = <&vcc_sdhi0>;
361	vqmmc-supply = <&vccq_sdhi0>;
362	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
363	bus-width = <4>;
364	sd-uhs-sdr50;
365	sd-uhs-sdr104;
366	status = "okay";
367};
368
369&sdhi3 {
370	status = "okay";
371	pinctrl-0 = <&sdhi3_pins>;
372	pinctrl-names = "default";
373
374	vmmc-supply = <&wlan_en_reg>;
375	bus-width = <4>;
376	non-removable;
377	cap-power-off-card;
378	keep-power-in-suspend;
379
380	#address-cells = <1>;
381	#size-cells = <0>;
382	wlcore: wlcore@2 {
383		compatible = "ti,wl1837";
384		reg = <2>;
385		interrupt-parent = <&gpio1>;
386		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
387	};
388};
389
390&usb2_phy0 {
391	renesas,no-otg-pins;
392	status = "okay";
393};
394
395&usb3_peri0 {
396	companion = <&xhci0>;
397	status = "okay";
398	usb-role-switch;
399
400	port {
401		usb3_role_switch: endpoint {
402			remote-endpoint = <&hd3ss3220_ep>;
403		};
404	};
405};
406
407&xhci0 {
408	pinctrl-0 = <&usb30_pins>;
409	pinctrl-names = "default";
410
411	status = "okay";
412};
413