1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8/dts-v1/;
9#include "r8a774c0.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
14	compatible = "si-linux,cat874", "renesas,r8a774c0";
15
16	aliases {
17		serial0 = &scif2;
18	};
19
20	chosen {
21		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
22		stdout-path = "serial0:115200n8";
23	};
24
25	memory@48000000 {
26		device_type = "memory";
27		/* first 128MB is reserved for secure area. */
28		reg = <0x0 0x48000000 0x0 0x78000000>;
29	};
30
31	vcc_sdhi0: regulator-vcc-sdhi0 {
32		compatible = "regulator-fixed";
33
34		regulator-name = "SDHI0 Vcc";
35		regulator-min-microvolt = <3300000>;
36		regulator-max-microvolt = <3300000>;
37		regulator-always-on;
38		regulator-boot-on;
39	};
40
41	vccq_sdhi0: regulator-vccq-sdhi0 {
42		compatible = "regulator-gpio";
43
44		regulator-name = "SDHI0 VccQ";
45		regulator-min-microvolt = <1800000>;
46		regulator-max-microvolt = <3300000>;
47
48		gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
49		gpios-states = <1>;
50		states = <3300000 1
51			  1800000 0>;
52	};
53};
54
55&extal_clk {
56	clock-frequency = <48000000>;
57};
58
59&i2c1 {
60	pinctrl-0 = <&i2c1_pins>;
61	pinctrl-names = "default";
62
63	status = "okay";
64	clock-frequency = <400000>;
65
66	rtc@32 {
67		compatible = "epson,rx8571";
68		reg = <0x32>;
69	};
70};
71
72&pcie_bus_clk {
73	clock-frequency = <100000000>;
74};
75
76&pciec0 {
77	/* Map all possible DDR as inbound ranges */
78	dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
79};
80
81&pfc {
82	i2c1_pins: i2c1 {
83		groups = "i2c1_b";
84		function = "i2c1";
85	};
86
87	scif2_pins: scif2 {
88		groups = "scif2_data_a";
89		function = "scif2";
90	};
91
92	sdhi0_pins: sd0 {
93		groups = "sdhi0_data4", "sdhi0_ctrl";
94		function = "sdhi0";
95		power-source = <3300>;
96	};
97
98	sdhi0_pins_uhs: sd0_uhs {
99		groups = "sdhi0_data4", "sdhi0_ctrl";
100		function = "sdhi0";
101		power-source = <1800>;
102	};
103};
104
105&scif2 {
106	pinctrl-0 = <&scif2_pins>;
107	pinctrl-names = "default";
108
109	status = "okay";
110};
111
112&sdhi0 {
113	pinctrl-0 = <&sdhi0_pins>;
114	pinctrl-1 = <&sdhi0_pins_uhs>;
115	pinctrl-names = "default", "state_uhs";
116
117	vmmc-supply = <&vcc_sdhi0>;
118	vqmmc-supply = <&vccq_sdhi0>;
119	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
120	bus-width = <4>;
121	sd-uhs-sdr50;
122	sd-uhs-sdr104;
123	status = "okay";
124};
125