1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a774b1 SoC
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
11#include <dt-bindings/power/r8a774b1-sysc.h>
12
13#define CPG_AUDIO_CLK_I		R8A774B1_CLK_S0D4
14
15/ {
16	compatible = "renesas,r8a774b1";
17	#address-cells = <2>;
18	#size-cells = <2>;
19
20	/*
21	 * The external audio clocks are configured as 0 Hz fixed frequency
22	 * clocks by default.
23	 * Boards that provide audio clocks should override them.
24	 */
25	audio_clk_a: audio_clk_a {
26		compatible = "fixed-clock";
27		#clock-cells = <0>;
28		clock-frequency = <0>;
29	};
30
31	audio_clk_b: audio_clk_b {
32		compatible = "fixed-clock";
33		#clock-cells = <0>;
34		clock-frequency = <0>;
35	};
36
37	audio_clk_c: audio_clk_c {
38		compatible = "fixed-clock";
39		#clock-cells = <0>;
40		clock-frequency = <0>;
41	};
42
43	/* External CAN clock - to be overridden by boards that provide it */
44	can_clk: can {
45		compatible = "fixed-clock";
46		#clock-cells = <0>;
47		clock-frequency = <0>;
48	};
49
50	cluster0_opp: opp-table-0 {
51		compatible = "operating-points-v2";
52		opp-shared;
53
54		opp-500000000 {
55			opp-hz = /bits/ 64 <500000000>;
56			opp-microvolt = <830000>;
57			clock-latency-ns = <300000>;
58		};
59		opp-1000000000 {
60			opp-hz = /bits/ 64 <1000000000>;
61			opp-microvolt = <830000>;
62			clock-latency-ns = <300000>;
63		};
64		opp-1500000000 {
65			opp-hz = /bits/ 64 <1500000000>;
66			opp-microvolt = <830000>;
67			clock-latency-ns = <300000>;
68			opp-suspend;
69		};
70	};
71
72	cpus {
73		#address-cells = <1>;
74		#size-cells = <0>;
75
76		a57_0: cpu@0 {
77			compatible = "arm,cortex-a57";
78			reg = <0x0>;
79			device_type = "cpu";
80			power-domains = <&sysc R8A774B1_PD_CA57_CPU0>;
81			next-level-cache = <&L2_CA57>;
82			enable-method = "psci";
83			#cooling-cells = <2>;
84			dynamic-power-coefficient = <854>;
85			clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
86			operating-points-v2 = <&cluster0_opp>;
87		};
88
89		a57_1: cpu@1 {
90			compatible = "arm,cortex-a57";
91			reg = <0x1>;
92			device_type = "cpu";
93			power-domains = <&sysc R8A774B1_PD_CA57_CPU1>;
94			next-level-cache = <&L2_CA57>;
95			enable-method = "psci";
96			clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
97			operating-points-v2 = <&cluster0_opp>;
98		};
99
100		L2_CA57: cache-controller-0 {
101			compatible = "cache";
102			power-domains = <&sysc R8A774B1_PD_CA57_SCU>;
103			cache-unified;
104			cache-level = <2>;
105		};
106	};
107
108	extal_clk: extal {
109		compatible = "fixed-clock";
110		#clock-cells = <0>;
111		/* This value must be overridden by the board */
112		clock-frequency = <0>;
113	};
114
115	extalr_clk: extalr {
116		compatible = "fixed-clock";
117		#clock-cells = <0>;
118		/* This value must be overridden by the board */
119		clock-frequency = <0>;
120	};
121
122	/* External PCIe clock - can be overridden by the board */
123	pcie_bus_clk: pcie_bus {
124		compatible = "fixed-clock";
125		#clock-cells = <0>;
126		clock-frequency = <0>;
127	};
128
129	pmu_a57 {
130		compatible = "arm,cortex-a57-pmu";
131		interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
132				      <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
133		interrupt-affinity = <&a57_0>, <&a57_1>;
134	};
135
136	psci {
137		compatible = "arm,psci-1.0", "arm,psci-0.2";
138		method = "smc";
139	};
140
141	/* External SCIF clock - to be overridden by boards that provide it */
142	scif_clk: scif {
143		compatible = "fixed-clock";
144		#clock-cells = <0>;
145		clock-frequency = <0>;
146	};
147
148	soc {
149		compatible = "simple-bus";
150		interrupt-parent = <&gic>;
151		#address-cells = <2>;
152		#size-cells = <2>;
153		ranges;
154
155		rwdt: watchdog@e6020000 {
156			compatible = "renesas,r8a774b1-wdt",
157				     "renesas,rcar-gen3-wdt";
158			reg = <0 0xe6020000 0 0x0c>;
159			clocks = <&cpg CPG_MOD 402>;
160			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
161			resets = <&cpg 402>;
162			status = "disabled";
163		};
164
165		gpio0: gpio@e6050000 {
166			compatible = "renesas,gpio-r8a774b1",
167				     "renesas,rcar-gen3-gpio";
168			reg = <0 0xe6050000 0 0x50>;
169			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
170			#gpio-cells = <2>;
171			gpio-controller;
172			gpio-ranges = <&pfc 0 0 16>;
173			#interrupt-cells = <2>;
174			interrupt-controller;
175			clocks = <&cpg CPG_MOD 912>;
176			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
177			resets = <&cpg 912>;
178		};
179
180		gpio1: gpio@e6051000 {
181			compatible = "renesas,gpio-r8a774b1",
182				     "renesas,rcar-gen3-gpio";
183			reg = <0 0xe6051000 0 0x50>;
184			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
185			#gpio-cells = <2>;
186			gpio-controller;
187			gpio-ranges = <&pfc 0 32 29>;
188			#interrupt-cells = <2>;
189			interrupt-controller;
190			clocks = <&cpg CPG_MOD 911>;
191			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
192			resets = <&cpg 911>;
193		};
194
195		gpio2: gpio@e6052000 {
196			compatible = "renesas,gpio-r8a774b1",
197				     "renesas,rcar-gen3-gpio";
198			reg = <0 0xe6052000 0 0x50>;
199			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
200			#gpio-cells = <2>;
201			gpio-controller;
202			gpio-ranges = <&pfc 0 64 15>;
203			#interrupt-cells = <2>;
204			interrupt-controller;
205			clocks = <&cpg CPG_MOD 910>;
206			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
207			resets = <&cpg 910>;
208		};
209
210		gpio3: gpio@e6053000 {
211			compatible = "renesas,gpio-r8a774b1",
212				     "renesas,rcar-gen3-gpio";
213			reg = <0 0xe6053000 0 0x50>;
214			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
215			#gpio-cells = <2>;
216			gpio-controller;
217			gpio-ranges = <&pfc 0 96 16>;
218			#interrupt-cells = <2>;
219			interrupt-controller;
220			clocks = <&cpg CPG_MOD 909>;
221			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
222			resets = <&cpg 909>;
223		};
224
225		gpio4: gpio@e6054000 {
226			compatible = "renesas,gpio-r8a774b1",
227				     "renesas,rcar-gen3-gpio";
228			reg = <0 0xe6054000 0 0x50>;
229			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
230			#gpio-cells = <2>;
231			gpio-controller;
232			gpio-ranges = <&pfc 0 128 18>;
233			#interrupt-cells = <2>;
234			interrupt-controller;
235			clocks = <&cpg CPG_MOD 908>;
236			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
237			resets = <&cpg 908>;
238		};
239
240		gpio5: gpio@e6055000 {
241			compatible = "renesas,gpio-r8a774b1",
242				     "renesas,rcar-gen3-gpio";
243			reg = <0 0xe6055000 0 0x50>;
244			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
245			#gpio-cells = <2>;
246			gpio-controller;
247			gpio-ranges = <&pfc 0 160 26>;
248			#interrupt-cells = <2>;
249			interrupt-controller;
250			clocks = <&cpg CPG_MOD 907>;
251			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
252			resets = <&cpg 907>;
253		};
254
255		gpio6: gpio@e6055400 {
256			compatible = "renesas,gpio-r8a774b1",
257				     "renesas,rcar-gen3-gpio";
258			reg = <0 0xe6055400 0 0x50>;
259			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
260			#gpio-cells = <2>;
261			gpio-controller;
262			gpio-ranges = <&pfc 0 192 32>;
263			#interrupt-cells = <2>;
264			interrupt-controller;
265			clocks = <&cpg CPG_MOD 906>;
266			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
267			resets = <&cpg 906>;
268		};
269
270		gpio7: gpio@e6055800 {
271			compatible = "renesas,gpio-r8a774b1",
272				     "renesas,rcar-gen3-gpio";
273			reg = <0 0xe6055800 0 0x50>;
274			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
275			#gpio-cells = <2>;
276			gpio-controller;
277			gpio-ranges = <&pfc 0 224 4>;
278			#interrupt-cells = <2>;
279			interrupt-controller;
280			clocks = <&cpg CPG_MOD 905>;
281			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
282			resets = <&cpg 905>;
283		};
284
285		pfc: pinctrl@e6060000 {
286			compatible = "renesas,pfc-r8a774b1";
287			reg = <0 0xe6060000 0 0x50c>;
288		};
289
290		cmt0: timer@e60f0000 {
291			compatible = "renesas,r8a774b1-cmt0",
292				     "renesas,rcar-gen3-cmt0";
293			reg = <0 0xe60f0000 0 0x1004>;
294			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
295				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
296			clocks = <&cpg CPG_MOD 303>;
297			clock-names = "fck";
298			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
299			resets = <&cpg 303>;
300			status = "disabled";
301		};
302
303		cmt1: timer@e6130000 {
304			compatible = "renesas,r8a774b1-cmt1",
305				     "renesas,rcar-gen3-cmt1";
306			reg = <0 0xe6130000 0 0x1004>;
307			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
308				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
309				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
310				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
311				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
312				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
313				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
314				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
315			clocks = <&cpg CPG_MOD 302>;
316			clock-names = "fck";
317			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
318			resets = <&cpg 302>;
319			status = "disabled";
320		};
321
322		cmt2: timer@e6140000 {
323			compatible = "renesas,r8a774b1-cmt1",
324				     "renesas,rcar-gen3-cmt1";
325			reg = <0 0xe6140000 0 0x1004>;
326			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
327				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
328				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
329				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
330				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
331				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
332				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
333				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
334			clocks = <&cpg CPG_MOD 301>;
335			clock-names = "fck";
336			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
337			resets = <&cpg 301>;
338			status = "disabled";
339		};
340
341		cmt3: timer@e6148000 {
342			compatible = "renesas,r8a774b1-cmt1",
343				     "renesas,rcar-gen3-cmt1";
344			reg = <0 0xe6148000 0 0x1004>;
345			interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
346				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
347				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
348				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
349				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
350				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
351				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
352				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
353			clocks = <&cpg CPG_MOD 300>;
354			clock-names = "fck";
355			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
356			resets = <&cpg 300>;
357			status = "disabled";
358		};
359
360		cpg: clock-controller@e6150000 {
361			compatible = "renesas,r8a774b1-cpg-mssr";
362			reg = <0 0xe6150000 0 0x1000>;
363			clocks = <&extal_clk>, <&extalr_clk>;
364			clock-names = "extal", "extalr";
365			#clock-cells = <2>;
366			#power-domain-cells = <0>;
367			#reset-cells = <1>;
368		};
369
370		rst: reset-controller@e6160000 {
371			compatible = "renesas,r8a774b1-rst";
372			reg = <0 0xe6160000 0 0x0200>;
373		};
374
375		sysc: system-controller@e6180000 {
376			compatible = "renesas,r8a774b1-sysc";
377			reg = <0 0xe6180000 0 0x0400>;
378			#power-domain-cells = <1>;
379		};
380
381		tsc: thermal@e6198000 {
382			compatible = "renesas,r8a774b1-thermal";
383			reg = <0 0xe6198000 0 0x100>,
384			      <0 0xe61a0000 0 0x100>,
385			      <0 0xe61a8000 0 0x100>;
386			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
387				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
388				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
389			clocks = <&cpg CPG_MOD 522>;
390			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
391			resets = <&cpg 522>;
392			#thermal-sensor-cells = <1>;
393		};
394
395		intc_ex: interrupt-controller@e61c0000 {
396			compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc";
397			#interrupt-cells = <2>;
398			interrupt-controller;
399			reg = <0 0xe61c0000 0 0x200>;
400			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
401				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
402				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
403				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
404				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
405				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
406			clocks = <&cpg CPG_MOD 407>;
407			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
408			resets = <&cpg 407>;
409		};
410
411		tmu0: timer@e61e0000 {
412			compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
413			reg = <0 0xe61e0000 0 0x30>;
414			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
415				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
416				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
417			clocks = <&cpg CPG_MOD 125>;
418			clock-names = "fck";
419			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
420			resets = <&cpg 125>;
421			status = "disabled";
422		};
423
424		tmu1: timer@e6fc0000 {
425			compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
426			reg = <0 0xe6fc0000 0 0x30>;
427			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
428				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
429				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
430			clocks = <&cpg CPG_MOD 124>;
431			clock-names = "fck";
432			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
433			resets = <&cpg 124>;
434			status = "disabled";
435		};
436
437		tmu2: timer@e6fd0000 {
438			compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
439			reg = <0 0xe6fd0000 0 0x30>;
440			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
441				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
442				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
443			clocks = <&cpg CPG_MOD 123>;
444			clock-names = "fck";
445			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
446			resets = <&cpg 123>;
447			status = "disabled";
448		};
449
450		tmu3: timer@e6fe0000 {
451			compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
452			reg = <0 0xe6fe0000 0 0x30>;
453			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
454				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
455				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
456			clocks = <&cpg CPG_MOD 122>;
457			clock-names = "fck";
458			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
459			resets = <&cpg 122>;
460			status = "disabled";
461		};
462
463		tmu4: timer@ffc00000 {
464			compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
465			reg = <0 0xffc00000 0 0x30>;
466			interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
467				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
468				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
469			clocks = <&cpg CPG_MOD 121>;
470			clock-names = "fck";
471			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
472			resets = <&cpg 121>;
473			status = "disabled";
474		};
475
476		i2c0: i2c@e6500000 {
477			#address-cells = <1>;
478			#size-cells = <0>;
479			compatible = "renesas,i2c-r8a774b1",
480				     "renesas,rcar-gen3-i2c";
481			reg = <0 0xe6500000 0 0x40>;
482			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
483			clocks = <&cpg CPG_MOD 931>;
484			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
485			resets = <&cpg 931>;
486			dmas = <&dmac1 0x91>, <&dmac1 0x90>,
487			       <&dmac2 0x91>, <&dmac2 0x90>;
488			dma-names = "tx", "rx", "tx", "rx";
489			i2c-scl-internal-delay-ns = <110>;
490			status = "disabled";
491		};
492
493		i2c1: i2c@e6508000 {
494			#address-cells = <1>;
495			#size-cells = <0>;
496			compatible = "renesas,i2c-r8a774b1",
497				     "renesas,rcar-gen3-i2c";
498			reg = <0 0xe6508000 0 0x40>;
499			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
500			clocks = <&cpg CPG_MOD 930>;
501			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
502			resets = <&cpg 930>;
503			dmas = <&dmac1 0x93>, <&dmac1 0x92>,
504			       <&dmac2 0x93>, <&dmac2 0x92>;
505			dma-names = "tx", "rx", "tx", "rx";
506			i2c-scl-internal-delay-ns = <6>;
507			status = "disabled";
508		};
509
510		i2c2: i2c@e6510000 {
511			#address-cells = <1>;
512			#size-cells = <0>;
513			compatible = "renesas,i2c-r8a774b1",
514				     "renesas,rcar-gen3-i2c";
515			reg = <0 0xe6510000 0 0x40>;
516			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
517			clocks = <&cpg CPG_MOD 929>;
518			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
519			resets = <&cpg 929>;
520			dmas = <&dmac1 0x95>, <&dmac1 0x94>,
521			       <&dmac2 0x95>, <&dmac2 0x94>;
522			dma-names = "tx", "rx", "tx", "rx";
523			i2c-scl-internal-delay-ns = <6>;
524			status = "disabled";
525		};
526
527		i2c3: i2c@e66d0000 {
528			#address-cells = <1>;
529			#size-cells = <0>;
530			compatible = "renesas,i2c-r8a774b1",
531				     "renesas,rcar-gen3-i2c";
532			reg = <0 0xe66d0000 0 0x40>;
533			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
534			clocks = <&cpg CPG_MOD 928>;
535			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
536			resets = <&cpg 928>;
537			dmas = <&dmac0 0x97>, <&dmac0 0x96>;
538			dma-names = "tx", "rx";
539			i2c-scl-internal-delay-ns = <110>;
540			status = "disabled";
541		};
542
543		i2c4: i2c@e66d8000 {
544			#address-cells = <1>;
545			#size-cells = <0>;
546			compatible = "renesas,i2c-r8a774b1",
547				     "renesas,rcar-gen3-i2c";
548			reg = <0 0xe66d8000 0 0x40>;
549			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
550			clocks = <&cpg CPG_MOD 927>;
551			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
552			resets = <&cpg 927>;
553			dmas = <&dmac0 0x99>, <&dmac0 0x98>;
554			dma-names = "tx", "rx";
555			i2c-scl-internal-delay-ns = <110>;
556			status = "disabled";
557		};
558
559		i2c5: i2c@e66e0000 {
560			#address-cells = <1>;
561			#size-cells = <0>;
562			compatible = "renesas,i2c-r8a774b1",
563				     "renesas,rcar-gen3-i2c";
564			reg = <0 0xe66e0000 0 0x40>;
565			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
566			clocks = <&cpg CPG_MOD 919>;
567			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
568			resets = <&cpg 919>;
569			dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
570			dma-names = "tx", "rx";
571			i2c-scl-internal-delay-ns = <110>;
572			status = "disabled";
573		};
574
575		i2c6: i2c@e66e8000 {
576			#address-cells = <1>;
577			#size-cells = <0>;
578			compatible = "renesas,i2c-r8a774b1",
579				     "renesas,rcar-gen3-i2c";
580			reg = <0 0xe66e8000 0 0x40>;
581			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
582			clocks = <&cpg CPG_MOD 918>;
583			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
584			resets = <&cpg 918>;
585			dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
586			dma-names = "tx", "rx";
587			i2c-scl-internal-delay-ns = <6>;
588			status = "disabled";
589		};
590
591		iic_pmic: i2c@e60b0000 {
592			#address-cells = <1>;
593			#size-cells = <0>;
594			compatible = "renesas,iic-r8a774b1",
595				     "renesas,rcar-gen3-iic",
596				     "renesas,rmobile-iic";
597			reg = <0 0xe60b0000 0 0x425>;
598			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
599			clocks = <&cpg CPG_MOD 926>;
600			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
601			resets = <&cpg 926>;
602			dmas = <&dmac0 0x11>, <&dmac0 0x10>;
603			dma-names = "tx", "rx";
604			status = "disabled";
605		};
606
607		hscif0: serial@e6540000 {
608			compatible = "renesas,hscif-r8a774b1",
609				     "renesas,rcar-gen3-hscif",
610				     "renesas,hscif";
611			reg = <0 0xe6540000 0 0x60>;
612			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
613			clocks = <&cpg CPG_MOD 520>,
614				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
615				 <&scif_clk>;
616			clock-names = "fck", "brg_int", "scif_clk";
617			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
618			       <&dmac2 0x31>, <&dmac2 0x30>;
619			dma-names = "tx", "rx", "tx", "rx";
620			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
621			resets = <&cpg 520>;
622			status = "disabled";
623		};
624
625		hscif1: serial@e6550000 {
626			compatible = "renesas,hscif-r8a774b1",
627				     "renesas,rcar-gen3-hscif",
628				     "renesas,hscif";
629			reg = <0 0xe6550000 0 0x60>;
630			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
631			clocks = <&cpg CPG_MOD 519>,
632				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
633				 <&scif_clk>;
634			clock-names = "fck", "brg_int", "scif_clk";
635			dmas = <&dmac1 0x33>, <&dmac1 0x32>,
636			       <&dmac2 0x33>, <&dmac2 0x32>;
637			dma-names = "tx", "rx", "tx", "rx";
638			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
639			resets = <&cpg 519>;
640			status = "disabled";
641		};
642
643		hscif2: serial@e6560000 {
644			compatible = "renesas,hscif-r8a774b1",
645				     "renesas,rcar-gen3-hscif",
646				     "renesas,hscif";
647			reg = <0 0xe6560000 0 0x60>;
648			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
649			clocks = <&cpg CPG_MOD 518>,
650				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
651				 <&scif_clk>;
652			clock-names = "fck", "brg_int", "scif_clk";
653			dmas = <&dmac1 0x35>, <&dmac1 0x34>,
654			       <&dmac2 0x35>, <&dmac2 0x34>;
655			dma-names = "tx", "rx", "tx", "rx";
656			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
657			resets = <&cpg 518>;
658			status = "disabled";
659		};
660
661		hscif3: serial@e66a0000 {
662			compatible = "renesas,hscif-r8a774b1",
663				     "renesas,rcar-gen3-hscif",
664				     "renesas,hscif";
665			reg = <0 0xe66a0000 0 0x60>;
666			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
667			clocks = <&cpg CPG_MOD 517>,
668				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
669				 <&scif_clk>;
670			clock-names = "fck", "brg_int", "scif_clk";
671			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
672			dma-names = "tx", "rx";
673			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
674			resets = <&cpg 517>;
675			status = "disabled";
676		};
677
678		hscif4: serial@e66b0000 {
679			compatible = "renesas,hscif-r8a774b1",
680				     "renesas,rcar-gen3-hscif",
681				     "renesas,hscif";
682			reg = <0 0xe66b0000 0 0x60>;
683			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
684			clocks = <&cpg CPG_MOD 516>,
685				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
686				 <&scif_clk>;
687			clock-names = "fck", "brg_int", "scif_clk";
688			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
689			dma-names = "tx", "rx";
690			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
691			resets = <&cpg 516>;
692			status = "disabled";
693		};
694
695		hsusb: usb@e6590000 {
696			compatible = "renesas,usbhs-r8a774b1",
697				     "renesas,rcar-gen3-usbhs";
698			reg = <0 0xe6590000 0 0x200>;
699			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
700			clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
701			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
702			       <&usb_dmac1 0>, <&usb_dmac1 1>;
703			dma-names = "ch0", "ch1", "ch2", "ch3";
704			renesas,buswait = <11>;
705			phys = <&usb2_phy0 3>;
706			phy-names = "usb";
707			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
708			resets = <&cpg 704>, <&cpg 703>;
709			status = "disabled";
710		};
711
712		usb2_clksel: clock-controller@e6590630 {
713			compatible = "renesas,r8a774b1-rcar-usb2-clock-sel",
714				     "renesas,rcar-gen3-usb2-clock-sel";
715			reg = <0 0xe6590630 0 0x02>;
716			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
717				 <&usb_extal_clk>, <&usb3s0_clk>;
718			clock-names = "ehci_ohci", "hs-usb-if",
719				      "usb_extal", "usb_xtal";
720			#clock-cells = <0>;
721			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
722			resets = <&cpg 703>, <&cpg 704>;
723			reset-names = "ehci_ohci", "hs-usb-if";
724			status = "disabled";
725		};
726
727		usb_dmac0: dma-controller@e65a0000 {
728			compatible = "renesas,r8a774b1-usb-dmac",
729				     "renesas,usb-dmac";
730			reg = <0 0xe65a0000 0 0x100>;
731			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
732				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
733			interrupt-names = "ch0", "ch1";
734			clocks = <&cpg CPG_MOD 330>;
735			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
736			resets = <&cpg 330>;
737			#dma-cells = <1>;
738			dma-channels = <2>;
739		};
740
741		usb_dmac1: dma-controller@e65b0000 {
742			compatible = "renesas,r8a774b1-usb-dmac",
743				     "renesas,usb-dmac";
744			reg = <0 0xe65b0000 0 0x100>;
745			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
746				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
747			interrupt-names = "ch0", "ch1";
748			clocks = <&cpg CPG_MOD 331>;
749			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
750			resets = <&cpg 331>;
751			#dma-cells = <1>;
752			dma-channels = <2>;
753		};
754
755		usb3_phy0: usb-phy@e65ee000 {
756			compatible = "renesas,r8a774b1-usb3-phy",
757				     "renesas,rcar-gen3-usb3-phy";
758			reg = <0 0xe65ee000 0 0x90>;
759			clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
760				 <&usb_extal_clk>;
761			clock-names = "usb3-if", "usb3s_clk", "usb_extal";
762			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
763			resets = <&cpg 328>;
764			#phy-cells = <0>;
765			status = "disabled";
766		};
767
768		dmac0: dma-controller@e6700000 {
769			compatible = "renesas,dmac-r8a774b1",
770				     "renesas,rcar-dmac";
771			reg = <0 0xe6700000 0 0x10000>;
772			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
773				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
774				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
775				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
776				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
777				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
778				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
779				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
780				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
781				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
782				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
783				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
784				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
785				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
786				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
787				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
788				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
789			interrupt-names = "error",
790					"ch0", "ch1", "ch2", "ch3",
791					"ch4", "ch5", "ch6", "ch7",
792					"ch8", "ch9", "ch10", "ch11",
793					"ch12", "ch13", "ch14", "ch15";
794			clocks = <&cpg CPG_MOD 219>;
795			clock-names = "fck";
796			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
797			resets = <&cpg 219>;
798			#dma-cells = <1>;
799			dma-channels = <16>;
800			iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
801			       <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
802			       <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
803			       <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
804			       <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
805			       <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
806			       <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
807			       <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
808		};
809
810		dmac1: dma-controller@e7300000 {
811			compatible = "renesas,dmac-r8a774b1",
812				     "renesas,rcar-dmac";
813			reg = <0 0xe7300000 0 0x10000>;
814			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
815				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
816				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
817				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
818				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
819				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
820				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
821				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
822				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
823				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
824				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
825				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
826				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
827				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
828				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
829				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
830				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
831			interrupt-names = "error",
832					"ch0", "ch1", "ch2", "ch3",
833					"ch4", "ch5", "ch6", "ch7",
834					"ch8", "ch9", "ch10", "ch11",
835					"ch12", "ch13", "ch14", "ch15";
836			clocks = <&cpg CPG_MOD 218>;
837			clock-names = "fck";
838			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
839			resets = <&cpg 218>;
840			#dma-cells = <1>;
841			dma-channels = <16>;
842			iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
843			       <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
844			       <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
845			       <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
846			       <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
847			       <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
848			       <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
849			       <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
850		};
851
852		dmac2: dma-controller@e7310000 {
853			compatible = "renesas,dmac-r8a774b1",
854				     "renesas,rcar-dmac";
855			reg = <0 0xe7310000 0 0x10000>;
856			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
857				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
858				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
859				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
860				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
861				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
862				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
863				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
864				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
865				     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
866				     <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
867				     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
868				     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
869				     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
870				     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
871				     <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
872				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
873			interrupt-names = "error",
874					"ch0", "ch1", "ch2", "ch3",
875					"ch4", "ch5", "ch6", "ch7",
876					"ch8", "ch9", "ch10", "ch11",
877					"ch12", "ch13", "ch14", "ch15";
878			clocks = <&cpg CPG_MOD 217>;
879			clock-names = "fck";
880			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
881			resets = <&cpg 217>;
882			#dma-cells = <1>;
883			dma-channels = <16>;
884			iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
885			       <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
886			       <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
887			       <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
888			       <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
889			       <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
890			       <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
891			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
892		};
893
894		ipmmu_ds0: iommu@e6740000 {
895			compatible = "renesas,ipmmu-r8a774b1";
896			reg = <0 0xe6740000 0 0x1000>;
897			renesas,ipmmu-main = <&ipmmu_mm 0>;
898			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
899			#iommu-cells = <1>;
900		};
901
902		ipmmu_ds1: iommu@e7740000 {
903			compatible = "renesas,ipmmu-r8a774b1";
904			reg = <0 0xe7740000 0 0x1000>;
905			renesas,ipmmu-main = <&ipmmu_mm 1>;
906			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
907			#iommu-cells = <1>;
908		};
909
910		ipmmu_hc: iommu@e6570000 {
911			compatible = "renesas,ipmmu-r8a774b1";
912			reg = <0 0xe6570000 0 0x1000>;
913			renesas,ipmmu-main = <&ipmmu_mm 2>;
914			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
915			#iommu-cells = <1>;
916		};
917
918		ipmmu_mm: iommu@e67b0000 {
919			compatible = "renesas,ipmmu-r8a774b1";
920			reg = <0 0xe67b0000 0 0x1000>;
921			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
922				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
923			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
924			#iommu-cells = <1>;
925		};
926
927		ipmmu_mp: iommu@ec670000 {
928			compatible = "renesas,ipmmu-r8a774b1";
929			reg = <0 0xec670000 0 0x1000>;
930			renesas,ipmmu-main = <&ipmmu_mm 4>;
931			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
932			#iommu-cells = <1>;
933		};
934
935		ipmmu_pv0: iommu@fd800000 {
936			compatible = "renesas,ipmmu-r8a774b1";
937			reg = <0 0xfd800000 0 0x1000>;
938			renesas,ipmmu-main = <&ipmmu_mm 6>;
939			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
940			#iommu-cells = <1>;
941		};
942
943		ipmmu_vc0: iommu@fe6b0000 {
944			compatible = "renesas,ipmmu-r8a774b1";
945			reg = <0 0xfe6b0000 0 0x1000>;
946			renesas,ipmmu-main = <&ipmmu_mm 12>;
947			power-domains = <&sysc R8A774B1_PD_A3VC>;
948			#iommu-cells = <1>;
949		};
950
951		ipmmu_vi0: iommu@febd0000 {
952			compatible = "renesas,ipmmu-r8a774b1";
953			reg = <0 0xfebd0000 0 0x1000>;
954			renesas,ipmmu-main = <&ipmmu_mm 14>;
955			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
956			#iommu-cells = <1>;
957		};
958
959		ipmmu_vp0: iommu@fe990000 {
960			compatible = "renesas,ipmmu-r8a774b1";
961			reg = <0 0xfe990000 0 0x1000>;
962			renesas,ipmmu-main = <&ipmmu_mm 16>;
963			power-domains = <&sysc R8A774B1_PD_A3VP>;
964			#iommu-cells = <1>;
965		};
966
967		avb: ethernet@e6800000 {
968			compatible = "renesas,etheravb-r8a774b1",
969				     "renesas,etheravb-rcar-gen3";
970			reg = <0 0xe6800000 0 0x800>;
971			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
972				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
973				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
974				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
975				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
976				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
977				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
978				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
979				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
980				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
981				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
982				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
983				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
984				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
985				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
986				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
987				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
988				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
989				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
990				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
991				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
992				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
993				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
994				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
995				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
996			interrupt-names = "ch0", "ch1", "ch2", "ch3",
997					  "ch4", "ch5", "ch6", "ch7",
998					  "ch8", "ch9", "ch10", "ch11",
999					  "ch12", "ch13", "ch14", "ch15",
1000					  "ch16", "ch17", "ch18", "ch19",
1001					  "ch20", "ch21", "ch22", "ch23",
1002					  "ch24";
1003			clocks = <&cpg CPG_MOD 812>;
1004			clock-names = "fck";
1005			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1006			resets = <&cpg 812>;
1007			phy-mode = "rgmii";
1008			rx-internal-delay-ps = <0>;
1009			tx-internal-delay-ps = <0>;
1010			iommus = <&ipmmu_ds0 16>;
1011			#address-cells = <1>;
1012			#size-cells = <0>;
1013			status = "disabled";
1014		};
1015
1016		can0: can@e6c30000 {
1017			compatible = "renesas,can-r8a774b1",
1018				     "renesas,rcar-gen3-can";
1019			reg = <0 0xe6c30000 0 0x1000>;
1020			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1021			clocks = <&cpg CPG_MOD 916>,
1022				 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1023				 <&can_clk>;
1024			clock-names = "clkp1", "clkp2", "can_clk";
1025			assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1026			assigned-clock-rates = <40000000>;
1027			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1028			resets = <&cpg 916>;
1029			status = "disabled";
1030		};
1031
1032		can1: can@e6c38000 {
1033			compatible = "renesas,can-r8a774b1",
1034				     "renesas,rcar-gen3-can";
1035			reg = <0 0xe6c38000 0 0x1000>;
1036			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1037			clocks = <&cpg CPG_MOD 915>,
1038				 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1039				 <&can_clk>;
1040			clock-names = "clkp1", "clkp2", "can_clk";
1041			assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1042			assigned-clock-rates = <40000000>;
1043			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1044			resets = <&cpg 915>;
1045			status = "disabled";
1046		};
1047
1048		canfd: can@e66c0000 {
1049			compatible = "renesas,r8a774b1-canfd",
1050				     "renesas,rcar-gen3-canfd";
1051			reg = <0 0xe66c0000 0 0x8000>;
1052			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1053				   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1054			clocks = <&cpg CPG_MOD 914>,
1055				 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1056				 <&can_clk>;
1057			clock-names = "fck", "canfd", "can_clk";
1058			assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1059			assigned-clock-rates = <40000000>;
1060			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1061			resets = <&cpg 914>;
1062			status = "disabled";
1063
1064			channel0 {
1065				status = "disabled";
1066			};
1067
1068			channel1 {
1069				status = "disabled";
1070			};
1071		};
1072
1073		pwm0: pwm@e6e30000 {
1074			compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1075			reg = <0 0xe6e30000 0 0x8>;
1076			#pwm-cells = <2>;
1077			clocks = <&cpg CPG_MOD 523>;
1078			resets = <&cpg 523>;
1079			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1080			status = "disabled";
1081		};
1082
1083		pwm1: pwm@e6e31000 {
1084			compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1085			reg = <0 0xe6e31000 0 0x8>;
1086			#pwm-cells = <2>;
1087			clocks = <&cpg CPG_MOD 523>;
1088			resets = <&cpg 523>;
1089			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1090			status = "disabled";
1091		};
1092
1093		pwm2: pwm@e6e32000 {
1094			compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1095			reg = <0 0xe6e32000 0 0x8>;
1096			#pwm-cells = <2>;
1097			clocks = <&cpg CPG_MOD 523>;
1098			resets = <&cpg 523>;
1099			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1100			status = "disabled";
1101		};
1102
1103		pwm3: pwm@e6e33000 {
1104			compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1105			reg = <0 0xe6e33000 0 0x8>;
1106			#pwm-cells = <2>;
1107			clocks = <&cpg CPG_MOD 523>;
1108			resets = <&cpg 523>;
1109			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1110			status = "disabled";
1111		};
1112
1113		pwm4: pwm@e6e34000 {
1114			compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1115			reg = <0 0xe6e34000 0 0x8>;
1116			#pwm-cells = <2>;
1117			clocks = <&cpg CPG_MOD 523>;
1118			resets = <&cpg 523>;
1119			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1120			status = "disabled";
1121		};
1122
1123		pwm5: pwm@e6e35000 {
1124			compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1125			reg = <0 0xe6e35000 0 0x8>;
1126			#pwm-cells = <2>;
1127			clocks = <&cpg CPG_MOD 523>;
1128			resets = <&cpg 523>;
1129			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1130			status = "disabled";
1131		};
1132
1133		pwm6: pwm@e6e36000 {
1134			compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1135			reg = <0 0xe6e36000 0 0x8>;
1136			#pwm-cells = <2>;
1137			clocks = <&cpg CPG_MOD 523>;
1138			resets = <&cpg 523>;
1139			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1140			status = "disabled";
1141		};
1142
1143		scif0: serial@e6e60000 {
1144			compatible = "renesas,scif-r8a774b1",
1145				     "renesas,rcar-gen3-scif", "renesas,scif";
1146			reg = <0 0xe6e60000 0 0x40>;
1147			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1148			clocks = <&cpg CPG_MOD 207>,
1149				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1150				 <&scif_clk>;
1151			clock-names = "fck", "brg_int", "scif_clk";
1152			dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1153			       <&dmac2 0x51>, <&dmac2 0x50>;
1154			dma-names = "tx", "rx", "tx", "rx";
1155			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1156			resets = <&cpg 207>;
1157			status = "disabled";
1158		};
1159
1160		scif1: serial@e6e68000 {
1161			compatible = "renesas,scif-r8a774b1",
1162				     "renesas,rcar-gen3-scif", "renesas,scif";
1163			reg = <0 0xe6e68000 0 0x40>;
1164			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1165			clocks = <&cpg CPG_MOD 206>,
1166				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1167				 <&scif_clk>;
1168			clock-names = "fck", "brg_int", "scif_clk";
1169			dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1170			       <&dmac2 0x53>, <&dmac2 0x52>;
1171			dma-names = "tx", "rx", "tx", "rx";
1172			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1173			resets = <&cpg 206>;
1174			status = "disabled";
1175		};
1176
1177		scif2: serial@e6e88000 {
1178			compatible = "renesas,scif-r8a774b1",
1179				     "renesas,rcar-gen3-scif", "renesas,scif";
1180			reg = <0 0xe6e88000 0 0x40>;
1181			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1182			clocks = <&cpg CPG_MOD 310>,
1183				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1184				 <&scif_clk>;
1185			clock-names = "fck", "brg_int", "scif_clk";
1186			dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1187			       <&dmac2 0x13>, <&dmac2 0x12>;
1188			dma-names = "tx", "rx", "tx", "rx";
1189			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1190			resets = <&cpg 310>;
1191			status = "disabled";
1192		};
1193
1194		scif3: serial@e6c50000 {
1195			compatible = "renesas,scif-r8a774b1",
1196				     "renesas,rcar-gen3-scif", "renesas,scif";
1197			reg = <0 0xe6c50000 0 0x40>;
1198			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1199			clocks = <&cpg CPG_MOD 204>,
1200				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1201				 <&scif_clk>;
1202			clock-names = "fck", "brg_int", "scif_clk";
1203			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1204			dma-names = "tx", "rx";
1205			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1206			resets = <&cpg 204>;
1207			status = "disabled";
1208		};
1209
1210		scif4: serial@e6c40000 {
1211			compatible = "renesas,scif-r8a774b1",
1212				     "renesas,rcar-gen3-scif", "renesas,scif";
1213			reg = <0 0xe6c40000 0 0x40>;
1214			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1215			clocks = <&cpg CPG_MOD 203>,
1216				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1217				 <&scif_clk>;
1218			clock-names = "fck", "brg_int", "scif_clk";
1219			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1220			dma-names = "tx", "rx";
1221			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1222			resets = <&cpg 203>;
1223			status = "disabled";
1224		};
1225
1226		scif5: serial@e6f30000 {
1227			compatible = "renesas,scif-r8a774b1",
1228				     "renesas,rcar-gen3-scif", "renesas,scif";
1229			reg = <0 0xe6f30000 0 0x40>;
1230			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1231			clocks = <&cpg CPG_MOD 202>,
1232				 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1233				 <&scif_clk>;
1234			clock-names = "fck", "brg_int", "scif_clk";
1235			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1236			       <&dmac2 0x5b>, <&dmac2 0x5a>;
1237			dma-names = "tx", "rx", "tx", "rx";
1238			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1239			resets = <&cpg 202>;
1240			status = "disabled";
1241		};
1242
1243		msiof0: spi@e6e90000 {
1244			compatible = "renesas,msiof-r8a774b1",
1245				     "renesas,rcar-gen3-msiof";
1246			reg = <0 0xe6e90000 0 0x0064>;
1247			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1248			clocks = <&cpg CPG_MOD 211>;
1249			dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1250			       <&dmac2 0x41>, <&dmac2 0x40>;
1251			dma-names = "tx", "rx", "tx", "rx";
1252			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1253			resets = <&cpg 211>;
1254			#address-cells = <1>;
1255			#size-cells = <0>;
1256			status = "disabled";
1257		};
1258
1259		msiof1: spi@e6ea0000 {
1260			compatible = "renesas,msiof-r8a774b1",
1261				     "renesas,rcar-gen3-msiof";
1262			reg = <0 0xe6ea0000 0 0x0064>;
1263			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1264			clocks = <&cpg CPG_MOD 210>;
1265			dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1266			       <&dmac2 0x43>, <&dmac2 0x42>;
1267			dma-names = "tx", "rx", "tx", "rx";
1268			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1269			resets = <&cpg 210>;
1270			#address-cells = <1>;
1271			#size-cells = <0>;
1272			status = "disabled";
1273		};
1274
1275		msiof2: spi@e6c00000 {
1276			compatible = "renesas,msiof-r8a774b1",
1277				     "renesas,rcar-gen3-msiof";
1278			reg = <0 0xe6c00000 0 0x0064>;
1279			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1280			clocks = <&cpg CPG_MOD 209>;
1281			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1282			dma-names = "tx", "rx";
1283			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1284			resets = <&cpg 209>;
1285			#address-cells = <1>;
1286			#size-cells = <0>;
1287			status = "disabled";
1288		};
1289
1290		msiof3: spi@e6c10000 {
1291			compatible = "renesas,msiof-r8a774b1",
1292				     "renesas,rcar-gen3-msiof";
1293			reg = <0 0xe6c10000 0 0x0064>;
1294			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1295			clocks = <&cpg CPG_MOD 208>;
1296			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1297			dma-names = "tx", "rx";
1298			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1299			resets = <&cpg 208>;
1300			#address-cells = <1>;
1301			#size-cells = <0>;
1302			status = "disabled";
1303		};
1304
1305		vin0: video@e6ef0000 {
1306			compatible = "renesas,vin-r8a774b1";
1307			reg = <0 0xe6ef0000 0 0x1000>;
1308			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1309			clocks = <&cpg CPG_MOD 811>;
1310			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1311			resets = <&cpg 811>;
1312			renesas,id = <0>;
1313			status = "disabled";
1314
1315			ports {
1316				#address-cells = <1>;
1317				#size-cells = <0>;
1318
1319				port@1 {
1320					#address-cells = <1>;
1321					#size-cells = <0>;
1322
1323					reg = <1>;
1324
1325					vin0csi20: endpoint@0 {
1326						reg = <0>;
1327						remote-endpoint = <&csi20vin0>;
1328					};
1329					vin0csi40: endpoint@2 {
1330						reg = <2>;
1331						remote-endpoint = <&csi40vin0>;
1332					};
1333				};
1334			};
1335		};
1336
1337		vin1: video@e6ef1000 {
1338			compatible = "renesas,vin-r8a774b1";
1339			reg = <0 0xe6ef1000 0 0x1000>;
1340			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1341			clocks = <&cpg CPG_MOD 810>;
1342			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1343			resets = <&cpg 810>;
1344			renesas,id = <1>;
1345			status = "disabled";
1346
1347			ports {
1348				#address-cells = <1>;
1349				#size-cells = <0>;
1350
1351				port@1 {
1352					#address-cells = <1>;
1353					#size-cells = <0>;
1354
1355					reg = <1>;
1356
1357					vin1csi20: endpoint@0 {
1358						reg = <0>;
1359						remote-endpoint = <&csi20vin1>;
1360					};
1361					vin1csi40: endpoint@2 {
1362						reg = <2>;
1363						remote-endpoint = <&csi40vin1>;
1364					};
1365				};
1366			};
1367		};
1368
1369		vin2: video@e6ef2000 {
1370			compatible = "renesas,vin-r8a774b1";
1371			reg = <0 0xe6ef2000 0 0x1000>;
1372			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1373			clocks = <&cpg CPG_MOD 809>;
1374			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1375			resets = <&cpg 809>;
1376			renesas,id = <2>;
1377			status = "disabled";
1378
1379			ports {
1380				#address-cells = <1>;
1381				#size-cells = <0>;
1382
1383				port@1 {
1384					#address-cells = <1>;
1385					#size-cells = <0>;
1386
1387					reg = <1>;
1388
1389					vin2csi20: endpoint@0 {
1390						reg = <0>;
1391						remote-endpoint = <&csi20vin2>;
1392					};
1393					vin2csi40: endpoint@2 {
1394						reg = <2>;
1395						remote-endpoint = <&csi40vin2>;
1396					};
1397				};
1398			};
1399		};
1400
1401		vin3: video@e6ef3000 {
1402			compatible = "renesas,vin-r8a774b1";
1403			reg = <0 0xe6ef3000 0 0x1000>;
1404			interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1405			clocks = <&cpg CPG_MOD 808>;
1406			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1407			resets = <&cpg 808>;
1408			renesas,id = <3>;
1409			status = "disabled";
1410
1411			ports {
1412				#address-cells = <1>;
1413				#size-cells = <0>;
1414
1415				port@1 {
1416					#address-cells = <1>;
1417					#size-cells = <0>;
1418
1419					reg = <1>;
1420
1421					vin3csi20: endpoint@0 {
1422						reg = <0>;
1423						remote-endpoint = <&csi20vin3>;
1424					};
1425					vin3csi40: endpoint@2 {
1426						reg = <2>;
1427						remote-endpoint = <&csi40vin3>;
1428					};
1429				};
1430			};
1431		};
1432
1433		vin4: video@e6ef4000 {
1434			compatible = "renesas,vin-r8a774b1";
1435			reg = <0 0xe6ef4000 0 0x1000>;
1436			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1437			clocks = <&cpg CPG_MOD 807>;
1438			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1439			resets = <&cpg 807>;
1440			renesas,id = <4>;
1441			status = "disabled";
1442
1443			ports {
1444				#address-cells = <1>;
1445				#size-cells = <0>;
1446
1447				port@1 {
1448					#address-cells = <1>;
1449					#size-cells = <0>;
1450
1451					reg = <1>;
1452
1453					vin4csi20: endpoint@0 {
1454						reg = <0>;
1455						remote-endpoint = <&csi20vin4>;
1456					};
1457					vin4csi40: endpoint@2 {
1458						reg = <2>;
1459						remote-endpoint = <&csi40vin4>;
1460					};
1461				};
1462			};
1463		};
1464
1465		vin5: video@e6ef5000 {
1466			compatible = "renesas,vin-r8a774b1";
1467			reg = <0 0xe6ef5000 0 0x1000>;
1468			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1469			clocks = <&cpg CPG_MOD 806>;
1470			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1471			resets = <&cpg 806>;
1472			renesas,id = <5>;
1473			status = "disabled";
1474
1475			ports {
1476				#address-cells = <1>;
1477				#size-cells = <0>;
1478
1479				port@1 {
1480					#address-cells = <1>;
1481					#size-cells = <0>;
1482
1483					reg = <1>;
1484
1485					vin5csi20: endpoint@0 {
1486						reg = <0>;
1487						remote-endpoint = <&csi20vin5>;
1488					};
1489					vin5csi40: endpoint@2 {
1490						reg = <2>;
1491						remote-endpoint = <&csi40vin5>;
1492					};
1493				};
1494			};
1495		};
1496
1497		vin6: video@e6ef6000 {
1498			compatible = "renesas,vin-r8a774b1";
1499			reg = <0 0xe6ef6000 0 0x1000>;
1500			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1501			clocks = <&cpg CPG_MOD 805>;
1502			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1503			resets = <&cpg 805>;
1504			renesas,id = <6>;
1505			status = "disabled";
1506
1507			ports {
1508				#address-cells = <1>;
1509				#size-cells = <0>;
1510
1511				port@1 {
1512					#address-cells = <1>;
1513					#size-cells = <0>;
1514
1515					reg = <1>;
1516
1517					vin6csi20: endpoint@0 {
1518						reg = <0>;
1519						remote-endpoint = <&csi20vin6>;
1520					};
1521					vin6csi40: endpoint@2 {
1522						reg = <2>;
1523						remote-endpoint = <&csi40vin6>;
1524					};
1525				};
1526			};
1527		};
1528
1529		vin7: video@e6ef7000 {
1530			compatible = "renesas,vin-r8a774b1";
1531			reg = <0 0xe6ef7000 0 0x1000>;
1532			interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1533			clocks = <&cpg CPG_MOD 804>;
1534			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1535			resets = <&cpg 804>;
1536			renesas,id = <7>;
1537			status = "disabled";
1538
1539			ports {
1540				#address-cells = <1>;
1541				#size-cells = <0>;
1542
1543				port@1 {
1544					#address-cells = <1>;
1545					#size-cells = <0>;
1546
1547					reg = <1>;
1548
1549					vin7csi20: endpoint@0 {
1550						reg = <0>;
1551						remote-endpoint = <&csi20vin7>;
1552					};
1553					vin7csi40: endpoint@2 {
1554						reg = <2>;
1555						remote-endpoint = <&csi40vin7>;
1556					};
1557				};
1558			};
1559		};
1560
1561		rcar_sound: sound@ec500000 {
1562			/*
1563			 * #sound-dai-cells is required
1564			 *
1565			 * Single DAI : #sound-dai-cells = <0>;	<&rcar_sound>;
1566			 * Multi  DAI : #sound-dai-cells = <1>;	<&rcar_sound N>;
1567			 */
1568			/*
1569			 * #clock-cells is required for audio_clkout0/1/2/3
1570			 *
1571			 * clkout	: #clock-cells = <0>;	<&rcar_sound>;
1572			 * clkout0/1/2/3: #clock-cells = <1>;	<&rcar_sound N>;
1573			 */
1574			compatible =  "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3";
1575			reg = <0 0xec500000 0 0x1000>, /* SCU */
1576			      <0 0xec5a0000 0 0x100>,  /* ADG */
1577			      <0 0xec540000 0 0x1000>, /* SSIU */
1578			      <0 0xec541000 0 0x280>,  /* SSI */
1579			      <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1580			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1581
1582			clocks = <&cpg CPG_MOD 1005>,
1583				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1584				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1585				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1586				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1587				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1588				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1589				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1590				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1591				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1592				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1593				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1594				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1595				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1596				 <&audio_clk_a>, <&audio_clk_b>,
1597				 <&audio_clk_c>,
1598				 <&cpg CPG_CORE R8A774B1_CLK_S0D4>;
1599			clock-names = "ssi-all",
1600				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1601				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1602				      "ssi.1", "ssi.0",
1603				      "src.9", "src.8", "src.7", "src.6",
1604				      "src.5", "src.4", "src.3", "src.2",
1605				      "src.1", "src.0",
1606				      "mix.1", "mix.0",
1607				      "ctu.1", "ctu.0",
1608				      "dvc.0", "dvc.1",
1609				      "clk_a", "clk_b", "clk_c", "clk_i";
1610			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1611			resets = <&cpg 1005>,
1612				 <&cpg 1006>, <&cpg 1007>,
1613				 <&cpg 1008>, <&cpg 1009>,
1614				 <&cpg 1010>, <&cpg 1011>,
1615				 <&cpg 1012>, <&cpg 1013>,
1616				 <&cpg 1014>, <&cpg 1015>;
1617			reset-names = "ssi-all",
1618				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1619				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1620				      "ssi.1", "ssi.0";
1621			status = "disabled";
1622
1623			rcar_sound,ctu {
1624				ctu00: ctu-0 { };
1625				ctu01: ctu-1 { };
1626				ctu02: ctu-2 { };
1627				ctu03: ctu-3 { };
1628				ctu10: ctu-4 { };
1629				ctu11: ctu-5 { };
1630				ctu12: ctu-6 { };
1631				ctu13: ctu-7 { };
1632			};
1633
1634			rcar_sound,dvc {
1635				dvc0: dvc-0 {
1636					dmas = <&audma1 0xbc>;
1637					dma-names = "tx";
1638				};
1639				dvc1: dvc-1 {
1640					dmas = <&audma1 0xbe>;
1641					dma-names = "tx";
1642				};
1643			};
1644
1645			rcar_sound,mix {
1646				mix0: mix-0 { };
1647				mix1: mix-1 { };
1648			};
1649
1650			rcar_sound,src {
1651				src0: src-0 {
1652					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1653					dmas = <&audma0 0x85>, <&audma1 0x9a>;
1654					dma-names = "rx", "tx";
1655				};
1656				src1: src-1 {
1657					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1658					dmas = <&audma0 0x87>, <&audma1 0x9c>;
1659					dma-names = "rx", "tx";
1660				};
1661				src2: src-2 {
1662					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1663					dmas = <&audma0 0x89>, <&audma1 0x9e>;
1664					dma-names = "rx", "tx";
1665				};
1666				src3: src-3 {
1667					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1668					dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1669					dma-names = "rx", "tx";
1670				};
1671				src4: src-4 {
1672					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1673					dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1674					dma-names = "rx", "tx";
1675				};
1676				src5: src-5 {
1677					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1678					dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1679					dma-names = "rx", "tx";
1680				};
1681				src6: src-6 {
1682					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1683					dmas = <&audma0 0x91>, <&audma1 0xb4>;
1684					dma-names = "rx", "tx";
1685				};
1686				src7: src-7 {
1687					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1688					dmas = <&audma0 0x93>, <&audma1 0xb6>;
1689					dma-names = "rx", "tx";
1690				};
1691				src8: src-8 {
1692					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1693					dmas = <&audma0 0x95>, <&audma1 0xb8>;
1694					dma-names = "rx", "tx";
1695				};
1696				src9: src-9 {
1697					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1698					dmas = <&audma0 0x97>, <&audma1 0xba>;
1699					dma-names = "rx", "tx";
1700				};
1701			};
1702
1703			rcar_sound,ssi {
1704				ssi0: ssi-0 {
1705					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1706					dmas = <&audma0 0x01>, <&audma1 0x02>;
1707					dma-names = "rx", "tx";
1708				};
1709				ssi1: ssi-1 {
1710					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1711					dmas = <&audma0 0x03>, <&audma1 0x04>;
1712					dma-names = "rx", "tx";
1713				};
1714				ssi2: ssi-2 {
1715					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1716					dmas = <&audma0 0x05>, <&audma1 0x06>;
1717					dma-names = "rx", "tx";
1718				};
1719				ssi3: ssi-3 {
1720					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1721					dmas = <&audma0 0x07>, <&audma1 0x08>;
1722					dma-names = "rx", "tx";
1723				};
1724				ssi4: ssi-4 {
1725					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1726					dmas = <&audma0 0x09>, <&audma1 0x0a>;
1727					dma-names = "rx", "tx";
1728				};
1729				ssi5: ssi-5 {
1730					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1731					dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1732					dma-names = "rx", "tx";
1733				};
1734				ssi6: ssi-6 {
1735					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1736					dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1737					dma-names = "rx", "tx";
1738				};
1739				ssi7: ssi-7 {
1740					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1741					dmas = <&audma0 0x0f>, <&audma1 0x10>;
1742					dma-names = "rx", "tx";
1743				};
1744				ssi8: ssi-8 {
1745					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1746					dmas = <&audma0 0x11>, <&audma1 0x12>;
1747					dma-names = "rx", "tx";
1748				};
1749				ssi9: ssi-9 {
1750					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1751					dmas = <&audma0 0x13>, <&audma1 0x14>;
1752					dma-names = "rx", "tx";
1753				};
1754			};
1755
1756			rcar_sound,ssiu {
1757				ssiu00: ssiu-0 {
1758					dmas = <&audma0 0x15>, <&audma1 0x16>;
1759					dma-names = "rx", "tx";
1760				};
1761				ssiu01: ssiu-1 {
1762					dmas = <&audma0 0x35>, <&audma1 0x36>;
1763					dma-names = "rx", "tx";
1764				};
1765				ssiu02: ssiu-2 {
1766					dmas = <&audma0 0x37>, <&audma1 0x38>;
1767					dma-names = "rx", "tx";
1768				};
1769				ssiu03: ssiu-3 {
1770					dmas = <&audma0 0x47>, <&audma1 0x48>;
1771					dma-names = "rx", "tx";
1772				};
1773				ssiu04: ssiu-4 {
1774					dmas = <&audma0 0x3F>, <&audma1 0x40>;
1775					dma-names = "rx", "tx";
1776				};
1777				ssiu05: ssiu-5 {
1778					dmas = <&audma0 0x43>, <&audma1 0x44>;
1779					dma-names = "rx", "tx";
1780				};
1781				ssiu06: ssiu-6 {
1782					dmas = <&audma0 0x4F>, <&audma1 0x50>;
1783					dma-names = "rx", "tx";
1784				};
1785				ssiu07: ssiu-7 {
1786					dmas = <&audma0 0x53>, <&audma1 0x54>;
1787					dma-names = "rx", "tx";
1788				};
1789				ssiu10: ssiu-8 {
1790					dmas = <&audma0 0x49>, <&audma1 0x4a>;
1791					dma-names = "rx", "tx";
1792				};
1793				ssiu11: ssiu-9 {
1794					dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1795					dma-names = "rx", "tx";
1796				};
1797				ssiu12: ssiu-10 {
1798					dmas = <&audma0 0x57>, <&audma1 0x58>;
1799					dma-names = "rx", "tx";
1800				};
1801				ssiu13: ssiu-11 {
1802					dmas = <&audma0 0x59>, <&audma1 0x5A>;
1803					dma-names = "rx", "tx";
1804				};
1805				ssiu14: ssiu-12 {
1806					dmas = <&audma0 0x5F>, <&audma1 0x60>;
1807					dma-names = "rx", "tx";
1808				};
1809				ssiu15: ssiu-13 {
1810					dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1811					dma-names = "rx", "tx";
1812				};
1813				ssiu16: ssiu-14 {
1814					dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1815					dma-names = "rx", "tx";
1816				};
1817				ssiu17: ssiu-15 {
1818					dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1819					dma-names = "rx", "tx";
1820				};
1821				ssiu20: ssiu-16 {
1822					dmas = <&audma0 0x63>, <&audma1 0x64>;
1823					dma-names = "rx", "tx";
1824				};
1825				ssiu21: ssiu-17 {
1826					dmas = <&audma0 0x67>, <&audma1 0x68>;
1827					dma-names = "rx", "tx";
1828				};
1829				ssiu22: ssiu-18 {
1830					dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1831					dma-names = "rx", "tx";
1832				};
1833				ssiu23: ssiu-19 {
1834					dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1835					dma-names = "rx", "tx";
1836				};
1837				ssiu24: ssiu-20 {
1838					dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1839					dma-names = "rx", "tx";
1840				};
1841				ssiu25: ssiu-21 {
1842					dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1843					dma-names = "rx", "tx";
1844				};
1845				ssiu26: ssiu-22 {
1846					dmas = <&audma0 0xED>, <&audma1 0xEE>;
1847					dma-names = "rx", "tx";
1848				};
1849				ssiu27: ssiu-23 {
1850					dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1851					dma-names = "rx", "tx";
1852				};
1853				ssiu30: ssiu-24 {
1854					dmas = <&audma0 0x6f>, <&audma1 0x70>;
1855					dma-names = "rx", "tx";
1856				};
1857				ssiu31: ssiu-25 {
1858					dmas = <&audma0 0x21>, <&audma1 0x22>;
1859					dma-names = "rx", "tx";
1860				};
1861				ssiu32: ssiu-26 {
1862					dmas = <&audma0 0x23>, <&audma1 0x24>;
1863					dma-names = "rx", "tx";
1864				};
1865				ssiu33: ssiu-27 {
1866					dmas = <&audma0 0x25>, <&audma1 0x26>;
1867					dma-names = "rx", "tx";
1868				};
1869				ssiu34: ssiu-28 {
1870					dmas = <&audma0 0x27>, <&audma1 0x28>;
1871					dma-names = "rx", "tx";
1872				};
1873				ssiu35: ssiu-29 {
1874					dmas = <&audma0 0x29>, <&audma1 0x2A>;
1875					dma-names = "rx", "tx";
1876				};
1877				ssiu36: ssiu-30 {
1878					dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1879					dma-names = "rx", "tx";
1880				};
1881				ssiu37: ssiu-31 {
1882					dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1883					dma-names = "rx", "tx";
1884				};
1885				ssiu40: ssiu-32 {
1886					dmas =	<&audma0 0x71>, <&audma1 0x72>;
1887					dma-names = "rx", "tx";
1888				};
1889				ssiu41: ssiu-33 {
1890					dmas = <&audma0 0x17>, <&audma1 0x18>;
1891					dma-names = "rx", "tx";
1892				};
1893				ssiu42: ssiu-34 {
1894					dmas = <&audma0 0x19>, <&audma1 0x1A>;
1895					dma-names = "rx", "tx";
1896				};
1897				ssiu43: ssiu-35 {
1898					dmas = <&audma0 0x1B>, <&audma1 0x1C>;
1899					dma-names = "rx", "tx";
1900				};
1901				ssiu44: ssiu-36 {
1902					dmas = <&audma0 0x1D>, <&audma1 0x1E>;
1903					dma-names = "rx", "tx";
1904				};
1905				ssiu45: ssiu-37 {
1906					dmas = <&audma0 0x1F>, <&audma1 0x20>;
1907					dma-names = "rx", "tx";
1908				};
1909				ssiu46: ssiu-38 {
1910					dmas = <&audma0 0x31>, <&audma1 0x32>;
1911					dma-names = "rx", "tx";
1912				};
1913				ssiu47: ssiu-39 {
1914					dmas = <&audma0 0x33>, <&audma1 0x34>;
1915					dma-names = "rx", "tx";
1916				};
1917				ssiu50: ssiu-40 {
1918					dmas = <&audma0 0x73>, <&audma1 0x74>;
1919					dma-names = "rx", "tx";
1920				};
1921				ssiu60: ssiu-41 {
1922					dmas = <&audma0 0x75>, <&audma1 0x76>;
1923					dma-names = "rx", "tx";
1924				};
1925				ssiu70: ssiu-42 {
1926					dmas = <&audma0 0x79>, <&audma1 0x7a>;
1927					dma-names = "rx", "tx";
1928				};
1929				ssiu80: ssiu-43 {
1930					dmas = <&audma0 0x7b>, <&audma1 0x7c>;
1931					dma-names = "rx", "tx";
1932				};
1933				ssiu90: ssiu-44 {
1934					dmas = <&audma0 0x7d>, <&audma1 0x7e>;
1935					dma-names = "rx", "tx";
1936				};
1937				ssiu91: ssiu-45 {
1938					dmas = <&audma0 0x7F>, <&audma1 0x80>;
1939					dma-names = "rx", "tx";
1940				};
1941				ssiu92: ssiu-46 {
1942					dmas = <&audma0 0x81>, <&audma1 0x82>;
1943					dma-names = "rx", "tx";
1944				};
1945				ssiu93: ssiu-47 {
1946					dmas = <&audma0 0x83>, <&audma1 0x84>;
1947					dma-names = "rx", "tx";
1948				};
1949				ssiu94: ssiu-48 {
1950					dmas = <&audma0 0xA3>, <&audma1 0xA4>;
1951					dma-names = "rx", "tx";
1952				};
1953				ssiu95: ssiu-49 {
1954					dmas = <&audma0 0xA5>, <&audma1 0xA6>;
1955					dma-names = "rx", "tx";
1956				};
1957				ssiu96: ssiu-50 {
1958					dmas = <&audma0 0xA7>, <&audma1 0xA8>;
1959					dma-names = "rx", "tx";
1960				};
1961				ssiu97: ssiu-51 {
1962					dmas = <&audma0 0xA9>, <&audma1 0xAA>;
1963					dma-names = "rx", "tx";
1964				};
1965			};
1966		};
1967
1968		audma0: dma-controller@ec700000 {
1969			compatible = "renesas,dmac-r8a774b1",
1970				     "renesas,rcar-dmac";
1971			reg = <0 0xec700000 0 0x10000>;
1972			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1973				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1974				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1975				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1976				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1977				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1978				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1979				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1980				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1981				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1982				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1983				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1984				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1985				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1986				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1987				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1988				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1989			interrupt-names = "error",
1990					"ch0", "ch1", "ch2", "ch3",
1991					"ch4", "ch5", "ch6", "ch7",
1992					"ch8", "ch9", "ch10", "ch11",
1993					"ch12", "ch13", "ch14", "ch15";
1994			clocks = <&cpg CPG_MOD 502>;
1995			clock-names = "fck";
1996			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1997			resets = <&cpg 502>;
1998			#dma-cells = <1>;
1999			dma-channels = <16>;
2000		};
2001
2002		audma1: dma-controller@ec720000 {
2003			compatible = "renesas,dmac-r8a774b1",
2004				     "renesas,rcar-dmac";
2005			reg = <0 0xec720000 0 0x10000>;
2006			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2007				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2008				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2009				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2010				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2011				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2012				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2013				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2014				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2015				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2016				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2017				     <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2018				     <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2019				     <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2020				     <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2021				     <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2022				     <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2023			interrupt-names = "error",
2024					"ch0", "ch1", "ch2", "ch3",
2025					"ch4", "ch5", "ch6", "ch7",
2026					"ch8", "ch9", "ch10", "ch11",
2027					"ch12", "ch13", "ch14", "ch15";
2028			clocks = <&cpg CPG_MOD 501>;
2029			clock-names = "fck";
2030			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2031			resets = <&cpg 501>;
2032			#dma-cells = <1>;
2033			dma-channels = <16>;
2034		};
2035
2036		xhci0: usb@ee000000 {
2037			compatible = "renesas,xhci-r8a774b1",
2038				     "renesas,rcar-gen3-xhci";
2039			reg = <0 0xee000000 0 0xc00>;
2040			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2041			clocks = <&cpg CPG_MOD 328>;
2042			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2043			resets = <&cpg 328>;
2044			status = "disabled";
2045		};
2046
2047		usb3_peri0: usb@ee020000 {
2048			compatible = "renesas,r8a774b1-usb3-peri",
2049				     "renesas,rcar-gen3-usb3-peri";
2050			reg = <0 0xee020000 0 0x400>;
2051			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2052			clocks = <&cpg CPG_MOD 328>;
2053			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2054			resets = <&cpg 328>;
2055			status = "disabled";
2056		};
2057
2058		ohci0: usb@ee080000 {
2059			compatible = "generic-ohci";
2060			reg = <0 0xee080000 0 0x100>;
2061			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2062			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2063			phys = <&usb2_phy0 1>;
2064			phy-names = "usb";
2065			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2066			resets = <&cpg 703>, <&cpg 704>;
2067			status = "disabled";
2068		};
2069
2070		ohci1: usb@ee0a0000 {
2071			compatible = "generic-ohci";
2072			reg = <0 0xee0a0000 0 0x100>;
2073			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2074			clocks = <&cpg CPG_MOD 702>;
2075			phys = <&usb2_phy1 1>;
2076			phy-names = "usb";
2077			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2078			resets = <&cpg 702>;
2079			status = "disabled";
2080		};
2081
2082		ehci0: usb@ee080100 {
2083			compatible = "generic-ehci";
2084			reg = <0 0xee080100 0 0x100>;
2085			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2086			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2087			phys = <&usb2_phy0 2>;
2088			phy-names = "usb";
2089			companion = <&ohci0>;
2090			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2091			resets = <&cpg 703>, <&cpg 704>;
2092			status = "disabled";
2093		};
2094
2095		ehci1: usb@ee0a0100 {
2096			compatible = "generic-ehci";
2097			reg = <0 0xee0a0100 0 0x100>;
2098			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2099			clocks = <&cpg CPG_MOD 702>;
2100			phys = <&usb2_phy1 2>;
2101			phy-names = "usb";
2102			companion = <&ohci1>;
2103			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2104			resets = <&cpg 702>;
2105			status = "disabled";
2106		};
2107
2108		usb2_phy0: usb-phy@ee080200 {
2109			compatible = "renesas,usb2-phy-r8a774b1",
2110				     "renesas,rcar-gen3-usb2-phy";
2111			reg = <0 0xee080200 0 0x700>;
2112			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2113			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2114			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2115			resets = <&cpg 703>, <&cpg 704>;
2116			#phy-cells = <1>;
2117			status = "disabled";
2118		};
2119
2120		usb2_phy1: usb-phy@ee0a0200 {
2121			compatible = "renesas,usb2-phy-r8a774b1",
2122				     "renesas,rcar-gen3-usb2-phy";
2123			reg = <0 0xee0a0200 0 0x700>;
2124			clocks = <&cpg CPG_MOD 702>;
2125			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2126			resets = <&cpg 702>;
2127			#phy-cells = <1>;
2128			status = "disabled";
2129		};
2130
2131		sdhi0: mmc@ee100000 {
2132			compatible = "renesas,sdhi-r8a774b1",
2133				     "renesas,rcar-gen3-sdhi";
2134			reg = <0 0xee100000 0 0x2000>;
2135			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2136			clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774B1_CLK_SD0H>;
2137			clock-names = "core", "clkh";
2138			max-frequency = <200000000>;
2139			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2140			resets = <&cpg 314>;
2141			status = "disabled";
2142		};
2143
2144		sdhi1: mmc@ee120000 {
2145			compatible = "renesas,sdhi-r8a774b1",
2146				     "renesas,rcar-gen3-sdhi";
2147			reg = <0 0xee120000 0 0x2000>;
2148			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2149			clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774B1_CLK_SD1H>;
2150			clock-names = "core", "clkh";
2151			max-frequency = <200000000>;
2152			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2153			resets = <&cpg 313>;
2154			status = "disabled";
2155		};
2156
2157		sdhi2: mmc@ee140000 {
2158			compatible = "renesas,sdhi-r8a774b1",
2159				     "renesas,rcar-gen3-sdhi";
2160			reg = <0 0xee140000 0 0x2000>;
2161			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2162			clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774B1_CLK_SD2H>;
2163			clock-names = "core", "clkh";
2164			max-frequency = <200000000>;
2165			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2166			resets = <&cpg 312>;
2167			status = "disabled";
2168		};
2169
2170		sdhi3: mmc@ee160000 {
2171			compatible = "renesas,sdhi-r8a774b1",
2172				     "renesas,rcar-gen3-sdhi";
2173			reg = <0 0xee160000 0 0x2000>;
2174			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2175			clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774B1_CLK_SD3H>;
2176			clock-names = "core", "clkh";
2177			max-frequency = <200000000>;
2178			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2179			resets = <&cpg 311>;
2180			status = "disabled";
2181		};
2182
2183		rpc: spi@ee200000 {
2184			compatible = "renesas,r8a774b1-rpc-if",
2185				     "renesas,rcar-gen3-rpc-if";
2186			reg = <0 0xee200000 0 0x200>,
2187			      <0 0x08000000 0 0x4000000>,
2188			      <0 0xee208000 0 0x100>;
2189			reg-names = "regs", "dirmap", "wbuf";
2190			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2191			clocks = <&cpg CPG_MOD 917>;
2192			clock-names = "rpc";
2193			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2194			resets = <&cpg 917>;
2195			#address-cells = <1>;
2196			#size-cells = <0>;
2197			status = "disabled";
2198		};
2199
2200		sata: sata@ee300000 {
2201			compatible = "renesas,sata-r8a774b1",
2202				     "renesas,rcar-gen3-sata";
2203			reg = <0 0xee300000 0 0x200000>;
2204			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2205			clocks = <&cpg CPG_MOD 815>;
2206			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2207			resets = <&cpg 815>;
2208			status = "disabled";
2209		};
2210
2211		gic: interrupt-controller@f1010000 {
2212			compatible = "arm,gic-400";
2213			#interrupt-cells = <3>;
2214			#address-cells = <0>;
2215			interrupt-controller;
2216			reg = <0x0 0xf1010000 0 0x1000>,
2217			      <0x0 0xf1020000 0 0x20000>,
2218			      <0x0 0xf1040000 0 0x20000>,
2219			      <0x0 0xf1060000 0 0x20000>;
2220			interrupts = <GIC_PPI 9
2221					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2222			clocks = <&cpg CPG_MOD 408>;
2223			clock-names = "clk";
2224			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2225			resets = <&cpg 408>;
2226		};
2227
2228		pciec0: pcie@fe000000 {
2229			compatible = "renesas,pcie-r8a774b1",
2230				     "renesas,pcie-rcar-gen3";
2231			reg = <0 0xfe000000 0 0x80000>;
2232			#address-cells = <3>;
2233			#size-cells = <2>;
2234			bus-range = <0x00 0xff>;
2235			device_type = "pci";
2236			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2237				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2238				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2239				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2240			/* Map all possible DDR as inbound ranges */
2241			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2242			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2243				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2244				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2245			#interrupt-cells = <1>;
2246			interrupt-map-mask = <0 0 0 0>;
2247			interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2248			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2249			clock-names = "pcie", "pcie_bus";
2250			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2251			resets = <&cpg 319>;
2252			status = "disabled";
2253		};
2254
2255		pciec1: pcie@ee800000 {
2256			compatible = "renesas,pcie-r8a774b1",
2257				     "renesas,pcie-rcar-gen3";
2258			reg = <0 0xee800000 0 0x80000>;
2259			#address-cells = <3>;
2260			#size-cells = <2>;
2261			bus-range = <0x00 0xff>;
2262			device_type = "pci";
2263			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2264				 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2265				 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2266				 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2267			/* Map all possible DDR as inbound ranges */
2268			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2269			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2270				     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2271				     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2272			#interrupt-cells = <1>;
2273			interrupt-map-mask = <0 0 0 0>;
2274			interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2275			clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2276			clock-names = "pcie", "pcie_bus";
2277			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2278			resets = <&cpg 318>;
2279			status = "disabled";
2280		};
2281
2282		pciec0_ep: pcie-ep@fe000000 {
2283			compatible = "renesas,r8a774b1-pcie-ep",
2284				     "renesas,rcar-gen3-pcie-ep";
2285			reg = <0x0 0xfe000000 0 0x80000>,
2286			      <0x0 0xfe100000 0 0x100000>,
2287			      <0x0 0xfe200000 0 0x200000>,
2288			      <0x0 0x30000000 0 0x8000000>,
2289			      <0x0 0x38000000 0 0x8000000>;
2290			reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2291			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2292				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2293				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2294			clocks = <&cpg CPG_MOD 319>;
2295			clock-names = "pcie";
2296			resets = <&cpg 319>;
2297			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2298			status = "disabled";
2299		};
2300
2301		pciec1_ep: pcie-ep@ee800000 {
2302			compatible = "renesas,r8a774b1-pcie-ep",
2303				     "renesas,rcar-gen3-pcie-ep";
2304			reg = <0x0 0xee800000 0 0x80000>,
2305			      <0x0 0xee900000 0 0x100000>,
2306			      <0x0 0xeea00000 0 0x200000>,
2307			      <0x0 0xc0000000 0 0x8000000>,
2308			      <0x0 0xc8000000 0 0x8000000>;
2309			reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2310			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2311				     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2312				     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2313			clocks = <&cpg CPG_MOD 318>;
2314			clock-names = "pcie";
2315			resets = <&cpg 318>;
2316			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2317			status = "disabled";
2318		};
2319
2320		fdp1@fe940000 {
2321			compatible = "renesas,fdp1";
2322			reg = <0 0xfe940000 0 0x2400>;
2323			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2324			clocks = <&cpg CPG_MOD 119>;
2325			power-domains = <&sysc R8A774B1_PD_A3VP>;
2326			resets = <&cpg 119>;
2327			renesas,fcp = <&fcpf0>;
2328		};
2329
2330		fcpf0: fcp@fe950000 {
2331			compatible = "renesas,fcpf";
2332			reg = <0 0xfe950000 0 0x200>;
2333			clocks = <&cpg CPG_MOD 615>;
2334			power-domains = <&sysc R8A774B1_PD_A3VP>;
2335			resets = <&cpg 615>;
2336		};
2337
2338		vspb: vsp@fe960000 {
2339			compatible = "renesas,vsp2";
2340			reg = <0 0xfe960000 0 0x8000>;
2341			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2342			clocks = <&cpg CPG_MOD 626>;
2343			power-domains = <&sysc R8A774B1_PD_A3VP>;
2344			resets = <&cpg 626>;
2345
2346			renesas,fcp = <&fcpvb0>;
2347		};
2348
2349		vspi0: vsp@fe9a0000 {
2350			compatible = "renesas,vsp2";
2351			reg = <0 0xfe9a0000 0 0x8000>;
2352			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2353			clocks = <&cpg CPG_MOD 631>;
2354			power-domains = <&sysc R8A774B1_PD_A3VP>;
2355			resets = <&cpg 631>;
2356
2357			renesas,fcp = <&fcpvi0>;
2358		};
2359
2360		vspd0: vsp@fea20000 {
2361			compatible = "renesas,vsp2";
2362			reg = <0 0xfea20000 0 0x5000>;
2363			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2364			clocks = <&cpg CPG_MOD 623>;
2365			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2366			resets = <&cpg 623>;
2367
2368			renesas,fcp = <&fcpvd0>;
2369		};
2370
2371		vspd1: vsp@fea28000 {
2372			compatible = "renesas,vsp2";
2373			reg = <0 0xfea28000 0 0x5000>;
2374			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2375			clocks = <&cpg CPG_MOD 622>;
2376			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2377			resets = <&cpg 622>;
2378
2379			renesas,fcp = <&fcpvd1>;
2380		};
2381
2382		fcpvb0: fcp@fe96f000 {
2383			compatible = "renesas,fcpv";
2384			reg = <0 0xfe96f000 0 0x200>;
2385			clocks = <&cpg CPG_MOD 607>;
2386			power-domains = <&sysc R8A774B1_PD_A3VP>;
2387			resets = <&cpg 607>;
2388		};
2389
2390		fcpvd0: fcp@fea27000 {
2391			compatible = "renesas,fcpv";
2392			reg = <0 0xfea27000 0 0x200>;
2393			clocks = <&cpg CPG_MOD 603>;
2394			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2395			resets = <&cpg 603>;
2396		};
2397
2398		fcpvd1: fcp@fea2f000 {
2399			compatible = "renesas,fcpv";
2400			reg = <0 0xfea2f000 0 0x200>;
2401			clocks = <&cpg CPG_MOD 602>;
2402			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2403			resets = <&cpg 602>;
2404		};
2405
2406		fcpvi0: fcp@fe9af000 {
2407			compatible = "renesas,fcpv";
2408			reg = <0 0xfe9af000 0 0x200>;
2409			clocks = <&cpg CPG_MOD 611>;
2410			power-domains = <&sysc R8A774B1_PD_A3VP>;
2411			resets = <&cpg 611>;
2412		};
2413
2414		csi20: csi2@fea80000 {
2415			compatible = "renesas,r8a774b1-csi2";
2416			reg = <0 0xfea80000 0 0x10000>;
2417			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2418			clocks = <&cpg CPG_MOD 714>;
2419			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2420			resets = <&cpg 714>;
2421			status = "disabled";
2422
2423			ports {
2424				#address-cells = <1>;
2425				#size-cells = <0>;
2426
2427				port@0 {
2428					reg = <0>;
2429				};
2430
2431				port@1 {
2432					#address-cells = <1>;
2433					#size-cells = <0>;
2434
2435					reg = <1>;
2436
2437					csi20vin0: endpoint@0 {
2438						reg = <0>;
2439						remote-endpoint = <&vin0csi20>;
2440					};
2441					csi20vin1: endpoint@1 {
2442						reg = <1>;
2443						remote-endpoint = <&vin1csi20>;
2444					};
2445					csi20vin2: endpoint@2 {
2446						reg = <2>;
2447						remote-endpoint = <&vin2csi20>;
2448					};
2449					csi20vin3: endpoint@3 {
2450						reg = <3>;
2451						remote-endpoint = <&vin3csi20>;
2452					};
2453					csi20vin4: endpoint@4 {
2454						reg = <4>;
2455						remote-endpoint = <&vin4csi20>;
2456					};
2457					csi20vin5: endpoint@5 {
2458						reg = <5>;
2459						remote-endpoint = <&vin5csi20>;
2460					};
2461					csi20vin6: endpoint@6 {
2462						reg = <6>;
2463						remote-endpoint = <&vin6csi20>;
2464					};
2465					csi20vin7: endpoint@7 {
2466						reg = <7>;
2467						remote-endpoint = <&vin7csi20>;
2468					};
2469				};
2470			};
2471		};
2472
2473		csi40: csi2@feaa0000 {
2474			compatible = "renesas,r8a774b1-csi2";
2475			reg = <0 0xfeaa0000 0 0x10000>;
2476			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2477			clocks = <&cpg CPG_MOD 716>;
2478			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2479			resets = <&cpg 716>;
2480			status = "disabled";
2481
2482			ports {
2483				#address-cells = <1>;
2484				#size-cells = <0>;
2485
2486				port@0 {
2487					reg = <0>;
2488				};
2489
2490				port@1 {
2491					#address-cells = <1>;
2492					#size-cells = <0>;
2493
2494					reg = <1>;
2495
2496					csi40vin0: endpoint@0 {
2497						reg = <0>;
2498						remote-endpoint = <&vin0csi40>;
2499					};
2500					csi40vin1: endpoint@1 {
2501						reg = <1>;
2502						remote-endpoint = <&vin1csi40>;
2503					};
2504					csi40vin2: endpoint@2 {
2505						reg = <2>;
2506						remote-endpoint = <&vin2csi40>;
2507					};
2508					csi40vin3: endpoint@3 {
2509						reg = <3>;
2510						remote-endpoint = <&vin3csi40>;
2511					};
2512					csi40vin4: endpoint@4 {
2513						reg = <4>;
2514						remote-endpoint = <&vin4csi40>;
2515					};
2516					csi40vin5: endpoint@5 {
2517						reg = <5>;
2518						remote-endpoint = <&vin5csi40>;
2519					};
2520					csi40vin6: endpoint@6 {
2521						reg = <6>;
2522						remote-endpoint = <&vin6csi40>;
2523					};
2524					csi40vin7: endpoint@7 {
2525						reg = <7>;
2526						remote-endpoint = <&vin7csi40>;
2527					};
2528				};
2529			};
2530		};
2531
2532		hdmi0: hdmi@fead0000 {
2533			compatible = "renesas,r8a774b1-hdmi",
2534				     "renesas,rcar-gen3-hdmi";
2535			reg = <0 0xfead0000 0 0x10000>;
2536			interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2537			clocks = <&cpg CPG_MOD 729>,
2538				 <&cpg CPG_CORE R8A774B1_CLK_HDMI>;
2539			clock-names = "iahb", "isfr";
2540			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2541			resets = <&cpg 729>;
2542			status = "disabled";
2543
2544			ports {
2545				#address-cells = <1>;
2546				#size-cells = <0>;
2547
2548				port@0 {
2549					reg = <0>;
2550					dw_hdmi0_in: endpoint {
2551						remote-endpoint = <&du_out_hdmi0>;
2552					};
2553				};
2554				port@1 {
2555					reg = <1>;
2556				};
2557				port@2 {
2558					/* HDMI sound */
2559					reg = <2>;
2560				};
2561			};
2562		};
2563
2564		du: display@feb00000 {
2565			compatible = "renesas,du-r8a774b1";
2566			reg = <0 0xfeb00000 0 0x80000>;
2567			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2568				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2569				     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2570			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2571				 <&cpg CPG_MOD 721>;
2572			clock-names = "du.0", "du.1", "du.3";
2573			resets = <&cpg 724>, <&cpg 722>;
2574			reset-names = "du.0", "du.3";
2575			status = "disabled";
2576
2577			renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2578
2579			ports {
2580				#address-cells = <1>;
2581				#size-cells = <0>;
2582
2583				port@0 {
2584					reg = <0>;
2585					du_out_rgb: endpoint {
2586					};
2587				};
2588				port@1 {
2589					reg = <1>;
2590					du_out_hdmi0: endpoint {
2591						remote-endpoint = <&dw_hdmi0_in>;
2592					};
2593				};
2594				port@2 {
2595					reg = <2>;
2596					du_out_lvds0: endpoint {
2597						remote-endpoint = <&lvds0_in>;
2598					};
2599				};
2600			};
2601		};
2602
2603		lvds0: lvds@feb90000 {
2604			compatible = "renesas,r8a774b1-lvds";
2605			reg = <0 0xfeb90000 0 0x14>;
2606			clocks = <&cpg CPG_MOD 727>;
2607			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2608			resets = <&cpg 727>;
2609			status = "disabled";
2610
2611			ports {
2612				#address-cells = <1>;
2613				#size-cells = <0>;
2614
2615				port@0 {
2616					reg = <0>;
2617					lvds0_in: endpoint {
2618						remote-endpoint = <&du_out_lvds0>;
2619					};
2620				};
2621				port@1 {
2622					reg = <1>;
2623					lvds0_out: endpoint {
2624					};
2625				};
2626			};
2627		};
2628
2629		prr: chipid@fff00044 {
2630			compatible = "renesas,prr";
2631			reg = <0 0xfff00044 0 4>;
2632		};
2633	};
2634
2635	thermal-zones {
2636		sensor1_thermal: sensor1-thermal {
2637			polling-delay-passive = <250>;
2638			polling-delay = <1000>;
2639			thermal-sensors = <&tsc 0>;
2640			sustainable-power = <2439>;
2641
2642			trips {
2643				sensor1_crit: sensor1-crit {
2644					temperature = <120000>;
2645					hysteresis = <1000>;
2646					type = "critical";
2647				};
2648			};
2649		};
2650
2651		sensor2_thermal: sensor2-thermal {
2652			polling-delay-passive = <250>;
2653			polling-delay = <1000>;
2654			thermal-sensors = <&tsc 1>;
2655			sustainable-power = <2439>;
2656
2657			trips {
2658				sensor2_crit: sensor2-crit {
2659					temperature = <120000>;
2660					hysteresis = <1000>;
2661					type = "critical";
2662				};
2663			};
2664		};
2665
2666		sensor3_thermal: sensor3-thermal {
2667			polling-delay-passive = <250>;
2668			polling-delay = <1000>;
2669			thermal-sensors = <&tsc 2>;
2670			sustainable-power = <2439>;
2671
2672			cooling-maps {
2673				map0 {
2674					trip = <&target>;
2675					cooling-device = <&a57_0 0 2>;
2676					contribution = <1024>;
2677				};
2678			};
2679			trips {
2680				target: trip-point1 {
2681					temperature = <100000>;
2682					hysteresis = <1000>;
2683					type = "passive";
2684				};
2685
2686				sensor3_crit: sensor3-crit {
2687					temperature = <120000>;
2688					hysteresis = <1000>;
2689					type = "critical";
2690				};
2691			};
2692		};
2693	};
2694
2695	timer {
2696		compatible = "arm,armv8-timer";
2697		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2698				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2699				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2700				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2701	};
2702
2703	/* External USB clocks - can be overridden by the board */
2704	usb3s0_clk: usb3s0 {
2705		compatible = "fixed-clock";
2706		#clock-cells = <0>;
2707		clock-frequency = <0>;
2708	};
2709
2710	usb_extal_clk: usb_extal {
2711		compatible = "fixed-clock";
2712		#clock-cells = <0>;
2713		clock-frequency = <0>;
2714	};
2715};
2716