1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774b1 SoC 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a774b1-cpg-mssr.h> 11#include <dt-bindings/power/r8a774b1-sysc.h> 12 13/ { 14 compatible = "renesas,r8a774b1"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 /* 19 * The external audio clocks are configured as 0 Hz fixed frequency 20 * clocks by default. 21 * Boards that provide audio clocks should override them. 22 */ 23 audio_clk_a: audio_clk_a { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; 27 }; 28 29 audio_clk_b: audio_clk_b { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_c: audio_clk_c { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 /* External CAN clock - to be overridden by boards that provide it */ 42 can_clk: can { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 46 }; 47 48 cluster0_opp: opp_table0 { 49 compatible = "operating-points-v2"; 50 opp-shared; 51 52 opp-500000000 { 53 opp-hz = /bits/ 64 <500000000>; 54 opp-microvolt = <830000>; 55 clock-latency-ns = <300000>; 56 }; 57 opp-1000000000 { 58 opp-hz = /bits/ 64 <1000000000>; 59 opp-microvolt = <830000>; 60 clock-latency-ns = <300000>; 61 }; 62 opp-1500000000 { 63 opp-hz = /bits/ 64 <1500000000>; 64 opp-microvolt = <830000>; 65 clock-latency-ns = <300000>; 66 opp-suspend; 67 }; 68 }; 69 70 cpus { 71 #address-cells = <1>; 72 #size-cells = <0>; 73 74 a57_0: cpu@0 { 75 compatible = "arm,cortex-a57"; 76 reg = <0x0>; 77 device_type = "cpu"; 78 power-domains = <&sysc R8A774B1_PD_CA57_CPU0>; 79 next-level-cache = <&L2_CA57>; 80 enable-method = "psci"; 81 #cooling-cells = <2>; 82 dynamic-power-coefficient = <854>; 83 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 84 operating-points-v2 = <&cluster0_opp>; 85 }; 86 87 a57_1: cpu@1 { 88 compatible = "arm,cortex-a57"; 89 reg = <0x1>; 90 device_type = "cpu"; 91 power-domains = <&sysc R8A774B1_PD_CA57_CPU1>; 92 next-level-cache = <&L2_CA57>; 93 enable-method = "psci"; 94 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 95 operating-points-v2 = <&cluster0_opp>; 96 }; 97 98 L2_CA57: cache-controller-0 { 99 compatible = "cache"; 100 power-domains = <&sysc R8A774B1_PD_CA57_SCU>; 101 cache-unified; 102 cache-level = <2>; 103 }; 104 }; 105 106 extal_clk: extal { 107 compatible = "fixed-clock"; 108 #clock-cells = <0>; 109 /* This value must be overridden by the board */ 110 clock-frequency = <0>; 111 }; 112 113 extalr_clk: extalr { 114 compatible = "fixed-clock"; 115 #clock-cells = <0>; 116 /* This value must be overridden by the board */ 117 clock-frequency = <0>; 118 }; 119 120 /* External PCIe clock - can be overridden by the board */ 121 pcie_bus_clk: pcie_bus { 122 compatible = "fixed-clock"; 123 #clock-cells = <0>; 124 clock-frequency = <0>; 125 }; 126 127 pmu_a57 { 128 compatible = "arm,cortex-a57-pmu"; 129 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 130 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 131 interrupt-affinity = <&a57_0>, <&a57_1>; 132 }; 133 134 psci { 135 compatible = "arm,psci-1.0", "arm,psci-0.2"; 136 method = "smc"; 137 }; 138 139 /* External SCIF clock - to be overridden by boards that provide it */ 140 scif_clk: scif { 141 compatible = "fixed-clock"; 142 #clock-cells = <0>; 143 clock-frequency = <0>; 144 }; 145 146 soc { 147 compatible = "simple-bus"; 148 interrupt-parent = <&gic>; 149 #address-cells = <2>; 150 #size-cells = <2>; 151 ranges; 152 153 rwdt: watchdog@e6020000 { 154 compatible = "renesas,r8a774b1-wdt", 155 "renesas,rcar-gen3-wdt"; 156 reg = <0 0xe6020000 0 0x0c>; 157 clocks = <&cpg CPG_MOD 402>; 158 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 159 resets = <&cpg 402>; 160 status = "disabled"; 161 }; 162 163 gpio0: gpio@e6050000 { 164 compatible = "renesas,gpio-r8a774b1", 165 "renesas,rcar-gen3-gpio"; 166 reg = <0 0xe6050000 0 0x50>; 167 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 168 #gpio-cells = <2>; 169 gpio-controller; 170 gpio-ranges = <&pfc 0 0 16>; 171 #interrupt-cells = <2>; 172 interrupt-controller; 173 clocks = <&cpg CPG_MOD 912>; 174 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 175 resets = <&cpg 912>; 176 }; 177 178 gpio1: gpio@e6051000 { 179 compatible = "renesas,gpio-r8a774b1", 180 "renesas,rcar-gen3-gpio"; 181 reg = <0 0xe6051000 0 0x50>; 182 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 183 #gpio-cells = <2>; 184 gpio-controller; 185 gpio-ranges = <&pfc 0 32 29>; 186 #interrupt-cells = <2>; 187 interrupt-controller; 188 clocks = <&cpg CPG_MOD 911>; 189 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 190 resets = <&cpg 911>; 191 }; 192 193 gpio2: gpio@e6052000 { 194 compatible = "renesas,gpio-r8a774b1", 195 "renesas,rcar-gen3-gpio"; 196 reg = <0 0xe6052000 0 0x50>; 197 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 198 #gpio-cells = <2>; 199 gpio-controller; 200 gpio-ranges = <&pfc 0 64 15>; 201 #interrupt-cells = <2>; 202 interrupt-controller; 203 clocks = <&cpg CPG_MOD 910>; 204 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 205 resets = <&cpg 910>; 206 }; 207 208 gpio3: gpio@e6053000 { 209 compatible = "renesas,gpio-r8a774b1", 210 "renesas,rcar-gen3-gpio"; 211 reg = <0 0xe6053000 0 0x50>; 212 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 213 #gpio-cells = <2>; 214 gpio-controller; 215 gpio-ranges = <&pfc 0 96 16>; 216 #interrupt-cells = <2>; 217 interrupt-controller; 218 clocks = <&cpg CPG_MOD 909>; 219 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 220 resets = <&cpg 909>; 221 }; 222 223 gpio4: gpio@e6054000 { 224 compatible = "renesas,gpio-r8a774b1", 225 "renesas,rcar-gen3-gpio"; 226 reg = <0 0xe6054000 0 0x50>; 227 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 228 #gpio-cells = <2>; 229 gpio-controller; 230 gpio-ranges = <&pfc 0 128 18>; 231 #interrupt-cells = <2>; 232 interrupt-controller; 233 clocks = <&cpg CPG_MOD 908>; 234 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 235 resets = <&cpg 908>; 236 }; 237 238 gpio5: gpio@e6055000 { 239 compatible = "renesas,gpio-r8a774b1", 240 "renesas,rcar-gen3-gpio"; 241 reg = <0 0xe6055000 0 0x50>; 242 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 243 #gpio-cells = <2>; 244 gpio-controller; 245 gpio-ranges = <&pfc 0 160 26>; 246 #interrupt-cells = <2>; 247 interrupt-controller; 248 clocks = <&cpg CPG_MOD 907>; 249 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 250 resets = <&cpg 907>; 251 }; 252 253 gpio6: gpio@e6055400 { 254 compatible = "renesas,gpio-r8a774b1", 255 "renesas,rcar-gen3-gpio"; 256 reg = <0 0xe6055400 0 0x50>; 257 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 258 #gpio-cells = <2>; 259 gpio-controller; 260 gpio-ranges = <&pfc 0 192 32>; 261 #interrupt-cells = <2>; 262 interrupt-controller; 263 clocks = <&cpg CPG_MOD 906>; 264 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 265 resets = <&cpg 906>; 266 }; 267 268 gpio7: gpio@e6055800 { 269 compatible = "renesas,gpio-r8a774b1", 270 "renesas,rcar-gen3-gpio"; 271 reg = <0 0xe6055800 0 0x50>; 272 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 273 #gpio-cells = <2>; 274 gpio-controller; 275 gpio-ranges = <&pfc 0 224 4>; 276 #interrupt-cells = <2>; 277 interrupt-controller; 278 clocks = <&cpg CPG_MOD 905>; 279 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 280 resets = <&cpg 905>; 281 }; 282 283 pfc: pin-controller@e6060000 { 284 compatible = "renesas,pfc-r8a774b1"; 285 reg = <0 0xe6060000 0 0x50c>; 286 }; 287 288 cmt0: timer@e60f0000 { 289 compatible = "renesas,r8a774b1-cmt0", 290 "renesas,rcar-gen3-cmt0"; 291 reg = <0 0xe60f0000 0 0x1004>; 292 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 293 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 294 clocks = <&cpg CPG_MOD 303>; 295 clock-names = "fck"; 296 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 297 resets = <&cpg 303>; 298 status = "disabled"; 299 }; 300 301 cmt1: timer@e6130000 { 302 compatible = "renesas,r8a774b1-cmt1", 303 "renesas,rcar-gen3-cmt1"; 304 reg = <0 0xe6130000 0 0x1004>; 305 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 306 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 307 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 313 clocks = <&cpg CPG_MOD 302>; 314 clock-names = "fck"; 315 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 316 resets = <&cpg 302>; 317 status = "disabled"; 318 }; 319 320 cmt2: timer@e6140000 { 321 compatible = "renesas,r8a774b1-cmt1", 322 "renesas,rcar-gen3-cmt1"; 323 reg = <0 0xe6140000 0 0x1004>; 324 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 332 clocks = <&cpg CPG_MOD 301>; 333 clock-names = "fck"; 334 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 335 resets = <&cpg 301>; 336 status = "disabled"; 337 }; 338 339 cmt3: timer@e6148000 { 340 compatible = "renesas,r8a774b1-cmt1", 341 "renesas,rcar-gen3-cmt1"; 342 reg = <0 0xe6148000 0 0x1004>; 343 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 351 clocks = <&cpg CPG_MOD 300>; 352 clock-names = "fck"; 353 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 354 resets = <&cpg 300>; 355 status = "disabled"; 356 }; 357 358 cpg: clock-controller@e6150000 { 359 compatible = "renesas,r8a774b1-cpg-mssr"; 360 reg = <0 0xe6150000 0 0x1000>; 361 clocks = <&extal_clk>, <&extalr_clk>; 362 clock-names = "extal", "extalr"; 363 #clock-cells = <2>; 364 #power-domain-cells = <0>; 365 #reset-cells = <1>; 366 }; 367 368 rst: reset-controller@e6160000 { 369 compatible = "renesas,r8a774b1-rst"; 370 reg = <0 0xe6160000 0 0x0200>; 371 }; 372 373 sysc: system-controller@e6180000 { 374 compatible = "renesas,r8a774b1-sysc"; 375 reg = <0 0xe6180000 0 0x0400>; 376 #power-domain-cells = <1>; 377 }; 378 379 tsc: thermal@e6198000 { 380 compatible = "renesas,r8a774b1-thermal"; 381 reg = <0 0xe6198000 0 0x100>, 382 <0 0xe61a0000 0 0x100>, 383 <0 0xe61a8000 0 0x100>; 384 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 387 clocks = <&cpg CPG_MOD 522>; 388 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 389 resets = <&cpg 522>; 390 #thermal-sensor-cells = <1>; 391 }; 392 393 intc_ex: interrupt-controller@e61c0000 { 394 compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc"; 395 #interrupt-cells = <2>; 396 interrupt-controller; 397 reg = <0 0xe61c0000 0 0x200>; 398 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 404 clocks = <&cpg CPG_MOD 407>; 405 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 406 resets = <&cpg 407>; 407 }; 408 409 tmu0: timer@e61e0000 { 410 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 411 reg = <0 0xe61e0000 0 0x30>; 412 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 413 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 415 clocks = <&cpg CPG_MOD 125>; 416 clock-names = "fck"; 417 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 418 resets = <&cpg 125>; 419 status = "disabled"; 420 }; 421 422 tmu1: timer@e6fc0000 { 423 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 424 reg = <0 0xe6fc0000 0 0x30>; 425 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 426 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 427 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 428 clocks = <&cpg CPG_MOD 124>; 429 clock-names = "fck"; 430 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 431 resets = <&cpg 124>; 432 status = "disabled"; 433 }; 434 435 tmu2: timer@e6fd0000 { 436 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 437 reg = <0 0xe6fd0000 0 0x30>; 438 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 439 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 441 clocks = <&cpg CPG_MOD 123>; 442 clock-names = "fck"; 443 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 444 resets = <&cpg 123>; 445 status = "disabled"; 446 }; 447 448 tmu3: timer@e6fe0000 { 449 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 450 reg = <0 0xe6fe0000 0 0x30>; 451 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 454 clocks = <&cpg CPG_MOD 122>; 455 clock-names = "fck"; 456 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 457 resets = <&cpg 122>; 458 status = "disabled"; 459 }; 460 461 tmu4: timer@ffc00000 { 462 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 463 reg = <0 0xffc00000 0 0x30>; 464 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 465 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 466 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 467 clocks = <&cpg CPG_MOD 121>; 468 clock-names = "fck"; 469 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 470 resets = <&cpg 121>; 471 status = "disabled"; 472 }; 473 474 i2c0: i2c@e6500000 { 475 #address-cells = <1>; 476 #size-cells = <0>; 477 compatible = "renesas,i2c-r8a774b1", 478 "renesas,rcar-gen3-i2c"; 479 reg = <0 0xe6500000 0 0x40>; 480 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 481 clocks = <&cpg CPG_MOD 931>; 482 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 483 resets = <&cpg 931>; 484 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 485 <&dmac2 0x91>, <&dmac2 0x90>; 486 dma-names = "tx", "rx", "tx", "rx"; 487 i2c-scl-internal-delay-ns = <110>; 488 status = "disabled"; 489 }; 490 491 i2c1: i2c@e6508000 { 492 #address-cells = <1>; 493 #size-cells = <0>; 494 compatible = "renesas,i2c-r8a774b1", 495 "renesas,rcar-gen3-i2c"; 496 reg = <0 0xe6508000 0 0x40>; 497 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 498 clocks = <&cpg CPG_MOD 930>; 499 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 500 resets = <&cpg 930>; 501 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 502 <&dmac2 0x93>, <&dmac2 0x92>; 503 dma-names = "tx", "rx", "tx", "rx"; 504 i2c-scl-internal-delay-ns = <6>; 505 status = "disabled"; 506 }; 507 508 i2c2: i2c@e6510000 { 509 #address-cells = <1>; 510 #size-cells = <0>; 511 compatible = "renesas,i2c-r8a774b1", 512 "renesas,rcar-gen3-i2c"; 513 reg = <0 0xe6510000 0 0x40>; 514 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 515 clocks = <&cpg CPG_MOD 929>; 516 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 517 resets = <&cpg 929>; 518 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 519 <&dmac2 0x95>, <&dmac2 0x94>; 520 dma-names = "tx", "rx", "tx", "rx"; 521 i2c-scl-internal-delay-ns = <6>; 522 status = "disabled"; 523 }; 524 525 i2c3: i2c@e66d0000 { 526 #address-cells = <1>; 527 #size-cells = <0>; 528 compatible = "renesas,i2c-r8a774b1", 529 "renesas,rcar-gen3-i2c"; 530 reg = <0 0xe66d0000 0 0x40>; 531 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 532 clocks = <&cpg CPG_MOD 928>; 533 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 534 resets = <&cpg 928>; 535 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 536 dma-names = "tx", "rx"; 537 i2c-scl-internal-delay-ns = <110>; 538 status = "disabled"; 539 }; 540 541 i2c4: i2c@e66d8000 { 542 #address-cells = <1>; 543 #size-cells = <0>; 544 compatible = "renesas,i2c-r8a774b1", 545 "renesas,rcar-gen3-i2c"; 546 reg = <0 0xe66d8000 0 0x40>; 547 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 548 clocks = <&cpg CPG_MOD 927>; 549 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 550 resets = <&cpg 927>; 551 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 552 dma-names = "tx", "rx"; 553 i2c-scl-internal-delay-ns = <110>; 554 status = "disabled"; 555 }; 556 557 i2c5: i2c@e66e0000 { 558 #address-cells = <1>; 559 #size-cells = <0>; 560 compatible = "renesas,i2c-r8a774b1", 561 "renesas,rcar-gen3-i2c"; 562 reg = <0 0xe66e0000 0 0x40>; 563 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 564 clocks = <&cpg CPG_MOD 919>; 565 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 566 resets = <&cpg 919>; 567 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 568 dma-names = "tx", "rx"; 569 i2c-scl-internal-delay-ns = <110>; 570 status = "disabled"; 571 }; 572 573 i2c6: i2c@e66e8000 { 574 #address-cells = <1>; 575 #size-cells = <0>; 576 compatible = "renesas,i2c-r8a774b1", 577 "renesas,rcar-gen3-i2c"; 578 reg = <0 0xe66e8000 0 0x40>; 579 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 580 clocks = <&cpg CPG_MOD 918>; 581 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 582 resets = <&cpg 918>; 583 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 584 dma-names = "tx", "rx"; 585 i2c-scl-internal-delay-ns = <6>; 586 status = "disabled"; 587 }; 588 589 i2c_dvfs: i2c@e60b0000 { 590 #address-cells = <1>; 591 #size-cells = <0>; 592 compatible = "renesas,iic-r8a774b1", 593 "renesas,rcar-gen3-iic", 594 "renesas,rmobile-iic"; 595 reg = <0 0xe60b0000 0 0x425>; 596 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&cpg CPG_MOD 926>; 598 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 599 resets = <&cpg 926>; 600 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 601 dma-names = "tx", "rx"; 602 status = "disabled"; 603 }; 604 605 hscif0: serial@e6540000 { 606 compatible = "renesas,hscif-r8a774b1", 607 "renesas,rcar-gen3-hscif", 608 "renesas,hscif"; 609 reg = <0 0xe6540000 0 0x60>; 610 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 611 clocks = <&cpg CPG_MOD 520>, 612 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 613 <&scif_clk>; 614 clock-names = "fck", "brg_int", "scif_clk"; 615 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 616 <&dmac2 0x31>, <&dmac2 0x30>; 617 dma-names = "tx", "rx", "tx", "rx"; 618 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 619 resets = <&cpg 520>; 620 status = "disabled"; 621 }; 622 623 hscif1: serial@e6550000 { 624 compatible = "renesas,hscif-r8a774b1", 625 "renesas,rcar-gen3-hscif", 626 "renesas,hscif"; 627 reg = <0 0xe6550000 0 0x60>; 628 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&cpg CPG_MOD 519>, 630 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 631 <&scif_clk>; 632 clock-names = "fck", "brg_int", "scif_clk"; 633 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 634 <&dmac2 0x33>, <&dmac2 0x32>; 635 dma-names = "tx", "rx", "tx", "rx"; 636 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 637 resets = <&cpg 519>; 638 status = "disabled"; 639 }; 640 641 hscif2: serial@e6560000 { 642 compatible = "renesas,hscif-r8a774b1", 643 "renesas,rcar-gen3-hscif", 644 "renesas,hscif"; 645 reg = <0 0xe6560000 0 0x60>; 646 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 647 clocks = <&cpg CPG_MOD 518>, 648 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 649 <&scif_clk>; 650 clock-names = "fck", "brg_int", "scif_clk"; 651 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 652 <&dmac2 0x35>, <&dmac2 0x34>; 653 dma-names = "tx", "rx", "tx", "rx"; 654 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 655 resets = <&cpg 518>; 656 status = "disabled"; 657 }; 658 659 hscif3: serial@e66a0000 { 660 compatible = "renesas,hscif-r8a774b1", 661 "renesas,rcar-gen3-hscif", 662 "renesas,hscif"; 663 reg = <0 0xe66a0000 0 0x60>; 664 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 665 clocks = <&cpg CPG_MOD 517>, 666 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 667 <&scif_clk>; 668 clock-names = "fck", "brg_int", "scif_clk"; 669 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 670 dma-names = "tx", "rx"; 671 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 672 resets = <&cpg 517>; 673 status = "disabled"; 674 }; 675 676 hscif4: serial@e66b0000 { 677 compatible = "renesas,hscif-r8a774b1", 678 "renesas,rcar-gen3-hscif", 679 "renesas,hscif"; 680 reg = <0 0xe66b0000 0 0x60>; 681 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 682 clocks = <&cpg CPG_MOD 516>, 683 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 684 <&scif_clk>; 685 clock-names = "fck", "brg_int", "scif_clk"; 686 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 687 dma-names = "tx", "rx"; 688 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 689 resets = <&cpg 516>; 690 status = "disabled"; 691 }; 692 693 hsusb: usb@e6590000 { 694 compatible = "renesas,usbhs-r8a774b1", 695 "renesas,rcar-gen3-usbhs"; 696 reg = <0 0xe6590000 0 0x200>; 697 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 698 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 699 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 700 <&usb_dmac1 0>, <&usb_dmac1 1>; 701 dma-names = "ch0", "ch1", "ch2", "ch3"; 702 renesas,buswait = <11>; 703 phys = <&usb2_phy0 3>; 704 phy-names = "usb"; 705 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 706 resets = <&cpg 704>, <&cpg 703>; 707 status = "disabled"; 708 }; 709 710 usb_dmac0: dma-controller@e65a0000 { 711 compatible = "renesas,r8a774b1-usb-dmac", 712 "renesas,usb-dmac"; 713 reg = <0 0xe65a0000 0 0x100>; 714 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 715 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 716 interrupt-names = "ch0", "ch1"; 717 clocks = <&cpg CPG_MOD 330>; 718 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 719 resets = <&cpg 330>; 720 #dma-cells = <1>; 721 dma-channels = <2>; 722 }; 723 724 usb_dmac1: dma-controller@e65b0000 { 725 compatible = "renesas,r8a774b1-usb-dmac", 726 "renesas,usb-dmac"; 727 reg = <0 0xe65b0000 0 0x100>; 728 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 729 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 730 interrupt-names = "ch0", "ch1"; 731 clocks = <&cpg CPG_MOD 331>; 732 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 733 resets = <&cpg 331>; 734 #dma-cells = <1>; 735 dma-channels = <2>; 736 }; 737 738 usb3_phy0: usb-phy@e65ee000 { 739 compatible = "renesas,r8a774b1-usb3-phy", 740 "renesas,rcar-gen3-usb3-phy"; 741 reg = <0 0xe65ee000 0 0x90>; 742 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 743 <&usb_extal_clk>; 744 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 745 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 746 resets = <&cpg 328>; 747 #phy-cells = <0>; 748 status = "disabled"; 749 }; 750 751 dmac0: dma-controller@e6700000 { 752 compatible = "renesas,dmac-r8a774b1", 753 "renesas,rcar-dmac"; 754 reg = <0 0xe6700000 0 0x10000>; 755 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 756 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 757 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 760 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 761 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 772 interrupt-names = "error", 773 "ch0", "ch1", "ch2", "ch3", 774 "ch4", "ch5", "ch6", "ch7", 775 "ch8", "ch9", "ch10", "ch11", 776 "ch12", "ch13", "ch14", "ch15"; 777 clocks = <&cpg CPG_MOD 219>; 778 clock-names = "fck"; 779 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 780 resets = <&cpg 219>; 781 #dma-cells = <1>; 782 dma-channels = <16>; 783 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 784 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 785 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 786 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 787 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 788 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 789 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 790 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 791 }; 792 793 dmac1: dma-controller@e7300000 { 794 compatible = "renesas,dmac-r8a774b1", 795 "renesas,rcar-dmac"; 796 reg = <0 0xe7300000 0 0x10000>; 797 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 798 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 799 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 801 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 802 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 803 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 804 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 805 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 808 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 814 interrupt-names = "error", 815 "ch0", "ch1", "ch2", "ch3", 816 "ch4", "ch5", "ch6", "ch7", 817 "ch8", "ch9", "ch10", "ch11", 818 "ch12", "ch13", "ch14", "ch15"; 819 clocks = <&cpg CPG_MOD 218>; 820 clock-names = "fck"; 821 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 822 resets = <&cpg 218>; 823 #dma-cells = <1>; 824 dma-channels = <16>; 825 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 826 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 827 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 828 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 829 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 830 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 831 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 832 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 833 }; 834 835 dmac2: dma-controller@e7310000 { 836 compatible = "renesas,dmac-r8a774b1", 837 "renesas,rcar-dmac"; 838 reg = <0 0xe7310000 0 0x10000>; 839 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 840 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 841 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 842 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 843 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 844 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 845 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 846 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 847 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 848 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 849 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 850 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 852 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 853 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 854 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 855 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 856 interrupt-names = "error", 857 "ch0", "ch1", "ch2", "ch3", 858 "ch4", "ch5", "ch6", "ch7", 859 "ch8", "ch9", "ch10", "ch11", 860 "ch12", "ch13", "ch14", "ch15"; 861 clocks = <&cpg CPG_MOD 217>; 862 clock-names = "fck"; 863 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 864 resets = <&cpg 217>; 865 #dma-cells = <1>; 866 dma-channels = <16>; 867 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 868 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 869 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 870 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 871 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 872 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 873 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 874 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 875 }; 876 877 ipmmu_ds0: mmu@e6740000 { 878 compatible = "renesas,ipmmu-r8a774b1"; 879 reg = <0 0xe6740000 0 0x1000>; 880 renesas,ipmmu-main = <&ipmmu_mm 0>; 881 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 882 #iommu-cells = <1>; 883 }; 884 885 ipmmu_ds1: mmu@e7740000 { 886 compatible = "renesas,ipmmu-r8a774b1"; 887 reg = <0 0xe7740000 0 0x1000>; 888 renesas,ipmmu-main = <&ipmmu_mm 1>; 889 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 890 #iommu-cells = <1>; 891 }; 892 893 ipmmu_hc: mmu@e6570000 { 894 compatible = "renesas,ipmmu-r8a774b1"; 895 reg = <0 0xe6570000 0 0x1000>; 896 renesas,ipmmu-main = <&ipmmu_mm 2>; 897 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 898 #iommu-cells = <1>; 899 }; 900 901 ipmmu_mm: mmu@e67b0000 { 902 compatible = "renesas,ipmmu-r8a774b1"; 903 reg = <0 0xe67b0000 0 0x1000>; 904 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 906 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 907 #iommu-cells = <1>; 908 }; 909 910 ipmmu_mp: mmu@ec670000 { 911 compatible = "renesas,ipmmu-r8a774b1"; 912 reg = <0 0xec670000 0 0x1000>; 913 renesas,ipmmu-main = <&ipmmu_mm 4>; 914 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 915 #iommu-cells = <1>; 916 }; 917 918 ipmmu_pv0: mmu@fd800000 { 919 compatible = "renesas,ipmmu-r8a774b1"; 920 reg = <0 0xfd800000 0 0x1000>; 921 renesas,ipmmu-main = <&ipmmu_mm 6>; 922 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 923 #iommu-cells = <1>; 924 }; 925 926 ipmmu_vc0: mmu@fe6b0000 { 927 compatible = "renesas,ipmmu-r8a774b1"; 928 reg = <0 0xfe6b0000 0 0x1000>; 929 renesas,ipmmu-main = <&ipmmu_mm 12>; 930 power-domains = <&sysc R8A774B1_PD_A3VC>; 931 #iommu-cells = <1>; 932 }; 933 934 ipmmu_vi0: mmu@febd0000 { 935 compatible = "renesas,ipmmu-r8a774b1"; 936 reg = <0 0xfebd0000 0 0x1000>; 937 renesas,ipmmu-main = <&ipmmu_mm 14>; 938 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 939 #iommu-cells = <1>; 940 }; 941 942 ipmmu_vp0: mmu@fe990000 { 943 compatible = "renesas,ipmmu-r8a774b1"; 944 reg = <0 0xfe990000 0 0x1000>; 945 renesas,ipmmu-main = <&ipmmu_mm 16>; 946 power-domains = <&sysc R8A774B1_PD_A3VP>; 947 #iommu-cells = <1>; 948 }; 949 950 avb: ethernet@e6800000 { 951 compatible = "renesas,etheravb-r8a774b1", 952 "renesas,etheravb-rcar-gen3"; 953 reg = <0 0xe6800000 0 0x800>; 954 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 979 interrupt-names = "ch0", "ch1", "ch2", "ch3", 980 "ch4", "ch5", "ch6", "ch7", 981 "ch8", "ch9", "ch10", "ch11", 982 "ch12", "ch13", "ch14", "ch15", 983 "ch16", "ch17", "ch18", "ch19", 984 "ch20", "ch21", "ch22", "ch23", 985 "ch24"; 986 clocks = <&cpg CPG_MOD 812>; 987 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 988 resets = <&cpg 812>; 989 phy-mode = "rgmii"; 990 iommus = <&ipmmu_ds0 16>; 991 #address-cells = <1>; 992 #size-cells = <0>; 993 status = "disabled"; 994 }; 995 996 can0: can@e6c30000 { 997 compatible = "renesas,can-r8a774b1", 998 "renesas,rcar-gen3-can"; 999 reg = <0 0xe6c30000 0 0x1000>; 1000 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1001 clocks = <&cpg CPG_MOD 916>, 1002 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1003 <&can_clk>; 1004 clock-names = "clkp1", "clkp2", "can_clk"; 1005 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1006 assigned-clock-rates = <40000000>; 1007 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1008 resets = <&cpg 916>; 1009 status = "disabled"; 1010 }; 1011 1012 can1: can@e6c38000 { 1013 compatible = "renesas,can-r8a774b1", 1014 "renesas,rcar-gen3-can"; 1015 reg = <0 0xe6c38000 0 0x1000>; 1016 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1017 clocks = <&cpg CPG_MOD 915>, 1018 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1019 <&can_clk>; 1020 clock-names = "clkp1", "clkp2", "can_clk"; 1021 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1022 assigned-clock-rates = <40000000>; 1023 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1024 resets = <&cpg 915>; 1025 status = "disabled"; 1026 }; 1027 1028 canfd: can@e66c0000 { 1029 compatible = "renesas,r8a774b1-canfd", 1030 "renesas,rcar-gen3-canfd"; 1031 reg = <0 0xe66c0000 0 0x8000>; 1032 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1034 clocks = <&cpg CPG_MOD 914>, 1035 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1036 <&can_clk>; 1037 clock-names = "fck", "canfd", "can_clk"; 1038 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1039 assigned-clock-rates = <40000000>; 1040 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1041 resets = <&cpg 914>; 1042 status = "disabled"; 1043 1044 channel0 { 1045 status = "disabled"; 1046 }; 1047 1048 channel1 { 1049 status = "disabled"; 1050 }; 1051 }; 1052 1053 pwm0: pwm@e6e30000 { 1054 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1055 reg = <0 0xe6e30000 0 0x8>; 1056 #pwm-cells = <2>; 1057 clocks = <&cpg CPG_MOD 523>; 1058 resets = <&cpg 523>; 1059 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1060 status = "disabled"; 1061 }; 1062 1063 pwm1: pwm@e6e31000 { 1064 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1065 reg = <0 0xe6e31000 0 0x8>; 1066 #pwm-cells = <2>; 1067 clocks = <&cpg CPG_MOD 523>; 1068 resets = <&cpg 523>; 1069 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1070 status = "disabled"; 1071 }; 1072 1073 pwm2: pwm@e6e32000 { 1074 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1075 reg = <0 0xe6e32000 0 0x8>; 1076 #pwm-cells = <2>; 1077 clocks = <&cpg CPG_MOD 523>; 1078 resets = <&cpg 523>; 1079 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1080 status = "disabled"; 1081 }; 1082 1083 pwm3: pwm@e6e33000 { 1084 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1085 reg = <0 0xe6e33000 0 0x8>; 1086 #pwm-cells = <2>; 1087 clocks = <&cpg CPG_MOD 523>; 1088 resets = <&cpg 523>; 1089 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1090 status = "disabled"; 1091 }; 1092 1093 pwm4: pwm@e6e34000 { 1094 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1095 reg = <0 0xe6e34000 0 0x8>; 1096 #pwm-cells = <2>; 1097 clocks = <&cpg CPG_MOD 523>; 1098 resets = <&cpg 523>; 1099 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1100 status = "disabled"; 1101 }; 1102 1103 pwm5: pwm@e6e35000 { 1104 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1105 reg = <0 0xe6e35000 0 0x8>; 1106 #pwm-cells = <2>; 1107 clocks = <&cpg CPG_MOD 523>; 1108 resets = <&cpg 523>; 1109 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1110 status = "disabled"; 1111 }; 1112 1113 pwm6: pwm@e6e36000 { 1114 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1115 reg = <0 0xe6e36000 0 0x8>; 1116 #pwm-cells = <2>; 1117 clocks = <&cpg CPG_MOD 523>; 1118 resets = <&cpg 523>; 1119 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1120 status = "disabled"; 1121 }; 1122 1123 scif0: serial@e6e60000 { 1124 compatible = "renesas,scif-r8a774b1", 1125 "renesas,rcar-gen3-scif", "renesas,scif"; 1126 reg = <0 0xe6e60000 0 0x40>; 1127 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1128 clocks = <&cpg CPG_MOD 207>, 1129 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1130 <&scif_clk>; 1131 clock-names = "fck", "brg_int", "scif_clk"; 1132 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1133 <&dmac2 0x51>, <&dmac2 0x50>; 1134 dma-names = "tx", "rx", "tx", "rx"; 1135 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1136 resets = <&cpg 207>; 1137 status = "disabled"; 1138 }; 1139 1140 scif1: serial@e6e68000 { 1141 compatible = "renesas,scif-r8a774b1", 1142 "renesas,rcar-gen3-scif", "renesas,scif"; 1143 reg = <0 0xe6e68000 0 0x40>; 1144 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1145 clocks = <&cpg CPG_MOD 206>, 1146 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1147 <&scif_clk>; 1148 clock-names = "fck", "brg_int", "scif_clk"; 1149 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1150 <&dmac2 0x53>, <&dmac2 0x52>; 1151 dma-names = "tx", "rx", "tx", "rx"; 1152 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1153 resets = <&cpg 206>; 1154 status = "disabled"; 1155 }; 1156 1157 scif2: serial@e6e88000 { 1158 compatible = "renesas,scif-r8a774b1", 1159 "renesas,rcar-gen3-scif", "renesas,scif"; 1160 reg = <0 0xe6e88000 0 0x40>; 1161 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1162 clocks = <&cpg CPG_MOD 310>, 1163 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1164 <&scif_clk>; 1165 clock-names = "fck", "brg_int", "scif_clk"; 1166 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1167 <&dmac2 0x13>, <&dmac2 0x12>; 1168 dma-names = "tx", "rx", "tx", "rx"; 1169 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1170 resets = <&cpg 310>; 1171 status = "disabled"; 1172 }; 1173 1174 scif3: serial@e6c50000 { 1175 compatible = "renesas,scif-r8a774b1", 1176 "renesas,rcar-gen3-scif", "renesas,scif"; 1177 reg = <0 0xe6c50000 0 0x40>; 1178 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1179 clocks = <&cpg CPG_MOD 204>, 1180 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1181 <&scif_clk>; 1182 clock-names = "fck", "brg_int", "scif_clk"; 1183 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1184 dma-names = "tx", "rx"; 1185 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1186 resets = <&cpg 204>; 1187 status = "disabled"; 1188 }; 1189 1190 scif4: serial@e6c40000 { 1191 compatible = "renesas,scif-r8a774b1", 1192 "renesas,rcar-gen3-scif", "renesas,scif"; 1193 reg = <0 0xe6c40000 0 0x40>; 1194 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1195 clocks = <&cpg CPG_MOD 203>, 1196 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1197 <&scif_clk>; 1198 clock-names = "fck", "brg_int", "scif_clk"; 1199 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1200 dma-names = "tx", "rx"; 1201 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1202 resets = <&cpg 203>; 1203 status = "disabled"; 1204 }; 1205 1206 scif5: serial@e6f30000 { 1207 compatible = "renesas,scif-r8a774b1", 1208 "renesas,rcar-gen3-scif", "renesas,scif"; 1209 reg = <0 0xe6f30000 0 0x40>; 1210 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1211 clocks = <&cpg CPG_MOD 202>, 1212 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1213 <&scif_clk>; 1214 clock-names = "fck", "brg_int", "scif_clk"; 1215 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1216 <&dmac2 0x5b>, <&dmac2 0x5a>; 1217 dma-names = "tx", "rx", "tx", "rx"; 1218 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1219 resets = <&cpg 202>; 1220 status = "disabled"; 1221 }; 1222 1223 msiof0: spi@e6e90000 { 1224 compatible = "renesas,msiof-r8a774b1", 1225 "renesas,rcar-gen3-msiof"; 1226 reg = <0 0xe6e90000 0 0x0064>; 1227 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1228 clocks = <&cpg CPG_MOD 211>; 1229 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1230 <&dmac2 0x41>, <&dmac2 0x40>; 1231 dma-names = "tx", "rx", "tx", "rx"; 1232 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1233 resets = <&cpg 211>; 1234 #address-cells = <1>; 1235 #size-cells = <0>; 1236 status = "disabled"; 1237 }; 1238 1239 msiof1: spi@e6ea0000 { 1240 compatible = "renesas,msiof-r8a774b1", 1241 "renesas,rcar-gen3-msiof"; 1242 reg = <0 0xe6ea0000 0 0x0064>; 1243 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1244 clocks = <&cpg CPG_MOD 210>; 1245 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1246 <&dmac2 0x43>, <&dmac2 0x42>; 1247 dma-names = "tx", "rx", "tx", "rx"; 1248 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1249 resets = <&cpg 210>; 1250 #address-cells = <1>; 1251 #size-cells = <0>; 1252 status = "disabled"; 1253 }; 1254 1255 msiof2: spi@e6c00000 { 1256 compatible = "renesas,msiof-r8a774b1", 1257 "renesas,rcar-gen3-msiof"; 1258 reg = <0 0xe6c00000 0 0x0064>; 1259 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1260 clocks = <&cpg CPG_MOD 209>; 1261 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1262 dma-names = "tx", "rx"; 1263 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1264 resets = <&cpg 209>; 1265 #address-cells = <1>; 1266 #size-cells = <0>; 1267 status = "disabled"; 1268 }; 1269 1270 msiof3: spi@e6c10000 { 1271 compatible = "renesas,msiof-r8a774b1", 1272 "renesas,rcar-gen3-msiof"; 1273 reg = <0 0xe6c10000 0 0x0064>; 1274 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1275 clocks = <&cpg CPG_MOD 208>; 1276 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1277 dma-names = "tx", "rx"; 1278 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1279 resets = <&cpg 208>; 1280 #address-cells = <1>; 1281 #size-cells = <0>; 1282 status = "disabled"; 1283 }; 1284 1285 vin0: video@e6ef0000 { 1286 compatible = "renesas,vin-r8a774b1"; 1287 reg = <0 0xe6ef0000 0 0x1000>; 1288 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1289 clocks = <&cpg CPG_MOD 811>; 1290 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1291 resets = <&cpg 811>; 1292 renesas,id = <0>; 1293 status = "disabled"; 1294 1295 ports { 1296 #address-cells = <1>; 1297 #size-cells = <0>; 1298 1299 port@1 { 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 1303 reg = <1>; 1304 1305 vin0csi20: endpoint@0 { 1306 reg = <0>; 1307 remote-endpoint = <&csi20vin0>; 1308 }; 1309 vin0csi40: endpoint@2 { 1310 reg = <2>; 1311 remote-endpoint = <&csi40vin0>; 1312 }; 1313 }; 1314 }; 1315 }; 1316 1317 vin1: video@e6ef1000 { 1318 compatible = "renesas,vin-r8a774b1"; 1319 reg = <0 0xe6ef1000 0 0x1000>; 1320 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1321 clocks = <&cpg CPG_MOD 810>; 1322 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1323 resets = <&cpg 810>; 1324 renesas,id = <1>; 1325 status = "disabled"; 1326 1327 ports { 1328 #address-cells = <1>; 1329 #size-cells = <0>; 1330 1331 port@1 { 1332 #address-cells = <1>; 1333 #size-cells = <0>; 1334 1335 reg = <1>; 1336 1337 vin1csi20: endpoint@0 { 1338 reg = <0>; 1339 remote-endpoint = <&csi20vin1>; 1340 }; 1341 vin1csi40: endpoint@2 { 1342 reg = <2>; 1343 remote-endpoint = <&csi40vin1>; 1344 }; 1345 }; 1346 }; 1347 }; 1348 1349 vin2: video@e6ef2000 { 1350 compatible = "renesas,vin-r8a774b1"; 1351 reg = <0 0xe6ef2000 0 0x1000>; 1352 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1353 clocks = <&cpg CPG_MOD 809>; 1354 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1355 resets = <&cpg 809>; 1356 renesas,id = <2>; 1357 status = "disabled"; 1358 1359 ports { 1360 #address-cells = <1>; 1361 #size-cells = <0>; 1362 1363 port@1 { 1364 #address-cells = <1>; 1365 #size-cells = <0>; 1366 1367 reg = <1>; 1368 1369 vin2csi20: endpoint@0 { 1370 reg = <0>; 1371 remote-endpoint = <&csi20vin2>; 1372 }; 1373 vin2csi40: endpoint@2 { 1374 reg = <2>; 1375 remote-endpoint = <&csi40vin2>; 1376 }; 1377 }; 1378 }; 1379 }; 1380 1381 vin3: video@e6ef3000 { 1382 compatible = "renesas,vin-r8a774b1"; 1383 reg = <0 0xe6ef3000 0 0x1000>; 1384 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1385 clocks = <&cpg CPG_MOD 808>; 1386 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1387 resets = <&cpg 808>; 1388 renesas,id = <3>; 1389 status = "disabled"; 1390 1391 ports { 1392 #address-cells = <1>; 1393 #size-cells = <0>; 1394 1395 port@1 { 1396 #address-cells = <1>; 1397 #size-cells = <0>; 1398 1399 reg = <1>; 1400 1401 vin3csi20: endpoint@0 { 1402 reg = <0>; 1403 remote-endpoint = <&csi20vin3>; 1404 }; 1405 vin3csi40: endpoint@2 { 1406 reg = <2>; 1407 remote-endpoint = <&csi40vin3>; 1408 }; 1409 }; 1410 }; 1411 }; 1412 1413 vin4: video@e6ef4000 { 1414 compatible = "renesas,vin-r8a774b1"; 1415 reg = <0 0xe6ef4000 0 0x1000>; 1416 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1417 clocks = <&cpg CPG_MOD 807>; 1418 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1419 resets = <&cpg 807>; 1420 renesas,id = <4>; 1421 status = "disabled"; 1422 1423 ports { 1424 #address-cells = <1>; 1425 #size-cells = <0>; 1426 1427 port@1 { 1428 #address-cells = <1>; 1429 #size-cells = <0>; 1430 1431 reg = <1>; 1432 1433 vin4csi20: endpoint@0 { 1434 reg = <0>; 1435 remote-endpoint = <&csi20vin4>; 1436 }; 1437 vin4csi40: endpoint@2 { 1438 reg = <2>; 1439 remote-endpoint = <&csi40vin4>; 1440 }; 1441 }; 1442 }; 1443 }; 1444 1445 vin5: video@e6ef5000 { 1446 compatible = "renesas,vin-r8a774b1"; 1447 reg = <0 0xe6ef5000 0 0x1000>; 1448 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1449 clocks = <&cpg CPG_MOD 806>; 1450 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1451 resets = <&cpg 806>; 1452 renesas,id = <5>; 1453 status = "disabled"; 1454 1455 ports { 1456 #address-cells = <1>; 1457 #size-cells = <0>; 1458 1459 port@1 { 1460 #address-cells = <1>; 1461 #size-cells = <0>; 1462 1463 reg = <1>; 1464 1465 vin5csi20: endpoint@0 { 1466 reg = <0>; 1467 remote-endpoint = <&csi20vin5>; 1468 }; 1469 vin5csi40: endpoint@2 { 1470 reg = <2>; 1471 remote-endpoint = <&csi40vin5>; 1472 }; 1473 }; 1474 }; 1475 }; 1476 1477 vin6: video@e6ef6000 { 1478 compatible = "renesas,vin-r8a774b1"; 1479 reg = <0 0xe6ef6000 0 0x1000>; 1480 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1481 clocks = <&cpg CPG_MOD 805>; 1482 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1483 resets = <&cpg 805>; 1484 renesas,id = <6>; 1485 status = "disabled"; 1486 1487 ports { 1488 #address-cells = <1>; 1489 #size-cells = <0>; 1490 1491 port@1 { 1492 #address-cells = <1>; 1493 #size-cells = <0>; 1494 1495 reg = <1>; 1496 1497 vin6csi20: endpoint@0 { 1498 reg = <0>; 1499 remote-endpoint = <&csi20vin6>; 1500 }; 1501 vin6csi40: endpoint@2 { 1502 reg = <2>; 1503 remote-endpoint = <&csi40vin6>; 1504 }; 1505 }; 1506 }; 1507 }; 1508 1509 vin7: video@e6ef7000 { 1510 compatible = "renesas,vin-r8a774b1"; 1511 reg = <0 0xe6ef7000 0 0x1000>; 1512 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1513 clocks = <&cpg CPG_MOD 804>; 1514 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1515 resets = <&cpg 804>; 1516 renesas,id = <7>; 1517 status = "disabled"; 1518 1519 ports { 1520 #address-cells = <1>; 1521 #size-cells = <0>; 1522 1523 port@1 { 1524 #address-cells = <1>; 1525 #size-cells = <0>; 1526 1527 reg = <1>; 1528 1529 vin7csi20: endpoint@0 { 1530 reg = <0>; 1531 remote-endpoint = <&csi20vin7>; 1532 }; 1533 vin7csi40: endpoint@2 { 1534 reg = <2>; 1535 remote-endpoint = <&csi40vin7>; 1536 }; 1537 }; 1538 }; 1539 }; 1540 1541 rcar_sound: sound@ec500000 { 1542 /* 1543 * #sound-dai-cells is required 1544 * 1545 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1546 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1547 */ 1548 /* 1549 * #clock-cells is required for audio_clkout0/1/2/3 1550 * 1551 * clkout : #clock-cells = <0>; <&rcar_sound>; 1552 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1553 */ 1554 compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3"; 1555 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1556 <0 0xec5a0000 0 0x100>, /* ADG */ 1557 <0 0xec540000 0 0x1000>, /* SSIU */ 1558 <0 0xec541000 0 0x280>, /* SSI */ 1559 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1560 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1561 1562 clocks = <&cpg CPG_MOD 1005>, 1563 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1564 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1565 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1566 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1567 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1568 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1569 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1570 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1571 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1572 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1573 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1574 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1575 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1576 <&audio_clk_a>, <&audio_clk_b>, 1577 <&audio_clk_c>, 1578 <&cpg CPG_CORE R8A774B1_CLK_S0D4>; 1579 clock-names = "ssi-all", 1580 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1581 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1582 "ssi.1", "ssi.0", 1583 "src.9", "src.8", "src.7", "src.6", 1584 "src.5", "src.4", "src.3", "src.2", 1585 "src.1", "src.0", 1586 "mix.1", "mix.0", 1587 "ctu.1", "ctu.0", 1588 "dvc.0", "dvc.1", 1589 "clk_a", "clk_b", "clk_c", "clk_i"; 1590 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1591 resets = <&cpg 1005>, 1592 <&cpg 1006>, <&cpg 1007>, 1593 <&cpg 1008>, <&cpg 1009>, 1594 <&cpg 1010>, <&cpg 1011>, 1595 <&cpg 1012>, <&cpg 1013>, 1596 <&cpg 1014>, <&cpg 1015>; 1597 reset-names = "ssi-all", 1598 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1599 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1600 "ssi.1", "ssi.0"; 1601 status = "disabled"; 1602 1603 rcar_sound,ctu { 1604 ctu00: ctu-0 { }; 1605 ctu01: ctu-1 { }; 1606 ctu02: ctu-2 { }; 1607 ctu03: ctu-3 { }; 1608 ctu10: ctu-4 { }; 1609 ctu11: ctu-5 { }; 1610 ctu12: ctu-6 { }; 1611 ctu13: ctu-7 { }; 1612 }; 1613 1614 rcar_sound,dvc { 1615 dvc0: dvc-0 { 1616 dmas = <&audma1 0xbc>; 1617 dma-names = "tx"; 1618 }; 1619 dvc1: dvc-1 { 1620 dmas = <&audma1 0xbe>; 1621 dma-names = "tx"; 1622 }; 1623 }; 1624 1625 rcar_sound,mix { 1626 mix0: mix-0 { }; 1627 mix1: mix-1 { }; 1628 }; 1629 1630 rcar_sound,src { 1631 src0: src-0 { 1632 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1633 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1634 dma-names = "rx", "tx"; 1635 }; 1636 src1: src-1 { 1637 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1638 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1639 dma-names = "rx", "tx"; 1640 }; 1641 src2: src-2 { 1642 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1643 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1644 dma-names = "rx", "tx"; 1645 }; 1646 src3: src-3 { 1647 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1648 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1649 dma-names = "rx", "tx"; 1650 }; 1651 src4: src-4 { 1652 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1653 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1654 dma-names = "rx", "tx"; 1655 }; 1656 src5: src-5 { 1657 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1658 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1659 dma-names = "rx", "tx"; 1660 }; 1661 src6: src-6 { 1662 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1663 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1664 dma-names = "rx", "tx"; 1665 }; 1666 src7: src-7 { 1667 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1668 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1669 dma-names = "rx", "tx"; 1670 }; 1671 src8: src-8 { 1672 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1673 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1674 dma-names = "rx", "tx"; 1675 }; 1676 src9: src-9 { 1677 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1678 dmas = <&audma0 0x97>, <&audma1 0xba>; 1679 dma-names = "rx", "tx"; 1680 }; 1681 }; 1682 1683 rcar_sound,ssi { 1684 ssi0: ssi-0 { 1685 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1686 dmas = <&audma0 0x01>, <&audma1 0x02>; 1687 dma-names = "rx", "tx"; 1688 }; 1689 ssi1: ssi-1 { 1690 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1691 dmas = <&audma0 0x03>, <&audma1 0x04>; 1692 dma-names = "rx", "tx"; 1693 }; 1694 ssi2: ssi-2 { 1695 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1696 dmas = <&audma0 0x05>, <&audma1 0x06>; 1697 dma-names = "rx", "tx"; 1698 }; 1699 ssi3: ssi-3 { 1700 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1701 dmas = <&audma0 0x07>, <&audma1 0x08>; 1702 dma-names = "rx", "tx"; 1703 }; 1704 ssi4: ssi-4 { 1705 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1706 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1707 dma-names = "rx", "tx"; 1708 }; 1709 ssi5: ssi-5 { 1710 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1711 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1712 dma-names = "rx", "tx"; 1713 }; 1714 ssi6: ssi-6 { 1715 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1716 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1717 dma-names = "rx", "tx"; 1718 }; 1719 ssi7: ssi-7 { 1720 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1721 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1722 dma-names = "rx", "tx"; 1723 }; 1724 ssi8: ssi-8 { 1725 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1726 dmas = <&audma0 0x11>, <&audma1 0x12>; 1727 dma-names = "rx", "tx"; 1728 }; 1729 ssi9: ssi-9 { 1730 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1731 dmas = <&audma0 0x13>, <&audma1 0x14>; 1732 dma-names = "rx", "tx"; 1733 }; 1734 }; 1735 1736 rcar_sound,ssiu { 1737 ssiu00: ssiu-0 { 1738 dmas = <&audma0 0x15>, <&audma1 0x16>; 1739 dma-names = "rx", "tx"; 1740 }; 1741 ssiu01: ssiu-1 { 1742 dmas = <&audma0 0x35>, <&audma1 0x36>; 1743 dma-names = "rx", "tx"; 1744 }; 1745 ssiu02: ssiu-2 { 1746 dmas = <&audma0 0x37>, <&audma1 0x38>; 1747 dma-names = "rx", "tx"; 1748 }; 1749 ssiu03: ssiu-3 { 1750 dmas = <&audma0 0x47>, <&audma1 0x48>; 1751 dma-names = "rx", "tx"; 1752 }; 1753 ssiu04: ssiu-4 { 1754 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1755 dma-names = "rx", "tx"; 1756 }; 1757 ssiu05: ssiu-5 { 1758 dmas = <&audma0 0x43>, <&audma1 0x44>; 1759 dma-names = "rx", "tx"; 1760 }; 1761 ssiu06: ssiu-6 { 1762 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1763 dma-names = "rx", "tx"; 1764 }; 1765 ssiu07: ssiu-7 { 1766 dmas = <&audma0 0x53>, <&audma1 0x54>; 1767 dma-names = "rx", "tx"; 1768 }; 1769 ssiu10: ssiu-8 { 1770 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1771 dma-names = "rx", "tx"; 1772 }; 1773 ssiu11: ssiu-9 { 1774 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1775 dma-names = "rx", "tx"; 1776 }; 1777 ssiu12: ssiu-10 { 1778 dmas = <&audma0 0x57>, <&audma1 0x58>; 1779 dma-names = "rx", "tx"; 1780 }; 1781 ssiu13: ssiu-11 { 1782 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1783 dma-names = "rx", "tx"; 1784 }; 1785 ssiu14: ssiu-12 { 1786 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1787 dma-names = "rx", "tx"; 1788 }; 1789 ssiu15: ssiu-13 { 1790 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1791 dma-names = "rx", "tx"; 1792 }; 1793 ssiu16: ssiu-14 { 1794 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1795 dma-names = "rx", "tx"; 1796 }; 1797 ssiu17: ssiu-15 { 1798 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1799 dma-names = "rx", "tx"; 1800 }; 1801 ssiu20: ssiu-16 { 1802 dmas = <&audma0 0x63>, <&audma1 0x64>; 1803 dma-names = "rx", "tx"; 1804 }; 1805 ssiu21: ssiu-17 { 1806 dmas = <&audma0 0x67>, <&audma1 0x68>; 1807 dma-names = "rx", "tx"; 1808 }; 1809 ssiu22: ssiu-18 { 1810 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1811 dma-names = "rx", "tx"; 1812 }; 1813 ssiu23: ssiu-19 { 1814 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1815 dma-names = "rx", "tx"; 1816 }; 1817 ssiu24: ssiu-20 { 1818 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1819 dma-names = "rx", "tx"; 1820 }; 1821 ssiu25: ssiu-21 { 1822 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1823 dma-names = "rx", "tx"; 1824 }; 1825 ssiu26: ssiu-22 { 1826 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1827 dma-names = "rx", "tx"; 1828 }; 1829 ssiu27: ssiu-23 { 1830 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1831 dma-names = "rx", "tx"; 1832 }; 1833 ssiu30: ssiu-24 { 1834 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1835 dma-names = "rx", "tx"; 1836 }; 1837 ssiu31: ssiu-25 { 1838 dmas = <&audma0 0x21>, <&audma1 0x22>; 1839 dma-names = "rx", "tx"; 1840 }; 1841 ssiu32: ssiu-26 { 1842 dmas = <&audma0 0x23>, <&audma1 0x24>; 1843 dma-names = "rx", "tx"; 1844 }; 1845 ssiu33: ssiu-27 { 1846 dmas = <&audma0 0x25>, <&audma1 0x26>; 1847 dma-names = "rx", "tx"; 1848 }; 1849 ssiu34: ssiu-28 { 1850 dmas = <&audma0 0x27>, <&audma1 0x28>; 1851 dma-names = "rx", "tx"; 1852 }; 1853 ssiu35: ssiu-29 { 1854 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1855 dma-names = "rx", "tx"; 1856 }; 1857 ssiu36: ssiu-30 { 1858 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1859 dma-names = "rx", "tx"; 1860 }; 1861 ssiu37: ssiu-31 { 1862 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 1863 dma-names = "rx", "tx"; 1864 }; 1865 ssiu40: ssiu-32 { 1866 dmas = <&audma0 0x71>, <&audma1 0x72>; 1867 dma-names = "rx", "tx"; 1868 }; 1869 ssiu41: ssiu-33 { 1870 dmas = <&audma0 0x17>, <&audma1 0x18>; 1871 dma-names = "rx", "tx"; 1872 }; 1873 ssiu42: ssiu-34 { 1874 dmas = <&audma0 0x19>, <&audma1 0x1A>; 1875 dma-names = "rx", "tx"; 1876 }; 1877 ssiu43: ssiu-35 { 1878 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 1879 dma-names = "rx", "tx"; 1880 }; 1881 ssiu44: ssiu-36 { 1882 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 1883 dma-names = "rx", "tx"; 1884 }; 1885 ssiu45: ssiu-37 { 1886 dmas = <&audma0 0x1F>, <&audma1 0x20>; 1887 dma-names = "rx", "tx"; 1888 }; 1889 ssiu46: ssiu-38 { 1890 dmas = <&audma0 0x31>, <&audma1 0x32>; 1891 dma-names = "rx", "tx"; 1892 }; 1893 ssiu47: ssiu-39 { 1894 dmas = <&audma0 0x33>, <&audma1 0x34>; 1895 dma-names = "rx", "tx"; 1896 }; 1897 ssiu50: ssiu-40 { 1898 dmas = <&audma0 0x73>, <&audma1 0x74>; 1899 dma-names = "rx", "tx"; 1900 }; 1901 ssiu60: ssiu-41 { 1902 dmas = <&audma0 0x75>, <&audma1 0x76>; 1903 dma-names = "rx", "tx"; 1904 }; 1905 ssiu70: ssiu-42 { 1906 dmas = <&audma0 0x79>, <&audma1 0x7a>; 1907 dma-names = "rx", "tx"; 1908 }; 1909 ssiu80: ssiu-43 { 1910 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 1911 dma-names = "rx", "tx"; 1912 }; 1913 ssiu90: ssiu-44 { 1914 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 1915 dma-names = "rx", "tx"; 1916 }; 1917 ssiu91: ssiu-45 { 1918 dmas = <&audma0 0x7F>, <&audma1 0x80>; 1919 dma-names = "rx", "tx"; 1920 }; 1921 ssiu92: ssiu-46 { 1922 dmas = <&audma0 0x81>, <&audma1 0x82>; 1923 dma-names = "rx", "tx"; 1924 }; 1925 ssiu93: ssiu-47 { 1926 dmas = <&audma0 0x83>, <&audma1 0x84>; 1927 dma-names = "rx", "tx"; 1928 }; 1929 ssiu94: ssiu-48 { 1930 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 1931 dma-names = "rx", "tx"; 1932 }; 1933 ssiu95: ssiu-49 { 1934 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 1935 dma-names = "rx", "tx"; 1936 }; 1937 ssiu96: ssiu-50 { 1938 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 1939 dma-names = "rx", "tx"; 1940 }; 1941 ssiu97: ssiu-51 { 1942 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 1943 dma-names = "rx", "tx"; 1944 }; 1945 }; 1946 }; 1947 1948 audma0: dma-controller@ec700000 { 1949 compatible = "renesas,dmac-r8a774b1", 1950 "renesas,rcar-dmac"; 1951 reg = <0 0xec700000 0 0x10000>; 1952 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1953 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1954 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1955 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1956 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1957 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1958 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1959 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1960 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1961 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1962 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1963 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1964 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1965 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1966 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1967 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1968 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1969 interrupt-names = "error", 1970 "ch0", "ch1", "ch2", "ch3", 1971 "ch4", "ch5", "ch6", "ch7", 1972 "ch8", "ch9", "ch10", "ch11", 1973 "ch12", "ch13", "ch14", "ch15"; 1974 clocks = <&cpg CPG_MOD 502>; 1975 clock-names = "fck"; 1976 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1977 resets = <&cpg 502>; 1978 #dma-cells = <1>; 1979 dma-channels = <16>; 1980 }; 1981 1982 audma1: dma-controller@ec720000 { 1983 compatible = "renesas,dmac-r8a774b1", 1984 "renesas,rcar-dmac"; 1985 reg = <0 0xec720000 0 0x10000>; 1986 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 1987 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1988 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1989 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1990 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1991 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1992 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1993 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1994 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1995 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1996 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 1997 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1998 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1999 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2000 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2001 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2002 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2003 interrupt-names = "error", 2004 "ch0", "ch1", "ch2", "ch3", 2005 "ch4", "ch5", "ch6", "ch7", 2006 "ch8", "ch9", "ch10", "ch11", 2007 "ch12", "ch13", "ch14", "ch15"; 2008 clocks = <&cpg CPG_MOD 501>; 2009 clock-names = "fck"; 2010 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2011 resets = <&cpg 501>; 2012 #dma-cells = <1>; 2013 dma-channels = <16>; 2014 }; 2015 2016 xhci0: usb@ee000000 { 2017 compatible = "renesas,xhci-r8a774b1", 2018 "renesas,rcar-gen3-xhci"; 2019 reg = <0 0xee000000 0 0xc00>; 2020 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2021 clocks = <&cpg CPG_MOD 328>; 2022 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2023 resets = <&cpg 328>; 2024 status = "disabled"; 2025 }; 2026 2027 usb3_peri0: usb@ee020000 { 2028 compatible = "renesas,r8a774b1-usb3-peri", 2029 "renesas,rcar-gen3-usb3-peri"; 2030 reg = <0 0xee020000 0 0x400>; 2031 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2032 clocks = <&cpg CPG_MOD 328>; 2033 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2034 resets = <&cpg 328>; 2035 status = "disabled"; 2036 }; 2037 2038 ohci0: usb@ee080000 { 2039 compatible = "generic-ohci"; 2040 reg = <0 0xee080000 0 0x100>; 2041 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2042 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2043 phys = <&usb2_phy0 1>; 2044 phy-names = "usb"; 2045 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2046 resets = <&cpg 703>, <&cpg 704>; 2047 status = "disabled"; 2048 }; 2049 2050 ohci1: usb@ee0a0000 { 2051 compatible = "generic-ohci"; 2052 reg = <0 0xee0a0000 0 0x100>; 2053 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2054 clocks = <&cpg CPG_MOD 702>; 2055 phys = <&usb2_phy1 1>; 2056 phy-names = "usb"; 2057 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2058 resets = <&cpg 702>; 2059 status = "disabled"; 2060 }; 2061 2062 ehci0: usb@ee080100 { 2063 compatible = "generic-ehci"; 2064 reg = <0 0xee080100 0 0x100>; 2065 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2066 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2067 phys = <&usb2_phy0 2>; 2068 phy-names = "usb"; 2069 companion = <&ohci0>; 2070 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2071 resets = <&cpg 703>, <&cpg 704>; 2072 status = "disabled"; 2073 }; 2074 2075 ehci1: usb@ee0a0100 { 2076 compatible = "generic-ehci"; 2077 reg = <0 0xee0a0100 0 0x100>; 2078 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2079 clocks = <&cpg CPG_MOD 702>; 2080 phys = <&usb2_phy1 2>; 2081 phy-names = "usb"; 2082 companion = <&ohci1>; 2083 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2084 resets = <&cpg 702>; 2085 status = "disabled"; 2086 }; 2087 2088 usb2_phy0: usb-phy@ee080200 { 2089 compatible = "renesas,usb2-phy-r8a774b1", 2090 "renesas,rcar-gen3-usb2-phy"; 2091 reg = <0 0xee080200 0 0x700>; 2092 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2093 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2094 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2095 resets = <&cpg 703>, <&cpg 704>; 2096 #phy-cells = <1>; 2097 status = "disabled"; 2098 }; 2099 2100 usb2_phy1: usb-phy@ee0a0200 { 2101 compatible = "renesas,usb2-phy-r8a774b1", 2102 "renesas,rcar-gen3-usb2-phy"; 2103 reg = <0 0xee0a0200 0 0x700>; 2104 clocks = <&cpg CPG_MOD 702>; 2105 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2106 resets = <&cpg 702>; 2107 #phy-cells = <1>; 2108 status = "disabled"; 2109 }; 2110 2111 sdhi0: sd@ee100000 { 2112 compatible = "renesas,sdhi-r8a774b1", 2113 "renesas,rcar-gen3-sdhi"; 2114 reg = <0 0xee100000 0 0x2000>; 2115 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2116 clocks = <&cpg CPG_MOD 314>; 2117 max-frequency = <200000000>; 2118 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2119 resets = <&cpg 314>; 2120 status = "disabled"; 2121 }; 2122 2123 sdhi1: sd@ee120000 { 2124 compatible = "renesas,sdhi-r8a774b1", 2125 "renesas,rcar-gen3-sdhi"; 2126 reg = <0 0xee120000 0 0x2000>; 2127 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2128 clocks = <&cpg CPG_MOD 313>; 2129 max-frequency = <200000000>; 2130 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2131 resets = <&cpg 313>; 2132 status = "disabled"; 2133 }; 2134 2135 sdhi2: sd@ee140000 { 2136 compatible = "renesas,sdhi-r8a774b1", 2137 "renesas,rcar-gen3-sdhi"; 2138 reg = <0 0xee140000 0 0x2000>; 2139 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2140 clocks = <&cpg CPG_MOD 312>; 2141 max-frequency = <200000000>; 2142 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2143 resets = <&cpg 312>; 2144 status = "disabled"; 2145 }; 2146 2147 sdhi3: sd@ee160000 { 2148 compatible = "renesas,sdhi-r8a774b1", 2149 "renesas,rcar-gen3-sdhi"; 2150 reg = <0 0xee160000 0 0x2000>; 2151 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2152 clocks = <&cpg CPG_MOD 311>; 2153 max-frequency = <200000000>; 2154 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2155 resets = <&cpg 311>; 2156 status = "disabled"; 2157 }; 2158 2159 sata: sata@ee300000 { 2160 compatible = "renesas,sata-r8a774b1", 2161 "renesas,rcar-gen3-sata"; 2162 reg = <0 0xee300000 0 0x200000>; 2163 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2164 clocks = <&cpg CPG_MOD 815>; 2165 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2166 resets = <&cpg 815>; 2167 status = "disabled"; 2168 }; 2169 2170 gic: interrupt-controller@f1010000 { 2171 compatible = "arm,gic-400"; 2172 #interrupt-cells = <3>; 2173 #address-cells = <0>; 2174 interrupt-controller; 2175 reg = <0x0 0xf1010000 0 0x1000>, 2176 <0x0 0xf1020000 0 0x20000>, 2177 <0x0 0xf1040000 0 0x20000>, 2178 <0x0 0xf1060000 0 0x20000>; 2179 interrupts = <GIC_PPI 9 2180 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2181 clocks = <&cpg CPG_MOD 408>; 2182 clock-names = "clk"; 2183 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2184 resets = <&cpg 408>; 2185 }; 2186 2187 pciec0: pcie@fe000000 { 2188 compatible = "renesas,pcie-r8a774b1", 2189 "renesas,pcie-rcar-gen3"; 2190 reg = <0 0xfe000000 0 0x80000>; 2191 #address-cells = <3>; 2192 #size-cells = <2>; 2193 bus-range = <0x00 0xff>; 2194 device_type = "pci"; 2195 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2196 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2197 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2198 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2199 /* Map all possible DDR as inbound ranges */ 2200 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2201 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2202 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2203 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2204 #interrupt-cells = <1>; 2205 interrupt-map-mask = <0 0 0 0>; 2206 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2207 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2208 clock-names = "pcie", "pcie_bus"; 2209 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2210 resets = <&cpg 319>; 2211 status = "disabled"; 2212 }; 2213 2214 pciec1: pcie@ee800000 { 2215 compatible = "renesas,pcie-r8a774b1", 2216 "renesas,pcie-rcar-gen3"; 2217 reg = <0 0xee800000 0 0x80000>; 2218 #address-cells = <3>; 2219 #size-cells = <2>; 2220 bus-range = <0x00 0xff>; 2221 device_type = "pci"; 2222 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2223 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2224 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2225 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2226 /* Map all possible DDR as inbound ranges */ 2227 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2228 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2229 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2230 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2231 #interrupt-cells = <1>; 2232 interrupt-map-mask = <0 0 0 0>; 2233 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2234 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2235 clock-names = "pcie", "pcie_bus"; 2236 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2237 resets = <&cpg 318>; 2238 status = "disabled"; 2239 }; 2240 2241 fdp1@fe940000 { 2242 compatible = "renesas,fdp1"; 2243 reg = <0 0xfe940000 0 0x2400>; 2244 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2245 clocks = <&cpg CPG_MOD 119>; 2246 power-domains = <&sysc R8A774B1_PD_A3VP>; 2247 resets = <&cpg 119>; 2248 renesas,fcp = <&fcpf0>; 2249 }; 2250 2251 fcpf0: fcp@fe950000 { 2252 compatible = "renesas,fcpf"; 2253 reg = <0 0xfe950000 0 0x200>; 2254 clocks = <&cpg CPG_MOD 615>; 2255 power-domains = <&sysc R8A774B1_PD_A3VP>; 2256 resets = <&cpg 615>; 2257 }; 2258 2259 vspb: vsp@fe960000 { 2260 compatible = "renesas,vsp2"; 2261 reg = <0 0xfe960000 0 0x8000>; 2262 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2263 clocks = <&cpg CPG_MOD 626>; 2264 power-domains = <&sysc R8A774B1_PD_A3VP>; 2265 resets = <&cpg 626>; 2266 2267 renesas,fcp = <&fcpvb0>; 2268 }; 2269 2270 vspi0: vsp@fe9a0000 { 2271 compatible = "renesas,vsp2"; 2272 reg = <0 0xfe9a0000 0 0x8000>; 2273 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2274 clocks = <&cpg CPG_MOD 631>; 2275 power-domains = <&sysc R8A774B1_PD_A3VP>; 2276 resets = <&cpg 631>; 2277 2278 renesas,fcp = <&fcpvi0>; 2279 }; 2280 2281 vspd0: vsp@fea20000 { 2282 compatible = "renesas,vsp2"; 2283 reg = <0 0xfea20000 0 0x5000>; 2284 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2285 clocks = <&cpg CPG_MOD 623>; 2286 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2287 resets = <&cpg 623>; 2288 2289 renesas,fcp = <&fcpvd0>; 2290 }; 2291 2292 vspd1: vsp@fea28000 { 2293 compatible = "renesas,vsp2"; 2294 reg = <0 0xfea28000 0 0x5000>; 2295 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2296 clocks = <&cpg CPG_MOD 622>; 2297 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2298 resets = <&cpg 622>; 2299 2300 renesas,fcp = <&fcpvd1>; 2301 }; 2302 2303 fcpvb0: fcp@fe96f000 { 2304 compatible = "renesas,fcpv"; 2305 reg = <0 0xfe96f000 0 0x200>; 2306 clocks = <&cpg CPG_MOD 607>; 2307 power-domains = <&sysc R8A774B1_PD_A3VP>; 2308 resets = <&cpg 607>; 2309 }; 2310 2311 fcpvd0: fcp@fea27000 { 2312 compatible = "renesas,fcpv"; 2313 reg = <0 0xfea27000 0 0x200>; 2314 clocks = <&cpg CPG_MOD 603>; 2315 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2316 resets = <&cpg 603>; 2317 }; 2318 2319 fcpvd1: fcp@fea2f000 { 2320 compatible = "renesas,fcpv"; 2321 reg = <0 0xfea2f000 0 0x200>; 2322 clocks = <&cpg CPG_MOD 602>; 2323 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2324 resets = <&cpg 602>; 2325 }; 2326 2327 fcpvi0: fcp@fe9af000 { 2328 compatible = "renesas,fcpv"; 2329 reg = <0 0xfe9af000 0 0x200>; 2330 clocks = <&cpg CPG_MOD 611>; 2331 power-domains = <&sysc R8A774B1_PD_A3VP>; 2332 resets = <&cpg 611>; 2333 }; 2334 2335 csi20: csi2@fea80000 { 2336 compatible = "renesas,r8a774b1-csi2"; 2337 reg = <0 0xfea80000 0 0x10000>; 2338 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2339 clocks = <&cpg CPG_MOD 714>; 2340 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2341 resets = <&cpg 714>; 2342 status = "disabled"; 2343 2344 ports { 2345 #address-cells = <1>; 2346 #size-cells = <0>; 2347 2348 port@1 { 2349 #address-cells = <1>; 2350 #size-cells = <0>; 2351 2352 reg = <1>; 2353 2354 csi20vin0: endpoint@0 { 2355 reg = <0>; 2356 remote-endpoint = <&vin0csi20>; 2357 }; 2358 csi20vin1: endpoint@1 { 2359 reg = <1>; 2360 remote-endpoint = <&vin1csi20>; 2361 }; 2362 csi20vin2: endpoint@2 { 2363 reg = <2>; 2364 remote-endpoint = <&vin2csi20>; 2365 }; 2366 csi20vin3: endpoint@3 { 2367 reg = <3>; 2368 remote-endpoint = <&vin3csi20>; 2369 }; 2370 csi20vin4: endpoint@4 { 2371 reg = <4>; 2372 remote-endpoint = <&vin4csi20>; 2373 }; 2374 csi20vin5: endpoint@5 { 2375 reg = <5>; 2376 remote-endpoint = <&vin5csi20>; 2377 }; 2378 csi20vin6: endpoint@6 { 2379 reg = <6>; 2380 remote-endpoint = <&vin6csi20>; 2381 }; 2382 csi20vin7: endpoint@7 { 2383 reg = <7>; 2384 remote-endpoint = <&vin7csi20>; 2385 }; 2386 }; 2387 }; 2388 }; 2389 2390 csi40: csi2@feaa0000 { 2391 compatible = "renesas,r8a774b1-csi2"; 2392 reg = <0 0xfeaa0000 0 0x10000>; 2393 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2394 clocks = <&cpg CPG_MOD 716>; 2395 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2396 resets = <&cpg 716>; 2397 status = "disabled"; 2398 2399 ports { 2400 #address-cells = <1>; 2401 #size-cells = <0>; 2402 2403 port@1 { 2404 #address-cells = <1>; 2405 #size-cells = <0>; 2406 2407 reg = <1>; 2408 2409 csi40vin0: endpoint@0 { 2410 reg = <0>; 2411 remote-endpoint = <&vin0csi40>; 2412 }; 2413 csi40vin1: endpoint@1 { 2414 reg = <1>; 2415 remote-endpoint = <&vin1csi40>; 2416 }; 2417 csi40vin2: endpoint@2 { 2418 reg = <2>; 2419 remote-endpoint = <&vin2csi40>; 2420 }; 2421 csi40vin3: endpoint@3 { 2422 reg = <3>; 2423 remote-endpoint = <&vin3csi40>; 2424 }; 2425 csi40vin4: endpoint@4 { 2426 reg = <4>; 2427 remote-endpoint = <&vin4csi40>; 2428 }; 2429 csi40vin5: endpoint@5 { 2430 reg = <5>; 2431 remote-endpoint = <&vin5csi40>; 2432 }; 2433 csi40vin6: endpoint@6 { 2434 reg = <6>; 2435 remote-endpoint = <&vin6csi40>; 2436 }; 2437 csi40vin7: endpoint@7 { 2438 reg = <7>; 2439 remote-endpoint = <&vin7csi40>; 2440 }; 2441 }; 2442 }; 2443 }; 2444 2445 hdmi0: hdmi@fead0000 { 2446 compatible = "renesas,r8a774b1-hdmi", 2447 "renesas,rcar-gen3-hdmi"; 2448 reg = <0 0xfead0000 0 0x10000>; 2449 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2450 clocks = <&cpg CPG_MOD 729>, 2451 <&cpg CPG_CORE R8A774B1_CLK_HDMI>; 2452 clock-names = "iahb", "isfr"; 2453 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2454 resets = <&cpg 729>; 2455 status = "disabled"; 2456 2457 ports { 2458 #address-cells = <1>; 2459 #size-cells = <0>; 2460 2461 port@0 { 2462 reg = <0>; 2463 dw_hdmi0_in: endpoint { 2464 remote-endpoint = <&du_out_hdmi0>; 2465 }; 2466 }; 2467 port@1 { 2468 reg = <1>; 2469 }; 2470 port@2 { 2471 /* HDMI sound */ 2472 reg = <2>; 2473 }; 2474 }; 2475 }; 2476 2477 du: display@feb00000 { 2478 compatible = "renesas,du-r8a774b1"; 2479 reg = <0 0xfeb00000 0 0x80000>; 2480 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2481 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2482 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2483 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2484 <&cpg CPG_MOD 721>; 2485 clock-names = "du.0", "du.1", "du.3"; 2486 resets = <&cpg 724>, <&cpg 722>; 2487 reset-names = "du.0", "du.3"; 2488 status = "disabled"; 2489 2490 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2491 2492 ports { 2493 #address-cells = <1>; 2494 #size-cells = <0>; 2495 2496 port@0 { 2497 reg = <0>; 2498 du_out_rgb: endpoint { 2499 }; 2500 }; 2501 port@1 { 2502 reg = <1>; 2503 du_out_hdmi0: endpoint { 2504 remote-endpoint = <&dw_hdmi0_in>; 2505 }; 2506 }; 2507 port@2 { 2508 reg = <2>; 2509 du_out_lvds0: endpoint { 2510 remote-endpoint = <&lvds0_in>; 2511 }; 2512 }; 2513 }; 2514 }; 2515 2516 lvds0: lvds@feb90000 { 2517 compatible = "renesas,r8a774b1-lvds"; 2518 reg = <0 0xfeb90000 0 0x14>; 2519 clocks = <&cpg CPG_MOD 727>; 2520 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2521 resets = <&cpg 727>; 2522 status = "disabled"; 2523 2524 ports { 2525 #address-cells = <1>; 2526 #size-cells = <0>; 2527 2528 port@0 { 2529 reg = <0>; 2530 lvds0_in: endpoint { 2531 remote-endpoint = <&du_out_lvds0>; 2532 }; 2533 }; 2534 port@1 { 2535 reg = <1>; 2536 lvds0_out: endpoint { 2537 }; 2538 }; 2539 }; 2540 }; 2541 2542 prr: chipid@fff00044 { 2543 compatible = "renesas,prr"; 2544 reg = <0 0xfff00044 0 4>; 2545 }; 2546 }; 2547 2548 thermal-zones { 2549 sensor_thermal1: sensor-thermal1 { 2550 polling-delay-passive = <250>; 2551 polling-delay = <1000>; 2552 thermal-sensors = <&tsc 0>; 2553 sustainable-power = <2439>; 2554 2555 trips { 2556 sensor1_crit: sensor1-crit { 2557 temperature = <120000>; 2558 hysteresis = <1000>; 2559 type = "critical"; 2560 }; 2561 }; 2562 }; 2563 2564 sensor_thermal2: sensor-thermal2 { 2565 polling-delay-passive = <250>; 2566 polling-delay = <1000>; 2567 thermal-sensors = <&tsc 1>; 2568 sustainable-power = <2439>; 2569 2570 trips { 2571 sensor2_crit: sensor2-crit { 2572 temperature = <120000>; 2573 hysteresis = <1000>; 2574 type = "critical"; 2575 }; 2576 }; 2577 }; 2578 2579 sensor_thermal3: sensor-thermal3 { 2580 polling-delay-passive = <250>; 2581 polling-delay = <1000>; 2582 thermal-sensors = <&tsc 2>; 2583 sustainable-power = <2439>; 2584 2585 cooling-maps { 2586 map0 { 2587 trip = <&target>; 2588 cooling-device = <&a57_0 0 2>; 2589 contribution = <1024>; 2590 }; 2591 }; 2592 trips { 2593 target: trip-point1 { 2594 temperature = <100000>; 2595 hysteresis = <1000>; 2596 type = "passive"; 2597 }; 2598 2599 sensor3_crit: sensor3-crit { 2600 temperature = <120000>; 2601 hysteresis = <1000>; 2602 type = "critical"; 2603 }; 2604 }; 2605 }; 2606 }; 2607 2608 timer { 2609 compatible = "arm,armv8-timer"; 2610 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2611 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2612 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2613 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2614 }; 2615 2616 /* External USB clocks - can be overridden by the board */ 2617 usb3s0_clk: usb3s0 { 2618 compatible = "fixed-clock"; 2619 #clock-cells = <0>; 2620 clock-frequency = <0>; 2621 }; 2622 2623 usb_extal_clk: usb_extal { 2624 compatible = "fixed-clock"; 2625 #clock-cells = <0>; 2626 clock-frequency = <0>; 2627 }; 2628}; 2629