1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the RZ/G2[HMN] HiHope sub board common parts
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
7
8/ {
9	aliases {
10		ethernet0 = &avb;
11	};
12
13	chosen {
14		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
15	};
16};
17
18&avb {
19	pinctrl-0 = <&avb_pins>;
20	pinctrl-names = "default";
21	phy-handle = <&phy0>;
22	tx-internal-delay-ps = <2000>;
23	rx-internal-delay-ps = <1800>;
24	status = "okay";
25
26	phy0: ethernet-phy@0 {
27		reg = <0>;
28		interrupt-parent = <&gpio2>;
29		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
30		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
31	};
32};
33
34&can0 {
35	pinctrl-0 = <&can0_pins>;
36	pinctrl-names = "default";
37	status = "okay";
38};
39
40&can1 {
41	pinctrl-0 = <&can1_pins>;
42	pinctrl-names = "default";
43	status = "okay";
44};
45
46&pciec0 {
47	status = "okay";
48};
49
50&pfc {
51	pinctrl-0 = <&scif_clk_pins>;
52	pinctrl-names = "default";
53
54	avb_pins: avb {
55		mux {
56			groups = "avb_link", "avb_mdio", "avb_mii";
57			function = "avb";
58		};
59
60		pins_mdio {
61			groups = "avb_mdio";
62			drive-strength = <24>;
63		};
64
65		pins_mii_tx {
66			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
67			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
68			drive-strength = <12>;
69		};
70	};
71
72	can0_pins: can0 {
73		groups = "can0_data_a";
74		function = "can0";
75	};
76
77	can1_pins: can1 {
78		groups = "can1_data";
79		function = "can1";
80	};
81
82	pwm0_pins: pwm0 {
83		groups = "pwm0";
84		function = "pwm0";
85	};
86};
87
88&pwm0 {
89	pinctrl-0 = <&pwm0_pins>;
90	pinctrl-names = "default";
91
92	status = "okay";
93};
94