1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Ebisu board
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10
11/ {
12	model = "Renesas Ebisu board";
13	compatible = "renesas,ebisu";
14
15	aliases {
16		serial0 = &scif2;
17		ethernet0 = &avb;
18		mmc0 = &sdhi3;
19		mmc1 = &sdhi0;
20		mmc2 = &sdhi1;
21	};
22
23	chosen {
24		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
25		stdout-path = "serial0:115200n8";
26	};
27
28	audio_clkout: audio-clkout {
29		/*
30		 * This is same as <&rcar_sound 0>
31		 * but needed to avoid cs2000/rcar_sound probe dead-lock
32		 */
33		compatible = "fixed-clock";
34		#clock-cells = <0>;
35		clock-frequency = <11289600>;
36	};
37
38	backlight: backlight {
39		compatible = "pwm-backlight";
40		pwms = <&pwm3 0 50000>;
41
42		brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
43		default-brightness-level = <10>;
44
45		power-supply = <&reg_12p0v>;
46	};
47
48	cvbs-in {
49		compatible = "composite-video-connector";
50		label = "CVBS IN";
51
52		port {
53			cvbs_con: endpoint {
54				remote-endpoint = <&adv7482_ain7>;
55			};
56		};
57	};
58
59	hdmi-in {
60		compatible = "hdmi-connector";
61		label = "HDMI IN";
62		type = "a";
63
64		port {
65			hdmi_in_con: endpoint {
66				remote-endpoint = <&adv7482_hdmi>;
67			};
68		};
69	};
70
71	hdmi-out {
72		compatible = "hdmi-connector";
73		type = "a";
74
75		port {
76			hdmi_con_out: endpoint {
77				remote-endpoint = <&adv7511_out>;
78			};
79		};
80	};
81
82	keys {
83		compatible = "gpio-keys";
84
85		pinctrl-0 = <&keys_pins>;
86		pinctrl-names = "default";
87
88		key-1 {
89			gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
90			linux,code = <KEY_1>;
91			label = "SW4-1";
92			wakeup-source;
93			debounce-interval = <20>;
94		};
95		key-2 {
96			gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
97			linux,code = <KEY_2>;
98			label = "SW4-2";
99			wakeup-source;
100			debounce-interval = <20>;
101		};
102		key-3 {
103			gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
104			linux,code = <KEY_3>;
105			label = "SW4-3";
106			wakeup-source;
107			debounce-interval = <20>;
108		};
109		key-4 {
110			gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
111			linux,code = <KEY_4>;
112			label = "SW4-4";
113			wakeup-source;
114			debounce-interval = <20>;
115		};
116	};
117
118	lvds-decoder {
119		compatible = "thine,thc63lvd1024";
120		vcc-supply = <&reg_3p3v>;
121
122		ports {
123			#address-cells = <1>;
124			#size-cells = <0>;
125
126			port@0 {
127				reg = <0>;
128				thc63lvd1024_in: endpoint {
129					remote-endpoint = <&lvds0_out>;
130				};
131			};
132
133			port@2 {
134				reg = <2>;
135				thc63lvd1024_out: endpoint {
136					remote-endpoint = <&adv7511_in>;
137				};
138			};
139		};
140	};
141
142	memory@48000000 {
143		device_type = "memory";
144		/* first 128MB is reserved for secure area. */
145		reg = <0x0 0x48000000 0x0 0x38000000>;
146	};
147
148	reg_1p8v: regulator0 {
149		compatible = "regulator-fixed";
150		regulator-name = "fixed-1.8V";
151		regulator-min-microvolt = <1800000>;
152		regulator-max-microvolt = <1800000>;
153		regulator-boot-on;
154		regulator-always-on;
155	};
156
157	reg_3p3v: regulator1 {
158		compatible = "regulator-fixed";
159		regulator-name = "fixed-3.3V";
160		regulator-min-microvolt = <3300000>;
161		regulator-max-microvolt = <3300000>;
162		regulator-boot-on;
163		regulator-always-on;
164	};
165
166	reg_12p0v: regulator2 {
167		compatible = "regulator-fixed";
168		regulator-name = "D12.0V";
169		regulator-min-microvolt = <12000000>;
170		regulator-max-microvolt = <12000000>;
171		regulator-boot-on;
172		regulator-always-on;
173	};
174
175	rsnd_ak4613: sound {
176		compatible = "simple-audio-card";
177
178		simple-audio-card,name = "rsnd-ak4613";
179		simple-audio-card,format = "left_j";
180		simple-audio-card,bitclock-master = <&sndcpu>;
181		simple-audio-card,frame-master = <&sndcpu>;
182
183		sndcodec: simple-audio-card,codec {
184			sound-dai = <&ak4613>;
185		};
186
187		sndcpu: simple-audio-card,cpu {
188			sound-dai = <&rcar_sound>;
189		};
190	};
191
192	vbus0_usb2: regulator-vbus0-usb2 {
193		compatible = "regulator-fixed";
194
195		regulator-name = "USB20_VBUS_CN";
196		regulator-min-microvolt = <5000000>;
197		regulator-max-microvolt = <5000000>;
198
199		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
200		enable-active-high;
201	};
202
203	vcc_sdhi0: regulator-vcc-sdhi0 {
204		compatible = "regulator-fixed";
205
206		regulator-name = "SDHI0 Vcc";
207		regulator-min-microvolt = <3300000>;
208		regulator-max-microvolt = <3300000>;
209
210		gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
211		enable-active-high;
212	};
213
214	vccq_sdhi0: regulator-vccq-sdhi0 {
215		compatible = "regulator-gpio";
216
217		regulator-name = "SDHI0 VccQ";
218		regulator-min-microvolt = <1800000>;
219		regulator-max-microvolt = <3300000>;
220
221		gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
222		gpios-states = <1>;
223		states = <3300000 1>, <1800000 0>;
224	};
225
226	vcc_sdhi1: regulator-vcc-sdhi1 {
227		compatible = "regulator-fixed";
228
229		regulator-name = "SDHI1 Vcc";
230		regulator-min-microvolt = <3300000>;
231		regulator-max-microvolt = <3300000>;
232
233		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
234		enable-active-high;
235	};
236
237	vccq_sdhi1: regulator-vccq-sdhi1 {
238		compatible = "regulator-gpio";
239
240		regulator-name = "SDHI1 VccQ";
241		regulator-min-microvolt = <1800000>;
242		regulator-max-microvolt = <3300000>;
243
244		gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
245		gpios-states = <1>;
246		states = <3300000 1>, <1800000 0>;
247	};
248
249	vga {
250		compatible = "vga-connector";
251
252		port {
253			vga_in: endpoint {
254				remote-endpoint = <&adv7123_out>;
255			};
256		};
257	};
258
259	vga-encoder {
260		compatible = "adi,adv7123";
261
262		ports {
263			#address-cells = <1>;
264			#size-cells = <0>;
265
266			port@0 {
267				reg = <0>;
268				adv7123_in: endpoint {
269					remote-endpoint = <&du_out_rgb>;
270				};
271			};
272			port@1 {
273				reg = <1>;
274				adv7123_out: endpoint {
275					remote-endpoint = <&vga_in>;
276				};
277			};
278		};
279	};
280
281	x12_clk: x12 {
282		compatible = "fixed-clock";
283		#clock-cells = <0>;
284		clock-frequency = <24576000>;
285	};
286
287	x13_clk: x13 {
288		compatible = "fixed-clock";
289		#clock-cells = <0>;
290		clock-frequency = <74250000>;
291	};
292};
293
294&audio_clk_a {
295	clock-frequency = <22579200>;
296};
297
298&avb {
299	pinctrl-0 = <&avb_pins>;
300	pinctrl-names = "default";
301	phy-handle = <&phy0>;
302	status = "okay";
303
304	phy0: ethernet-phy@0 {
305		rxc-skew-ps = <1500>;
306		reg = <0>;
307		interrupt-parent = <&gpio2>;
308		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
309		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
310		/*
311		 * TX clock internal delay mode is required for reliable
312		 * 1Gbps communication using the KSZ9031RNX phy present on
313		 * the Ebisu board, however, TX clock internal delay mode
314		 * isn't supported on R-Car E3(e).  Thus, limit speed to
315		 * 100Mbps for reliable communication.
316		 */
317		max-speed = <100>;
318	};
319};
320
321&canfd {
322	pinctrl-0 = <&canfd0_pins>;
323	pinctrl-names = "default";
324	status = "okay";
325
326	channel0 {
327		status = "okay";
328	};
329};
330
331&csi40 {
332	status = "okay";
333
334	ports {
335		port@0 {
336			csi40_in: endpoint {
337				clock-lanes = <0>;
338				data-lanes = <1 2>;
339				remote-endpoint = <&adv7482_txa>;
340			};
341		};
342	};
343};
344
345&du {
346	pinctrl-0 = <&du_pins>;
347	pinctrl-names = "default";
348	status = "okay";
349
350	clocks = <&cpg CPG_MOD 724>,
351		 <&cpg CPG_MOD 723>,
352		 <&x13_clk>;
353	clock-names = "du.0", "du.1", "dclkin.0";
354
355	ports {
356		port@0 {
357			endpoint {
358				remote-endpoint = <&adv7123_in>;
359			};
360		};
361	};
362};
363
364&ehci0 {
365	dr_mode = "otg";
366	status = "okay";
367};
368
369&extal_clk {
370	clock-frequency = <48000000>;
371};
372
373&hsusb {
374	dr_mode = "otg";
375	status = "okay";
376};
377
378&i2c0 {
379	status = "okay";
380
381	io_expander: gpio@20 {
382		compatible = "onnn,pca9654";
383		reg = <0x20>;
384		gpio-controller;
385		#gpio-cells = <2>;
386		interrupt-parent = <&gpio2>;
387		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
388	};
389
390	hdmi-encoder@39 {
391		compatible = "adi,adv7511w";
392		reg = <0x39>;
393		interrupt-parent = <&gpio1>;
394		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
395
396		adi,input-depth = <8>;
397		adi,input-colorspace = "rgb";
398		adi,input-clock = "1x";
399
400		ports {
401			#address-cells = <1>;
402			#size-cells = <0>;
403
404			port@0 {
405				reg = <0>;
406				adv7511_in: endpoint {
407					remote-endpoint = <&thc63lvd1024_out>;
408				};
409			};
410
411			port@1 {
412				reg = <1>;
413				adv7511_out: endpoint {
414					remote-endpoint = <&hdmi_con_out>;
415				};
416			};
417		};
418	};
419
420	video-receiver@70 {
421		compatible = "adi,adv7482";
422		reg = <0x70>;
423
424		#address-cells = <1>;
425		#size-cells = <0>;
426
427		interrupt-parent = <&gpio0>;
428		interrupt-names = "intrq1", "intrq2";
429		interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
430			     <17 IRQ_TYPE_LEVEL_LOW>;
431
432		port@7 {
433			reg = <7>;
434
435			adv7482_ain7: endpoint {
436				remote-endpoint = <&cvbs_con>;
437			};
438		};
439
440		port@8 {
441			reg = <8>;
442
443			adv7482_hdmi: endpoint {
444				remote-endpoint = <&hdmi_in_con>;
445			};
446		};
447
448		port@a {
449			reg = <10>;
450
451			adv7482_txa: endpoint {
452				clock-lanes = <0>;
453				data-lanes = <1 2>;
454				remote-endpoint = <&csi40_in>;
455			};
456		};
457	};
458};
459
460&i2c3 {
461	status = "okay";
462
463	ak4613: codec@10 {
464		compatible = "asahi-kasei,ak4613";
465		#sound-dai-cells = <0>;
466		reg = <0x10>;
467		clocks = <&rcar_sound 3>;
468
469		asahi-kasei,in1-single-end;
470		asahi-kasei,in2-single-end;
471		asahi-kasei,out1-single-end;
472		asahi-kasei,out2-single-end;
473		asahi-kasei,out3-single-end;
474		asahi-kasei,out4-single-end;
475		asahi-kasei,out5-single-end;
476		asahi-kasei,out6-single-end;
477	};
478
479	cs2000: clk-multiplier@4f {
480		#clock-cells = <0>;
481		compatible = "cirrus,cs2000-cp";
482		reg = <0x4f>;
483		clocks = <&audio_clkout>, <&x12_clk>;
484		clock-names = "clk_in", "ref_clk";
485
486		assigned-clocks = <&cs2000>;
487		assigned-clock-rates = <24576000>; /* 1/1 divide */
488	};
489};
490
491&i2c_dvfs {
492	status = "okay";
493
494	clock-frequency = <400000>;
495
496	pmic: pmic@30 {
497		pinctrl-0 = <&irq0_pins>;
498		pinctrl-names = "default";
499
500		compatible = "rohm,bd9571mwv";
501		reg = <0x30>;
502		interrupt-parent = <&intc_ex>;
503		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
504		interrupt-controller;
505		#interrupt-cells = <2>;
506		gpio-controller;
507		#gpio-cells = <2>;
508		rohm,ddr-backup-power = <0x1>;
509		rohm,rstbmode-level;
510	};
511
512	eeprom@50 {
513		compatible = "rohm,br24t01", "atmel,24c01";
514		reg = <0x50>;
515		pagesize = <8>;
516	};
517};
518
519&lvds0 {
520	status = "okay";
521
522	clocks = <&cpg CPG_MOD 727>,
523		 <&x13_clk>,
524		 <&extal_clk>;
525	clock-names = "fck", "dclkin.0", "extal";
526
527	ports {
528		port@1 {
529			lvds0_out: endpoint {
530				remote-endpoint = <&thc63lvd1024_in>;
531			};
532		};
533	};
534};
535
536&lvds1 {
537	/*
538	 * Even though the LVDS1 output is not connected, the encoder must be
539	 * enabled to supply a pixel clock to the DU for the DPAD output when
540	 * LVDS0 is in use.
541	 */
542	status = "okay";
543
544	clocks = <&cpg CPG_MOD 727>,
545		 <&x13_clk>,
546		 <&extal_clk>;
547	clock-names = "fck", "dclkin.0", "extal";
548};
549
550&ohci0 {
551	dr_mode = "otg";
552	status = "okay";
553};
554
555&pcie_bus_clk {
556	clock-frequency = <100000000>;
557};
558
559&pciec0 {
560	status = "okay";
561};
562
563&pfc {
564	avb_pins: avb {
565		groups = "avb_link", "avb_mii";
566		function = "avb";
567	};
568
569	canfd0_pins: canfd0 {
570		groups = "canfd0_data";
571		function = "canfd0";
572	};
573
574	du_pins: du {
575		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
576		function = "du";
577	};
578
579	irq0_pins: irq0 {
580		groups = "intc_ex_irq0";
581		function = "intc_ex";
582	};
583
584	keys_pins: keys {
585		pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
586		bias-pull-up;
587	};
588
589	pwm3_pins: pwm3 {
590		groups = "pwm3_b";
591		function = "pwm3";
592	};
593
594	pwm5_pins: pwm5 {
595		groups = "pwm5_a";
596		function = "pwm5";
597	};
598
599	scif2_pins: scif2 {
600		groups = "scif2_data_a";
601		function = "scif2";
602	};
603
604	sdhi0_pins: sd0 {
605		groups = "sdhi0_data4", "sdhi0_ctrl";
606		function = "sdhi0";
607		power-source = <3300>;
608	};
609
610	sdhi0_pins_uhs: sd0_uhs {
611		groups = "sdhi0_data4", "sdhi0_ctrl";
612		function = "sdhi0";
613		power-source = <1800>;
614	};
615
616	sdhi1_pins: sd1 {
617		groups = "sdhi1_data4", "sdhi1_ctrl";
618		function = "sdhi1";
619		power-source = <3300>;
620	};
621
622	sdhi1_pins_uhs: sd1_uhs {
623		groups = "sdhi1_data4", "sdhi1_ctrl";
624		function = "sdhi1";
625		power-source = <1800>;
626	};
627
628	sdhi3_pins: sd3 {
629		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
630		function = "sdhi3";
631		power-source = <1800>;
632	};
633
634	sound_clk_pins: sound_clk {
635		groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
636			 "audio_clkout_a", "audio_clkout1_a";
637		function = "audio_clk";
638	};
639
640	sound_pins: sound {
641		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
642		function = "ssi";
643	};
644
645	usb0_pins: usb {
646		groups = "usb0_b", "usb0_id";
647		function = "usb0";
648	};
649
650	usb30_pins: usb30 {
651		groups = "usb30";
652		function = "usb30";
653	};
654};
655
656&pwm3 {
657	pinctrl-0 = <&pwm3_pins>;
658	pinctrl-names = "default";
659
660	status = "okay";
661};
662
663&pwm5 {
664	pinctrl-0 = <&pwm5_pins>;
665	pinctrl-names = "default";
666
667	status = "okay";
668};
669
670&rcar_sound {
671	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
672	pinctrl-names = "default";
673
674	/* Single DAI */
675	#sound-dai-cells = <0>;
676
677	/* audio_clkout0/1/2/3 */
678	#clock-cells = <1>;
679	clock-frequency = <12288000 11289600>;
680
681	status = "okay";
682
683	/* update <audio_clk_b> to <cs2000> */
684	clocks = <&cpg CPG_MOD 1005>,
685		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
686		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
687		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
688		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
689		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
690		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
691		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
692		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
693		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
694		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
695		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
696		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
697		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
698		 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
699		 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
700
701	rcar_sound,dai {
702		dai0 {
703			playback = <&ssi0>, <&src0>, <&dvc0>;
704			capture  = <&ssi1>, <&src1>, <&dvc1>;
705		};
706	};
707
708};
709
710&rwdt {
711	timeout-sec = <60>;
712	status = "okay";
713};
714
715&scif2 {
716	pinctrl-0 = <&scif2_pins>;
717	pinctrl-names = "default";
718
719	status = "okay";
720};
721
722&sdhi0 {
723	pinctrl-0 = <&sdhi0_pins>;
724	pinctrl-1 = <&sdhi0_pins_uhs>;
725	pinctrl-names = "default", "state_uhs";
726
727	vmmc-supply = <&vcc_sdhi0>;
728	vqmmc-supply = <&vccq_sdhi0>;
729	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
730	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
731	bus-width = <4>;
732	sd-uhs-sdr50;
733	sd-uhs-sdr104;
734	status = "okay";
735};
736
737&sdhi1 {
738	pinctrl-0 = <&sdhi1_pins>;
739	pinctrl-1 = <&sdhi1_pins_uhs>;
740	pinctrl-names = "default", "state_uhs";
741
742	vmmc-supply = <&vcc_sdhi1>;
743	vqmmc-supply = <&vccq_sdhi1>;
744	cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
745	bus-width = <4>;
746	sd-uhs-sdr50;
747	sd-uhs-sdr104;
748	status = "okay";
749};
750
751&sdhi3 {
752	/* used for on-board 8bit eMMC */
753	pinctrl-0 = <&sdhi3_pins>;
754	pinctrl-1 = <&sdhi3_pins>;
755	pinctrl-names = "default", "state_uhs";
756
757	vmmc-supply = <&reg_3p3v>;
758	vqmmc-supply = <&reg_1p8v>;
759	mmc-hs200-1_8v;
760	mmc-hs400-1_8v;
761	bus-width = <8>;
762	no-sd;
763	no-sdio;
764	non-removable;
765	full-pwr-cycle-in-suspend;
766	status = "okay";
767};
768
769&ssi1 {
770	shared-pin;
771};
772
773&usb2_phy0 {
774	pinctrl-0 = <&usb0_pins>;
775	pinctrl-names = "default";
776
777	vbus-supply = <&vbus0_usb2>;
778	status = "okay";
779};
780
781&usb3_peri0 {
782	companion = <&xhci0>;
783	status = "okay";
784};
785
786&vin4 {
787	status = "okay";
788};
789
790&vin5 {
791	status = "okay";
792};
793
794&xhci0 {
795	pinctrl-0 = <&usb30_pins>;
796	pinctrl-names = "default";
797
798	status = "okay";
799};
800