1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2020, Compass Electronics Group, LLC
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/input/input.h>
8#include <dt-bindings/clk/versaclock.h>
9
10/ {
11	backlight_lvds: backlight-lvds {
12		compatible = "pwm-backlight";
13		power-supply = <&reg_lcd>;
14		enable-gpios = <&gpio_exp1 3 GPIO_ACTIVE_HIGH>;
15		pwms = <&pwm2 0 25000>;
16		brightness-levels = <0 4 8 16 32 64 128 255>;
17		default-brightness-level = <6>;
18	};
19
20	backlight_dpi: backlight-dpi {
21		compatible = "pwm-backlight";
22		power-supply = <&reg_lcd>;
23		enable-gpios = <&gpio_exp1 7 GPIO_ACTIVE_LOW>;
24		pwms = <&pwm0 0 25000>;
25		brightness-levels = <0 25 33 50 63 75 88 100>;
26		default-brightness-level = <6>;
27	};
28
29	hdmi0-out {
30		compatible = "hdmi-connector";
31		type = "a";
32
33		port {
34			hdmi0_con: endpoint {
35				remote-endpoint = <&rcar_dw_hdmi0_out>;
36			};
37		};
38	};
39
40	keys {
41		compatible = "gpio-keys";
42
43		key-1 {
44			gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
45			linux,code = <KEY_1>;
46			label = "Switch-1";
47			wakeup-source;
48			debounce-interval = <20>;
49		};
50		key-2 {
51			gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
52			linux,code = <KEY_2>;
53			label = "Switch-2";
54			wakeup-source;
55			debounce-interval = <20>;
56		};
57		key-3 {
58			gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
59			linux,code = <KEY_3>;
60			label = "Switch-3";
61			wakeup-source;
62			debounce-interval = <20>;
63		};
64		key-4 {
65			gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
66			linux,code = <KEY_4>;
67			label = "Switch-4";
68			wakeup-source;
69			debounce-interval = <20>;
70		};
71		key-5 {
72			gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
73			linux,code = <KEY_5>;
74			label = "Switch-4";
75			wakeup-source;
76			debounce-interval = <20>;
77		};
78	};
79
80	leds {
81		compatible = "gpio-leds";
82		pinctrl-0 = <&led_pins>;
83		pinctrl-names = "default";
84
85		led0 {
86			gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
87			label = "LED0";
88			linux,default-trigger = "heartbeat";
89		};
90		led1 {
91			gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
92			label = "LED1";
93		};
94		led2 {
95			gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
96			label = "LED2";
97		};
98		led3 {
99			gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
100			label = "LED3";
101		};
102	};
103
104	lvds {
105		compatible = "panel-lvds";
106		power-supply = <&reg_lcd_reset>;
107		width-mm = <223>;
108		height-mm = <125>;
109		backlight = <&backlight_lvds>;
110		data-mapping = "vesa-24";
111
112		panel-timing {
113			/* 800x480@60Hz */
114			clock-frequency = <30000000>;
115			hactive = <800>;
116			vactive = <480>;
117			hsync-len = <48>;
118			hfront-porch = <40>;
119			hback-porch = <40>;
120			vfront-porch = <13>;
121			vback-porch = <29>;
122			vsync-len = <1>;
123			hsync-active = <1>;
124			vsync-active = <3>;
125			de-active = <1>;
126			pixelclk-active = <0>;
127		};
128
129		port {
130			panel_in: endpoint {
131				remote-endpoint = <&lvds0_out>;
132			};
133		};
134	};
135
136	rgb {
137		/* Different LCD with compatible timings */
138		compatible = "rocktech,rk070er9427";
139		backlight = <&backlight_dpi>;
140		enable-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
141		power-supply = <&reg_lcd>;
142		port {
143			rgb_panel: endpoint {
144				remote-endpoint = <&du_out_rgb>;
145			};
146		};
147	};
148
149	reg_audio: regulator_audio {
150		compatible = "regulator-fixed";
151		regulator-name = "audio-1.8V";
152		regulator-min-microvolt = <1800000>;
153		regulator-max-microvolt = <1800000>;
154		gpio = <&gpio_exp4 1 GPIO_ACTIVE_HIGH>;
155		enable-active-high;
156	};
157
158	reg_lcd: regulator-lcd {
159		compatible = "regulator-fixed";
160		regulator-name = "lcd_panel_pwr";
161		regulator-min-microvolt = <3300000>;
162		regulator-max-microvolt = <3300000>;
163		gpio = <&gpio_exp1 1 GPIO_ACTIVE_HIGH>;
164		enable-active-high;
165	};
166
167	reg_lcd_reset: regulator-lcd-reset {
168		compatible = "regulator-fixed";
169		regulator-name = "nLCD_RESET";
170		regulator-min-microvolt = <3300000>;
171		regulator-max-microvolt = <3300000>;
172		gpio = <&gpio5 3 GPIO_ACTIVE_HIGH>;
173		enable-active-high;
174		vin-supply = <&reg_lcd>;
175	};
176
177	reg_cam0: regulator_camera {
178		compatible = "regulator-fixed";
179		regulator-name = "reg_cam0";
180		regulator-min-microvolt = <1800000>;
181		regulator-max-microvolt = <1800000>;
182		gpio = <&gpio_exp2 2 GPIO_ACTIVE_HIGH>;
183		enable-active-high;
184	};
185
186	reg_cam1: regulator_camera {
187		compatible = "regulator-fixed";
188		regulator-name = "reg_cam1";
189		regulator-min-microvolt = <1800000>;
190		regulator-max-microvolt = <1800000>;
191		gpio = <&gpio_exp2 5 GPIO_ACTIVE_HIGH>;
192		enable-active-high;
193		startup-delay-us = <100000>;
194	};
195
196	sound_card {
197		compatible = "audio-graph-card";
198		label = "rcar-sound";
199		dais = <&rsnd_port0>, <&rsnd_port1>;
200	};
201
202	vccq_sdhi0: regulator-vccq-sdhi0 {
203		compatible = "regulator-gpio";
204		regulator-name = "SDHI0 VccQ";
205		regulator-min-microvolt = <1800000>;
206		regulator-max-microvolt = <3300000>;
207		gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
208		gpios-states = <1>;
209		states = <3300000 1>, <1800000 0>;
210	};
211
212	/* External DU dot clocks */
213	x302_clk: x302-clock {
214		compatible = "fixed-clock";
215		#clock-cells = <0>;
216		clock-frequency = <33000000>;
217	};
218
219	x304_clk: x304-clock {
220		compatible = "fixed-clock";
221		#clock-cells = <0>;
222		clock-frequency = <25000000>;
223	};
224
225	connector {
226		compatible = "usb-c-connector";
227		label = "USB-C";
228		data-role = "dual";
229
230		ports {
231			#address-cells = <1>;
232			#size-cells = <0>;
233			port@0 {
234				reg = <0>;
235				hs_ep: endpoint {
236					remote-endpoint = <&usb3_hs_ep>;
237				};
238			};
239			port@1 {
240				reg = <1>;
241				ss_ep: endpoint {
242					remote-endpoint = <&hd3ss3220_in_ep>;
243				};
244			};
245		};
246	};
247};
248
249&audio_clk_a {
250	clock-frequency = <24576000>;
251	assigned-clocks = <&versaclock6_bb 4>;
252	assigned-clock-rates = <24576000>;
253};
254
255&audio_clk_b {
256	clock-frequency = <22579200>;
257};
258
259&can0 {
260	pinctrl-0 = <&can0_pins>;
261	pinctrl-names = "default";
262	renesas,can-clock-select = <0x0>;
263	status = "okay";
264};
265
266&can1 {
267	pinctrl-0 = <&can1_pins>;
268	pinctrl-names = "default";
269	renesas,can-clock-select = <0x0>;
270	status = "okay";
271};
272
273&du {
274	pinctrl-0 = <&du_pins>;
275	pinctrl-names = "default";
276	status = "okay";
277
278	clocks = <&cpg CPG_MOD 724>,
279		<&cpg CPG_MOD 723>,
280		<&cpg CPG_MOD 722>,
281		<&versaclock5 1>,
282		<&x302_clk>,
283		<&versaclock5 2>;
284	clock-names = "du.0", "du.1", "du.2",
285		"dclkin.0", "dclkin.1", "dclkin.2";
286};
287
288&du_out_rgb {
289	remote-endpoint = <&rgb_panel>;
290};
291
292&ehci0 {
293	dr_mode = "otg";
294	status = "okay";
295	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
296};
297
298&ehci1 {
299	status = "okay";
300	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
301};
302
303&hdmi0 {
304	status = "okay";
305	ports {
306		#address-cells = <1>;
307		#size-cells = <0>;
308		port@0 {
309			reg = <0>;
310			dw_hdmi0_in: endpoint {
311				remote-endpoint = <&du_out_hdmi0>;
312			};
313		};
314		port@1 {
315			reg = <1>;
316			rcar_dw_hdmi0_out: endpoint {
317				remote-endpoint = <&hdmi0_con>;
318			};
319		};
320		port@2 {
321			reg = <2>;
322			dw_hdmi0_snd_in: endpoint {
323				remote-endpoint = <&rsnd_endpoint1>;
324			};
325		};
326	};
327};
328
329&hscif1 {
330	pinctrl-0 = <&hscif1_pins>;
331	pinctrl-names = "default";
332	uart-has-rtscts;
333	status = "okay";
334};
335
336&hsusb {
337	dr_mode = "otg";
338	status = "okay";
339};
340
341&i2c2 {
342	status = "okay";
343	clock-frequency = <400000>;
344	pinctrl-0 = <&i2c2_pins>;
345	pinctrl-names = "default";
346
347	gpio_exp2: gpio@21 {
348		compatible = "onnn,pca9654";
349		reg = <0x21>;
350		gpio-controller;
351		#gpio-cells = <2>;
352	};
353
354	gpio_exp3: gpio@22 {
355		compatible = "onnn,pca9654";
356		reg = <0x22>;
357		gpio-controller;
358		#gpio-cells = <2>;
359	};
360
361	gpio_exp4: gpio@23 {
362		compatible = "onnn,pca9654";
363		reg = <0x23>;
364		gpio-controller;
365		#gpio-cells = <2>;
366	};
367
368	versaclock6_bb: clock-controller@6a {
369		compatible = "idt,5p49v6965";
370		reg = <0x6a>;
371		#clock-cells = <1>;
372		clocks = <&x304_clk>;
373		clock-names = "xin";
374
375		assigned-clocks = <&versaclock6_bb 1>,
376				   <&versaclock6_bb 2>,
377				   <&versaclock6_bb 3>,
378				   <&versaclock6_bb 4>;
379		assigned-clock-rates =	<24000000>, <24000000>, <24000000>, <24576000>;
380
381		OUT1 {
382			idt,mode = <VC5_CMOS>;
383			idt,voltage-microvolt = <1800000>;
384			idt,slew-percent = <100>;
385		};
386
387		OUT2 {
388			idt,mode = <VC5_CMOS>;
389			idt,voltage-microvolt = <1800000>;
390			idt,slew-percent = <100>;
391		};
392
393		OUT3 {
394			idt,mode = <VC5_CMOS>;
395			idt,voltage-microvolt = <3300000>;
396			idt,slew-percent = <100>;
397		};
398
399		OUT4 {
400			idt,mode = <VC5_CMOS>;
401			idt,voltage-microvolt = <3300000>;
402			idt,slew-percent = <100>;
403		};
404	};
405};
406
407&i2c0 {
408	status = "okay";
409	clock-frequency = <400000>;
410
411	pinctrl-0 = <&i2c0_pins>;
412	pinctrl-names = "default";
413};
414
415&i2c5 {
416	status = "okay";
417	clock-frequency = <100000>;
418	pinctrl-0 = <&i2c5_pins>;
419	pinctrl-names = "default";
420
421	codec: wm8962@1a {
422		compatible = "wlf,wm8962";
423		reg = <0x1a>;
424		DCVDD-supply = <&reg_audio>;
425		DBVDD-supply = <&reg_audio>;
426		AVDD-supply = <&reg_audio>;
427		CPVDD-supply = <&reg_audio>;
428		MICVDD-supply = <&reg_audio>;
429		PLLVDD-supply = <&reg_audio>;
430		SPKVDD1-supply = <&reg_audio>;
431		SPKVDD2-supply = <&reg_audio>;
432		gpio-cfg = <
433			0x0000 /* 0:Default */
434			0x0000 /* 1:Default */
435			0x0000 /* 2:Default */
436			0x0000 /* 3:Default */
437			0x0000 /* 4:Default */
438			0x0000 /* 5:Default */
439		>;
440		port {
441			wm8962_endpoint: endpoint {
442				remote-endpoint = <&rsnd_endpoint0>;
443			};
444		};
445	};
446
447	/* 0 - lcd_reset */
448	/* 1 - lcd_pwr */
449	/* 2 - lcd_select */
450	/* 3 - backlight-enable */
451	/* 4 - Touch_shdwn */
452	/* 5 - LCD_H_pol */
453	/* 6 - lcd_V_pol */
454	gpio_exp1: gpio@20 {
455		compatible = "onnn,pca9654";
456		reg = <0x20>;
457		gpio-controller;
458		#gpio-cells = <2>;
459	};
460
461	touchscreen@26 {
462		compatible = "ilitek,ili2117";
463		reg = <0x26>;
464		interrupt-parent = <&gpio5>;
465		interrupts = <9 IRQ_TYPE_EDGE_RISING>;
466		wakeup-source;
467	};
468
469	hd3ss3220@47 {
470		compatible = "ti,hd3ss3220";
471		reg = <0x47>;
472		interrupt-parent = <&gpio6>;
473		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
474
475		ports {
476			#address-cells = <1>;
477			#size-cells = <0>;
478			port@0 {
479				reg = <0>;
480				hd3ss3220_in_ep: endpoint {
481					remote-endpoint = <&ss_ep>;
482				};
483			};
484			port@1 {
485				reg = <1>;
486				hd3ss3220_out_ep: endpoint {
487					remote-endpoint = <&usb3_role_switch>;
488				};
489			};
490		};
491	};
492};
493
494&lvds0 {
495	status = "okay";
496
497	ports {
498		port@1 {
499			lvds0_out: endpoint {
500				remote-endpoint = <&panel_in>;
501			};
502		};
503	};
504};
505
506&msiof1 {
507	pinctrl-0 = <&msiof1_pins>;
508	pinctrl-names = "default";
509	status = "okay";
510	cs-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
511};
512
513&ohci0 {
514	dr_mode = "otg";
515	status = "okay";
516};
517
518&ohci1 {
519	status = "okay";
520};
521
522&pciec0 {
523	status = "okay";
524};
525
526&pciec1 {
527	status = "okay";
528};
529
530&pcie_bus_clk {
531	clock-frequency = <100000000>;
532};
533
534&pfc {
535	can0_pins: can0 {
536		groups = "can0_data_a";
537		function = "can0";
538	};
539
540	can1_pins: can1 {
541		groups = "can1_data";
542		function = "can1";
543	};
544
545	du_pins: du {
546		groups = "du_rgb888", "du_sync", "du_clk_out_1", "du_disp";
547		function = "du";
548	};
549
550	i2c2_pins: i2c2 {
551		groups = "i2c2_a";
552		function = "i2c2";
553	};
554
555	i2c5_pins: i2c5 {
556		groups = "i2c5";
557		function = "i2c5";
558	};
559
560	led_pins: leds {
561		/* GP_0_4 , AVS1, AVS2, GP_7_3 */
562		pins = "GP_0_4", "GP_7_0", "GP_7_1", "GP_7_3";
563		bias-pull-down;
564	};
565
566	msiof1_pins: msiof1 {
567		groups = "msiof1_clk_g", "msiof1_rxd_g", "msiof1_txd_g";
568		function = "msiof1";
569	};
570
571	pwm0_pins: pwm0 {
572		groups = "pwm0";
573		function = "pwm0";
574	};
575
576	pwm2_pins: pwm2 {
577		groups = "pwm2_a";
578		function = "pwm2";
579	};
580
581	sdhi0_pins: sd0 {
582		groups = "sdhi0_data4", "sdhi0_ctrl";
583		function = "sdhi0";
584		power-source = <3300>;
585	};
586
587	sdhi0_pins_uhs: sd0_uhs {
588		groups = "sdhi0_data4", "sdhi0_ctrl";
589		function = "sdhi0";
590		power-source = <1800>;
591	};
592
593	sound_pins: sound {
594		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
595		function = "ssi";
596	};
597
598	sound_clk_pins: sound_clk {
599		groups = "audio_clk_a_a";
600		function = "audio_clk";
601	};
602
603	usb0_pins: usb0 {
604		mux {
605			groups = "usb0";
606			function = "usb0";
607		};
608	};
609
610	usb1_pins: usb1 {
611		mux {
612			groups = "usb1";
613			function = "usb1";
614		};
615	};
616
617	usb30_pins: usb30 {
618		mux {
619			groups = "usb30";
620			function = "usb30";
621		};
622	};
623};
624
625&pwm0 {
626	pinctrl-0 = <&pwm0_pins>;
627	pinctrl-names = "default";
628	status = "okay";
629};
630
631&pwm2 {
632	pinctrl-0 = <&pwm2_pins>;
633	pinctrl-names = "default";
634	status = "okay";
635};
636
637&rcar_sound {
638	pinctrl-0 = <&sound_pins &sound_clk_pins>;
639	pinctrl-names = "default";
640
641	/* Single DAI */
642	#sound-dai-cells = <0>;
643
644	/* audio_clkout0/1/2/3 */
645	#clock-cells = <1>;
646	clock-frequency = <11289600>;
647
648	status = "okay";
649
650	clocks = <&cpg CPG_MOD 1005>,
651		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
652		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
653		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
654		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
655		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
656		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
657		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
658		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
659		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
660		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
661		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
662		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
663		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
664		 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
665		 <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
666
667	ports {
668		#address-cells = <1>;
669		#size-cells = <0>;
670		rsnd_port0: port@0 {
671			reg = <0>;
672			rsnd_endpoint0: endpoint {
673				remote-endpoint = <&wm8962_endpoint>;
674
675				dai-format = "i2s";
676				bitclock-master = <&rsnd_endpoint0>;
677				frame-master = <&rsnd_endpoint0>;
678
679				playback = <&ssi1 &dvc1 &src1>;
680				capture = <&ssi0>;
681			};
682		};
683		rsnd_port1: port@1 {
684		    reg = <0x01>;
685			rsnd_endpoint1: endpoint {
686				remote-endpoint = <&dw_hdmi0_snd_in>;
687
688				dai-format = "i2s";
689				bitclock-master = <&rsnd_endpoint1>;
690				frame-master = <&rsnd_endpoint1>;
691
692				playback = <&ssi2>;
693			};
694		};
695	};
696};
697
698&rwdt {
699	status = "okay";
700	timeout-sec = <60>;
701};
702
703&scif0 {
704	pinctrl-0 = <&scif0_pins>;
705	pinctrl-names = "default";
706	status = "okay";
707};
708
709&scif5 {
710	pinctrl-0 = <&scif5_pins>;
711	pinctrl-names = "default";
712	status = "okay";
713};
714
715&scif_clk {
716	clock-frequency = <14745600>;
717};
718
719&sdhi0 {
720	pinctrl-0 = <&sdhi0_pins>;
721	pinctrl-1 = <&sdhi0_pins_uhs>;
722	pinctrl-names = "default", "state_uhs";
723	vmmc-supply = <&reg_3p3v>;
724	vqmmc-supply = <&vccq_sdhi0>;
725	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
726	bus-width = <4>;
727	sd-uhs-sdr50;
728	sd-uhs-sdr104;
729	status = "okay";
730};
731
732&ssi1 {
733	shared-pin;
734};
735
736&tmu0 {
737	status = "okay";
738};
739
740&tmu1 {
741	status = "okay";
742};
743
744&tmu2 {
745	status = "okay";
746};
747
748&tmu3 {
749	status = "okay";
750};
751
752&tmu4 {
753	status = "okay";
754};
755
756&usb2_phy0 {
757	pinctrl-0 = <&usb0_pins>;
758	pinctrl-names = "default";
759	status = "okay";
760};
761
762&usb2_phy1 {
763	pinctrl-0 = <&usb1_pins>;
764	pinctrl-names = "default";
765	status = "okay";
766};
767
768&usb3_peri0 {
769	companion = <&xhci0>;
770	status = "okay";
771	usb-role-switch;
772
773	ports {
774		#address-cells = <1>;
775		#size-cells = <0>;
776		port@0 {
777			reg = <0>;
778			usb3_hs_ep: endpoint {
779				remote-endpoint = <&hs_ep>;
780			};
781		};
782		port@1 {
783			reg = <1>;
784			usb3_role_switch: endpoint {
785				remote-endpoint = <&hd3ss3220_out_ep>;
786			};
787		};
788	};
789};
790
791&usb3_phy0 {
792	status = "okay";
793};
794
795&vin0 {
796	status = "okay";
797};
798&vin1 {
799	status = "okay";
800};
801&vin2 {
802	status = "okay";
803};
804&vin3 {
805	status = "okay";
806};
807&vin4 {
808	status = "okay";
809};
810&vin5 {
811	status = "okay";
812};
813&vin6 {
814	status = "okay";
815};
816&vin7 {
817	status = "okay";
818};
819
820&xhci0
821{
822	pinctrl-0 = <&usb30_pins>;
823	pinctrl-names = "default";
824	status = "okay";
825};
826