1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2022, Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> 10#include "sm8450.dtsi" 11#include "pm8350.dtsi" 12#include "pm8350b.dtsi" 13#include "pm8350c.dtsi" 14#include "pm8450.dtsi" 15#include "pmk8350.dtsi" 16#include "pmr735a.dtsi" 17#include "pmr735b.dtsi" 18 19/ { 20 model = "Qualcomm Technologies, Inc. SM8450 HDK"; 21 compatible = "qcom,sm8450-hdk", "qcom,sm8450"; 22 23 aliases { 24 serial0 = &uart7; 25 }; 26 27 wcd938x: audio-codec { 28 compatible = "qcom,wcd9385-codec"; 29 30 pinctrl-names = "default"; 31 pinctrl-0 = <&wcd_default>; 32 33 qcom,micbias1-microvolt = <1800000>; 34 qcom,micbias2-microvolt = <1800000>; 35 qcom,micbias3-microvolt = <1800000>; 36 qcom,micbias4-microvolt = <1800000>; 37 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 38 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 39 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 40 qcom,rx-device = <&wcd_rx>; 41 qcom,tx-device = <&wcd_tx>; 42 43 reset-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; 44 45 vdd-buck-supply = <&vreg_s10b_1p8>; 46 vdd-rxtx-supply = <&vreg_s10b_1p8>; 47 vdd-io-supply = <&vreg_s10b_1p8>; 48 vdd-mic-bias-supply = <&vreg_bob>; 49 50 #sound-dai-cells = <1>; 51 }; 52 53 chosen { 54 stdout-path = "serial0:115200n8"; 55 }; 56 57 hdmi-out { 58 compatible = "hdmi-connector"; 59 type = "a"; 60 61 port { 62 hdmi_connector_out: endpoint { 63 remote-endpoint = <<9611_out>; 64 }; 65 }; 66 }; 67 68 lt9611_1v2: lt9611-vdd12-regulator { 69 compatible = "regulator-fixed"; 70 regulator-name = "LT9611_1V2"; 71 72 vin-supply = <&vph_pwr>; 73 regulator-min-microvolt = <1200000>; 74 regulator-max-microvolt = <1200000>; 75 gpio = <&tlmm 9 GPIO_ACTIVE_HIGH>; 76 enable-active-high; 77 }; 78 79 lt9611_3v3: lt9611-3v3-regulator { 80 compatible = "regulator-fixed"; 81 regulator-name = "LT9611_3V3"; 82 83 vin-supply = <&vreg_bob>; 84 gpio = <&tlmm 109 GPIO_ACTIVE_HIGH>; 85 regulator-min-microvolt = <3300000>; 86 regulator-max-microvolt = <3300000>; 87 enable-active-high; 88 }; 89 90 pmic-glink { 91 compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink"; 92 #address-cells = <1>; 93 #size-cells = <0>; 94 95 connector@0 { 96 compatible = "usb-c-connector"; 97 reg = <0>; 98 power-role = "dual"; 99 data-role = "dual"; 100 101 ports { 102 #address-cells = <1>; 103 #size-cells = <0>; 104 105 port@0 { 106 reg = <0>; 107 108 pmic_glink_hs_in: endpoint { 109 remote-endpoint = <&usb_1_dwc3_hs>; 110 }; 111 }; 112 113 port@1 { 114 reg = <1>; 115 116 pmic_glink_ss_in: endpoint { 117 remote-endpoint = <&usb_1_qmpphy_out>; 118 }; 119 }; 120 121 port@2 { 122 reg = <2>; 123 124 pmic_glink_sbu: endpoint { 125 remote-endpoint = <&fsa4480_sbu_mux>; 126 }; 127 }; 128 129 }; 130 }; 131 }; 132 133 vph_pwr: vph-pwr-regulator { 134 compatible = "regulator-fixed"; 135 regulator-name = "vph_pwr"; 136 regulator-min-microvolt = <3700000>; 137 regulator-max-microvolt = <3700000>; 138 139 regulator-always-on; 140 regulator-boot-on; 141 }; 142}; 143 144&apps_rsc { 145 regulators-0 { 146 compatible = "qcom,pm8350-rpmh-regulators"; 147 qcom,pmic-id = "b"; 148 149 vdd-s1-supply = <&vph_pwr>; 150 vdd-s2-supply = <&vph_pwr>; 151 vdd-s3-supply = <&vph_pwr>; 152 vdd-s4-supply = <&vph_pwr>; 153 vdd-s5-supply = <&vph_pwr>; 154 vdd-s6-supply = <&vph_pwr>; 155 vdd-s7-supply = <&vph_pwr>; 156 vdd-s8-supply = <&vph_pwr>; 157 vdd-s9-supply = <&vph_pwr>; 158 vdd-s10-supply = <&vph_pwr>; 159 vdd-s11-supply = <&vph_pwr>; 160 vdd-s12-supply = <&vph_pwr>; 161 162 vdd-l1-l4-supply = <&vreg_s11b_0p95>; 163 vdd-l2-l7-supply = <&vreg_bob>; 164 vdd-l3-l5-supply = <&vreg_bob>; 165 vdd-l6-l9-l10-supply = <&vreg_s12b_1p25>; 166 vdd-l8-supply = <&vreg_s2h_0p95>; 167 168 vreg_s10b_1p8: smps10 { 169 regulator-name = "vreg_s10b_1p8"; 170 regulator-min-microvolt = <1800000>; 171 regulator-max-microvolt = <1800000>; 172 }; 173 174 vreg_s11b_0p95: smps11 { 175 regulator-name = "vreg_s11b_0p95"; 176 regulator-min-microvolt = <966000>; 177 regulator-max-microvolt = <1104000>; 178 }; 179 180 vreg_s12b_1p25: smps12 { 181 regulator-name = "vreg_s12b_1p25"; 182 regulator-min-microvolt = <1350000>; 183 regulator-max-microvolt = <1400000>; 184 }; 185 186 vreg_l1b_0p91: ldo1 { 187 regulator-name = "vreg_l1b_0p91"; 188 regulator-min-microvolt = <912000>; 189 regulator-max-microvolt = <920000>; 190 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 191 }; 192 193 vreg_l2b_3p07: ldo2 { 194 regulator-name = "vreg_l2b_3p07"; 195 regulator-min-microvolt = <3072000>; 196 regulator-max-microvolt = <3072000>; 197 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 198 }; 199 200 vreg_l3b_0p9: ldo3 { 201 regulator-name = "vreg_l3b_0p9"; 202 regulator-min-microvolt = <904000>; 203 regulator-max-microvolt = <904000>; 204 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 205 }; 206 207 vreg_l5b_0p88: ldo5 { 208 regulator-name = "vreg_l5b_0p88"; 209 regulator-min-microvolt = <880000>; 210 regulator-max-microvolt = <888000>; 211 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 212 }; 213 214 vreg_l6b_1p2: ldo6 { 215 regulator-name = "vreg_l6b_1p2"; 216 regulator-min-microvolt = <1200000>; 217 regulator-max-microvolt = <1200000>; 218 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 219 }; 220 221 vreg_l7b_2p5: ldo7 { 222 regulator-name = "vreg_l7b_2p5"; 223 regulator-min-microvolt = <2504000>; 224 regulator-max-microvolt = <2504000>; 225 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 226 }; 227 228 vreg_l9b_1p2: ldo9 { 229 regulator-name = "vreg_l9b_1p2"; 230 regulator-min-microvolt = <1200000>; 231 regulator-max-microvolt = <1200000>; 232 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 233 }; 234 }; 235 236 regulators-1 { 237 compatible = "qcom,pm8350c-rpmh-regulators"; 238 qcom,pmic-id = "c"; 239 240 vdd-s1-supply = <&vph_pwr>; 241 vdd-s2-supply = <&vph_pwr>; 242 vdd-s3-supply = <&vph_pwr>; 243 vdd-s4-supply = <&vph_pwr>; 244 vdd-s5-supply = <&vph_pwr>; 245 vdd-s6-supply = <&vph_pwr>; 246 vdd-s7-supply = <&vph_pwr>; 247 vdd-s8-supply = <&vph_pwr>; 248 vdd-s9-supply = <&vph_pwr>; 249 vdd-s10-supply = <&vph_pwr>; 250 251 vdd-l1-l12-supply = <&vreg_bob>; 252 vdd-l2-l8-supply = <&vreg_bob>; 253 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 254 vdd-l6-l9-l11-supply = <&vreg_bob>; 255 vdd-l10-supply = <&vreg_s12b_1p25>; 256 257 vdd-bob-supply = <&vph_pwr>; 258 259 vreg_s1c_1p86: smps1 { 260 regulator-name = "vreg_s1c_1p86"; 261 regulator-min-microvolt = <1800000>; 262 regulator-max-microvolt = <2024000>; 263 }; 264 265 vreg_s10c_1p05: smps10 { 266 regulator-name = "vreg_s10c_1p05"; 267 regulator-min-microvolt = <1000000>; 268 regulator-max-microvolt = <1100000>; 269 }; 270 271 vreg_bob: bob { 272 regulator-name = "vreg_bob"; 273 regulator-min-microvolt = <3008000>; 274 regulator-max-microvolt = <3960000>; 275 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 276 }; 277 278 vreg_l1c_1p8: ldo1 { 279 regulator-name = "vreg_l1c_1p8"; 280 regulator-min-microvolt = <1800000>; 281 regulator-max-microvolt = <1800000>; 282 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 283 }; 284 285 vreg_l3c_3p0: ldo3 { 286 regulator-name = "vreg_l3c_3p0"; 287 regulator-min-microvolt = <3296000>; 288 regulator-max-microvolt = <3304000>; 289 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 290 }; 291 292 vreg_l4c_1p8: ldo4 { 293 regulator-name = "vreg_l4c_1p8"; 294 regulator-min-microvolt = <1704000>; 295 regulator-max-microvolt = <3000000>; 296 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 297 }; 298 299 vreg_l5c_1p8: ldo5 { 300 regulator-name = "vreg_l5c_1p8"; 301 regulator-min-microvolt = <1704000>; 302 regulator-max-microvolt = <3000000>; 303 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 304 }; 305 306 vreg_l6c_1p8: ldo6 { 307 regulator-name = "vreg_l6c_1p8"; 308 regulator-min-microvolt = <1800000>; 309 regulator-max-microvolt = <3008000>; 310 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 311 }; 312 313 vreg_l7c_3p0: ldo7 { 314 regulator-name = "vreg_l7c_3p0"; 315 regulator-min-microvolt = <3008000>; 316 regulator-max-microvolt = <3008000>; 317 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 318 }; 319 320 vreg_l8c_1p8: ldo8 { 321 regulator-name = "vreg_l8c_1p8"; 322 regulator-min-microvolt = <1800000>; 323 regulator-max-microvolt = <1800000>; 324 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 325 }; 326 327 vreg_l9c_2p96: ldo9 { 328 regulator-name = "vreg_l9c_2p96"; 329 regulator-min-microvolt = <2960000>; 330 regulator-max-microvolt = <3008000>; 331 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 332 }; 333 334 vreg_l12c_1p8: ldo12 { 335 regulator-name = "vreg_l12c_1p8"; 336 regulator-min-microvolt = <1800000>; 337 regulator-max-microvolt = <1968000>; 338 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 339 }; 340 341 vreg_l13c_3p0: ldo13 { 342 regulator-name = "vreg_l13c_3p0"; 343 regulator-min-microvolt = <3000000>; 344 regulator-max-microvolt = <3000000>; 345 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 346 }; 347 }; 348 349 regulators-2 { 350 compatible = "qcom,pm8450-rpmh-regulators"; 351 qcom,pmic-id = "h"; 352 353 vdd-s1-supply = <&vph_pwr>; 354 vdd-s2-supply = <&vph_pwr>; 355 vdd-s3-supply = <&vph_pwr>; 356 vdd-s4-supply = <&vph_pwr>; 357 vdd-s5-supply = <&vph_pwr>; 358 vdd-s6-supply = <&vph_pwr>; 359 360 vdd-l2-supply = <&vreg_bob>; 361 vdd-l3-supply = <&vreg_bob>; 362 vdd-l4-supply = <&vreg_bob>; 363 364 vreg_s2h_0p95: smps2 { 365 regulator-name = "vreg_s2h_0p95"; 366 regulator-min-microvolt = <848000>; 367 regulator-max-microvolt = <1104000>; 368 }; 369 370 vreg_s3h_0p5: smps3 { 371 regulator-name = "vreg_s3h_0p5"; 372 regulator-min-microvolt = <500000>; 373 regulator-max-microvolt = <500000>; 374 }; 375 376 vreg_l2h_0p91: ldo2 { 377 regulator-name = "vreg_l2h_0p91"; 378 regulator-min-microvolt = <880000>; 379 regulator-max-microvolt = <912000>; 380 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 381 }; 382 383 vreg_l3h_0p91: ldo3 { 384 regulator-name = "vreg_l3h_0p91"; 385 regulator-min-microvolt = <912000>; 386 regulator-max-microvolt = <912000>; 387 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 388 }; 389 }; 390 391 regulators-3 { 392 compatible = "qcom,pmr735a-rpmh-regulators"; 393 qcom,pmic-id = "e"; 394 395 vdd-s1-supply = <&vph_pwr>; 396 vdd-s2-supply = <&vph_pwr>; 397 vdd-s3-supply = <&vph_pwr>; 398 399 vdd-l1-l2-supply = <&vreg_s2e_0p85>; 400 vdd-l3-supply = <&vreg_s1e_1p25>; 401 vdd-l4-supply = <&vreg_s1c_1p86>; 402 vdd-l5-l6-supply = <&vreg_s1c_1p86>; 403 vdd-l7-bob-supply = <&vreg_bob>; 404 405 vreg_s1e_1p25: smps1 { 406 regulator-name = "vreg_s1e_1p25"; 407 regulator-min-microvolt = <1200000>; 408 regulator-max-microvolt = <1296000>; 409 }; 410 411 vreg_s2e_0p85: smps2 { 412 regulator-name = "vreg_s2e_0p85"; 413 regulator-min-microvolt = <500000>; 414 regulator-max-microvolt = <1040000>; 415 }; 416 417 vreg_l1e_0p8: ldo1 { 418 regulator-name = "vreg_l1e_0p8"; 419 regulator-min-microvolt = <800000>; 420 regulator-max-microvolt = <800000>; 421 }; 422 423 vreg_l2e_0p8: ldo2 { 424 regulator-name = "vreg_l2e_0p8"; 425 regulator-min-microvolt = <800000>; 426 regulator-max-microvolt = <800000>; 427 }; 428 429 vreg_l3e_1p2: ldo3 { 430 regulator-name = "vreg_l3e_1p2"; 431 regulator-min-microvolt = <1200000>; 432 regulator-max-microvolt = <1200000>; 433 }; 434 435 vreg_l4e_1p7: ldo4 { 436 regulator-name = "vreg_l4e_1p7"; 437 regulator-min-microvolt = <1776000>; 438 regulator-max-microvolt = <1776000>; 439 }; 440 441 vreg_l5e_0p88: ldo5 { 442 regulator-name = "vreg_l5e_0p88"; 443 regulator-min-microvolt = <880000>; 444 regulator-max-microvolt = <880000>; 445 }; 446 447 vreg_l6e_1p2: ldo6 { 448 regulator-name = "vreg_l6e_1p2"; 449 regulator-min-microvolt = <1200000>; 450 regulator-max-microvolt = <1200000>; 451 }; 452 453 vreg_l7e_2p8: ldo7 { 454 regulator-name = "vreg_l7e_2p8"; 455 regulator-min-microvolt = <2800000>; 456 regulator-max-microvolt = <2800000>; 457 }; 458 }; 459}; 460 461&dispcc { 462 status = "okay"; 463}; 464 465&i2c9 { 466 clock-frequency = <400000>; 467 status = "okay"; 468 469 lt9611_codec: hdmi-bridge@2b { 470 compatible = "lontium,lt9611uxc"; 471 reg = <0x2b>; 472 473 interrupts-extended = <&tlmm 44 IRQ_TYPE_EDGE_FALLING>; 474 475 reset-gpios = <&tlmm 107 GPIO_ACTIVE_HIGH>; 476 477 vdd-supply = <<9611_1v2>; 478 vcc-supply = <<9611_3v3>; 479 480 pinctrl-names = "default"; 481 pinctrl-0 = <<9611_irq_pin <9611_rst_pin>; 482 483 ports { 484 #address-cells = <1>; 485 #size-cells = <0>; 486 487 port@0 { 488 reg = <0>; 489 490 lt9611_a: endpoint { 491 remote-endpoint = <&mdss_dsi0_out>; 492 }; 493 }; 494 495 port@2 { 496 reg = <2>; 497 498 lt9611_out: endpoint { 499 remote-endpoint = <&hdmi_connector_out>; 500 }; 501 }; 502 }; 503 }; 504}; 505 506&i2c5 { 507 clock-frequency = <100000>; 508 509 status = "okay"; 510 511 typec-mux@42 { 512 compatible = "fcs,fsa4480"; 513 reg = <0x42>; 514 515 interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; 516 517 vcc-supply = <&vreg_bob>; 518 mode-switch; 519 orientation-switch; 520 svid = /bits/ 16 <0xff01>; 521 522 ports { 523 #address-cells = <1>; 524 #size-cells = <0>; 525 526 port@0 { 527 reg = <0>; 528 529 fsa4480_sbu_mux: endpoint { 530 remote-endpoint = <&pmic_glink_sbu>; 531 }; 532 }; 533 }; 534 }; 535}; 536 537&mdss { 538 status = "okay"; 539}; 540 541&mdss_dsi0 { 542 vdda-supply = <&vreg_l6b_1p2>; 543 status = "okay"; 544}; 545 546&mdss_dsi0_out { 547 remote-endpoint = <<9611_a>; 548 data-lanes = <0 1 2 3>; 549}; 550 551&mdss_dsi0_phy { 552 vdds-supply = <&vreg_l5b_0p88>; 553 status = "okay"; 554}; 555 556&mdss_dp0 { 557 status = "okay"; 558 559 ports { 560 port@1 { 561 reg = <1>; 562 563 mdss_dp0_out: endpoint { 564 data-lanes = <0 1>; 565 remote-endpoint = <&usb_1_qmpphy_dp_in>; 566 }; 567 }; 568 }; 569}; 570 571&mdss_mdp { 572 status = "okay"; 573}; 574 575&pcie0 { 576 status = "okay"; 577 max-link-speed = <2>; 578}; 579 580&pcie0_phy { 581 status = "okay"; 582 vdda-phy-supply = <&vreg_l5b_0p88>; 583 vdda-pll-supply = <&vreg_l6b_1p2>; 584}; 585 586&pcie1 { 587 status = "okay"; 588}; 589 590&pcie1_phy { 591 status = "okay"; 592 vdda-phy-supply = <&vreg_l2h_0p91>; 593 vdda-pll-supply = <&vreg_l6b_1p2>; 594}; 595 596&remoteproc_adsp { 597 status = "okay"; 598 firmware-name = "qcom/sm8450/adsp.mbn"; 599}; 600 601&remoteproc_cdsp { 602 status = "okay"; 603 firmware-name = "qcom/sm8450/cdsp.mbn"; 604}; 605 606&remoteproc_mpss { 607 status = "okay"; 608 firmware-name = "qcom/sm8450/modem.mbn"; 609}; 610 611&remoteproc_slpi { 612 status = "okay"; 613 firmware-name = "qcom/sm8450/slpi.mbn"; 614}; 615 616&qupv3_id_0 { 617 status = "okay"; 618}; 619 620&qupv3_id_1 { 621 status = "okay"; 622}; 623 624&sdhc_2 { 625 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>; 626 pinctrl-names = "default", "sleep"; 627 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 628 pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>; 629 vmmc-supply = <&vreg_l9c_2p96>; 630 vqmmc-supply = <&vreg_l6c_1p8>; 631 no-sdio; 632 no-mmc; 633 status = "okay"; 634}; 635 636&sound { 637 compatible = "qcom,sm8450-sndcard"; 638 model = "SM8450-HDK"; 639 audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT", 640 "SpkrRight IN", "WSA_SPK2 OUT", 641 "IN1_HPHL", "HPHL_OUT", 642 "IN2_HPHR", "HPHR_OUT", 643 "AMIC2", "MIC BIAS2", 644 "VA DMIC0", "MIC BIAS1", 645 "VA DMIC1", "MIC BIAS1", 646 "VA DMIC2", "MIC BIAS3", 647 "TX DMIC0", "MIC BIAS1", 648 "TX DMIC1", "MIC BIAS2", 649 "TX DMIC2", "MIC BIAS3", 650 "TX SWR_ADC1", "ADC2_OUTPUT"; 651 652 wcd-playback-dai-link { 653 link-name = "WCD Playback"; 654 655 cpu { 656 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 657 }; 658 659 codec { 660 sound-dai = <&wcd938x 0>, <&swr1 0>, <&rxmacro 0>; 661 }; 662 663 platform { 664 sound-dai = <&q6apm>; 665 }; 666 }; 667 668 wcd-capture-dai-link { 669 link-name = "WCD Capture"; 670 671 cpu { 672 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 673 }; 674 675 codec { 676 sound-dai = <&wcd938x 1>, <&swr2 0>, <&txmacro 0>; 677 }; 678 679 platform { 680 sound-dai = <&q6apm>; 681 }; 682 }; 683 684 wsa-dai-link { 685 link-name = "WSA Playback"; 686 687 cpu { 688 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 689 }; 690 691 codec { 692 sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro 0>; 693 }; 694 695 platform { 696 sound-dai = <&q6apm>; 697 }; 698 }; 699 700 va-dai-link { 701 link-name = "VA Capture"; 702 703 cpu { 704 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 705 }; 706 707 codec { 708 sound-dai = <&vamacro 0>; 709 }; 710 711 platform { 712 sound-dai = <&q6apm>; 713 }; 714 }; 715}; 716 717&swr0 { 718 status = "okay"; 719 720 left_spkr: speaker@0,1 { 721 compatible = "sdw10217020200"; 722 reg = <0 1>; 723 pinctrl-names = "default"; 724 pinctrl-0 = <&spkr_1_sd_n_active>; 725 powerdown-gpios = <&tlmm 1 GPIO_ACTIVE_LOW>; 726 #sound-dai-cells = <0>; 727 sound-name-prefix = "SpkrLeft"; 728 #thermal-sensor-cells = <0>; 729 vdd-supply = <&vreg_s10b_1p8>; 730 }; 731 732 right_spkr: speaker@0,2 { 733 compatible = "sdw10217020200"; 734 reg = <0 2>; 735 pinctrl-names = "default"; 736 pinctrl-0 = <&spkr_2_sd_n_active>; 737 powerdown-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>; 738 #sound-dai-cells = <0>; 739 sound-name-prefix = "SpkrRight"; 740 #thermal-sensor-cells = <0>; 741 vdd-supply = <&vreg_s10b_1p8>; 742 }; 743}; 744 745&swr1 { 746 status = "okay"; 747 748 wcd_rx: codec@0,4 { 749 compatible = "sdw20217010d00"; 750 reg = <0 4>; 751 qcom,rx-port-mapping = <1 2 3 4 5>; 752 }; 753}; 754 755&swr2 { 756 status = "okay"; 757 758 wcd_tx: codec@0,3 { 759 compatible = "sdw20217010d00"; 760 reg = <0 3>; 761 qcom,tx-port-mapping = <1 1 2 3>; 762 }; 763}; 764 765&tlmm { 766 gpio-reserved-ranges = <28 4>, <36 4>; 767 768 lt9611_irq_pin: lt9611-irq-state { 769 pins = "gpio44"; 770 function = "gpio"; 771 bias-disable; 772 }; 773 774 lt9611_rst_pin: lt9611-rst-state { 775 pins = "gpio107"; 776 function = "gpio"; 777 output-high; 778 }; 779 780 sdc2_card_det_n: sd-card-det-n-state { 781 pins = "gpio92"; 782 function = "gpio"; 783 drive-strength = <2>; 784 bias-pull-up; 785 }; 786}; 787 788&uart7 { 789 status = "okay"; 790}; 791 792&ufs_mem_hc { 793 status = "okay"; 794 795 reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>; 796 797 vcc-supply = <&vreg_l7b_2p5>; 798 vcc-max-microamp = <1100000>; 799 vccq-supply = <&vreg_l9b_1p2>; 800 vccq-max-microamp = <1200000>; 801}; 802 803&ufs_mem_phy { 804 status = "okay"; 805 806 vdda-phy-supply = <&vreg_l5b_0p88>; 807 vdda-pll-supply = <&vreg_l6b_1p2>; 808}; 809 810&usb_1 { 811 status = "okay"; 812}; 813 814&usb_1_dwc3 { 815 dr_mode = "otg"; 816 usb-role-switch; 817}; 818 819&usb_1_dwc3_hs { 820 remote-endpoint = <&pmic_glink_hs_in>; 821}; 822 823&usb_1_dwc3_ss { 824 remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; 825}; 826 827&usb_1_hsphy { 828 status = "okay"; 829 830 vdda-pll-supply = <&vreg_l5b_0p88>; 831 vdda18-supply = <&vreg_l1c_1p8>; 832 vdda33-supply = <&vreg_l2b_3p07>; 833}; 834 835&usb_1_qmpphy { 836 status = "okay"; 837 838 vdda-phy-supply = <&vreg_l6b_1p2>; 839 vdda-pll-supply = <&vreg_l1b_0p91>; 840 841 orientation-switch; 842}; 843 844&usb_1_qmpphy_dp_in { 845 remote-endpoint = <&mdss_dp0_out>; 846}; 847 848&usb_1_qmpphy_out { 849 remote-endpoint = <&pmic_glink_ss_in>; 850}; 851 852&usb_1_qmpphy_usb_ss_in { 853 remote-endpoint = <&usb_1_dwc3_ss>; 854}; 855 856&vamacro { 857 pinctrl-0 = <&dmic01_default>, <&dmic02_default>; 858 pinctrl-names = "default"; 859 vdd-micb-supply = <&vreg_s10b_1p8>; 860 qcom,dmic-sample-rate = <600000>; 861 862 status = "okay"; 863}; 864 865&tlmm { 866 spkr_1_sd_n_active: spkr-1-sd-n-active-state { 867 pins = "gpio1"; 868 function = "gpio"; 869 drive-strength = <16>; 870 bias-disable; 871 output-low; 872 }; 873 874 spkr_2_sd_n_active: spkr-2-sd-n-active-state { 875 pins = "gpio89"; 876 function = "gpio"; 877 drive-strength = <16>; 878 bias-disable; 879 output-low; 880 }; 881 882 wcd_default: wcd-reset-n-active-state { 883 pins = "gpio43"; 884 function = "gpio"; 885 drive-strength = <16>; 886 bias-disable; 887 output-low; 888 }; 889}; 890