1b7e8f433SVinod Koul// SPDX-License-Identifier: BSD-3-Clause 2b7e8f433SVinod Koul/* 34f23d2a5SVinod Koul * Copyright (c) 2020, Linaro Limited 4b7e8f433SVinod Koul */ 5b7e8f433SVinod Koul 6b7e8f433SVinod Koul#include <dt-bindings/interrupt-controller/arm-gic.h> 76d91e201SVinod Koul#include <dt-bindings/clock/qcom,gcc-sm8350.h> 8b7e8f433SVinod Koul#include <dt-bindings/clock/qcom,rpmh.h> 9b7e8f433SVinod Koul#include <dt-bindings/mailbox/qcom-ipcc.h> 10b7e8f433SVinod Koul#include <dt-bindings/power/qcom-aoss-qmp.h> 11b7e8f433SVinod Koul#include <dt-bindings/power/qcom-rpmpd.h> 12b7e8f433SVinod Koul#include <dt-bindings/soc/qcom,rpmh-rsc.h> 1320f9d94eSRobert Foss#include <dt-bindings/thermal/thermal.h> 14*f11d3e7dSAlex Elder#include <dt-bindings/interconnect/qcom,sm8350.h> 15b7e8f433SVinod Koul 16b7e8f433SVinod Koul/ { 17b7e8f433SVinod Koul interrupt-parent = <&intc>; 18b7e8f433SVinod Koul 19b7e8f433SVinod Koul #address-cells = <2>; 20b7e8f433SVinod Koul #size-cells = <2>; 21b7e8f433SVinod Koul 22b7e8f433SVinod Koul chosen { }; 23b7e8f433SVinod Koul 24b7e8f433SVinod Koul clocks { 25b7e8f433SVinod Koul xo_board: xo-board { 26b7e8f433SVinod Koul compatible = "fixed-clock"; 27b7e8f433SVinod Koul #clock-cells = <0>; 28b7e8f433SVinod Koul clock-frequency = <38400000>; 29b7e8f433SVinod Koul clock-output-names = "xo_board"; 30b7e8f433SVinod Koul }; 31b7e8f433SVinod Koul 32b7e8f433SVinod Koul sleep_clk: sleep-clk { 33b7e8f433SVinod Koul compatible = "fixed-clock"; 34b7e8f433SVinod Koul clock-frequency = <32000>; 35b7e8f433SVinod Koul #clock-cells = <0>; 36b7e8f433SVinod Koul }; 37b7e8f433SVinod Koul }; 38b7e8f433SVinod Koul 39b7e8f433SVinod Koul cpus { 40b7e8f433SVinod Koul #address-cells = <2>; 41b7e8f433SVinod Koul #size-cells = <0>; 42b7e8f433SVinod Koul 43b7e8f433SVinod Koul CPU0: cpu@0 { 44b7e8f433SVinod Koul device_type = "cpu"; 45b7e8f433SVinod Koul compatible = "qcom,kryo685"; 46b7e8f433SVinod Koul reg = <0x0 0x0>; 47b7e8f433SVinod Koul enable-method = "psci"; 48b7e8f433SVinod Koul next-level-cache = <&L2_0>; 49ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 5020f9d94eSRobert Foss #cooling-cells = <2>; 51b7e8f433SVinod Koul L2_0: l2-cache { 52b7e8f433SVinod Koul compatible = "cache"; 53b7e8f433SVinod Koul next-level-cache = <&L3_0>; 54b7e8f433SVinod Koul L3_0: l3-cache { 55b7e8f433SVinod Koul compatible = "cache"; 56b7e8f433SVinod Koul }; 57b7e8f433SVinod Koul }; 58b7e8f433SVinod Koul }; 59b7e8f433SVinod Koul 60b7e8f433SVinod Koul CPU1: cpu@100 { 61b7e8f433SVinod Koul device_type = "cpu"; 62b7e8f433SVinod Koul compatible = "qcom,kryo685"; 63b7e8f433SVinod Koul reg = <0x0 0x100>; 64b7e8f433SVinod Koul enable-method = "psci"; 65b7e8f433SVinod Koul next-level-cache = <&L2_100>; 66ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 6720f9d94eSRobert Foss #cooling-cells = <2>; 68b7e8f433SVinod Koul L2_100: l2-cache { 69b7e8f433SVinod Koul compatible = "cache"; 70b7e8f433SVinod Koul next-level-cache = <&L3_0>; 71b7e8f433SVinod Koul }; 72b7e8f433SVinod Koul }; 73b7e8f433SVinod Koul 74b7e8f433SVinod Koul CPU2: cpu@200 { 75b7e8f433SVinod Koul device_type = "cpu"; 76b7e8f433SVinod Koul compatible = "qcom,kryo685"; 77b7e8f433SVinod Koul reg = <0x0 0x200>; 78b7e8f433SVinod Koul enable-method = "psci"; 79b7e8f433SVinod Koul next-level-cache = <&L2_200>; 80ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 8120f9d94eSRobert Foss #cooling-cells = <2>; 82b7e8f433SVinod Koul L2_200: l2-cache { 83b7e8f433SVinod Koul compatible = "cache"; 84b7e8f433SVinod Koul next-level-cache = <&L3_0>; 85b7e8f433SVinod Koul }; 86b7e8f433SVinod Koul }; 87b7e8f433SVinod Koul 88b7e8f433SVinod Koul CPU3: cpu@300 { 89b7e8f433SVinod Koul device_type = "cpu"; 90b7e8f433SVinod Koul compatible = "qcom,kryo685"; 91b7e8f433SVinod Koul reg = <0x0 0x300>; 92b7e8f433SVinod Koul enable-method = "psci"; 93b7e8f433SVinod Koul next-level-cache = <&L2_300>; 94ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 9520f9d94eSRobert Foss #cooling-cells = <2>; 96b7e8f433SVinod Koul L2_300: l2-cache { 97b7e8f433SVinod Koul compatible = "cache"; 98b7e8f433SVinod Koul next-level-cache = <&L3_0>; 99b7e8f433SVinod Koul }; 100b7e8f433SVinod Koul }; 101b7e8f433SVinod Koul 102b7e8f433SVinod Koul CPU4: cpu@400 { 103b7e8f433SVinod Koul device_type = "cpu"; 104b7e8f433SVinod Koul compatible = "qcom,kryo685"; 105b7e8f433SVinod Koul reg = <0x0 0x400>; 106b7e8f433SVinod Koul enable-method = "psci"; 107b7e8f433SVinod Koul next-level-cache = <&L2_400>; 108ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 10920f9d94eSRobert Foss #cooling-cells = <2>; 110b7e8f433SVinod Koul L2_400: l2-cache { 111b7e8f433SVinod Koul compatible = "cache"; 112b7e8f433SVinod Koul next-level-cache = <&L3_0>; 113b7e8f433SVinod Koul }; 114b7e8f433SVinod Koul }; 115b7e8f433SVinod Koul 116b7e8f433SVinod Koul CPU5: cpu@500 { 117b7e8f433SVinod Koul device_type = "cpu"; 118b7e8f433SVinod Koul compatible = "qcom,kryo685"; 119b7e8f433SVinod Koul reg = <0x0 0x500>; 120b7e8f433SVinod Koul enable-method = "psci"; 121b7e8f433SVinod Koul next-level-cache = <&L2_500>; 122ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 12320f9d94eSRobert Foss #cooling-cells = <2>; 124b7e8f433SVinod Koul L2_500: l2-cache { 125b7e8f433SVinod Koul compatible = "cache"; 126b7e8f433SVinod Koul next-level-cache = <&L3_0>; 127b7e8f433SVinod Koul }; 128b7e8f433SVinod Koul 129b7e8f433SVinod Koul }; 130b7e8f433SVinod Koul 131b7e8f433SVinod Koul CPU6: cpu@600 { 132b7e8f433SVinod Koul device_type = "cpu"; 133b7e8f433SVinod Koul compatible = "qcom,kryo685"; 134b7e8f433SVinod Koul reg = <0x0 0x600>; 135b7e8f433SVinod Koul enable-method = "psci"; 136b7e8f433SVinod Koul next-level-cache = <&L2_600>; 137ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 13820f9d94eSRobert Foss #cooling-cells = <2>; 139b7e8f433SVinod Koul L2_600: l2-cache { 140b7e8f433SVinod Koul compatible = "cache"; 141b7e8f433SVinod Koul next-level-cache = <&L3_0>; 142b7e8f433SVinod Koul }; 143b7e8f433SVinod Koul }; 144b7e8f433SVinod Koul 145b7e8f433SVinod Koul CPU7: cpu@700 { 146b7e8f433SVinod Koul device_type = "cpu"; 147b7e8f433SVinod Koul compatible = "qcom,kryo685"; 148b7e8f433SVinod Koul reg = <0x0 0x700>; 149b7e8f433SVinod Koul enable-method = "psci"; 150b7e8f433SVinod Koul next-level-cache = <&L2_700>; 151ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 2>; 15220f9d94eSRobert Foss #cooling-cells = <2>; 153b7e8f433SVinod Koul L2_700: l2-cache { 154b7e8f433SVinod Koul compatible = "cache"; 155b7e8f433SVinod Koul next-level-cache = <&L3_0>; 156b7e8f433SVinod Koul }; 157b7e8f433SVinod Koul }; 158b7e8f433SVinod Koul }; 159b7e8f433SVinod Koul 160b7e8f433SVinod Koul firmware { 161b7e8f433SVinod Koul scm: scm { 162b7e8f433SVinod Koul compatible = "qcom,scm-sm8350", "qcom,scm"; 163b7e8f433SVinod Koul #reset-cells = <1>; 164b7e8f433SVinod Koul }; 165b7e8f433SVinod Koul }; 166b7e8f433SVinod Koul 167b7e8f433SVinod Koul memory@80000000 { 168b7e8f433SVinod Koul device_type = "memory"; 169b7e8f433SVinod Koul /* We expect the bootloader to fill in the size */ 170b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x0>; 171b7e8f433SVinod Koul }; 172b7e8f433SVinod Koul 173b7e8f433SVinod Koul pmu { 174b7e8f433SVinod Koul compatible = "arm,armv8-pmuv3"; 175794d3e30SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 176b7e8f433SVinod Koul }; 177b7e8f433SVinod Koul 178b7e8f433SVinod Koul psci { 179b7e8f433SVinod Koul compatible = "arm,psci-1.0"; 180b7e8f433SVinod Koul method = "smc"; 181b7e8f433SVinod Koul }; 182b7e8f433SVinod Koul 183b7e8f433SVinod Koul reserved_memory: reserved-memory { 184b7e8f433SVinod Koul #address-cells = <2>; 185b7e8f433SVinod Koul #size-cells = <2>; 186b7e8f433SVinod Koul ranges; 187b7e8f433SVinod Koul 188b7e8f433SVinod Koul hyp_mem: memory@80000000 { 189b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x600000>; 190b7e8f433SVinod Koul no-map; 191b7e8f433SVinod Koul }; 192b7e8f433SVinod Koul 193b7e8f433SVinod Koul xbl_aop_mem: memory@80700000 { 194b7e8f433SVinod Koul no-map; 195b7e8f433SVinod Koul reg = <0x0 0x80700000 0x0 0x160000>; 196b7e8f433SVinod Koul }; 197b7e8f433SVinod Koul 198b7e8f433SVinod Koul cmd_db: memory@80860000 { 199b7e8f433SVinod Koul compatible = "qcom,cmd-db"; 200b7e8f433SVinod Koul reg = <0x0 0x80860000 0x0 0x20000>; 201b7e8f433SVinod Koul no-map; 202b7e8f433SVinod Koul }; 203b7e8f433SVinod Koul 204b7e8f433SVinod Koul reserved_xbl_uefi_log: memory@80880000 { 205b7e8f433SVinod Koul reg = <0x0 0x80880000 0x0 0x14000>; 206b7e8f433SVinod Koul no-map; 207b7e8f433SVinod Koul }; 208b7e8f433SVinod Koul 209b7e8f433SVinod Koul smem_mem: memory@80900000 { 210b7e8f433SVinod Koul reg = <0x0 0x80900000 0x0 0x200000>; 211b7e8f433SVinod Koul no-map; 212b7e8f433SVinod Koul }; 213b7e8f433SVinod Koul 214b7e8f433SVinod Koul cpucp_fw_mem: memory@80b00000 { 215b7e8f433SVinod Koul reg = <0x0 0x80b00000 0x0 0x100000>; 216b7e8f433SVinod Koul no-map; 217b7e8f433SVinod Koul }; 218b7e8f433SVinod Koul 219b7e8f433SVinod Koul cdsp_secure_heap: memory@80c00000 { 220b7e8f433SVinod Koul reg = <0x0 0x80c00000 0x0 0x4600000>; 221b7e8f433SVinod Koul no-map; 222b7e8f433SVinod Koul }; 223b7e8f433SVinod Koul 224b7e8f433SVinod Koul pil_camera_mem: mmeory@85200000 { 225b7e8f433SVinod Koul reg = <0x0 0x85200000 0x0 0x500000>; 226b7e8f433SVinod Koul no-map; 227b7e8f433SVinod Koul }; 228b7e8f433SVinod Koul 229b7e8f433SVinod Koul pil_video_mem: memory@85700000 { 230b7e8f433SVinod Koul reg = <0x0 0x85700000 0x0 0x500000>; 231b7e8f433SVinod Koul no-map; 232b7e8f433SVinod Koul }; 233b7e8f433SVinod Koul 234b7e8f433SVinod Koul pil_cvp_mem: memory@85c00000 { 235b7e8f433SVinod Koul reg = <0x0 0x85c00000 0x0 0x500000>; 236b7e8f433SVinod Koul no-map; 237b7e8f433SVinod Koul }; 238b7e8f433SVinod Koul 239b7e8f433SVinod Koul pil_adsp_mem: memory@86100000 { 240b7e8f433SVinod Koul reg = <0x0 0x86100000 0x0 0x2100000>; 241b7e8f433SVinod Koul no-map; 242b7e8f433SVinod Koul }; 243b7e8f433SVinod Koul 244b7e8f433SVinod Koul pil_slpi_mem: memory@88200000 { 245b7e8f433SVinod Koul reg = <0x0 0x88200000 0x0 0x1500000>; 246b7e8f433SVinod Koul no-map; 247b7e8f433SVinod Koul }; 248b7e8f433SVinod Koul 249b7e8f433SVinod Koul pil_cdsp_mem: memory@89700000 { 250b7e8f433SVinod Koul reg = <0x0 0x89700000 0x0 0x1e00000>; 251b7e8f433SVinod Koul no-map; 252b7e8f433SVinod Koul }; 253b7e8f433SVinod Koul 254b7e8f433SVinod Koul pil_ipa_fw_mem: memory@8b500000 { 255b7e8f433SVinod Koul reg = <0x0 0x8b500000 0x0 0x10000>; 256b7e8f433SVinod Koul no-map; 257b7e8f433SVinod Koul }; 258b7e8f433SVinod Koul 259b7e8f433SVinod Koul pil_ipa_gsi_mem: memory@8b510000 { 260b7e8f433SVinod Koul reg = <0x0 0x8b510000 0x0 0xa000>; 261b7e8f433SVinod Koul no-map; 262b7e8f433SVinod Koul }; 263b7e8f433SVinod Koul 264b7e8f433SVinod Koul pil_gpu_mem: memory@8b51a000 { 265b7e8f433SVinod Koul reg = <0x0 0x8b51a000 0x0 0x2000>; 266b7e8f433SVinod Koul no-map; 267b7e8f433SVinod Koul }; 268b7e8f433SVinod Koul 269b7e8f433SVinod Koul pil_spss_mem: memory@8b600000 { 270b7e8f433SVinod Koul reg = <0x0 0x8b600000 0x0 0x100000>; 271b7e8f433SVinod Koul no-map; 272b7e8f433SVinod Koul }; 273b7e8f433SVinod Koul 274b7e8f433SVinod Koul pil_modem_mem: memory@8b800000 { 275b7e8f433SVinod Koul reg = <0x0 0x8b800000 0x0 0x10000000>; 276b7e8f433SVinod Koul no-map; 277b7e8f433SVinod Koul }; 278b7e8f433SVinod Koul 279774890c9SVinod Koul rmtfs_mem: memory@9b800000 { 280774890c9SVinod Koul compatible = "qcom,rmtfs-mem"; 281774890c9SVinod Koul reg = <0x0 0x9b800000 0x0 0x280000>; 282774890c9SVinod Koul no-map; 283774890c9SVinod Koul 284774890c9SVinod Koul qcom,client-id = <1>; 285774890c9SVinod Koul qcom,vmid = <15>; 286774890c9SVinod Koul }; 287774890c9SVinod Koul 288b7e8f433SVinod Koul hyp_reserved_mem: memory@d0000000 { 289b7e8f433SVinod Koul reg = <0x0 0xd0000000 0x0 0x800000>; 290b7e8f433SVinod Koul no-map; 291b7e8f433SVinod Koul }; 292b7e8f433SVinod Koul 293b7e8f433SVinod Koul pil_trustedvm_mem: memory@d0800000 { 294b7e8f433SVinod Koul reg = <0x0 0xd0800000 0x0 0x76f7000>; 295b7e8f433SVinod Koul no-map; 296b7e8f433SVinod Koul }; 297b7e8f433SVinod Koul 298b7e8f433SVinod Koul qrtr_shbuf: memory@d7ef7000 { 299b7e8f433SVinod Koul reg = <0x0 0xd7ef7000 0x0 0x9000>; 300b7e8f433SVinod Koul no-map; 301b7e8f433SVinod Koul }; 302b7e8f433SVinod Koul 303b7e8f433SVinod Koul chan0_shbuf: memory@d7f00000 { 304b7e8f433SVinod Koul reg = <0x0 0xd7f00000 0x0 0x80000>; 305b7e8f433SVinod Koul no-map; 306b7e8f433SVinod Koul }; 307b7e8f433SVinod Koul 308b7e8f433SVinod Koul chan1_shbuf: memory@d7f80000 { 309b7e8f433SVinod Koul reg = <0x0 0xd7f80000 0x0 0x80000>; 310b7e8f433SVinod Koul no-map; 311b7e8f433SVinod Koul }; 312b7e8f433SVinod Koul 313b7e8f433SVinod Koul removed_mem: memory@d8800000 { 314b7e8f433SVinod Koul reg = <0x0 0xd8800000 0x0 0x6800000>; 315b7e8f433SVinod Koul no-map; 316b7e8f433SVinod Koul }; 317b7e8f433SVinod Koul }; 318b7e8f433SVinod Koul 319b7e8f433SVinod Koul smem: qcom,smem { 320b7e8f433SVinod Koul compatible = "qcom,smem"; 321b7e8f433SVinod Koul memory-region = <&smem_mem>; 322b7e8f433SVinod Koul hwlocks = <&tcsr_mutex 3>; 323b7e8f433SVinod Koul }; 324b7e8f433SVinod Koul 32503a41991SVinod Koul smp2p-adsp { 32603a41991SVinod Koul compatible = "qcom,smp2p"; 32703a41991SVinod Koul qcom,smem = <443>, <429>; 32803a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 32903a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 33003a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 33103a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 33203a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 33303a41991SVinod Koul 33403a41991SVinod Koul qcom,local-pid = <0>; 33503a41991SVinod Koul qcom,remote-pid = <2>; 33603a41991SVinod Koul 33703a41991SVinod Koul smp2p_adsp_out: master-kernel { 33803a41991SVinod Koul qcom,entry-name = "master-kernel"; 33903a41991SVinod Koul #qcom,smem-state-cells = <1>; 34003a41991SVinod Koul }; 34103a41991SVinod Koul 34203a41991SVinod Koul smp2p_adsp_in: slave-kernel { 34303a41991SVinod Koul qcom,entry-name = "slave-kernel"; 34403a41991SVinod Koul interrupt-controller; 34503a41991SVinod Koul #interrupt-cells = <2>; 34603a41991SVinod Koul }; 34703a41991SVinod Koul }; 34803a41991SVinod Koul 34903a41991SVinod Koul smp2p-cdsp { 35003a41991SVinod Koul compatible = "qcom,smp2p"; 35103a41991SVinod Koul qcom,smem = <94>, <432>; 35203a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 35303a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 35403a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 35503a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 35603a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 35703a41991SVinod Koul 35803a41991SVinod Koul qcom,local-pid = <0>; 35903a41991SVinod Koul qcom,remote-pid = <5>; 36003a41991SVinod Koul 36103a41991SVinod Koul smp2p_cdsp_out: master-kernel { 36203a41991SVinod Koul qcom,entry-name = "master-kernel"; 36303a41991SVinod Koul #qcom,smem-state-cells = <1>; 36403a41991SVinod Koul }; 36503a41991SVinod Koul 36603a41991SVinod Koul smp2p_cdsp_in: slave-kernel { 36703a41991SVinod Koul qcom,entry-name = "slave-kernel"; 36803a41991SVinod Koul interrupt-controller; 36903a41991SVinod Koul #interrupt-cells = <2>; 37003a41991SVinod Koul }; 37103a41991SVinod Koul }; 37203a41991SVinod Koul 37303a41991SVinod Koul smp2p-modem { 37403a41991SVinod Koul compatible = "qcom,smp2p"; 37503a41991SVinod Koul qcom,smem = <435>, <428>; 37603a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 37703a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 37803a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 37903a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 38003a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 38103a41991SVinod Koul 38203a41991SVinod Koul qcom,local-pid = <0>; 38303a41991SVinod Koul qcom,remote-pid = <1>; 38403a41991SVinod Koul 38503a41991SVinod Koul smp2p_modem_out: master-kernel { 38603a41991SVinod Koul qcom,entry-name = "master-kernel"; 38703a41991SVinod Koul #qcom,smem-state-cells = <1>; 38803a41991SVinod Koul }; 38903a41991SVinod Koul 39003a41991SVinod Koul smp2p_modem_in: slave-kernel { 39103a41991SVinod Koul qcom,entry-name = "slave-kernel"; 39203a41991SVinod Koul interrupt-controller; 39303a41991SVinod Koul #interrupt-cells = <2>; 39403a41991SVinod Koul }; 395*f11d3e7dSAlex Elder 396*f11d3e7dSAlex Elder ipa_smp2p_out: ipa-ap-to-modem { 397*f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 398*f11d3e7dSAlex Elder #qcom,smem-state-cells = <1>; 399*f11d3e7dSAlex Elder }; 400*f11d3e7dSAlex Elder 401*f11d3e7dSAlex Elder ipa_smp2p_in: ipa-modem-to-ap { 402*f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 403*f11d3e7dSAlex Elder interrupt-controller; 404*f11d3e7dSAlex Elder #interrupt-cells = <2>; 405*f11d3e7dSAlex Elder }; 40603a41991SVinod Koul }; 40703a41991SVinod Koul 40803a41991SVinod Koul smp2p-slpi { 40903a41991SVinod Koul compatible = "qcom,smp2p"; 41003a41991SVinod Koul qcom,smem = <481>, <430>; 41103a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 41203a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 41303a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 41403a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 41503a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 41603a41991SVinod Koul 41703a41991SVinod Koul qcom,local-pid = <0>; 41803a41991SVinod Koul qcom,remote-pid = <3>; 41903a41991SVinod Koul 42003a41991SVinod Koul smp2p_slpi_out: master-kernel { 42103a41991SVinod Koul qcom,entry-name = "master-kernel"; 42203a41991SVinod Koul #qcom,smem-state-cells = <1>; 42303a41991SVinod Koul }; 42403a41991SVinod Koul 42503a41991SVinod Koul smp2p_slpi_in: slave-kernel { 42603a41991SVinod Koul qcom,entry-name = "slave-kernel"; 42703a41991SVinod Koul interrupt-controller; 42803a41991SVinod Koul #interrupt-cells = <2>; 42903a41991SVinod Koul }; 43003a41991SVinod Koul }; 43103a41991SVinod Koul 432b7e8f433SVinod Koul soc: soc@0 { 433b7e8f433SVinod Koul #address-cells = <2>; 434b7e8f433SVinod Koul #size-cells = <2>; 435b7e8f433SVinod Koul ranges = <0 0 0 0 0x10 0>; 436b7e8f433SVinod Koul dma-ranges = <0 0 0 0 0x10 0>; 437b7e8f433SVinod Koul compatible = "simple-bus"; 438b7e8f433SVinod Koul 439b7e8f433SVinod Koul gcc: clock-controller@100000 { 440b7e8f433SVinod Koul compatible = "qcom,gcc-sm8350"; 441b7e8f433SVinod Koul reg = <0x0 0x00100000 0x0 0x1f0000>; 442b7e8f433SVinod Koul #clock-cells = <1>; 443b7e8f433SVinod Koul #reset-cells = <1>; 444b7e8f433SVinod Koul #power-domain-cells = <1>; 445b7e8f433SVinod Koul clock-names = "bi_tcxo", "sleep_clk"; 446b7e8f433SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; 447b7e8f433SVinod Koul }; 448b7e8f433SVinod Koul 449b7e8f433SVinod Koul ipcc: mailbox@408000 { 450b7e8f433SVinod Koul compatible = "qcom,sm8350-ipcc", "qcom,ipcc"; 451b7e8f433SVinod Koul reg = <0 0x00408000 0 0x1000>; 452b7e8f433SVinod Koul interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 453b7e8f433SVinod Koul interrupt-controller; 454b7e8f433SVinod Koul #interrupt-cells = <3>; 455b7e8f433SVinod Koul #mbox-cells = <2>; 456b7e8f433SVinod Koul }; 457b7e8f433SVinod Koul 458b7e8f433SVinod Koul qupv3_id_1: geniqup@9c0000 { 459b7e8f433SVinod Koul compatible = "qcom,geni-se-qup"; 460b7e8f433SVinod Koul reg = <0x0 0x009c0000 0x0 0x6000>; 461b7e8f433SVinod Koul clock-names = "m-ahb", "s-ahb"; 4626d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 4636d91e201SVinod Koul <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 464b7e8f433SVinod Koul #address-cells = <2>; 465b7e8f433SVinod Koul #size-cells = <2>; 466b7e8f433SVinod Koul ranges; 467b7e8f433SVinod Koul status = "disabled"; 468b7e8f433SVinod Koul 469b7e8f433SVinod Koul uart2: serial@98c000 { 470b7e8f433SVinod Koul compatible = "qcom,geni-debug-uart"; 471b7e8f433SVinod Koul reg = <0 0x0098c000 0 0x4000>; 472b7e8f433SVinod Koul clock-names = "se"; 4736d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 474b7e8f433SVinod Koul pinctrl-names = "default"; 475b7e8f433SVinod Koul pinctrl-0 = <&qup_uart3_default_state>; 476b7e8f433SVinod Koul interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 477b7e8f433SVinod Koul #address-cells = <1>; 478b7e8f433SVinod Koul #size-cells = <0>; 479b7e8f433SVinod Koul status = "disabled"; 480b7e8f433SVinod Koul }; 481b7e8f433SVinod Koul }; 482b7e8f433SVinod Koul 483187f65b7SVinod Koul apps_smmu: iommu@15000000 { 484187f65b7SVinod Koul compatible = "qcom,sm8350-smmu-500", "arm,mmu-500"; 485187f65b7SVinod Koul reg = <0 0x15000000 0 0x100000>; 486187f65b7SVinod Koul #iommu-cells = <2>; 487187f65b7SVinod Koul #global-interrupts = <2>; 488187f65b7SVinod Koul interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 489187f65b7SVinod Koul <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 490187f65b7SVinod Koul <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 491187f65b7SVinod Koul <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 492187f65b7SVinod Koul <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 493187f65b7SVinod Koul <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 494187f65b7SVinod Koul <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 495187f65b7SVinod Koul <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 496187f65b7SVinod Koul <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 497187f65b7SVinod Koul <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 498187f65b7SVinod Koul <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 499187f65b7SVinod Koul <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 500187f65b7SVinod Koul <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 501187f65b7SVinod Koul <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 502187f65b7SVinod Koul <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 503187f65b7SVinod Koul <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 504187f65b7SVinod Koul <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 505187f65b7SVinod Koul <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 506187f65b7SVinod Koul <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 507187f65b7SVinod Koul <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 508187f65b7SVinod Koul <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 509187f65b7SVinod Koul <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 510187f65b7SVinod Koul <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 511187f65b7SVinod Koul <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 512187f65b7SVinod Koul <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 513187f65b7SVinod Koul <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 514187f65b7SVinod Koul <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 515187f65b7SVinod Koul <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 516187f65b7SVinod Koul <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 517187f65b7SVinod Koul <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 518187f65b7SVinod Koul <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 519187f65b7SVinod Koul <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 520187f65b7SVinod Koul <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 521187f65b7SVinod Koul <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 522187f65b7SVinod Koul <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 523187f65b7SVinod Koul <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 524187f65b7SVinod Koul <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 525187f65b7SVinod Koul <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 526187f65b7SVinod Koul <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 527187f65b7SVinod Koul <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 528187f65b7SVinod Koul <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 529187f65b7SVinod Koul <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 530187f65b7SVinod Koul <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 531187f65b7SVinod Koul <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 532187f65b7SVinod Koul <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 533187f65b7SVinod Koul <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 534187f65b7SVinod Koul <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 535187f65b7SVinod Koul <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 536187f65b7SVinod Koul <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 537187f65b7SVinod Koul <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 538187f65b7SVinod Koul <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 539187f65b7SVinod Koul <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 540187f65b7SVinod Koul <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 541187f65b7SVinod Koul <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 542187f65b7SVinod Koul <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 543187f65b7SVinod Koul <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 544187f65b7SVinod Koul <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 545187f65b7SVinod Koul <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 546187f65b7SVinod Koul <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 547187f65b7SVinod Koul <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 548187f65b7SVinod Koul <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 549187f65b7SVinod Koul <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 550187f65b7SVinod Koul <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 551187f65b7SVinod Koul <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 552187f65b7SVinod Koul <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 553187f65b7SVinod Koul <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 554187f65b7SVinod Koul <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 555187f65b7SVinod Koul <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 556187f65b7SVinod Koul <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 557187f65b7SVinod Koul <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 558187f65b7SVinod Koul <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 559187f65b7SVinod Koul <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 560187f65b7SVinod Koul <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 561187f65b7SVinod Koul <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 562187f65b7SVinod Koul <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 563187f65b7SVinod Koul <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 564187f65b7SVinod Koul <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 565187f65b7SVinod Koul <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 566187f65b7SVinod Koul <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 567187f65b7SVinod Koul <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 568187f65b7SVinod Koul <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 569187f65b7SVinod Koul <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 570187f65b7SVinod Koul <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 571187f65b7SVinod Koul <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 572187f65b7SVinod Koul <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 573187f65b7SVinod Koul <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 574187f65b7SVinod Koul <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 575187f65b7SVinod Koul <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 576187f65b7SVinod Koul <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 577187f65b7SVinod Koul <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 578187f65b7SVinod Koul <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 579187f65b7SVinod Koul <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 580187f65b7SVinod Koul <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 581187f65b7SVinod Koul <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 582187f65b7SVinod Koul <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 583187f65b7SVinod Koul <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 584187f65b7SVinod Koul <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 585187f65b7SVinod Koul <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 586187f65b7SVinod Koul }; 587187f65b7SVinod Koul 588da6b2482SVinod Koul config_noc: interconnect@1500000 { 589da6b2482SVinod Koul compatible = "qcom,sm8350-config-noc"; 590da6b2482SVinod Koul reg = <0 0x01500000 0 0xa580>; 591da6b2482SVinod Koul #interconnect-cells = <1>; 592da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 593da6b2482SVinod Koul }; 594da6b2482SVinod Koul 595da6b2482SVinod Koul mc_virt: interconnect@1580000 { 596da6b2482SVinod Koul compatible = "qcom,sm8350-mc-virt"; 597da6b2482SVinod Koul reg = <0 0x01580000 0 0x1000>; 598da6b2482SVinod Koul #interconnect-cells = <1>; 599da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 600da6b2482SVinod Koul }; 601da6b2482SVinod Koul 602da6b2482SVinod Koul system_noc: interconnect@1680000 { 603da6b2482SVinod Koul compatible = "qcom,sm8350-system-noc"; 604da6b2482SVinod Koul reg = <0 0x01680000 0 0x1c200>; 605da6b2482SVinod Koul #interconnect-cells = <1>; 606da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 607da6b2482SVinod Koul }; 608da6b2482SVinod Koul 609da6b2482SVinod Koul aggre1_noc: interconnect@16e0000 { 610da6b2482SVinod Koul compatible = "qcom,sm8350-aggre1-noc"; 611da6b2482SVinod Koul reg = <0 0x016e0000 0 0x1f180>; 612da6b2482SVinod Koul #interconnect-cells = <1>; 613da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 614da6b2482SVinod Koul }; 615da6b2482SVinod Koul 616da6b2482SVinod Koul aggre2_noc: interconnect@1700000 { 617da6b2482SVinod Koul compatible = "qcom,sm8350-aggre2-noc"; 618da6b2482SVinod Koul reg = <0 0x01700000 0 0x33000>; 619da6b2482SVinod Koul #interconnect-cells = <1>; 620da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 621da6b2482SVinod Koul }; 622da6b2482SVinod Koul 623da6b2482SVinod Koul mmss_noc: interconnect@1740000 { 624da6b2482SVinod Koul compatible = "qcom,sm8350-mmss-noc"; 625da6b2482SVinod Koul reg = <0 0x01740000 0 0x1f080>; 626da6b2482SVinod Koul #interconnect-cells = <1>; 627da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 628da6b2482SVinod Koul }; 629da6b2482SVinod Koul 630da6b2482SVinod Koul lpass_ag_noc: interconnect@3c40000 { 631da6b2482SVinod Koul compatible = "qcom,sm8350-lpass-ag-noc"; 632da6b2482SVinod Koul reg = <0 0x03c40000 0 0xf080>; 633da6b2482SVinod Koul #interconnect-cells = <1>; 634da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 635da6b2482SVinod Koul }; 636da6b2482SVinod Koul 637da6b2482SVinod Koul compute_noc: interconnect@a0c0000{ 638da6b2482SVinod Koul compatible = "qcom,sm8350-compute-noc"; 639da6b2482SVinod Koul reg = <0 0x0a0c0000 0 0xa180>; 640da6b2482SVinod Koul #interconnect-cells = <1>; 641da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 642da6b2482SVinod Koul }; 643da6b2482SVinod Koul 644*f11d3e7dSAlex Elder ipa: ipa@1e40000 { 645*f11d3e7dSAlex Elder compatible = "qcom,sm8350-ipa"; 646*f11d3e7dSAlex Elder 647*f11d3e7dSAlex Elder iommus = <&apps_smmu 0x5c0 0x0>, 648*f11d3e7dSAlex Elder <&apps_smmu 0x5c2 0x0>; 649*f11d3e7dSAlex Elder reg = <0 0x1e40000 0 0x8000>, 650*f11d3e7dSAlex Elder <0 0x1e50000 0 0x4b20>, 651*f11d3e7dSAlex Elder <0 0x1e04000 0 0x23000>; 652*f11d3e7dSAlex Elder reg-names = "ipa-reg", 653*f11d3e7dSAlex Elder "ipa-shared", 654*f11d3e7dSAlex Elder "gsi"; 655*f11d3e7dSAlex Elder 656*f11d3e7dSAlex Elder interrupts-extended = <&intc GIC_SPI 655 IRQ_TYPE_EDGE_RISING>, 657*f11d3e7dSAlex Elder <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, 658*f11d3e7dSAlex Elder <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 659*f11d3e7dSAlex Elder <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; 660*f11d3e7dSAlex Elder interrupt-names = "ipa", 661*f11d3e7dSAlex Elder "gsi", 662*f11d3e7dSAlex Elder "ipa-clock-query", 663*f11d3e7dSAlex Elder "ipa-setup-ready"; 664*f11d3e7dSAlex Elder 665*f11d3e7dSAlex Elder clocks = <&rpmhcc RPMH_IPA_CLK>; 666*f11d3e7dSAlex Elder clock-names = "core"; 667*f11d3e7dSAlex Elder 668*f11d3e7dSAlex Elder interconnects = <&aggre2_noc MASTER_IPA &gem_noc SLAVE_LLCC>, 669*f11d3e7dSAlex Elder <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, 670*f11d3e7dSAlex Elder <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>; 671*f11d3e7dSAlex Elder interconnect-names = "ipa_to_llcc", 672*f11d3e7dSAlex Elder "llcc_to_ebi1", 673*f11d3e7dSAlex Elder "appss_to_ipa"; 674*f11d3e7dSAlex Elder 675*f11d3e7dSAlex Elder qcom,smem-states = <&ipa_smp2p_out 0>, 676*f11d3e7dSAlex Elder <&ipa_smp2p_out 1>; 677*f11d3e7dSAlex Elder qcom,smem-state-names = "ipa-clock-enabled-valid", 678*f11d3e7dSAlex Elder "ipa-clock-enabled"; 679*f11d3e7dSAlex Elder 680*f11d3e7dSAlex Elder status = "disabled"; 681*f11d3e7dSAlex Elder }; 682*f11d3e7dSAlex Elder 683b7e8f433SVinod Koul tcsr_mutex: hwlock@1f40000 { 684b7e8f433SVinod Koul compatible = "qcom,tcsr-mutex"; 685b7e8f433SVinod Koul reg = <0x0 0x01f40000 0x0 0x40000>; 686b7e8f433SVinod Koul #hwlock-cells = <1>; 687b7e8f433SVinod Koul }; 688b7e8f433SVinod Koul 689177fcf0aSVinod Koul mpss: remoteproc@4080000 { 690177fcf0aSVinod Koul compatible = "qcom,sm8350-mpss-pas"; 691177fcf0aSVinod Koul reg = <0x0 0x04080000 0x0 0x4040>; 692177fcf0aSVinod Koul 693177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 694177fcf0aSVinod Koul <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, 695177fcf0aSVinod Koul <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, 696177fcf0aSVinod Koul <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, 697177fcf0aSVinod Koul <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, 698177fcf0aSVinod Koul <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; 699177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", "handover", 700177fcf0aSVinod Koul "stop-ack", "shutdown-ack"; 701177fcf0aSVinod Koul 702177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 703177fcf0aSVinod Koul clock-names = "xo"; 704177fcf0aSVinod Koul 705177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, 706177fcf0aSVinod Koul <&rpmhpd 0>, 707177fcf0aSVinod Koul <&rpmhpd 12>; 708177fcf0aSVinod Koul power-domain-names = "load_state", "cx", "mss"; 709177fcf0aSVinod Koul 710da6b2482SVinod Koul interconnects = <&mc_virt 0 &mc_virt 1>; 711da6b2482SVinod Koul 712177fcf0aSVinod Koul memory-region = <&pil_modem_mem>; 713177fcf0aSVinod Koul 714177fcf0aSVinod Koul qcom,smem-states = <&smp2p_modem_out 0>; 715177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 716177fcf0aSVinod Koul 717177fcf0aSVinod Koul status = "disabled"; 718177fcf0aSVinod Koul 719177fcf0aSVinod Koul glink-edge { 720177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 721177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 722177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 723177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 724177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 725177fcf0aSVinod Koul interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; 726177fcf0aSVinod Koul label = "modem"; 727177fcf0aSVinod Koul qcom,remote-pid = <1>; 728177fcf0aSVinod Koul }; 729177fcf0aSVinod Koul }; 730177fcf0aSVinod Koul 731b7e8f433SVinod Koul pdc: interrupt-controller@b220000 { 732b7e8f433SVinod Koul compatible = "qcom,sm8350-pdc", "qcom,pdc"; 733b7e8f433SVinod Koul reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 734b7e8f433SVinod Koul qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>, 735b7e8f433SVinod Koul <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>, 736b7e8f433SVinod Koul <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>, 737b7e8f433SVinod Koul <156 716 12>; 738b7e8f433SVinod Koul #interrupt-cells = <2>; 739b7e8f433SVinod Koul interrupt-parent = <&intc>; 740b7e8f433SVinod Koul interrupt-controller; 741b7e8f433SVinod Koul }; 742b7e8f433SVinod Koul 74320f9d94eSRobert Foss tsens0: thermal-sensor@c222000 { 74420f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 74520f9d94eSRobert Foss reg = <0 0x0c263000 0 0x1ff>, /* TM */ 74620f9d94eSRobert Foss <0 0x0c222000 0 0x8>; /* SROT */ 74720f9d94eSRobert Foss #qcom,sensors = <15>; 74820f9d94eSRobert Foss interrupts = <&pdc 26 IRQ_TYPE_LEVEL_HIGH>, 74920f9d94eSRobert Foss <&pdc 28 IRQ_TYPE_LEVEL_HIGH>; 75020f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 75120f9d94eSRobert Foss #thermal-sensor-cells = <1>; 75220f9d94eSRobert Foss }; 75320f9d94eSRobert Foss 75420f9d94eSRobert Foss tsens1: thermal-sensor@c223000 { 75520f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 75620f9d94eSRobert Foss reg = <0 0x0c265000 0 0x1ff>, /* TM */ 75720f9d94eSRobert Foss <0 0x0c223000 0 0x8>; /* SROT */ 75820f9d94eSRobert Foss #qcom,sensors = <14>; 75920f9d94eSRobert Foss interrupts = <&pdc 27 IRQ_TYPE_LEVEL_HIGH>, 76020f9d94eSRobert Foss <&pdc 29 IRQ_TYPE_LEVEL_HIGH>; 76120f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 76220f9d94eSRobert Foss #thermal-sensor-cells = <1>; 76320f9d94eSRobert Foss }; 76420f9d94eSRobert Foss 76597832fa8SSai Prakash Ranjan aoss_qmp: power-controller@c300000 { 766b7e8f433SVinod Koul compatible = "qcom,sm8350-aoss-qmp"; 767b7e8f433SVinod Koul reg = <0 0x0c300000 0 0x100000>; 768b7e8f433SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP 769b7e8f433SVinod Koul IRQ_TYPE_EDGE_RISING>; 770b7e8f433SVinod Koul mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; 771b7e8f433SVinod Koul 772b7e8f433SVinod Koul #clock-cells = <0>; 773b7e8f433SVinod Koul #power-domain-cells = <1>; 774b7e8f433SVinod Koul }; 775b7e8f433SVinod Koul 776389cd7acSVinod Koul spmi_bus: spmi@c440000 { 777389cd7acSVinod Koul compatible = "qcom,spmi-pmic-arb"; 778389cd7acSVinod Koul reg = <0x0 0xc440000 0x0 0x1100>, 779389cd7acSVinod Koul <0x0 0xc600000 0x0 0x2000000>, 780389cd7acSVinod Koul <0x0 0xe600000 0x0 0x100000>, 781389cd7acSVinod Koul <0x0 0xe700000 0x0 0xa0000>, 782389cd7acSVinod Koul <0x0 0xc40a000 0x0 0x26000>; 783389cd7acSVinod Koul reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 784389cd7acSVinod Koul interrupt-names = "periph_irq"; 785389cd7acSVinod Koul interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 786389cd7acSVinod Koul qcom,ee = <0>; 787389cd7acSVinod Koul qcom,channel = <0>; 788389cd7acSVinod Koul #address-cells = <2>; 789389cd7acSVinod Koul #size-cells = <0>; 790389cd7acSVinod Koul interrupt-controller; 791389cd7acSVinod Koul #interrupt-cells = <4>; 792389cd7acSVinod Koul }; 793389cd7acSVinod Koul 794b7e8f433SVinod Koul tlmm: pinctrl@f100000 { 795b7e8f433SVinod Koul compatible = "qcom,sm8350-tlmm"; 796b7e8f433SVinod Koul reg = <0 0x0f100000 0 0x300000>; 797b7e8f433SVinod Koul interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 798b7e8f433SVinod Koul gpio-controller; 799b7e8f433SVinod Koul #gpio-cells = <2>; 800b7e8f433SVinod Koul interrupt-controller; 801b7e8f433SVinod Koul #interrupt-cells = <2>; 80279015857SShawn Guo gpio-ranges = <&tlmm 0 0 204>; 803b7e8f433SVinod Koul 804b7e8f433SVinod Koul qup_uart3_default_state: qup-uart3-default-state { 805b7e8f433SVinod Koul rx { 806b7e8f433SVinod Koul pins = "gpio18"; 807b7e8f433SVinod Koul function = "qup3"; 808b7e8f433SVinod Koul }; 809b7e8f433SVinod Koul tx { 810b7e8f433SVinod Koul pins = "gpio19"; 811b7e8f433SVinod Koul function = "qup3"; 812b7e8f433SVinod Koul }; 813b7e8f433SVinod Koul }; 814b7e8f433SVinod Koul }; 815b7e8f433SVinod Koul 81624e3eb2eSRobert Foss rng: rng@10d3000 { 81724e3eb2eSRobert Foss compatible = "qcom,prng-ee"; 81824e3eb2eSRobert Foss reg = <0 0x010d3000 0 0x1000>; 81924e3eb2eSRobert Foss clocks = <&rpmhcc RPMH_HWKM_CLK>; 82024e3eb2eSRobert Foss clock-names = "core"; 82124e3eb2eSRobert Foss }; 82224e3eb2eSRobert Foss 823b7e8f433SVinod Koul intc: interrupt-controller@17a00000 { 824b7e8f433SVinod Koul compatible = "arm,gic-v3"; 825b7e8f433SVinod Koul #interrupt-cells = <3>; 826b7e8f433SVinod Koul interrupt-controller; 827b7e8f433SVinod Koul reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 828b7e8f433SVinod Koul <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 829b7e8f433SVinod Koul interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 830b7e8f433SVinod Koul }; 831b7e8f433SVinod Koul 832b7e8f433SVinod Koul timer@17c20000 { 833b7e8f433SVinod Koul compatible = "arm,armv7-timer-mem"; 834b7e8f433SVinod Koul #address-cells = <2>; 835b7e8f433SVinod Koul #size-cells = <2>; 836b7e8f433SVinod Koul ranges; 837b7e8f433SVinod Koul reg = <0x0 0x17c20000 0x0 0x1000>; 838b7e8f433SVinod Koul clock-frequency = <19200000>; 839b7e8f433SVinod Koul 840b7e8f433SVinod Koul frame@17c21000 { 841b7e8f433SVinod Koul frame-number = <0>; 842b7e8f433SVinod Koul interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 843b7e8f433SVinod Koul <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 844b7e8f433SVinod Koul reg = <0x0 0x17c21000 0x0 0x1000>, 845b7e8f433SVinod Koul <0x0 0x17c22000 0x0 0x1000>; 846b7e8f433SVinod Koul }; 847b7e8f433SVinod Koul 848b7e8f433SVinod Koul frame@17c23000 { 849b7e8f433SVinod Koul frame-number = <1>; 850b7e8f433SVinod Koul interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 851b7e8f433SVinod Koul reg = <0x0 0x17c23000 0x0 0x1000>; 852b7e8f433SVinod Koul status = "disabled"; 853b7e8f433SVinod Koul }; 854b7e8f433SVinod Koul 855b7e8f433SVinod Koul frame@17c25000 { 856b7e8f433SVinod Koul frame-number = <2>; 857b7e8f433SVinod Koul interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 858b7e8f433SVinod Koul reg = <0x0 0x17c25000 0x0 0x1000>; 859b7e8f433SVinod Koul status = "disabled"; 860b7e8f433SVinod Koul }; 861b7e8f433SVinod Koul 862b7e8f433SVinod Koul frame@17c27000 { 863b7e8f433SVinod Koul frame-number = <3>; 864b7e8f433SVinod Koul interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 865b7e8f433SVinod Koul reg = <0x0 0x17c27000 0x0 0x1000>; 866b7e8f433SVinod Koul status = "disabled"; 867b7e8f433SVinod Koul }; 868b7e8f433SVinod Koul 869b7e8f433SVinod Koul frame@17c29000 { 870b7e8f433SVinod Koul frame-number = <4>; 871b7e8f433SVinod Koul interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 872b7e8f433SVinod Koul reg = <0x0 0x17c29000 0x0 0x1000>; 873b7e8f433SVinod Koul status = "disabled"; 874b7e8f433SVinod Koul }; 875b7e8f433SVinod Koul 876b7e8f433SVinod Koul frame@17c2b000 { 877b7e8f433SVinod Koul frame-number = <5>; 878b7e8f433SVinod Koul interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 879b7e8f433SVinod Koul reg = <0x0 0x17c2b000 0x0 0x1000>; 880b7e8f433SVinod Koul status = "disabled"; 881b7e8f433SVinod Koul }; 882b7e8f433SVinod Koul 883b7e8f433SVinod Koul frame@17c2d000 { 884b7e8f433SVinod Koul frame-number = <6>; 885b7e8f433SVinod Koul interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 886b7e8f433SVinod Koul reg = <0x0 0x17c2d000 0x0 0x1000>; 887b7e8f433SVinod Koul status = "disabled"; 888b7e8f433SVinod Koul }; 889b7e8f433SVinod Koul }; 890b7e8f433SVinod Koul 891b7e8f433SVinod Koul apps_rsc: rsc@18200000 { 892b7e8f433SVinod Koul label = "apps_rsc"; 893b7e8f433SVinod Koul compatible = "qcom,rpmh-rsc"; 894b7e8f433SVinod Koul reg = <0x0 0x18200000 0x0 0x10000>, 895b7e8f433SVinod Koul <0x0 0x18210000 0x0 0x10000>, 896b7e8f433SVinod Koul <0x0 0x18220000 0x0 0x10000>; 897b7e8f433SVinod Koul reg-names = "drv-0", "drv-1", "drv-2"; 898b7e8f433SVinod Koul interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 899b7e8f433SVinod Koul <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 900b7e8f433SVinod Koul <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 901b7e8f433SVinod Koul qcom,tcs-offset = <0xd00>; 902b7e8f433SVinod Koul qcom,drv-id = <2>; 903b7e8f433SVinod Koul qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 904b7e8f433SVinod Koul <WAKE_TCS 3>, <CONTROL_TCS 1>; 905b7e8f433SVinod Koul 906b7e8f433SVinod Koul rpmhcc: clock-controller { 907b7e8f433SVinod Koul compatible = "qcom,sm8350-rpmh-clk"; 908b7e8f433SVinod Koul #clock-cells = <1>; 909b7e8f433SVinod Koul clock-names = "xo"; 910b7e8f433SVinod Koul clocks = <&xo_board>; 911b7e8f433SVinod Koul }; 912b7e8f433SVinod Koul 91390f57509SVinod Koul rpmhpd: power-controller { 91490f57509SVinod Koul compatible = "qcom,sm8350-rpmhpd"; 91590f57509SVinod Koul #power-domain-cells = <1>; 91690f57509SVinod Koul operating-points-v2 = <&rpmhpd_opp_table>; 91790f57509SVinod Koul 91890f57509SVinod Koul rpmhpd_opp_table: opp-table { 91990f57509SVinod Koul compatible = "operating-points-v2"; 92090f57509SVinod Koul 92190f57509SVinod Koul rpmhpd_opp_ret: opp1 { 92290f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 92390f57509SVinod Koul }; 92490f57509SVinod Koul 92590f57509SVinod Koul rpmhpd_opp_min_svs: opp2 { 92690f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 92790f57509SVinod Koul }; 92890f57509SVinod Koul 92990f57509SVinod Koul rpmhpd_opp_low_svs: opp3 { 93090f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 93190f57509SVinod Koul }; 93290f57509SVinod Koul 93390f57509SVinod Koul rpmhpd_opp_svs: opp4 { 93490f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 93590f57509SVinod Koul }; 93690f57509SVinod Koul 93790f57509SVinod Koul rpmhpd_opp_svs_l1: opp5 { 93890f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 93990f57509SVinod Koul }; 94090f57509SVinod Koul 94190f57509SVinod Koul rpmhpd_opp_nom: opp6 { 94290f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 94390f57509SVinod Koul }; 94490f57509SVinod Koul 94590f57509SVinod Koul rpmhpd_opp_nom_l1: opp7 { 94690f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 94790f57509SVinod Koul }; 94890f57509SVinod Koul 94990f57509SVinod Koul rpmhpd_opp_nom_l2: opp8 { 95090f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 95190f57509SVinod Koul }; 95290f57509SVinod Koul 95390f57509SVinod Koul rpmhpd_opp_turbo: opp9 { 95490f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 95590f57509SVinod Koul }; 95690f57509SVinod Koul 95790f57509SVinod Koul rpmhpd_opp_turbo_l1: opp10 { 95890f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 95990f57509SVinod Koul }; 96090f57509SVinod Koul }; 96190f57509SVinod Koul }; 962da6b2482SVinod Koul 963da6b2482SVinod Koul apps_bcm_voter: bcm_voter { 964da6b2482SVinod Koul compatible = "qcom,bcm-voter"; 965da6b2482SVinod Koul }; 966b7e8f433SVinod Koul }; 967e780fb31SJack Pham 968ccbb3abbSVinod Koul cpufreq_hw: cpufreq@18591000 { 969ccbb3abbSVinod Koul compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss"; 970ccbb3abbSVinod Koul reg = <0 0x18591000 0 0x1000>, 971ccbb3abbSVinod Koul <0 0x18592000 0 0x1000>, 972ccbb3abbSVinod Koul <0 0x18593000 0 0x1000>; 973ccbb3abbSVinod Koul reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; 974ccbb3abbSVinod Koul 975ccbb3abbSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; 976ccbb3abbSVinod Koul clock-names = "xo", "alternate"; 977ccbb3abbSVinod Koul 978ccbb3abbSVinod Koul #freq-domain-cells = <1>; 979ccbb3abbSVinod Koul }; 980ccbb3abbSVinod Koul 98159c7cf81SVinod Koul ufs_mem_hc: ufshc@1d84000 { 98259c7cf81SVinod Koul compatible = "qcom,sm8350-ufshc", "qcom,ufshc", 98359c7cf81SVinod Koul "jedec,ufs-2.0"; 98459c7cf81SVinod Koul reg = <0 0x01d84000 0 0x3000>; 98559c7cf81SVinod Koul interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 98659c7cf81SVinod Koul phys = <&ufs_mem_phy_lanes>; 98759c7cf81SVinod Koul phy-names = "ufsphy"; 98859c7cf81SVinod Koul lanes-per-direction = <2>; 98959c7cf81SVinod Koul #reset-cells = <1>; 9906d91e201SVinod Koul resets = <&gcc GCC_UFS_PHY_BCR>; 99159c7cf81SVinod Koul reset-names = "rst"; 99259c7cf81SVinod Koul 9936d91e201SVinod Koul power-domains = <&gcc UFS_PHY_GDSC>; 99459c7cf81SVinod Koul 99559c7cf81SVinod Koul iommus = <&apps_smmu 0xe0 0x0>; 99659c7cf81SVinod Koul 99759c7cf81SVinod Koul clock-names = 99859c7cf81SVinod Koul "ref_clk", 99959c7cf81SVinod Koul "core_clk", 100059c7cf81SVinod Koul "bus_aggr_clk", 100159c7cf81SVinod Koul "iface_clk", 100259c7cf81SVinod Koul "core_clk_unipro", 100359c7cf81SVinod Koul "ref_clk", 100459c7cf81SVinod Koul "tx_lane0_sync_clk", 100559c7cf81SVinod Koul "rx_lane0_sync_clk", 100659c7cf81SVinod Koul "rx_lane1_sync_clk"; 100759c7cf81SVinod Koul clocks = 100859c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 10096d91e201SVinod Koul <&gcc GCC_UFS_PHY_AXI_CLK>, 10106d91e201SVinod Koul <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 10116d91e201SVinod Koul <&gcc GCC_UFS_PHY_AHB_CLK>, 10126d91e201SVinod Koul <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 101359c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 10146d91e201SVinod Koul <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 10156d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 10166d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 101759c7cf81SVinod Koul freq-table-hz = 101859c7cf81SVinod Koul <75000000 300000000>, 101959c7cf81SVinod Koul <75000000 300000000>, 102059c7cf81SVinod Koul <0 0>, 102159c7cf81SVinod Koul <0 0>, 102259c7cf81SVinod Koul <75000000 300000000>, 102359c7cf81SVinod Koul <0 0>, 102459c7cf81SVinod Koul <0 0>, 102559c7cf81SVinod Koul <75000000 300000000>, 102659c7cf81SVinod Koul <75000000 300000000>; 102759c7cf81SVinod Koul status = "disabled"; 102859c7cf81SVinod Koul }; 102959c7cf81SVinod Koul 103059c7cf81SVinod Koul ufs_mem_phy: phy@1d87000 { 103159c7cf81SVinod Koul compatible = "qcom,sm8350-qmp-ufs-phy"; 103259c7cf81SVinod Koul reg = <0 0x01d87000 0 0xe10>; 103359c7cf81SVinod Koul #address-cells = <2>; 103459c7cf81SVinod Koul #size-cells = <2>; 103559c7cf81SVinod Koul #clock-cells = <1>; 103659c7cf81SVinod Koul ranges; 103759c7cf81SVinod Koul clock-names = "ref", 103859c7cf81SVinod Koul "ref_aux"; 103959c7cf81SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, 10406d91e201SVinod Koul <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 104159c7cf81SVinod Koul 104259c7cf81SVinod Koul resets = <&ufs_mem_hc 0>; 104359c7cf81SVinod Koul reset-names = "ufsphy"; 104459c7cf81SVinod Koul status = "disabled"; 104559c7cf81SVinod Koul 104659c7cf81SVinod Koul ufs_mem_phy_lanes: lanes@1d87400 { 104759c7cf81SVinod Koul reg = <0 0x01d87400 0 0x108>, 104859c7cf81SVinod Koul <0 0x01d87600 0 0x1e0>, 104959c7cf81SVinod Koul <0 0x01d87c00 0 0x1dc>, 105059c7cf81SVinod Koul <0 0x01d87800 0 0x108>, 105159c7cf81SVinod Koul <0 0x01d87a00 0 0x1e0>; 105259c7cf81SVinod Koul #phy-cells = <0>; 105359c7cf81SVinod Koul #clock-cells = <0>; 105459c7cf81SVinod Koul }; 105559c7cf81SVinod Koul }; 105659c7cf81SVinod Koul 1057177fcf0aSVinod Koul slpi: remoteproc@5c00000 { 1058177fcf0aSVinod Koul compatible = "qcom,sm8350-slpi-pas"; 1059177fcf0aSVinod Koul reg = <0 0x05c00000 0 0x4000>; 1060177fcf0aSVinod Koul 1061177fcf0aSVinod Koul interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 1062177fcf0aSVinod Koul <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 1063177fcf0aSVinod Koul <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 1064177fcf0aSVinod Koul <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 1065177fcf0aSVinod Koul <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 1066177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1067177fcf0aSVinod Koul "handover", "stop-ack"; 1068177fcf0aSVinod Koul 1069177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1070177fcf0aSVinod Koul clock-names = "xo"; 1071177fcf0aSVinod Koul 1072177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, 1073177fcf0aSVinod Koul <&rpmhpd 4>, 1074177fcf0aSVinod Koul <&rpmhpd 5>; 1075177fcf0aSVinod Koul power-domain-names = "load_state", "lcx", "lmx"; 1076177fcf0aSVinod Koul 1077177fcf0aSVinod Koul memory-region = <&pil_slpi_mem>; 1078177fcf0aSVinod Koul 1079177fcf0aSVinod Koul qcom,smem-states = <&smp2p_slpi_out 0>; 1080177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1081177fcf0aSVinod Koul 1082177fcf0aSVinod Koul status = "disabled"; 1083177fcf0aSVinod Koul 1084177fcf0aSVinod Koul glink-edge { 1085177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 1086177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1087177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1088177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 1089177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1090177fcf0aSVinod Koul 1091177fcf0aSVinod Koul label = "slpi"; 1092177fcf0aSVinod Koul qcom,remote-pid = <3>; 1093177fcf0aSVinod Koul 1094177fcf0aSVinod Koul }; 1095177fcf0aSVinod Koul }; 1096177fcf0aSVinod Koul 1097177fcf0aSVinod Koul cdsp: remoteproc@98900000 { 1098177fcf0aSVinod Koul compatible = "qcom,sm8350-cdsp-pas"; 1099177fcf0aSVinod Koul reg = <0 0x098900000 0 0x1400000>; 1100177fcf0aSVinod Koul 1101177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 1102177fcf0aSVinod Koul <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 1103177fcf0aSVinod Koul <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 1104177fcf0aSVinod Koul <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 1105177fcf0aSVinod Koul <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 1106177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1107177fcf0aSVinod Koul "handover", "stop-ack"; 1108177fcf0aSVinod Koul 1109177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1110177fcf0aSVinod Koul clock-names = "xo"; 1111177fcf0aSVinod Koul 1112177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, 1113177fcf0aSVinod Koul <&rpmhpd 0>, 1114177fcf0aSVinod Koul <&rpmhpd 10>; 1115177fcf0aSVinod Koul power-domain-names = "load_state", "cx", "mxc"; 1116177fcf0aSVinod Koul 1117da6b2482SVinod Koul interconnects = <&compute_noc 1 &mc_virt 1>; 1118da6b2482SVinod Koul 1119177fcf0aSVinod Koul memory-region = <&pil_cdsp_mem>; 1120177fcf0aSVinod Koul 1121177fcf0aSVinod Koul qcom,smem-states = <&smp2p_cdsp_out 0>; 1122177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1123177fcf0aSVinod Koul 1124177fcf0aSVinod Koul status = "disabled"; 1125177fcf0aSVinod Koul 1126177fcf0aSVinod Koul glink-edge { 1127177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 1128177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1129177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1130177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 1131177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1132177fcf0aSVinod Koul 1133177fcf0aSVinod Koul label = "cdsp"; 1134177fcf0aSVinod Koul qcom,remote-pid = <5>; 1135177fcf0aSVinod Koul }; 1136177fcf0aSVinod Koul }; 1137177fcf0aSVinod Koul 1138e780fb31SJack Pham usb_1_hsphy: phy@88e3000 { 1139e780fb31SJack Pham compatible = "qcom,sm8350-usb-hs-phy", 1140e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 1141e780fb31SJack Pham reg = <0 0x088e3000 0 0x400>; 1142e780fb31SJack Pham status = "disabled"; 1143e780fb31SJack Pham #phy-cells = <0>; 1144e780fb31SJack Pham 1145e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 1146e780fb31SJack Pham clock-names = "ref"; 1147e780fb31SJack Pham 11486d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 1149e780fb31SJack Pham }; 1150e780fb31SJack Pham 1151e780fb31SJack Pham usb_2_hsphy: phy@88e4000 { 1152e780fb31SJack Pham compatible = "qcom,sm8250-usb-hs-phy", 1153e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 1154e780fb31SJack Pham reg = <0 0x088e4000 0 0x400>; 1155e780fb31SJack Pham status = "disabled"; 1156e780fb31SJack Pham #phy-cells = <0>; 1157e780fb31SJack Pham 1158e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 1159e780fb31SJack Pham clock-names = "ref"; 1160e780fb31SJack Pham 11616d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 1162e780fb31SJack Pham }; 1163e780fb31SJack Pham 1164e780fb31SJack Pham usb_1_qmpphy: phy-wrapper@88e9000 { 1165e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-phy"; 1166e780fb31SJack Pham reg = <0 0x088e9000 0 0x200>, 1167e780fb31SJack Pham <0 0x088e8000 0 0x20>; 1168e780fb31SJack Pham reg-names = "reg-base", "dp_com"; 1169e780fb31SJack Pham status = "disabled"; 1170e780fb31SJack Pham #clock-cells = <1>; 1171e780fb31SJack Pham #address-cells = <2>; 1172e780fb31SJack Pham #size-cells = <2>; 1173e780fb31SJack Pham ranges; 1174e780fb31SJack Pham 11756d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 1176e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 11776d91e201SVinod Koul <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 1178e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "com_aux"; 1179e780fb31SJack Pham 11806d91e201SVinod Koul resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 11816d91e201SVinod Koul <&gcc GCC_USB3_PHY_PRIM_BCR>; 1182e780fb31SJack Pham reset-names = "phy", "common"; 1183e780fb31SJack Pham 1184e780fb31SJack Pham usb_1_ssphy: phy@88e9200 { 1185e780fb31SJack Pham reg = <0 0x088e9200 0 0x200>, 1186e780fb31SJack Pham <0 0x088e9400 0 0x200>, 1187e780fb31SJack Pham <0 0x088e9c00 0 0x400>, 1188e780fb31SJack Pham <0 0x088e9600 0 0x200>, 1189e780fb31SJack Pham <0 0x088e9800 0 0x200>, 1190e780fb31SJack Pham <0 0x088e9a00 0 0x100>; 1191e780fb31SJack Pham #phy-cells = <0>; 1192e780fb31SJack Pham #clock-cells = <1>; 11936d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 1194e780fb31SJack Pham clock-names = "pipe0"; 1195e780fb31SJack Pham clock-output-names = "usb3_phy_pipe_clk_src"; 1196e780fb31SJack Pham }; 1197e780fb31SJack Pham }; 1198e780fb31SJack Pham 1199e780fb31SJack Pham usb_2_qmpphy: phy-wrapper@88eb000 { 1200e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-uni-phy"; 1201e780fb31SJack Pham reg = <0 0x088eb000 0 0x200>; 1202e780fb31SJack Pham status = "disabled"; 1203e780fb31SJack Pham #clock-cells = <1>; 1204e780fb31SJack Pham #address-cells = <2>; 1205e780fb31SJack Pham #size-cells = <2>; 1206e780fb31SJack Pham ranges; 1207e780fb31SJack Pham 12086d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 1209e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 12106d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>, 12116d91e201SVinod Koul <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 1212e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 1213e780fb31SJack Pham 12146d91e201SVinod Koul resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 12156d91e201SVinod Koul <&gcc GCC_USB3_PHY_SEC_BCR>; 1216e780fb31SJack Pham reset-names = "phy", "common"; 1217e780fb31SJack Pham 1218e780fb31SJack Pham usb_2_ssphy: phy@88ebe00 { 1219e780fb31SJack Pham reg = <0 0x088ebe00 0 0x200>, 1220e780fb31SJack Pham <0 0x088ec000 0 0x200>, 1221e780fb31SJack Pham <0 0x088eb200 0 0x1100>; 1222e780fb31SJack Pham #phy-cells = <0>; 1223e780fb31SJack Pham #clock-cells = <1>; 12246d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 1225e780fb31SJack Pham clock-names = "pipe0"; 1226e780fb31SJack Pham clock-output-names = "usb3_uni_phy_pipe_clk_src"; 1227e780fb31SJack Pham }; 1228e780fb31SJack Pham }; 1229e780fb31SJack Pham 1230da6b2482SVinod Koul dc_noc: interconnect@90e0000 { 1231da6b2482SVinod Koul compatible = "qcom,sm8350-dc-noc"; 1232da6b2482SVinod Koul reg = <0 0x090c0000 0 0x4200>; 1233da6b2482SVinod Koul #interconnect-cells = <1>; 1234da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1235da6b2482SVinod Koul }; 1236da6b2482SVinod Koul 1237da6b2482SVinod Koul gem_noc: interconnect@9100000 { 1238da6b2482SVinod Koul compatible = "qcom,sm8350-gem-noc"; 1239da6b2482SVinod Koul reg = <0 0x09100000 0 0xb4000>; 1240da6b2482SVinod Koul #interconnect-cells = <1>; 1241da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1242da6b2482SVinod Koul }; 1243da6b2482SVinod Koul 1244e780fb31SJack Pham usb_1: usb@a6f8800 { 1245e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 1246e780fb31SJack Pham reg = <0 0x0a6f8800 0 0x400>; 1247e780fb31SJack Pham status = "disabled"; 1248e780fb31SJack Pham #address-cells = <2>; 1249e780fb31SJack Pham #size-cells = <2>; 1250e780fb31SJack Pham ranges; 1251e780fb31SJack Pham 12526d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 12536d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>, 12546d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 12556d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 12566d91e201SVinod Koul <&gcc GCC_USB30_PRIM_SLEEP_CLK>; 1257e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 1258e780fb31SJack Pham "sleep"; 1259e780fb31SJack Pham 12606d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 12616d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>; 1262e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 1263e780fb31SJack Pham 1264e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 1265e780fb31SJack Pham <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 1266e780fb31SJack Pham <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 1267e780fb31SJack Pham <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 1268e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 1269e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 1270e780fb31SJack Pham 12716d91e201SVinod Koul power-domains = <&gcc USB30_PRIM_GDSC>; 1272e780fb31SJack Pham 12736d91e201SVinod Koul resets = <&gcc GCC_USB30_PRIM_BCR>; 1274e780fb31SJack Pham 1275e780fb31SJack Pham usb_1_dwc3: dwc3@a600000 { 1276e780fb31SJack Pham compatible = "snps,dwc3"; 1277e780fb31SJack Pham reg = <0 0x0a600000 0 0xcd00>; 1278e780fb31SJack Pham interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 1279e780fb31SJack Pham iommus = <&apps_smmu 0x0 0x0>; 1280e780fb31SJack Pham snps,dis_u2_susphy_quirk; 1281e780fb31SJack Pham snps,dis_enblslpm_quirk; 1282e780fb31SJack Pham phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 1283e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 1284e780fb31SJack Pham }; 1285e780fb31SJack Pham }; 1286e780fb31SJack Pham 1287e780fb31SJack Pham usb_2: usb@a8f8800 { 1288e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 1289e780fb31SJack Pham reg = <0 0x0a8f8800 0 0x400>; 1290e780fb31SJack Pham status = "disabled"; 1291e780fb31SJack Pham #address-cells = <2>; 1292e780fb31SJack Pham #size-cells = <2>; 1293e780fb31SJack Pham ranges; 1294e780fb31SJack Pham 12956d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 12966d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>, 12976d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 12986d91e201SVinod Koul <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 12996d91e201SVinod Koul <&gcc GCC_USB30_SEC_SLEEP_CLK>, 13006d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>; 1301e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 1302e780fb31SJack Pham "sleep", "xo"; 1303e780fb31SJack Pham 13046d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 13056d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>; 1306e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 1307e780fb31SJack Pham 1308e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 1309e780fb31SJack Pham <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 1310e780fb31SJack Pham <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 1311e780fb31SJack Pham <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 1312e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 1313e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 1314e780fb31SJack Pham 13156d91e201SVinod Koul power-domains = <&gcc USB30_SEC_GDSC>; 1316e780fb31SJack Pham 13176d91e201SVinod Koul resets = <&gcc GCC_USB30_SEC_BCR>; 1318e780fb31SJack Pham 1319e780fb31SJack Pham usb_2_dwc3: dwc3@a800000 { 1320e780fb31SJack Pham compatible = "snps,dwc3"; 1321e780fb31SJack Pham reg = <0 0x0a800000 0 0xcd00>; 1322e780fb31SJack Pham interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 1323e780fb31SJack Pham iommus = <&apps_smmu 0x20 0x0>; 1324e780fb31SJack Pham snps,dis_u2_susphy_quirk; 1325e780fb31SJack Pham snps,dis_enblslpm_quirk; 1326e780fb31SJack Pham phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 1327e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 1328e780fb31SJack Pham }; 1329e780fb31SJack Pham }; 1330177fcf0aSVinod Koul 1331177fcf0aSVinod Koul adsp: remoteproc@17300000 { 1332177fcf0aSVinod Koul compatible = "qcom,sm8350-adsp-pas"; 1333177fcf0aSVinod Koul reg = <0 0x17300000 0 0x100>; 1334177fcf0aSVinod Koul 1335177fcf0aSVinod Koul interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 1336177fcf0aSVinod Koul <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 1337177fcf0aSVinod Koul <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 1338177fcf0aSVinod Koul <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 1339177fcf0aSVinod Koul <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 1340177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1341177fcf0aSVinod Koul "handover", "stop-ack"; 1342177fcf0aSVinod Koul 1343177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1344177fcf0aSVinod Koul clock-names = "xo"; 1345177fcf0aSVinod Koul 1346177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, 1347177fcf0aSVinod Koul <&rpmhpd 4>, 1348177fcf0aSVinod Koul <&rpmhpd 5>; 1349177fcf0aSVinod Koul power-domain-names = "load_state", "lcx", "lmx"; 1350177fcf0aSVinod Koul 1351177fcf0aSVinod Koul memory-region = <&pil_adsp_mem>; 1352177fcf0aSVinod Koul 1353177fcf0aSVinod Koul qcom,smem-states = <&smp2p_adsp_out 0>; 1354177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1355177fcf0aSVinod Koul 1356177fcf0aSVinod Koul status = "disabled"; 1357177fcf0aSVinod Koul 1358177fcf0aSVinod Koul glink-edge { 1359177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 1360177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1361177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1362177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 1363177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1364177fcf0aSVinod Koul 1365177fcf0aSVinod Koul label = "lpass"; 1366177fcf0aSVinod Koul qcom,remote-pid = <2>; 1367177fcf0aSVinod Koul }; 1368177fcf0aSVinod Koul }; 1369b7e8f433SVinod Koul }; 1370b7e8f433SVinod Koul 137120f9d94eSRobert Foss thermal-zones { 137220f9d94eSRobert Foss cpu0-thermal { 137320f9d94eSRobert Foss polling-delay-passive = <250>; 137420f9d94eSRobert Foss polling-delay = <1000>; 137520f9d94eSRobert Foss 137620f9d94eSRobert Foss thermal-sensors = <&tsens0 1>; 137720f9d94eSRobert Foss 137820f9d94eSRobert Foss trips { 137920f9d94eSRobert Foss cpu0_alert0: trip-point0 { 138020f9d94eSRobert Foss temperature = <90000>; 138120f9d94eSRobert Foss hysteresis = <2000>; 138220f9d94eSRobert Foss type = "passive"; 138320f9d94eSRobert Foss }; 138420f9d94eSRobert Foss 138520f9d94eSRobert Foss cpu0_alert1: trip-point1 { 138620f9d94eSRobert Foss temperature = <95000>; 138720f9d94eSRobert Foss hysteresis = <2000>; 138820f9d94eSRobert Foss type = "passive"; 138920f9d94eSRobert Foss }; 139020f9d94eSRobert Foss 139120f9d94eSRobert Foss cpu0_crit: cpu_crit { 139220f9d94eSRobert Foss temperature = <110000>; 139320f9d94eSRobert Foss hysteresis = <1000>; 139420f9d94eSRobert Foss type = "critical"; 139520f9d94eSRobert Foss }; 139620f9d94eSRobert Foss }; 139720f9d94eSRobert Foss 139820f9d94eSRobert Foss cooling-maps { 139920f9d94eSRobert Foss map0 { 140020f9d94eSRobert Foss trip = <&cpu0_alert0>; 140120f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 140220f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 140320f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 140420f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 140520f9d94eSRobert Foss }; 140620f9d94eSRobert Foss map1 { 140720f9d94eSRobert Foss trip = <&cpu0_alert1>; 140820f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 140920f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 141020f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 141120f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 141220f9d94eSRobert Foss }; 141320f9d94eSRobert Foss }; 141420f9d94eSRobert Foss }; 141520f9d94eSRobert Foss 141620f9d94eSRobert Foss cpu1-thermal { 141720f9d94eSRobert Foss polling-delay-passive = <250>; 141820f9d94eSRobert Foss polling-delay = <1000>; 141920f9d94eSRobert Foss 142020f9d94eSRobert Foss thermal-sensors = <&tsens0 2>; 142120f9d94eSRobert Foss 142220f9d94eSRobert Foss trips { 142320f9d94eSRobert Foss cpu1_alert0: trip-point0 { 142420f9d94eSRobert Foss temperature = <90000>; 142520f9d94eSRobert Foss hysteresis = <2000>; 142620f9d94eSRobert Foss type = "passive"; 142720f9d94eSRobert Foss }; 142820f9d94eSRobert Foss 142920f9d94eSRobert Foss cpu1_alert1: trip-point1 { 143020f9d94eSRobert Foss temperature = <95000>; 143120f9d94eSRobert Foss hysteresis = <2000>; 143220f9d94eSRobert Foss type = "passive"; 143320f9d94eSRobert Foss }; 143420f9d94eSRobert Foss 143520f9d94eSRobert Foss cpu1_crit: cpu_crit { 143620f9d94eSRobert Foss temperature = <110000>; 143720f9d94eSRobert Foss hysteresis = <1000>; 143820f9d94eSRobert Foss type = "critical"; 143920f9d94eSRobert Foss }; 144020f9d94eSRobert Foss }; 144120f9d94eSRobert Foss 144220f9d94eSRobert Foss cooling-maps { 144320f9d94eSRobert Foss map0 { 144420f9d94eSRobert Foss trip = <&cpu1_alert0>; 144520f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 144620f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 144720f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 144820f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 144920f9d94eSRobert Foss }; 145020f9d94eSRobert Foss map1 { 145120f9d94eSRobert Foss trip = <&cpu1_alert1>; 145220f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145320f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145420f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145520f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 145620f9d94eSRobert Foss }; 145720f9d94eSRobert Foss }; 145820f9d94eSRobert Foss }; 145920f9d94eSRobert Foss 146020f9d94eSRobert Foss cpu2-thermal { 146120f9d94eSRobert Foss polling-delay-passive = <250>; 146220f9d94eSRobert Foss polling-delay = <1000>; 146320f9d94eSRobert Foss 146420f9d94eSRobert Foss thermal-sensors = <&tsens0 3>; 146520f9d94eSRobert Foss 146620f9d94eSRobert Foss trips { 146720f9d94eSRobert Foss cpu2_alert0: trip-point0 { 146820f9d94eSRobert Foss temperature = <90000>; 146920f9d94eSRobert Foss hysteresis = <2000>; 147020f9d94eSRobert Foss type = "passive"; 147120f9d94eSRobert Foss }; 147220f9d94eSRobert Foss 147320f9d94eSRobert Foss cpu2_alert1: trip-point1 { 147420f9d94eSRobert Foss temperature = <95000>; 147520f9d94eSRobert Foss hysteresis = <2000>; 147620f9d94eSRobert Foss type = "passive"; 147720f9d94eSRobert Foss }; 147820f9d94eSRobert Foss 147920f9d94eSRobert Foss cpu2_crit: cpu_crit { 148020f9d94eSRobert Foss temperature = <110000>; 148120f9d94eSRobert Foss hysteresis = <1000>; 148220f9d94eSRobert Foss type = "critical"; 148320f9d94eSRobert Foss }; 148420f9d94eSRobert Foss }; 148520f9d94eSRobert Foss 148620f9d94eSRobert Foss cooling-maps { 148720f9d94eSRobert Foss map0 { 148820f9d94eSRobert Foss trip = <&cpu2_alert0>; 148920f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149020f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149120f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149220f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 149320f9d94eSRobert Foss }; 149420f9d94eSRobert Foss map1 { 149520f9d94eSRobert Foss trip = <&cpu2_alert1>; 149620f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149720f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149820f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149920f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 150020f9d94eSRobert Foss }; 150120f9d94eSRobert Foss }; 150220f9d94eSRobert Foss }; 150320f9d94eSRobert Foss 150420f9d94eSRobert Foss cpu3-thermal { 150520f9d94eSRobert Foss polling-delay-passive = <250>; 150620f9d94eSRobert Foss polling-delay = <1000>; 150720f9d94eSRobert Foss 150820f9d94eSRobert Foss thermal-sensors = <&tsens0 4>; 150920f9d94eSRobert Foss 151020f9d94eSRobert Foss trips { 151120f9d94eSRobert Foss cpu3_alert0: trip-point0 { 151220f9d94eSRobert Foss temperature = <90000>; 151320f9d94eSRobert Foss hysteresis = <2000>; 151420f9d94eSRobert Foss type = "passive"; 151520f9d94eSRobert Foss }; 151620f9d94eSRobert Foss 151720f9d94eSRobert Foss cpu3_alert1: trip-point1 { 151820f9d94eSRobert Foss temperature = <95000>; 151920f9d94eSRobert Foss hysteresis = <2000>; 152020f9d94eSRobert Foss type = "passive"; 152120f9d94eSRobert Foss }; 152220f9d94eSRobert Foss 152320f9d94eSRobert Foss cpu3_crit: cpu_crit { 152420f9d94eSRobert Foss temperature = <110000>; 152520f9d94eSRobert Foss hysteresis = <1000>; 152620f9d94eSRobert Foss type = "critical"; 152720f9d94eSRobert Foss }; 152820f9d94eSRobert Foss }; 152920f9d94eSRobert Foss 153020f9d94eSRobert Foss cooling-maps { 153120f9d94eSRobert Foss map0 { 153220f9d94eSRobert Foss trip = <&cpu3_alert0>; 153320f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153420f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153520f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153620f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 153720f9d94eSRobert Foss }; 153820f9d94eSRobert Foss map1 { 153920f9d94eSRobert Foss trip = <&cpu3_alert1>; 154020f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 154120f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 154220f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 154320f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 154420f9d94eSRobert Foss }; 154520f9d94eSRobert Foss }; 154620f9d94eSRobert Foss }; 154720f9d94eSRobert Foss 154820f9d94eSRobert Foss cpu4-top-thermal { 154920f9d94eSRobert Foss polling-delay-passive = <250>; 155020f9d94eSRobert Foss polling-delay = <1000>; 155120f9d94eSRobert Foss 155220f9d94eSRobert Foss thermal-sensors = <&tsens0 7>; 155320f9d94eSRobert Foss 155420f9d94eSRobert Foss trips { 155520f9d94eSRobert Foss cpu4_top_alert0: trip-point0 { 155620f9d94eSRobert Foss temperature = <90000>; 155720f9d94eSRobert Foss hysteresis = <2000>; 155820f9d94eSRobert Foss type = "passive"; 155920f9d94eSRobert Foss }; 156020f9d94eSRobert Foss 156120f9d94eSRobert Foss cpu4_top_alert1: trip-point1 { 156220f9d94eSRobert Foss temperature = <95000>; 156320f9d94eSRobert Foss hysteresis = <2000>; 156420f9d94eSRobert Foss type = "passive"; 156520f9d94eSRobert Foss }; 156620f9d94eSRobert Foss 156720f9d94eSRobert Foss cpu4_top_crit: cpu_crit { 156820f9d94eSRobert Foss temperature = <110000>; 156920f9d94eSRobert Foss hysteresis = <1000>; 157020f9d94eSRobert Foss type = "critical"; 157120f9d94eSRobert Foss }; 157220f9d94eSRobert Foss }; 157320f9d94eSRobert Foss 157420f9d94eSRobert Foss cooling-maps { 157520f9d94eSRobert Foss map0 { 157620f9d94eSRobert Foss trip = <&cpu4_top_alert0>; 157720f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 157820f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 157920f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158020f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 158120f9d94eSRobert Foss }; 158220f9d94eSRobert Foss map1 { 158320f9d94eSRobert Foss trip = <&cpu4_top_alert1>; 158420f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158520f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158620f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158720f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 158820f9d94eSRobert Foss }; 158920f9d94eSRobert Foss }; 159020f9d94eSRobert Foss }; 159120f9d94eSRobert Foss 159220f9d94eSRobert Foss cpu5-top-thermal { 159320f9d94eSRobert Foss polling-delay-passive = <250>; 159420f9d94eSRobert Foss polling-delay = <1000>; 159520f9d94eSRobert Foss 159620f9d94eSRobert Foss thermal-sensors = <&tsens0 8>; 159720f9d94eSRobert Foss 159820f9d94eSRobert Foss trips { 159920f9d94eSRobert Foss cpu5_top_alert0: trip-point0 { 160020f9d94eSRobert Foss temperature = <90000>; 160120f9d94eSRobert Foss hysteresis = <2000>; 160220f9d94eSRobert Foss type = "passive"; 160320f9d94eSRobert Foss }; 160420f9d94eSRobert Foss 160520f9d94eSRobert Foss cpu5_top_alert1: trip-point1 { 160620f9d94eSRobert Foss temperature = <95000>; 160720f9d94eSRobert Foss hysteresis = <2000>; 160820f9d94eSRobert Foss type = "passive"; 160920f9d94eSRobert Foss }; 161020f9d94eSRobert Foss 161120f9d94eSRobert Foss cpu5_top_crit: cpu_crit { 161220f9d94eSRobert Foss temperature = <110000>; 161320f9d94eSRobert Foss hysteresis = <1000>; 161420f9d94eSRobert Foss type = "critical"; 161520f9d94eSRobert Foss }; 161620f9d94eSRobert Foss }; 161720f9d94eSRobert Foss 161820f9d94eSRobert Foss cooling-maps { 161920f9d94eSRobert Foss map0 { 162020f9d94eSRobert Foss trip = <&cpu5_top_alert0>; 162120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 162520f9d94eSRobert Foss }; 162620f9d94eSRobert Foss map1 { 162720f9d94eSRobert Foss trip = <&cpu5_top_alert1>; 162820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 163020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 163120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 163220f9d94eSRobert Foss }; 163320f9d94eSRobert Foss }; 163420f9d94eSRobert Foss }; 163520f9d94eSRobert Foss 163620f9d94eSRobert Foss cpu6-top-thermal { 163720f9d94eSRobert Foss polling-delay-passive = <250>; 163820f9d94eSRobert Foss polling-delay = <1000>; 163920f9d94eSRobert Foss 164020f9d94eSRobert Foss thermal-sensors = <&tsens0 9>; 164120f9d94eSRobert Foss 164220f9d94eSRobert Foss trips { 164320f9d94eSRobert Foss cpu6_top_alert0: trip-point0 { 164420f9d94eSRobert Foss temperature = <90000>; 164520f9d94eSRobert Foss hysteresis = <2000>; 164620f9d94eSRobert Foss type = "passive"; 164720f9d94eSRobert Foss }; 164820f9d94eSRobert Foss 164920f9d94eSRobert Foss cpu6_top_alert1: trip-point1 { 165020f9d94eSRobert Foss temperature = <95000>; 165120f9d94eSRobert Foss hysteresis = <2000>; 165220f9d94eSRobert Foss type = "passive"; 165320f9d94eSRobert Foss }; 165420f9d94eSRobert Foss 165520f9d94eSRobert Foss cpu6_top_crit: cpu_crit { 165620f9d94eSRobert Foss temperature = <110000>; 165720f9d94eSRobert Foss hysteresis = <1000>; 165820f9d94eSRobert Foss type = "critical"; 165920f9d94eSRobert Foss }; 166020f9d94eSRobert Foss }; 166120f9d94eSRobert Foss 166220f9d94eSRobert Foss cooling-maps { 166320f9d94eSRobert Foss map0 { 166420f9d94eSRobert Foss trip = <&cpu6_top_alert0>; 166520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 166620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 166720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 166820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 166920f9d94eSRobert Foss }; 167020f9d94eSRobert Foss map1 { 167120f9d94eSRobert Foss trip = <&cpu6_top_alert1>; 167220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 167620f9d94eSRobert Foss }; 167720f9d94eSRobert Foss }; 167820f9d94eSRobert Foss }; 167920f9d94eSRobert Foss 168020f9d94eSRobert Foss cpu7-top-thermal { 168120f9d94eSRobert Foss polling-delay-passive = <250>; 168220f9d94eSRobert Foss polling-delay = <1000>; 168320f9d94eSRobert Foss 168420f9d94eSRobert Foss thermal-sensors = <&tsens0 10>; 168520f9d94eSRobert Foss 168620f9d94eSRobert Foss trips { 168720f9d94eSRobert Foss cpu7_top_alert0: trip-point0 { 168820f9d94eSRobert Foss temperature = <90000>; 168920f9d94eSRobert Foss hysteresis = <2000>; 169020f9d94eSRobert Foss type = "passive"; 169120f9d94eSRobert Foss }; 169220f9d94eSRobert Foss 169320f9d94eSRobert Foss cpu7_top_alert1: trip-point1 { 169420f9d94eSRobert Foss temperature = <95000>; 169520f9d94eSRobert Foss hysteresis = <2000>; 169620f9d94eSRobert Foss type = "passive"; 169720f9d94eSRobert Foss }; 169820f9d94eSRobert Foss 169920f9d94eSRobert Foss cpu7_top_crit: cpu_crit { 170020f9d94eSRobert Foss temperature = <110000>; 170120f9d94eSRobert Foss hysteresis = <1000>; 170220f9d94eSRobert Foss type = "critical"; 170320f9d94eSRobert Foss }; 170420f9d94eSRobert Foss }; 170520f9d94eSRobert Foss 170620f9d94eSRobert Foss cooling-maps { 170720f9d94eSRobert Foss map0 { 170820f9d94eSRobert Foss trip = <&cpu7_top_alert0>; 170920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 171320f9d94eSRobert Foss }; 171420f9d94eSRobert Foss map1 { 171520f9d94eSRobert Foss trip = <&cpu7_top_alert1>; 171620f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171720f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171820f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171920f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 172020f9d94eSRobert Foss }; 172120f9d94eSRobert Foss }; 172220f9d94eSRobert Foss }; 172320f9d94eSRobert Foss 172420f9d94eSRobert Foss cpu4-bottom-thermal { 172520f9d94eSRobert Foss polling-delay-passive = <250>; 172620f9d94eSRobert Foss polling-delay = <1000>; 172720f9d94eSRobert Foss 172820f9d94eSRobert Foss thermal-sensors = <&tsens0 11>; 172920f9d94eSRobert Foss 173020f9d94eSRobert Foss trips { 173120f9d94eSRobert Foss cpu4_bottom_alert0: trip-point0 { 173220f9d94eSRobert Foss temperature = <90000>; 173320f9d94eSRobert Foss hysteresis = <2000>; 173420f9d94eSRobert Foss type = "passive"; 173520f9d94eSRobert Foss }; 173620f9d94eSRobert Foss 173720f9d94eSRobert Foss cpu4_bottom_alert1: trip-point1 { 173820f9d94eSRobert Foss temperature = <95000>; 173920f9d94eSRobert Foss hysteresis = <2000>; 174020f9d94eSRobert Foss type = "passive"; 174120f9d94eSRobert Foss }; 174220f9d94eSRobert Foss 174320f9d94eSRobert Foss cpu4_bottom_crit: cpu_crit { 174420f9d94eSRobert Foss temperature = <110000>; 174520f9d94eSRobert Foss hysteresis = <1000>; 174620f9d94eSRobert Foss type = "critical"; 174720f9d94eSRobert Foss }; 174820f9d94eSRobert Foss }; 174920f9d94eSRobert Foss 175020f9d94eSRobert Foss cooling-maps { 175120f9d94eSRobert Foss map0 { 175220f9d94eSRobert Foss trip = <&cpu4_bottom_alert0>; 175320f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175420f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175520f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175620f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 175720f9d94eSRobert Foss }; 175820f9d94eSRobert Foss map1 { 175920f9d94eSRobert Foss trip = <&cpu4_bottom_alert1>; 176020f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 176120f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 176220f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 176320f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 176420f9d94eSRobert Foss }; 176520f9d94eSRobert Foss }; 176620f9d94eSRobert Foss }; 176720f9d94eSRobert Foss 176820f9d94eSRobert Foss cpu5-bottom-thermal { 176920f9d94eSRobert Foss polling-delay-passive = <250>; 177020f9d94eSRobert Foss polling-delay = <1000>; 177120f9d94eSRobert Foss 177220f9d94eSRobert Foss thermal-sensors = <&tsens0 12>; 177320f9d94eSRobert Foss 177420f9d94eSRobert Foss trips { 177520f9d94eSRobert Foss cpu5_bottom_alert0: trip-point0 { 177620f9d94eSRobert Foss temperature = <90000>; 177720f9d94eSRobert Foss hysteresis = <2000>; 177820f9d94eSRobert Foss type = "passive"; 177920f9d94eSRobert Foss }; 178020f9d94eSRobert Foss 178120f9d94eSRobert Foss cpu5_bottom_alert1: trip-point1 { 178220f9d94eSRobert Foss temperature = <95000>; 178320f9d94eSRobert Foss hysteresis = <2000>; 178420f9d94eSRobert Foss type = "passive"; 178520f9d94eSRobert Foss }; 178620f9d94eSRobert Foss 178720f9d94eSRobert Foss cpu5_bottom_crit: cpu_crit { 178820f9d94eSRobert Foss temperature = <110000>; 178920f9d94eSRobert Foss hysteresis = <1000>; 179020f9d94eSRobert Foss type = "critical"; 179120f9d94eSRobert Foss }; 179220f9d94eSRobert Foss }; 179320f9d94eSRobert Foss 179420f9d94eSRobert Foss cooling-maps { 179520f9d94eSRobert Foss map0 { 179620f9d94eSRobert Foss trip = <&cpu5_bottom_alert0>; 179720f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 179820f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 179920f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 180020f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 180120f9d94eSRobert Foss }; 180220f9d94eSRobert Foss map1 { 180320f9d94eSRobert Foss trip = <&cpu5_bottom_alert1>; 180420f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 180520f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 180620f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 180720f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 180820f9d94eSRobert Foss }; 180920f9d94eSRobert Foss }; 181020f9d94eSRobert Foss }; 181120f9d94eSRobert Foss 181220f9d94eSRobert Foss cpu6-bottom-thermal { 181320f9d94eSRobert Foss polling-delay-passive = <250>; 181420f9d94eSRobert Foss polling-delay = <1000>; 181520f9d94eSRobert Foss 181620f9d94eSRobert Foss thermal-sensors = <&tsens0 13>; 181720f9d94eSRobert Foss 181820f9d94eSRobert Foss trips { 181920f9d94eSRobert Foss cpu6_bottom_alert0: trip-point0 { 182020f9d94eSRobert Foss temperature = <90000>; 182120f9d94eSRobert Foss hysteresis = <2000>; 182220f9d94eSRobert Foss type = "passive"; 182320f9d94eSRobert Foss }; 182420f9d94eSRobert Foss 182520f9d94eSRobert Foss cpu6_bottom_alert1: trip-point1 { 182620f9d94eSRobert Foss temperature = <95000>; 182720f9d94eSRobert Foss hysteresis = <2000>; 182820f9d94eSRobert Foss type = "passive"; 182920f9d94eSRobert Foss }; 183020f9d94eSRobert Foss 183120f9d94eSRobert Foss cpu6_bottom_crit: cpu_crit { 183220f9d94eSRobert Foss temperature = <110000>; 183320f9d94eSRobert Foss hysteresis = <1000>; 183420f9d94eSRobert Foss type = "critical"; 183520f9d94eSRobert Foss }; 183620f9d94eSRobert Foss }; 183720f9d94eSRobert Foss 183820f9d94eSRobert Foss cooling-maps { 183920f9d94eSRobert Foss map0 { 184020f9d94eSRobert Foss trip = <&cpu6_bottom_alert0>; 184120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 184220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 184320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 184420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 184520f9d94eSRobert Foss }; 184620f9d94eSRobert Foss map1 { 184720f9d94eSRobert Foss trip = <&cpu6_bottom_alert1>; 184820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 184920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 185020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 185120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 185220f9d94eSRobert Foss }; 185320f9d94eSRobert Foss }; 185420f9d94eSRobert Foss }; 185520f9d94eSRobert Foss 185620f9d94eSRobert Foss cpu7-bottom-thermal { 185720f9d94eSRobert Foss polling-delay-passive = <250>; 185820f9d94eSRobert Foss polling-delay = <1000>; 185920f9d94eSRobert Foss 186020f9d94eSRobert Foss thermal-sensors = <&tsens0 14>; 186120f9d94eSRobert Foss 186220f9d94eSRobert Foss trips { 186320f9d94eSRobert Foss cpu7_bottom_alert0: trip-point0 { 186420f9d94eSRobert Foss temperature = <90000>; 186520f9d94eSRobert Foss hysteresis = <2000>; 186620f9d94eSRobert Foss type = "passive"; 186720f9d94eSRobert Foss }; 186820f9d94eSRobert Foss 186920f9d94eSRobert Foss cpu7_bottom_alert1: trip-point1 { 187020f9d94eSRobert Foss temperature = <95000>; 187120f9d94eSRobert Foss hysteresis = <2000>; 187220f9d94eSRobert Foss type = "passive"; 187320f9d94eSRobert Foss }; 187420f9d94eSRobert Foss 187520f9d94eSRobert Foss cpu7_bottom_crit: cpu_crit { 187620f9d94eSRobert Foss temperature = <110000>; 187720f9d94eSRobert Foss hysteresis = <1000>; 187820f9d94eSRobert Foss type = "critical"; 187920f9d94eSRobert Foss }; 188020f9d94eSRobert Foss }; 188120f9d94eSRobert Foss 188220f9d94eSRobert Foss cooling-maps { 188320f9d94eSRobert Foss map0 { 188420f9d94eSRobert Foss trip = <&cpu7_bottom_alert0>; 188520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 188620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 188720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 188820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 188920f9d94eSRobert Foss }; 189020f9d94eSRobert Foss map1 { 189120f9d94eSRobert Foss trip = <&cpu7_bottom_alert1>; 189220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 189320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 189420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 189520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 189620f9d94eSRobert Foss }; 189720f9d94eSRobert Foss }; 189820f9d94eSRobert Foss }; 189920f9d94eSRobert Foss 190020f9d94eSRobert Foss aoss0-thermal { 190120f9d94eSRobert Foss polling-delay-passive = <250>; 190220f9d94eSRobert Foss polling-delay = <1000>; 190320f9d94eSRobert Foss 190420f9d94eSRobert Foss thermal-sensors = <&tsens0 0>; 190520f9d94eSRobert Foss 190620f9d94eSRobert Foss trips { 190720f9d94eSRobert Foss aoss0_alert0: trip-point0 { 190820f9d94eSRobert Foss temperature = <90000>; 190920f9d94eSRobert Foss hysteresis = <2000>; 191020f9d94eSRobert Foss type = "hot"; 191120f9d94eSRobert Foss }; 191220f9d94eSRobert Foss }; 191320f9d94eSRobert Foss }; 191420f9d94eSRobert Foss 191520f9d94eSRobert Foss cluster0-thermal { 191620f9d94eSRobert Foss polling-delay-passive = <250>; 191720f9d94eSRobert Foss polling-delay = <1000>; 191820f9d94eSRobert Foss 191920f9d94eSRobert Foss thermal-sensors = <&tsens0 5>; 192020f9d94eSRobert Foss 192120f9d94eSRobert Foss trips { 192220f9d94eSRobert Foss cluster0_alert0: trip-point0 { 192320f9d94eSRobert Foss temperature = <90000>; 192420f9d94eSRobert Foss hysteresis = <2000>; 192520f9d94eSRobert Foss type = "hot"; 192620f9d94eSRobert Foss }; 192720f9d94eSRobert Foss cluster0_crit: cluster0_crit { 192820f9d94eSRobert Foss temperature = <110000>; 192920f9d94eSRobert Foss hysteresis = <2000>; 193020f9d94eSRobert Foss type = "critical"; 193120f9d94eSRobert Foss }; 193220f9d94eSRobert Foss }; 193320f9d94eSRobert Foss }; 193420f9d94eSRobert Foss 193520f9d94eSRobert Foss cluster1-thermal { 193620f9d94eSRobert Foss polling-delay-passive = <250>; 193720f9d94eSRobert Foss polling-delay = <1000>; 193820f9d94eSRobert Foss 193920f9d94eSRobert Foss thermal-sensors = <&tsens0 6>; 194020f9d94eSRobert Foss 194120f9d94eSRobert Foss trips { 194220f9d94eSRobert Foss cluster1_alert0: trip-point0 { 194320f9d94eSRobert Foss temperature = <90000>; 194420f9d94eSRobert Foss hysteresis = <2000>; 194520f9d94eSRobert Foss type = "hot"; 194620f9d94eSRobert Foss }; 194720f9d94eSRobert Foss cluster1_crit: cluster1_crit { 194820f9d94eSRobert Foss temperature = <110000>; 194920f9d94eSRobert Foss hysteresis = <2000>; 195020f9d94eSRobert Foss type = "critical"; 195120f9d94eSRobert Foss }; 195220f9d94eSRobert Foss }; 195320f9d94eSRobert Foss }; 195420f9d94eSRobert Foss 195520f9d94eSRobert Foss aoss1-thermal { 195620f9d94eSRobert Foss polling-delay-passive = <250>; 195720f9d94eSRobert Foss polling-delay = <1000>; 195820f9d94eSRobert Foss 195920f9d94eSRobert Foss thermal-sensors = <&tsens1 0>; 196020f9d94eSRobert Foss 196120f9d94eSRobert Foss trips { 196220f9d94eSRobert Foss aoss1_alert0: trip-point0 { 196320f9d94eSRobert Foss temperature = <90000>; 196420f9d94eSRobert Foss hysteresis = <2000>; 196520f9d94eSRobert Foss type = "hot"; 196620f9d94eSRobert Foss }; 196720f9d94eSRobert Foss }; 196820f9d94eSRobert Foss }; 196920f9d94eSRobert Foss 197020f9d94eSRobert Foss gpu-thermal-top { 197120f9d94eSRobert Foss polling-delay-passive = <250>; 197220f9d94eSRobert Foss polling-delay = <1000>; 197320f9d94eSRobert Foss 197420f9d94eSRobert Foss thermal-sensors = <&tsens1 1>; 197520f9d94eSRobert Foss 197620f9d94eSRobert Foss trips { 197720f9d94eSRobert Foss gpu1_alert0: trip-point0 { 197820f9d94eSRobert Foss temperature = <90000>; 197920f9d94eSRobert Foss hysteresis = <1000>; 198020f9d94eSRobert Foss type = "hot"; 198120f9d94eSRobert Foss }; 198220f9d94eSRobert Foss }; 198320f9d94eSRobert Foss }; 198420f9d94eSRobert Foss 198520f9d94eSRobert Foss gpu-thermal-bottom { 198620f9d94eSRobert Foss polling-delay-passive = <250>; 198720f9d94eSRobert Foss polling-delay = <1000>; 198820f9d94eSRobert Foss 198920f9d94eSRobert Foss thermal-sensors = <&tsens1 2>; 199020f9d94eSRobert Foss 199120f9d94eSRobert Foss trips { 199220f9d94eSRobert Foss gpu2_alert0: trip-point0 { 199320f9d94eSRobert Foss temperature = <90000>; 199420f9d94eSRobert Foss hysteresis = <1000>; 199520f9d94eSRobert Foss type = "hot"; 199620f9d94eSRobert Foss }; 199720f9d94eSRobert Foss }; 199820f9d94eSRobert Foss }; 199920f9d94eSRobert Foss 200020f9d94eSRobert Foss nspss1-thermal { 200120f9d94eSRobert Foss polling-delay-passive = <250>; 200220f9d94eSRobert Foss polling-delay = <1000>; 200320f9d94eSRobert Foss 200420f9d94eSRobert Foss thermal-sensors = <&tsens1 3>; 200520f9d94eSRobert Foss 200620f9d94eSRobert Foss trips { 200720f9d94eSRobert Foss nspss1_alert0: trip-point0 { 200820f9d94eSRobert Foss temperature = <90000>; 200920f9d94eSRobert Foss hysteresis = <1000>; 201020f9d94eSRobert Foss type = "hot"; 201120f9d94eSRobert Foss }; 201220f9d94eSRobert Foss }; 201320f9d94eSRobert Foss }; 201420f9d94eSRobert Foss 201520f9d94eSRobert Foss nspss2-thermal { 201620f9d94eSRobert Foss polling-delay-passive = <250>; 201720f9d94eSRobert Foss polling-delay = <1000>; 201820f9d94eSRobert Foss 201920f9d94eSRobert Foss thermal-sensors = <&tsens1 4>; 202020f9d94eSRobert Foss 202120f9d94eSRobert Foss trips { 202220f9d94eSRobert Foss nspss2_alert0: trip-point0 { 202320f9d94eSRobert Foss temperature = <90000>; 202420f9d94eSRobert Foss hysteresis = <1000>; 202520f9d94eSRobert Foss type = "hot"; 202620f9d94eSRobert Foss }; 202720f9d94eSRobert Foss }; 202820f9d94eSRobert Foss }; 202920f9d94eSRobert Foss 203020f9d94eSRobert Foss nspss3-thermal { 203120f9d94eSRobert Foss polling-delay-passive = <250>; 203220f9d94eSRobert Foss polling-delay = <1000>; 203320f9d94eSRobert Foss 203420f9d94eSRobert Foss thermal-sensors = <&tsens1 5>; 203520f9d94eSRobert Foss 203620f9d94eSRobert Foss trips { 203720f9d94eSRobert Foss nspss3_alert0: trip-point0 { 203820f9d94eSRobert Foss temperature = <90000>; 203920f9d94eSRobert Foss hysteresis = <1000>; 204020f9d94eSRobert Foss type = "hot"; 204120f9d94eSRobert Foss }; 204220f9d94eSRobert Foss }; 204320f9d94eSRobert Foss }; 204420f9d94eSRobert Foss 204520f9d94eSRobert Foss video-thermal { 204620f9d94eSRobert Foss polling-delay-passive = <250>; 204720f9d94eSRobert Foss polling-delay = <1000>; 204820f9d94eSRobert Foss 204920f9d94eSRobert Foss thermal-sensors = <&tsens1 6>; 205020f9d94eSRobert Foss 205120f9d94eSRobert Foss trips { 205220f9d94eSRobert Foss video_alert0: trip-point0 { 205320f9d94eSRobert Foss temperature = <90000>; 205420f9d94eSRobert Foss hysteresis = <2000>; 205520f9d94eSRobert Foss type = "hot"; 205620f9d94eSRobert Foss }; 205720f9d94eSRobert Foss }; 205820f9d94eSRobert Foss }; 205920f9d94eSRobert Foss 206020f9d94eSRobert Foss mem-thermal { 206120f9d94eSRobert Foss polling-delay-passive = <250>; 206220f9d94eSRobert Foss polling-delay = <1000>; 206320f9d94eSRobert Foss 206420f9d94eSRobert Foss thermal-sensors = <&tsens1 7>; 206520f9d94eSRobert Foss 206620f9d94eSRobert Foss trips { 206720f9d94eSRobert Foss mem_alert0: trip-point0 { 206820f9d94eSRobert Foss temperature = <90000>; 206920f9d94eSRobert Foss hysteresis = <2000>; 207020f9d94eSRobert Foss type = "hot"; 207120f9d94eSRobert Foss }; 207220f9d94eSRobert Foss }; 207320f9d94eSRobert Foss }; 207420f9d94eSRobert Foss 207520f9d94eSRobert Foss modem1-thermal-top { 207620f9d94eSRobert Foss polling-delay-passive = <250>; 207720f9d94eSRobert Foss polling-delay = <1000>; 207820f9d94eSRobert Foss 207920f9d94eSRobert Foss thermal-sensors = <&tsens1 8>; 208020f9d94eSRobert Foss 208120f9d94eSRobert Foss trips { 208220f9d94eSRobert Foss modem1_alert0: trip-point0 { 208320f9d94eSRobert Foss temperature = <90000>; 208420f9d94eSRobert Foss hysteresis = <2000>; 208520f9d94eSRobert Foss type = "hot"; 208620f9d94eSRobert Foss }; 208720f9d94eSRobert Foss }; 208820f9d94eSRobert Foss }; 208920f9d94eSRobert Foss 209020f9d94eSRobert Foss modem2-thermal-top { 209120f9d94eSRobert Foss polling-delay-passive = <250>; 209220f9d94eSRobert Foss polling-delay = <1000>; 209320f9d94eSRobert Foss 209420f9d94eSRobert Foss thermal-sensors = <&tsens1 9>; 209520f9d94eSRobert Foss 209620f9d94eSRobert Foss trips { 209720f9d94eSRobert Foss modem2_alert0: trip-point0 { 209820f9d94eSRobert Foss temperature = <90000>; 209920f9d94eSRobert Foss hysteresis = <2000>; 210020f9d94eSRobert Foss type = "hot"; 210120f9d94eSRobert Foss }; 210220f9d94eSRobert Foss }; 210320f9d94eSRobert Foss }; 210420f9d94eSRobert Foss 210520f9d94eSRobert Foss modem3-thermal-top { 210620f9d94eSRobert Foss polling-delay-passive = <250>; 210720f9d94eSRobert Foss polling-delay = <1000>; 210820f9d94eSRobert Foss 210920f9d94eSRobert Foss thermal-sensors = <&tsens1 10>; 211020f9d94eSRobert Foss 211120f9d94eSRobert Foss trips { 211220f9d94eSRobert Foss modem3_alert0: trip-point0 { 211320f9d94eSRobert Foss temperature = <90000>; 211420f9d94eSRobert Foss hysteresis = <2000>; 211520f9d94eSRobert Foss type = "hot"; 211620f9d94eSRobert Foss }; 211720f9d94eSRobert Foss }; 211820f9d94eSRobert Foss }; 211920f9d94eSRobert Foss 212020f9d94eSRobert Foss modem4-thermal-top { 212120f9d94eSRobert Foss polling-delay-passive = <250>; 212220f9d94eSRobert Foss polling-delay = <1000>; 212320f9d94eSRobert Foss 212420f9d94eSRobert Foss thermal-sensors = <&tsens1 11>; 212520f9d94eSRobert Foss 212620f9d94eSRobert Foss trips { 212720f9d94eSRobert Foss modem4_alert0: trip-point0 { 212820f9d94eSRobert Foss temperature = <90000>; 212920f9d94eSRobert Foss hysteresis = <2000>; 213020f9d94eSRobert Foss type = "hot"; 213120f9d94eSRobert Foss }; 213220f9d94eSRobert Foss }; 213320f9d94eSRobert Foss }; 213420f9d94eSRobert Foss 213520f9d94eSRobert Foss camera-thermal-top { 213620f9d94eSRobert Foss polling-delay-passive = <250>; 213720f9d94eSRobert Foss polling-delay = <1000>; 213820f9d94eSRobert Foss 213920f9d94eSRobert Foss thermal-sensors = <&tsens1 12>; 214020f9d94eSRobert Foss 214120f9d94eSRobert Foss trips { 214220f9d94eSRobert Foss camera1_alert0: trip-point0 { 214320f9d94eSRobert Foss temperature = <90000>; 214420f9d94eSRobert Foss hysteresis = <2000>; 214520f9d94eSRobert Foss type = "hot"; 214620f9d94eSRobert Foss }; 214720f9d94eSRobert Foss }; 214820f9d94eSRobert Foss }; 214920f9d94eSRobert Foss 215020f9d94eSRobert Foss camera-thermal-bottom { 215120f9d94eSRobert Foss polling-delay-passive = <250>; 215220f9d94eSRobert Foss polling-delay = <1000>; 215320f9d94eSRobert Foss 215420f9d94eSRobert Foss thermal-sensors = <&tsens1 13>; 215520f9d94eSRobert Foss 215620f9d94eSRobert Foss trips { 215720f9d94eSRobert Foss camera2_alert0: trip-point0 { 215820f9d94eSRobert Foss temperature = <90000>; 215920f9d94eSRobert Foss hysteresis = <2000>; 216020f9d94eSRobert Foss type = "hot"; 216120f9d94eSRobert Foss }; 216220f9d94eSRobert Foss }; 216320f9d94eSRobert Foss }; 216420f9d94eSRobert Foss }; 216520f9d94eSRobert Foss 2166b7e8f433SVinod Koul timer { 2167b7e8f433SVinod Koul compatible = "arm,armv8-timer"; 2168b7e8f433SVinod Koul interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2169b7e8f433SVinod Koul <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2170b7e8f433SVinod Koul <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2171b7e8f433SVinod Koul <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 2172b7e8f433SVinod Koul }; 2173b7e8f433SVinod Koul}; 2174