1b7e8f433SVinod Koul// SPDX-License-Identifier: BSD-3-Clause 2b7e8f433SVinod Koul/* 34f23d2a5SVinod Koul * Copyright (c) 2020, Linaro Limited 4b7e8f433SVinod Koul */ 5b7e8f433SVinod Koul 6b7e8f433SVinod Koul#include <dt-bindings/interrupt-controller/arm-gic.h> 79fd4887cSRobert Foss#include <dt-bindings/clock/qcom,dispcc-sm8350.h> 86d91e201SVinod Koul#include <dt-bindings/clock/qcom,gcc-sm8350.h> 9b7e8f433SVinod Koul#include <dt-bindings/clock/qcom,rpmh.h> 10bc08fbf4SBjorn Andersson#include <dt-bindings/dma/qcom-gpi.h> 11f0360a7cSKonrad Dybcio#include <dt-bindings/gpio/gpio.h> 1284c856d0SVinod Koul#include <dt-bindings/interconnect/qcom,sm8350.h> 13b7e8f433SVinod Koul#include <dt-bindings/mailbox/qcom-ipcc.h> 14b7e8f433SVinod Koul#include <dt-bindings/power/qcom-rpmpd.h> 15b7e8f433SVinod Koul#include <dt-bindings/soc/qcom,rpmh-rsc.h> 1620f9d94eSRobert Foss#include <dt-bindings/thermal/thermal.h> 17f11d3e7dSAlex Elder#include <dt-bindings/interconnect/qcom,sm8350.h> 18b7e8f433SVinod Koul 19b7e8f433SVinod Koul/ { 20b7e8f433SVinod Koul interrupt-parent = <&intc>; 21b7e8f433SVinod Koul 22b7e8f433SVinod Koul #address-cells = <2>; 23b7e8f433SVinod Koul #size-cells = <2>; 24b7e8f433SVinod Koul 25b7e8f433SVinod Koul chosen { }; 26b7e8f433SVinod Koul 27b7e8f433SVinod Koul clocks { 28b7e8f433SVinod Koul xo_board: xo-board { 29b7e8f433SVinod Koul compatible = "fixed-clock"; 30b7e8f433SVinod Koul #clock-cells = <0>; 31b7e8f433SVinod Koul clock-frequency = <38400000>; 32b7e8f433SVinod Koul clock-output-names = "xo_board"; 33b7e8f433SVinod Koul }; 34b7e8f433SVinod Koul 35b7e8f433SVinod Koul sleep_clk: sleep-clk { 36b7e8f433SVinod Koul compatible = "fixed-clock"; 37b7e8f433SVinod Koul clock-frequency = <32000>; 38b7e8f433SVinod Koul #clock-cells = <0>; 39b7e8f433SVinod Koul }; 400fd4dcb6SBjorn Andersson 410fd4dcb6SBjorn Andersson ufs_phy_rx_symbol_0_clk: ufs-phy-rx-symbol-0 { 420fd4dcb6SBjorn Andersson compatible = "fixed-clock"; 430fd4dcb6SBjorn Andersson clock-frequency = <1000>; 440fd4dcb6SBjorn Andersson #clock-cells = <0>; 450fd4dcb6SBjorn Andersson }; 460fd4dcb6SBjorn Andersson 470fd4dcb6SBjorn Andersson ufs_phy_rx_symbol_1_clk: ufs-phy-rx-symbol-1 { 480fd4dcb6SBjorn Andersson compatible = "fixed-clock"; 490fd4dcb6SBjorn Andersson clock-frequency = <1000>; 500fd4dcb6SBjorn Andersson #clock-cells = <0>; 510fd4dcb6SBjorn Andersson }; 520fd4dcb6SBjorn Andersson 530fd4dcb6SBjorn Andersson ufs_phy_tx_symbol_0_clk: ufs-phy-tx-symbol-0 { 540fd4dcb6SBjorn Andersson compatible = "fixed-clock"; 550fd4dcb6SBjorn Andersson clock-frequency = <1000>; 560fd4dcb6SBjorn Andersson #clock-cells = <0>; 570fd4dcb6SBjorn Andersson }; 58b7e8f433SVinod Koul }; 59b7e8f433SVinod Koul 60b7e8f433SVinod Koul cpus { 61b7e8f433SVinod Koul #address-cells = <2>; 62b7e8f433SVinod Koul #size-cells = <0>; 63b7e8f433SVinod Koul 64b7e8f433SVinod Koul CPU0: cpu@0 { 65b7e8f433SVinod Koul device_type = "cpu"; 66b7e8f433SVinod Koul compatible = "qcom,kryo685"; 67b7e8f433SVinod Koul reg = <0x0 0x0>; 68b7e8f433SVinod Koul enable-method = "psci"; 69b7e8f433SVinod Koul next-level-cache = <&L2_0>; 70ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 7107ddb302SBjorn Andersson power-domains = <&CPU_PD0>; 7207ddb302SBjorn Andersson power-domain-names = "psci"; 7320f9d94eSRobert Foss #cooling-cells = <2>; 74b7e8f433SVinod Koul L2_0: l2-cache { 75b7e8f433SVinod Koul compatible = "cache"; 76b7e8f433SVinod Koul next-level-cache = <&L3_0>; 77b7e8f433SVinod Koul L3_0: l3-cache { 78b7e8f433SVinod Koul compatible = "cache"; 79b7e8f433SVinod Koul }; 80b7e8f433SVinod Koul }; 81b7e8f433SVinod Koul }; 82b7e8f433SVinod Koul 83b7e8f433SVinod Koul CPU1: cpu@100 { 84b7e8f433SVinod Koul device_type = "cpu"; 85b7e8f433SVinod Koul compatible = "qcom,kryo685"; 86b7e8f433SVinod Koul reg = <0x0 0x100>; 87b7e8f433SVinod Koul enable-method = "psci"; 88b7e8f433SVinod Koul next-level-cache = <&L2_100>; 89ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 9007ddb302SBjorn Andersson power-domains = <&CPU_PD1>; 9107ddb302SBjorn Andersson power-domain-names = "psci"; 9220f9d94eSRobert Foss #cooling-cells = <2>; 93b7e8f433SVinod Koul L2_100: l2-cache { 94b7e8f433SVinod Koul compatible = "cache"; 95b7e8f433SVinod Koul next-level-cache = <&L3_0>; 96b7e8f433SVinod Koul }; 97b7e8f433SVinod Koul }; 98b7e8f433SVinod Koul 99b7e8f433SVinod Koul CPU2: cpu@200 { 100b7e8f433SVinod Koul device_type = "cpu"; 101b7e8f433SVinod Koul compatible = "qcom,kryo685"; 102b7e8f433SVinod Koul reg = <0x0 0x200>; 103b7e8f433SVinod Koul enable-method = "psci"; 104b7e8f433SVinod Koul next-level-cache = <&L2_200>; 105ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 10607ddb302SBjorn Andersson power-domains = <&CPU_PD2>; 10707ddb302SBjorn Andersson power-domain-names = "psci"; 10820f9d94eSRobert Foss #cooling-cells = <2>; 109b7e8f433SVinod Koul L2_200: l2-cache { 110b7e8f433SVinod Koul compatible = "cache"; 111b7e8f433SVinod Koul next-level-cache = <&L3_0>; 112b7e8f433SVinod Koul }; 113b7e8f433SVinod Koul }; 114b7e8f433SVinod Koul 115b7e8f433SVinod Koul CPU3: cpu@300 { 116b7e8f433SVinod Koul device_type = "cpu"; 117b7e8f433SVinod Koul compatible = "qcom,kryo685"; 118b7e8f433SVinod Koul reg = <0x0 0x300>; 119b7e8f433SVinod Koul enable-method = "psci"; 120b7e8f433SVinod Koul next-level-cache = <&L2_300>; 121ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 12207ddb302SBjorn Andersson power-domains = <&CPU_PD3>; 12307ddb302SBjorn Andersson power-domain-names = "psci"; 12420f9d94eSRobert Foss #cooling-cells = <2>; 125b7e8f433SVinod Koul L2_300: l2-cache { 126b7e8f433SVinod Koul compatible = "cache"; 127b7e8f433SVinod Koul next-level-cache = <&L3_0>; 128b7e8f433SVinod Koul }; 129b7e8f433SVinod Koul }; 130b7e8f433SVinod Koul 131b7e8f433SVinod Koul CPU4: cpu@400 { 132b7e8f433SVinod Koul device_type = "cpu"; 133b7e8f433SVinod Koul compatible = "qcom,kryo685"; 134b7e8f433SVinod Koul reg = <0x0 0x400>; 135b7e8f433SVinod Koul enable-method = "psci"; 136b7e8f433SVinod Koul next-level-cache = <&L2_400>; 137ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 13807ddb302SBjorn Andersson power-domains = <&CPU_PD4>; 13907ddb302SBjorn Andersson power-domain-names = "psci"; 14020f9d94eSRobert Foss #cooling-cells = <2>; 141b7e8f433SVinod Koul L2_400: l2-cache { 142b7e8f433SVinod Koul compatible = "cache"; 143b7e8f433SVinod Koul next-level-cache = <&L3_0>; 144b7e8f433SVinod Koul }; 145b7e8f433SVinod Koul }; 146b7e8f433SVinod Koul 147b7e8f433SVinod Koul CPU5: cpu@500 { 148b7e8f433SVinod Koul device_type = "cpu"; 149b7e8f433SVinod Koul compatible = "qcom,kryo685"; 150b7e8f433SVinod Koul reg = <0x0 0x500>; 151b7e8f433SVinod Koul enable-method = "psci"; 152b7e8f433SVinod Koul next-level-cache = <&L2_500>; 153ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 15407ddb302SBjorn Andersson power-domains = <&CPU_PD5>; 15507ddb302SBjorn Andersson power-domain-names = "psci"; 15620f9d94eSRobert Foss #cooling-cells = <2>; 157b7e8f433SVinod Koul L2_500: l2-cache { 158b7e8f433SVinod Koul compatible = "cache"; 159b7e8f433SVinod Koul next-level-cache = <&L3_0>; 160b7e8f433SVinod Koul }; 161b7e8f433SVinod Koul 162b7e8f433SVinod Koul }; 163b7e8f433SVinod Koul 164b7e8f433SVinod Koul CPU6: cpu@600 { 165b7e8f433SVinod Koul device_type = "cpu"; 166b7e8f433SVinod Koul compatible = "qcom,kryo685"; 167b7e8f433SVinod Koul reg = <0x0 0x600>; 168b7e8f433SVinod Koul enable-method = "psci"; 169b7e8f433SVinod Koul next-level-cache = <&L2_600>; 170ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 17107ddb302SBjorn Andersson power-domains = <&CPU_PD6>; 17207ddb302SBjorn Andersson power-domain-names = "psci"; 17320f9d94eSRobert Foss #cooling-cells = <2>; 174b7e8f433SVinod Koul L2_600: l2-cache { 175b7e8f433SVinod Koul compatible = "cache"; 176b7e8f433SVinod Koul next-level-cache = <&L3_0>; 177b7e8f433SVinod Koul }; 178b7e8f433SVinod Koul }; 179b7e8f433SVinod Koul 180b7e8f433SVinod Koul CPU7: cpu@700 { 181b7e8f433SVinod Koul device_type = "cpu"; 182b7e8f433SVinod Koul compatible = "qcom,kryo685"; 183b7e8f433SVinod Koul reg = <0x0 0x700>; 184b7e8f433SVinod Koul enable-method = "psci"; 185b7e8f433SVinod Koul next-level-cache = <&L2_700>; 186ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 2>; 18707ddb302SBjorn Andersson power-domains = <&CPU_PD7>; 18807ddb302SBjorn Andersson power-domain-names = "psci"; 18920f9d94eSRobert Foss #cooling-cells = <2>; 190b7e8f433SVinod Koul L2_700: l2-cache { 191b7e8f433SVinod Koul compatible = "cache"; 192b7e8f433SVinod Koul next-level-cache = <&L3_0>; 193b7e8f433SVinod Koul }; 194b7e8f433SVinod Koul }; 19507ddb302SBjorn Andersson 19607ddb302SBjorn Andersson cpu-map { 19707ddb302SBjorn Andersson cluster0 { 19807ddb302SBjorn Andersson core0 { 19907ddb302SBjorn Andersson cpu = <&CPU0>; 20007ddb302SBjorn Andersson }; 20107ddb302SBjorn Andersson 20207ddb302SBjorn Andersson core1 { 20307ddb302SBjorn Andersson cpu = <&CPU1>; 20407ddb302SBjorn Andersson }; 20507ddb302SBjorn Andersson 20607ddb302SBjorn Andersson core2 { 20707ddb302SBjorn Andersson cpu = <&CPU2>; 20807ddb302SBjorn Andersson }; 20907ddb302SBjorn Andersson 21007ddb302SBjorn Andersson core3 { 21107ddb302SBjorn Andersson cpu = <&CPU3>; 21207ddb302SBjorn Andersson }; 21307ddb302SBjorn Andersson 21407ddb302SBjorn Andersson core4 { 21507ddb302SBjorn Andersson cpu = <&CPU4>; 21607ddb302SBjorn Andersson }; 21707ddb302SBjorn Andersson 21807ddb302SBjorn Andersson core5 { 21907ddb302SBjorn Andersson cpu = <&CPU5>; 22007ddb302SBjorn Andersson }; 22107ddb302SBjorn Andersson 22207ddb302SBjorn Andersson core6 { 22307ddb302SBjorn Andersson cpu = <&CPU6>; 22407ddb302SBjorn Andersson }; 22507ddb302SBjorn Andersson 22607ddb302SBjorn Andersson core7 { 22707ddb302SBjorn Andersson cpu = <&CPU7>; 22807ddb302SBjorn Andersson }; 22907ddb302SBjorn Andersson }; 23007ddb302SBjorn Andersson }; 23107ddb302SBjorn Andersson 23207ddb302SBjorn Andersson idle-states { 23307ddb302SBjorn Andersson entry-method = "psci"; 23407ddb302SBjorn Andersson 23507ddb302SBjorn Andersson LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { 23607ddb302SBjorn Andersson compatible = "arm,idle-state"; 23707ddb302SBjorn Andersson idle-state-name = "silver-rail-power-collapse"; 23807ddb302SBjorn Andersson arm,psci-suspend-param = <0x40000004>; 23907ddb302SBjorn Andersson entry-latency-us = <355>; 24007ddb302SBjorn Andersson exit-latency-us = <909>; 24107ddb302SBjorn Andersson min-residency-us = <3934>; 24207ddb302SBjorn Andersson local-timer-stop; 24307ddb302SBjorn Andersson }; 24407ddb302SBjorn Andersson 24507ddb302SBjorn Andersson BIG_CPU_SLEEP_0: cpu-sleep-1-0 { 24607ddb302SBjorn Andersson compatible = "arm,idle-state"; 24707ddb302SBjorn Andersson idle-state-name = "gold-rail-power-collapse"; 24807ddb302SBjorn Andersson arm,psci-suspend-param = <0x40000004>; 24907ddb302SBjorn Andersson entry-latency-us = <241>; 25007ddb302SBjorn Andersson exit-latency-us = <1461>; 25107ddb302SBjorn Andersson min-residency-us = <4488>; 25207ddb302SBjorn Andersson local-timer-stop; 25307ddb302SBjorn Andersson }; 25407ddb302SBjorn Andersson }; 25507ddb302SBjorn Andersson 25607ddb302SBjorn Andersson domain-idle-states { 25707ddb302SBjorn Andersson CLUSTER_SLEEP_0: cluster-sleep-0 { 25807ddb302SBjorn Andersson compatible = "domain-idle-state"; 25907ddb302SBjorn Andersson idle-state-name = "cluster-power-collapse"; 26007ddb302SBjorn Andersson arm,psci-suspend-param = <0x4100c344>; 26107ddb302SBjorn Andersson entry-latency-us = <3263>; 26207ddb302SBjorn Andersson exit-latency-us = <6562>; 26307ddb302SBjorn Andersson min-residency-us = <9987>; 26407ddb302SBjorn Andersson local-timer-stop; 26507ddb302SBjorn Andersson }; 26607ddb302SBjorn Andersson }; 267b7e8f433SVinod Koul }; 268b7e8f433SVinod Koul 269b7e8f433SVinod Koul firmware { 270b7e8f433SVinod Koul scm: scm { 271b7e8f433SVinod Koul compatible = "qcom,scm-sm8350", "qcom,scm"; 272b7e8f433SVinod Koul #reset-cells = <1>; 273b7e8f433SVinod Koul }; 274b7e8f433SVinod Koul }; 275b7e8f433SVinod Koul 276b7e8f433SVinod Koul memory@80000000 { 277b7e8f433SVinod Koul device_type = "memory"; 278b7e8f433SVinod Koul /* We expect the bootloader to fill in the size */ 279b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x0>; 280b7e8f433SVinod Koul }; 281b7e8f433SVinod Koul 282b7e8f433SVinod Koul pmu { 283b7e8f433SVinod Koul compatible = "arm,armv8-pmuv3"; 284794d3e30SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 285b7e8f433SVinod Koul }; 286b7e8f433SVinod Koul 287b7e8f433SVinod Koul psci { 288b7e8f433SVinod Koul compatible = "arm,psci-1.0"; 289b7e8f433SVinod Koul method = "smc"; 29007ddb302SBjorn Andersson 29107ddb302SBjorn Andersson CPU_PD0: cpu0 { 29207ddb302SBjorn Andersson #power-domain-cells = <0>; 29307ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 29407ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 29507ddb302SBjorn Andersson }; 29607ddb302SBjorn Andersson 29707ddb302SBjorn Andersson CPU_PD1: cpu1 { 29807ddb302SBjorn Andersson #power-domain-cells = <0>; 29907ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 30007ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 30107ddb302SBjorn Andersson }; 30207ddb302SBjorn Andersson 30307ddb302SBjorn Andersson CPU_PD2: cpu2 { 30407ddb302SBjorn Andersson #power-domain-cells = <0>; 30507ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 30607ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 30707ddb302SBjorn Andersson }; 30807ddb302SBjorn Andersson 30907ddb302SBjorn Andersson CPU_PD3: cpu3 { 31007ddb302SBjorn Andersson #power-domain-cells = <0>; 31107ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 31207ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 31307ddb302SBjorn Andersson }; 31407ddb302SBjorn Andersson 31507ddb302SBjorn Andersson CPU_PD4: cpu4 { 31607ddb302SBjorn Andersson #power-domain-cells = <0>; 31707ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 31807ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 31907ddb302SBjorn Andersson }; 32007ddb302SBjorn Andersson 32107ddb302SBjorn Andersson CPU_PD5: cpu5 { 32207ddb302SBjorn Andersson #power-domain-cells = <0>; 32307ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 32407ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 32507ddb302SBjorn Andersson }; 32607ddb302SBjorn Andersson 32707ddb302SBjorn Andersson CPU_PD6: cpu6 { 32807ddb302SBjorn Andersson #power-domain-cells = <0>; 32907ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 33007ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 33107ddb302SBjorn Andersson }; 33207ddb302SBjorn Andersson 33307ddb302SBjorn Andersson CPU_PD7: cpu7 { 33407ddb302SBjorn Andersson #power-domain-cells = <0>; 33507ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 33607ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 33707ddb302SBjorn Andersson }; 33807ddb302SBjorn Andersson 33907ddb302SBjorn Andersson CLUSTER_PD: cpu-cluster0 { 34007ddb302SBjorn Andersson #power-domain-cells = <0>; 34107ddb302SBjorn Andersson domain-idle-states = <&CLUSTER_SLEEP_0>; 34207ddb302SBjorn Andersson }; 343b7e8f433SVinod Koul }; 344b7e8f433SVinod Koul 345e2eedde4SVinod Koul qup_opp_table_100mhz: opp-table-qup100mhz { 346e2eedde4SVinod Koul compatible = "operating-points-v2"; 347e2eedde4SVinod Koul 348e2eedde4SVinod Koul opp-50000000 { 349e2eedde4SVinod Koul opp-hz = /bits/ 64 <50000000>; 350e2eedde4SVinod Koul required-opps = <&rpmhpd_opp_min_svs>; 351e2eedde4SVinod Koul }; 352e2eedde4SVinod Koul 353e2eedde4SVinod Koul opp-75000000 { 354e2eedde4SVinod Koul opp-hz = /bits/ 64 <75000000>; 355e2eedde4SVinod Koul required-opps = <&rpmhpd_opp_low_svs>; 356e2eedde4SVinod Koul }; 357e2eedde4SVinod Koul 358e2eedde4SVinod Koul opp-100000000 { 359e2eedde4SVinod Koul opp-hz = /bits/ 64 <100000000>; 360e2eedde4SVinod Koul required-opps = <&rpmhpd_opp_svs>; 361e2eedde4SVinod Koul }; 362e2eedde4SVinod Koul }; 363e2eedde4SVinod Koul 364e2eedde4SVinod Koul qup_opp_table_120mhz: opp-table-qup120mhz { 365e2eedde4SVinod Koul compatible = "operating-points-v2"; 366e2eedde4SVinod Koul 367e2eedde4SVinod Koul opp-50000000 { 368e2eedde4SVinod Koul opp-hz = /bits/ 64 <50000000>; 369e2eedde4SVinod Koul required-opps = <&rpmhpd_opp_min_svs>; 370e2eedde4SVinod Koul }; 371e2eedde4SVinod Koul 372e2eedde4SVinod Koul opp-75000000 { 373e2eedde4SVinod Koul opp-hz = /bits/ 64 <75000000>; 374e2eedde4SVinod Koul required-opps = <&rpmhpd_opp_low_svs>; 375e2eedde4SVinod Koul }; 376e2eedde4SVinod Koul 377e2eedde4SVinod Koul opp-120000000 { 378e2eedde4SVinod Koul opp-hz = /bits/ 64 <120000000>; 379e2eedde4SVinod Koul required-opps = <&rpmhpd_opp_svs>; 380e2eedde4SVinod Koul }; 381e2eedde4SVinod Koul }; 382e2eedde4SVinod Koul 383b7e8f433SVinod Koul reserved_memory: reserved-memory { 384b7e8f433SVinod Koul #address-cells = <2>; 385b7e8f433SVinod Koul #size-cells = <2>; 386b7e8f433SVinod Koul ranges; 387b7e8f433SVinod Koul 388b7e8f433SVinod Koul hyp_mem: memory@80000000 { 389b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x600000>; 390b7e8f433SVinod Koul no-map; 391b7e8f433SVinod Koul }; 392b7e8f433SVinod Koul 393b7e8f433SVinod Koul xbl_aop_mem: memory@80700000 { 394b7e8f433SVinod Koul no-map; 395b7e8f433SVinod Koul reg = <0x0 0x80700000 0x0 0x160000>; 396b7e8f433SVinod Koul }; 397b7e8f433SVinod Koul 398b7e8f433SVinod Koul cmd_db: memory@80860000 { 399b7e8f433SVinod Koul compatible = "qcom,cmd-db"; 400b7e8f433SVinod Koul reg = <0x0 0x80860000 0x0 0x20000>; 401b7e8f433SVinod Koul no-map; 402b7e8f433SVinod Koul }; 403b7e8f433SVinod Koul 404b7e8f433SVinod Koul reserved_xbl_uefi_log: memory@80880000 { 405b7e8f433SVinod Koul reg = <0x0 0x80880000 0x0 0x14000>; 406b7e8f433SVinod Koul no-map; 407b7e8f433SVinod Koul }; 408b7e8f433SVinod Koul 409b7e8f433SVinod Koul smem_mem: memory@80900000 { 410b7e8f433SVinod Koul reg = <0x0 0x80900000 0x0 0x200000>; 411b7e8f433SVinod Koul no-map; 412b7e8f433SVinod Koul }; 413b7e8f433SVinod Koul 414b7e8f433SVinod Koul cpucp_fw_mem: memory@80b00000 { 415b7e8f433SVinod Koul reg = <0x0 0x80b00000 0x0 0x100000>; 416b7e8f433SVinod Koul no-map; 417b7e8f433SVinod Koul }; 418b7e8f433SVinod Koul 419b7e8f433SVinod Koul cdsp_secure_heap: memory@80c00000 { 420b7e8f433SVinod Koul reg = <0x0 0x80c00000 0x0 0x4600000>; 421b7e8f433SVinod Koul no-map; 422b7e8f433SVinod Koul }; 423b7e8f433SVinod Koul 424b7e8f433SVinod Koul pil_camera_mem: mmeory@85200000 { 425b7e8f433SVinod Koul reg = <0x0 0x85200000 0x0 0x500000>; 426b7e8f433SVinod Koul no-map; 427b7e8f433SVinod Koul }; 428b7e8f433SVinod Koul 429b7e8f433SVinod Koul pil_video_mem: memory@85700000 { 430b7e8f433SVinod Koul reg = <0x0 0x85700000 0x0 0x500000>; 431b7e8f433SVinod Koul no-map; 432b7e8f433SVinod Koul }; 433b7e8f433SVinod Koul 434b7e8f433SVinod Koul pil_cvp_mem: memory@85c00000 { 435b7e8f433SVinod Koul reg = <0x0 0x85c00000 0x0 0x500000>; 436b7e8f433SVinod Koul no-map; 437b7e8f433SVinod Koul }; 438b7e8f433SVinod Koul 439b7e8f433SVinod Koul pil_adsp_mem: memory@86100000 { 440b7e8f433SVinod Koul reg = <0x0 0x86100000 0x0 0x2100000>; 441b7e8f433SVinod Koul no-map; 442b7e8f433SVinod Koul }; 443b7e8f433SVinod Koul 444b7e8f433SVinod Koul pil_slpi_mem: memory@88200000 { 445b7e8f433SVinod Koul reg = <0x0 0x88200000 0x0 0x1500000>; 446b7e8f433SVinod Koul no-map; 447b7e8f433SVinod Koul }; 448b7e8f433SVinod Koul 449b7e8f433SVinod Koul pil_cdsp_mem: memory@89700000 { 450b7e8f433SVinod Koul reg = <0x0 0x89700000 0x0 0x1e00000>; 451b7e8f433SVinod Koul no-map; 452b7e8f433SVinod Koul }; 453b7e8f433SVinod Koul 454b7e8f433SVinod Koul pil_ipa_fw_mem: memory@8b500000 { 455b7e8f433SVinod Koul reg = <0x0 0x8b500000 0x0 0x10000>; 456b7e8f433SVinod Koul no-map; 457b7e8f433SVinod Koul }; 458b7e8f433SVinod Koul 459b7e8f433SVinod Koul pil_ipa_gsi_mem: memory@8b510000 { 460b7e8f433SVinod Koul reg = <0x0 0x8b510000 0x0 0xa000>; 461b7e8f433SVinod Koul no-map; 462b7e8f433SVinod Koul }; 463b7e8f433SVinod Koul 464b7e8f433SVinod Koul pil_gpu_mem: memory@8b51a000 { 465b7e8f433SVinod Koul reg = <0x0 0x8b51a000 0x0 0x2000>; 466b7e8f433SVinod Koul no-map; 467b7e8f433SVinod Koul }; 468b7e8f433SVinod Koul 469b7e8f433SVinod Koul pil_spss_mem: memory@8b600000 { 470b7e8f433SVinod Koul reg = <0x0 0x8b600000 0x0 0x100000>; 471b7e8f433SVinod Koul no-map; 472b7e8f433SVinod Koul }; 473b7e8f433SVinod Koul 474b7e8f433SVinod Koul pil_modem_mem: memory@8b800000 { 475b7e8f433SVinod Koul reg = <0x0 0x8b800000 0x0 0x10000000>; 476b7e8f433SVinod Koul no-map; 477b7e8f433SVinod Koul }; 478b7e8f433SVinod Koul 479774890c9SVinod Koul rmtfs_mem: memory@9b800000 { 480774890c9SVinod Koul compatible = "qcom,rmtfs-mem"; 481774890c9SVinod Koul reg = <0x0 0x9b800000 0x0 0x280000>; 482774890c9SVinod Koul no-map; 483774890c9SVinod Koul 484774890c9SVinod Koul qcom,client-id = <1>; 485774890c9SVinod Koul qcom,vmid = <15>; 486774890c9SVinod Koul }; 487774890c9SVinod Koul 488b7e8f433SVinod Koul hyp_reserved_mem: memory@d0000000 { 489b7e8f433SVinod Koul reg = <0x0 0xd0000000 0x0 0x800000>; 490b7e8f433SVinod Koul no-map; 491b7e8f433SVinod Koul }; 492b7e8f433SVinod Koul 493b7e8f433SVinod Koul pil_trustedvm_mem: memory@d0800000 { 494b7e8f433SVinod Koul reg = <0x0 0xd0800000 0x0 0x76f7000>; 495b7e8f433SVinod Koul no-map; 496b7e8f433SVinod Koul }; 497b7e8f433SVinod Koul 498b7e8f433SVinod Koul qrtr_shbuf: memory@d7ef7000 { 499b7e8f433SVinod Koul reg = <0x0 0xd7ef7000 0x0 0x9000>; 500b7e8f433SVinod Koul no-map; 501b7e8f433SVinod Koul }; 502b7e8f433SVinod Koul 503b7e8f433SVinod Koul chan0_shbuf: memory@d7f00000 { 504b7e8f433SVinod Koul reg = <0x0 0xd7f00000 0x0 0x80000>; 505b7e8f433SVinod Koul no-map; 506b7e8f433SVinod Koul }; 507b7e8f433SVinod Koul 508b7e8f433SVinod Koul chan1_shbuf: memory@d7f80000 { 509b7e8f433SVinod Koul reg = <0x0 0xd7f80000 0x0 0x80000>; 510b7e8f433SVinod Koul no-map; 511b7e8f433SVinod Koul }; 512b7e8f433SVinod Koul 513b7e8f433SVinod Koul removed_mem: memory@d8800000 { 514b7e8f433SVinod Koul reg = <0x0 0xd8800000 0x0 0x6800000>; 515b7e8f433SVinod Koul no-map; 516b7e8f433SVinod Koul }; 517b7e8f433SVinod Koul }; 518b7e8f433SVinod Koul 519b7e8f433SVinod Koul smem: qcom,smem { 520b7e8f433SVinod Koul compatible = "qcom,smem"; 521b7e8f433SVinod Koul memory-region = <&smem_mem>; 522b7e8f433SVinod Koul hwlocks = <&tcsr_mutex 3>; 523b7e8f433SVinod Koul }; 524b7e8f433SVinod Koul 52503a41991SVinod Koul smp2p-adsp { 52603a41991SVinod Koul compatible = "qcom,smp2p"; 52703a41991SVinod Koul qcom,smem = <443>, <429>; 52803a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 52903a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 53003a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 53103a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 53203a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 53303a41991SVinod Koul 53403a41991SVinod Koul qcom,local-pid = <0>; 53503a41991SVinod Koul qcom,remote-pid = <2>; 53603a41991SVinod Koul 53703a41991SVinod Koul smp2p_adsp_out: master-kernel { 53803a41991SVinod Koul qcom,entry-name = "master-kernel"; 53903a41991SVinod Koul #qcom,smem-state-cells = <1>; 54003a41991SVinod Koul }; 54103a41991SVinod Koul 54203a41991SVinod Koul smp2p_adsp_in: slave-kernel { 54303a41991SVinod Koul qcom,entry-name = "slave-kernel"; 54403a41991SVinod Koul interrupt-controller; 54503a41991SVinod Koul #interrupt-cells = <2>; 54603a41991SVinod Koul }; 54703a41991SVinod Koul }; 54803a41991SVinod Koul 54903a41991SVinod Koul smp2p-cdsp { 55003a41991SVinod Koul compatible = "qcom,smp2p"; 55103a41991SVinod Koul qcom,smem = <94>, <432>; 55203a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 55303a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 55403a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 55503a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 55603a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 55703a41991SVinod Koul 55803a41991SVinod Koul qcom,local-pid = <0>; 55903a41991SVinod Koul qcom,remote-pid = <5>; 56003a41991SVinod Koul 56103a41991SVinod Koul smp2p_cdsp_out: master-kernel { 56203a41991SVinod Koul qcom,entry-name = "master-kernel"; 56303a41991SVinod Koul #qcom,smem-state-cells = <1>; 56403a41991SVinod Koul }; 56503a41991SVinod Koul 56603a41991SVinod Koul smp2p_cdsp_in: slave-kernel { 56703a41991SVinod Koul qcom,entry-name = "slave-kernel"; 56803a41991SVinod Koul interrupt-controller; 56903a41991SVinod Koul #interrupt-cells = <2>; 57003a41991SVinod Koul }; 57103a41991SVinod Koul }; 57203a41991SVinod Koul 57303a41991SVinod Koul smp2p-modem { 57403a41991SVinod Koul compatible = "qcom,smp2p"; 57503a41991SVinod Koul qcom,smem = <435>, <428>; 57603a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 57703a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 57803a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 57903a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 58003a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 58103a41991SVinod Koul 58203a41991SVinod Koul qcom,local-pid = <0>; 58303a41991SVinod Koul qcom,remote-pid = <1>; 58403a41991SVinod Koul 58503a41991SVinod Koul smp2p_modem_out: master-kernel { 58603a41991SVinod Koul qcom,entry-name = "master-kernel"; 58703a41991SVinod Koul #qcom,smem-state-cells = <1>; 58803a41991SVinod Koul }; 58903a41991SVinod Koul 59003a41991SVinod Koul smp2p_modem_in: slave-kernel { 59103a41991SVinod Koul qcom,entry-name = "slave-kernel"; 59203a41991SVinod Koul interrupt-controller; 59303a41991SVinod Koul #interrupt-cells = <2>; 59403a41991SVinod Koul }; 595f11d3e7dSAlex Elder 596f11d3e7dSAlex Elder ipa_smp2p_out: ipa-ap-to-modem { 597f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 598f11d3e7dSAlex Elder #qcom,smem-state-cells = <1>; 599f11d3e7dSAlex Elder }; 600f11d3e7dSAlex Elder 601f11d3e7dSAlex Elder ipa_smp2p_in: ipa-modem-to-ap { 602f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 603f11d3e7dSAlex Elder interrupt-controller; 604f11d3e7dSAlex Elder #interrupt-cells = <2>; 605f11d3e7dSAlex Elder }; 60603a41991SVinod Koul }; 60703a41991SVinod Koul 60803a41991SVinod Koul smp2p-slpi { 60903a41991SVinod Koul compatible = "qcom,smp2p"; 61003a41991SVinod Koul qcom,smem = <481>, <430>; 61103a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 61203a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 61303a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 61403a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 61503a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 61603a41991SVinod Koul 61703a41991SVinod Koul qcom,local-pid = <0>; 61803a41991SVinod Koul qcom,remote-pid = <3>; 61903a41991SVinod Koul 62003a41991SVinod Koul smp2p_slpi_out: master-kernel { 62103a41991SVinod Koul qcom,entry-name = "master-kernel"; 62203a41991SVinod Koul #qcom,smem-state-cells = <1>; 62303a41991SVinod Koul }; 62403a41991SVinod Koul 62503a41991SVinod Koul smp2p_slpi_in: slave-kernel { 62603a41991SVinod Koul qcom,entry-name = "slave-kernel"; 62703a41991SVinod Koul interrupt-controller; 62803a41991SVinod Koul #interrupt-cells = <2>; 62903a41991SVinod Koul }; 63003a41991SVinod Koul }; 63103a41991SVinod Koul 632b7e8f433SVinod Koul soc: soc@0 { 633b7e8f433SVinod Koul #address-cells = <2>; 634b7e8f433SVinod Koul #size-cells = <2>; 635b7e8f433SVinod Koul ranges = <0 0 0 0 0x10 0>; 636b7e8f433SVinod Koul dma-ranges = <0 0 0 0 0x10 0>; 637b7e8f433SVinod Koul compatible = "simple-bus"; 638b7e8f433SVinod Koul 639b7e8f433SVinod Koul gcc: clock-controller@100000 { 640b7e8f433SVinod Koul compatible = "qcom,gcc-sm8350"; 641b7e8f433SVinod Koul reg = <0x0 0x00100000 0x0 0x1f0000>; 642b7e8f433SVinod Koul #clock-cells = <1>; 643b7e8f433SVinod Koul #reset-cells = <1>; 644b7e8f433SVinod Koul #power-domain-cells = <1>; 6459ea9eb36SKonrad Dybcio clock-names = "bi_tcxo", 6469ea9eb36SKonrad Dybcio "sleep_clk", 6479ea9eb36SKonrad Dybcio "pcie_0_pipe_clk", 6489ea9eb36SKonrad Dybcio "pcie_1_pipe_clk", 6499ea9eb36SKonrad Dybcio "ufs_card_rx_symbol_0_clk", 6509ea9eb36SKonrad Dybcio "ufs_card_rx_symbol_1_clk", 6519ea9eb36SKonrad Dybcio "ufs_card_tx_symbol_0_clk", 6529ea9eb36SKonrad Dybcio "ufs_phy_rx_symbol_0_clk", 6539ea9eb36SKonrad Dybcio "ufs_phy_rx_symbol_1_clk", 6549ea9eb36SKonrad Dybcio "ufs_phy_tx_symbol_0_clk", 6559ea9eb36SKonrad Dybcio "usb3_phy_wrapper_gcc_usb30_pipe_clk", 6569ea9eb36SKonrad Dybcio "usb3_uni_phy_sec_gcc_usb30_pipe_clk"; 6579ea9eb36SKonrad Dybcio clocks = <&rpmhcc RPMH_CXO_CLK>, 6589ea9eb36SKonrad Dybcio <&sleep_clk>, 6599ea9eb36SKonrad Dybcio <0>, 6609ea9eb36SKonrad Dybcio <0>, 6619ea9eb36SKonrad Dybcio <0>, 6629ea9eb36SKonrad Dybcio <0>, 6639ea9eb36SKonrad Dybcio <0>, 6640fd4dcb6SBjorn Andersson <&ufs_phy_rx_symbol_0_clk>, 6650fd4dcb6SBjorn Andersson <&ufs_phy_rx_symbol_1_clk>, 6660fd4dcb6SBjorn Andersson <&ufs_phy_tx_symbol_0_clk>, 6679ea9eb36SKonrad Dybcio <0>, 6689ea9eb36SKonrad Dybcio <0>; 669b7e8f433SVinod Koul }; 670b7e8f433SVinod Koul 671b7e8f433SVinod Koul ipcc: mailbox@408000 { 672b7e8f433SVinod Koul compatible = "qcom,sm8350-ipcc", "qcom,ipcc"; 673b7e8f433SVinod Koul reg = <0 0x00408000 0 0x1000>; 674b7e8f433SVinod Koul interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 675b7e8f433SVinod Koul interrupt-controller; 676b7e8f433SVinod Koul #interrupt-cells = <3>; 677b7e8f433SVinod Koul #mbox-cells = <2>; 678b7e8f433SVinod Koul }; 679b7e8f433SVinod Koul 680bc08fbf4SBjorn Andersson gpi_dma2: dma-controller@800000 { 681bc08fbf4SBjorn Andersson compatible = "qcom,sm8350-gpi-dma"; 682bc08fbf4SBjorn Andersson reg = <0 0x00800000 0 0x60000>; 683bc08fbf4SBjorn Andersson interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>, 684bc08fbf4SBjorn Andersson <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>, 685bc08fbf4SBjorn Andersson <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>, 686bc08fbf4SBjorn Andersson <GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>, 687bc08fbf4SBjorn Andersson <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>, 688bc08fbf4SBjorn Andersson <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>, 689bc08fbf4SBjorn Andersson <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>, 690bc08fbf4SBjorn Andersson <GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH>, 691bc08fbf4SBjorn Andersson <GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH>, 692bc08fbf4SBjorn Andersson <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>, 693bc08fbf4SBjorn Andersson <GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH>, 694bc08fbf4SBjorn Andersson <GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH>; 695bc08fbf4SBjorn Andersson dma-channels = <12>; 696bc08fbf4SBjorn Andersson dma-channel-mask = <0xff>; 697bc08fbf4SBjorn Andersson iommus = <&apps_smmu 0x5f6 0x0>; 698bc08fbf4SBjorn Andersson #dma-cells = <3>; 699bc08fbf4SBjorn Andersson status = "disabled"; 700bc08fbf4SBjorn Andersson }; 701bc08fbf4SBjorn Andersson 702e84d04a2SKonrad Dybcio qupv3_id_2: geniqup@8c0000 { 703e84d04a2SKonrad Dybcio compatible = "qcom,geni-se-qup"; 704e84d04a2SKonrad Dybcio reg = <0x0 0x008c0000 0x0 0x6000>; 705e84d04a2SKonrad Dybcio clock-names = "m-ahb", "s-ahb"; 706e84d04a2SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 707e84d04a2SKonrad Dybcio <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 7089bc2c8feSKonrad Dybcio iommus = <&apps_smmu 0x5e3 0x0>; 709e84d04a2SKonrad Dybcio #address-cells = <2>; 710e84d04a2SKonrad Dybcio #size-cells = <2>; 711e84d04a2SKonrad Dybcio ranges; 712e84d04a2SKonrad Dybcio status = "disabled"; 71398374e69SKonrad Dybcio 71498374e69SKonrad Dybcio i2c14: i2c@880000 { 71598374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 71698374e69SKonrad Dybcio reg = <0 0x00880000 0 0x4000>; 71798374e69SKonrad Dybcio clock-names = "se"; 71898374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 71998374e69SKonrad Dybcio pinctrl-names = "default"; 72098374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c14_default>; 72198374e69SKonrad Dybcio interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 722ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>, 723ddc97e7dSBjorn Andersson <&gpi_dma2 1 0 QCOM_GPI_I2C>; 724ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 72598374e69SKonrad Dybcio #address-cells = <1>; 72698374e69SKonrad Dybcio #size-cells = <0>; 72798374e69SKonrad Dybcio status = "disabled"; 72898374e69SKonrad Dybcio }; 72998374e69SKonrad Dybcio 73098374e69SKonrad Dybcio spi14: spi@880000 { 73198374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 73298374e69SKonrad Dybcio reg = <0 0x00880000 0 0x4000>; 73398374e69SKonrad Dybcio clock-names = "se"; 73498374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 73598374e69SKonrad Dybcio interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 73698374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 73798374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_120mhz>; 738ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>, 739ddc97e7dSBjorn Andersson <&gpi_dma2 1 0 QCOM_GPI_SPI>; 740ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 74198374e69SKonrad Dybcio #address-cells = <1>; 74298374e69SKonrad Dybcio #size-cells = <0>; 74398374e69SKonrad Dybcio status = "disabled"; 74498374e69SKonrad Dybcio }; 74598374e69SKonrad Dybcio 74698374e69SKonrad Dybcio i2c15: i2c@884000 { 74798374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 74898374e69SKonrad Dybcio reg = <0 0x00884000 0 0x4000>; 74998374e69SKonrad Dybcio clock-names = "se"; 75098374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 75198374e69SKonrad Dybcio pinctrl-names = "default"; 75298374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c15_default>; 75398374e69SKonrad Dybcio interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 754ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>, 755ddc97e7dSBjorn Andersson <&gpi_dma2 1 1 QCOM_GPI_I2C>; 756ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 75798374e69SKonrad Dybcio #address-cells = <1>; 75898374e69SKonrad Dybcio #size-cells = <0>; 75998374e69SKonrad Dybcio status = "disabled"; 76098374e69SKonrad Dybcio }; 76198374e69SKonrad Dybcio 76298374e69SKonrad Dybcio spi15: spi@884000 { 76398374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 76498374e69SKonrad Dybcio reg = <0 0x00884000 0 0x4000>; 76598374e69SKonrad Dybcio clock-names = "se"; 76698374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 76798374e69SKonrad Dybcio interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 76898374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 76998374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_120mhz>; 770ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>, 771ddc97e7dSBjorn Andersson <&gpi_dma2 1 1 QCOM_GPI_SPI>; 772ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 77398374e69SKonrad Dybcio #address-cells = <1>; 77498374e69SKonrad Dybcio #size-cells = <0>; 77598374e69SKonrad Dybcio status = "disabled"; 77698374e69SKonrad Dybcio }; 77798374e69SKonrad Dybcio 77898374e69SKonrad Dybcio i2c16: i2c@888000 { 77998374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 78098374e69SKonrad Dybcio reg = <0 0x00888000 0 0x4000>; 78198374e69SKonrad Dybcio clock-names = "se"; 78298374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 78398374e69SKonrad Dybcio pinctrl-names = "default"; 78498374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c16_default>; 78598374e69SKonrad Dybcio interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 786ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>, 787ddc97e7dSBjorn Andersson <&gpi_dma2 1 2 QCOM_GPI_I2C>; 788ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 78998374e69SKonrad Dybcio #address-cells = <1>; 79098374e69SKonrad Dybcio #size-cells = <0>; 79198374e69SKonrad Dybcio status = "disabled"; 79298374e69SKonrad Dybcio }; 79398374e69SKonrad Dybcio 79498374e69SKonrad Dybcio spi16: spi@888000 { 79598374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 79698374e69SKonrad Dybcio reg = <0 0x00888000 0 0x4000>; 79798374e69SKonrad Dybcio clock-names = "se"; 79898374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 79998374e69SKonrad Dybcio interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 80098374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 80198374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 802ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>, 803ddc97e7dSBjorn Andersson <&gpi_dma2 1 2 QCOM_GPI_SPI>; 804ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 80598374e69SKonrad Dybcio #address-cells = <1>; 80698374e69SKonrad Dybcio #size-cells = <0>; 80798374e69SKonrad Dybcio status = "disabled"; 80898374e69SKonrad Dybcio }; 80998374e69SKonrad Dybcio 81098374e69SKonrad Dybcio i2c17: i2c@88c000 { 81198374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 81298374e69SKonrad Dybcio reg = <0 0x0088c000 0 0x4000>; 81398374e69SKonrad Dybcio clock-names = "se"; 81498374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 81598374e69SKonrad Dybcio pinctrl-names = "default"; 81698374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c17_default>; 81798374e69SKonrad Dybcio interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 818ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>, 819ddc97e7dSBjorn Andersson <&gpi_dma2 1 3 QCOM_GPI_I2C>; 820ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 82198374e69SKonrad Dybcio #address-cells = <1>; 82298374e69SKonrad Dybcio #size-cells = <0>; 82398374e69SKonrad Dybcio status = "disabled"; 82498374e69SKonrad Dybcio }; 82598374e69SKonrad Dybcio 82698374e69SKonrad Dybcio spi17: spi@88c000 { 82798374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 82898374e69SKonrad Dybcio reg = <0 0x0088c000 0 0x4000>; 82998374e69SKonrad Dybcio clock-names = "se"; 83098374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 83198374e69SKonrad Dybcio interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 83298374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 83398374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 834ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>, 835ddc97e7dSBjorn Andersson <&gpi_dma2 1 3 QCOM_GPI_SPI>; 836ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 83798374e69SKonrad Dybcio #address-cells = <1>; 83898374e69SKonrad Dybcio #size-cells = <0>; 83998374e69SKonrad Dybcio status = "disabled"; 84098374e69SKonrad Dybcio }; 84198374e69SKonrad Dybcio 84298374e69SKonrad Dybcio /* QUP no. 18 seems to be strictly SPI/UART-only */ 84398374e69SKonrad Dybcio 84498374e69SKonrad Dybcio spi18: spi@890000 { 84598374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 84698374e69SKonrad Dybcio reg = <0 0x00890000 0 0x4000>; 84798374e69SKonrad Dybcio clock-names = "se"; 84898374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 84998374e69SKonrad Dybcio interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 85098374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 85198374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 852ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>, 853ddc97e7dSBjorn Andersson <&gpi_dma2 1 4 QCOM_GPI_SPI>; 854ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 85598374e69SKonrad Dybcio #address-cells = <1>; 85698374e69SKonrad Dybcio #size-cells = <0>; 85798374e69SKonrad Dybcio status = "disabled"; 85898374e69SKonrad Dybcio }; 85998374e69SKonrad Dybcio 86098374e69SKonrad Dybcio uart18: serial@890000 { 86198374e69SKonrad Dybcio compatible = "qcom,geni-uart"; 86298374e69SKonrad Dybcio reg = <0 0x00890000 0 0x4000>; 86398374e69SKonrad Dybcio clock-names = "se"; 86498374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 86598374e69SKonrad Dybcio pinctrl-names = "default"; 86698374e69SKonrad Dybcio pinctrl-0 = <&qup_uart18_default>; 86798374e69SKonrad Dybcio interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 86898374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 86998374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 87098374e69SKonrad Dybcio status = "disabled"; 87198374e69SKonrad Dybcio }; 87298374e69SKonrad Dybcio 87398374e69SKonrad Dybcio i2c19: i2c@894000 { 87498374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 87598374e69SKonrad Dybcio reg = <0 0x00894000 0 0x4000>; 87698374e69SKonrad Dybcio clock-names = "se"; 87798374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 87898374e69SKonrad Dybcio pinctrl-names = "default"; 87998374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c19_default>; 88098374e69SKonrad Dybcio interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 881ddc97e7dSBjorn Andersson dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>, 882ddc97e7dSBjorn Andersson <&gpi_dma2 1 5 QCOM_GPI_I2C>; 883ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 88498374e69SKonrad Dybcio #address-cells = <1>; 88598374e69SKonrad Dybcio #size-cells = <0>; 88698374e69SKonrad Dybcio status = "disabled"; 88798374e69SKonrad Dybcio }; 88898374e69SKonrad Dybcio 88998374e69SKonrad Dybcio spi19: spi@894000 { 89098374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 89198374e69SKonrad Dybcio reg = <0 0x00894000 0 0x4000>; 89298374e69SKonrad Dybcio clock-names = "se"; 89398374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 89498374e69SKonrad Dybcio interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 89598374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 89698374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 897bc08fbf4SBjorn Andersson dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>, 898bc08fbf4SBjorn Andersson <&gpi_dma2 1 5 QCOM_GPI_SPI>; 899bc08fbf4SBjorn Andersson dma-names = "tx", "rx"; 90098374e69SKonrad Dybcio #address-cells = <1>; 90198374e69SKonrad Dybcio #size-cells = <0>; 90298374e69SKonrad Dybcio status = "disabled"; 90398374e69SKonrad Dybcio }; 904e84d04a2SKonrad Dybcio }; 905e84d04a2SKonrad Dybcio 906bc08fbf4SBjorn Andersson gpi_dma0: dma-controller@900000 { 907bc08fbf4SBjorn Andersson compatible = "qcom,sm8350-gpi-dma"; 908bc08fbf4SBjorn Andersson reg = <0 0x09800000 0 0x60000>; 909bc08fbf4SBjorn Andersson interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, 910bc08fbf4SBjorn Andersson <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, 911bc08fbf4SBjorn Andersson <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, 912bc08fbf4SBjorn Andersson <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, 913bc08fbf4SBjorn Andersson <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>, 914bc08fbf4SBjorn Andersson <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>, 915bc08fbf4SBjorn Andersson <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>, 916bc08fbf4SBjorn Andersson <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>, 917bc08fbf4SBjorn Andersson <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>, 918bc08fbf4SBjorn Andersson <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>, 919bc08fbf4SBjorn Andersson <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, 920bc08fbf4SBjorn Andersson <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; 921bc08fbf4SBjorn Andersson dma-channels = <12>; 922bc08fbf4SBjorn Andersson dma-channel-mask = <0x7e>; 923bc08fbf4SBjorn Andersson iommus = <&apps_smmu 0x5b6 0x0>; 924bc08fbf4SBjorn Andersson #dma-cells = <3>; 925bc08fbf4SBjorn Andersson status = "disabled"; 926bc08fbf4SBjorn Andersson }; 927bc08fbf4SBjorn Andersson 92887f0b434SRobert Foss qupv3_id_0: geniqup@9c0000 { 929b7e8f433SVinod Koul compatible = "qcom,geni-se-qup"; 930b7e8f433SVinod Koul reg = <0x0 0x009c0000 0x0 0x6000>; 931b7e8f433SVinod Koul clock-names = "m-ahb", "s-ahb"; 9326d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 9336d91e201SVinod Koul <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 9349bc2c8feSKonrad Dybcio iommus = <&apps_smmu 0x5a3 0>; 935b7e8f433SVinod Koul #address-cells = <2>; 936b7e8f433SVinod Koul #size-cells = <2>; 937b7e8f433SVinod Koul ranges; 938b7e8f433SVinod Koul status = "disabled"; 939b7e8f433SVinod Koul 940cf03cd7eSKonrad Dybcio i2c0: i2c@980000 { 941cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 942cf03cd7eSKonrad Dybcio reg = <0 0x00980000 0 0x4000>; 943cf03cd7eSKonrad Dybcio clock-names = "se"; 944cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 945cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 946cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c0_default>; 947cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 948ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, 949ddc97e7dSBjorn Andersson <&gpi_dma0 1 0 QCOM_GPI_I2C>; 950ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 951cf03cd7eSKonrad Dybcio #address-cells = <1>; 952cf03cd7eSKonrad Dybcio #size-cells = <0>; 953cf03cd7eSKonrad Dybcio status = "disabled"; 954cf03cd7eSKonrad Dybcio }; 955cf03cd7eSKonrad Dybcio 956cf03cd7eSKonrad Dybcio spi0: spi@980000 { 957cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 958cf03cd7eSKonrad Dybcio reg = <0 0x00980000 0 0x4000>; 959cf03cd7eSKonrad Dybcio clock-names = "se"; 960cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 961cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 962cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 963cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 964ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, 965ddc97e7dSBjorn Andersson <&gpi_dma0 1 0 QCOM_GPI_SPI>; 966ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 967cf03cd7eSKonrad Dybcio #address-cells = <1>; 968cf03cd7eSKonrad Dybcio #size-cells = <0>; 969cf03cd7eSKonrad Dybcio status = "disabled"; 970cf03cd7eSKonrad Dybcio }; 971cf03cd7eSKonrad Dybcio 972cf03cd7eSKonrad Dybcio i2c1: i2c@984000 { 973cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 974cf03cd7eSKonrad Dybcio reg = <0 0x00984000 0 0x4000>; 975cf03cd7eSKonrad Dybcio clock-names = "se"; 976cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 977cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 978cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c1_default>; 979cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 980ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, 981ddc97e7dSBjorn Andersson <&gpi_dma0 1 1 QCOM_GPI_I2C>; 982ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 983cf03cd7eSKonrad Dybcio #address-cells = <1>; 984cf03cd7eSKonrad Dybcio #size-cells = <0>; 985cf03cd7eSKonrad Dybcio status = "disabled"; 986cf03cd7eSKonrad Dybcio }; 987cf03cd7eSKonrad Dybcio 988cf03cd7eSKonrad Dybcio spi1: spi@984000 { 989cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 990cf03cd7eSKonrad Dybcio reg = <0 0x00984000 0 0x4000>; 991cf03cd7eSKonrad Dybcio clock-names = "se"; 992cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 993cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 994cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 995cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 996ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, 997ddc97e7dSBjorn Andersson <&gpi_dma0 1 1 QCOM_GPI_SPI>; 998ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 999cf03cd7eSKonrad Dybcio #address-cells = <1>; 1000cf03cd7eSKonrad Dybcio #size-cells = <0>; 1001cf03cd7eSKonrad Dybcio status = "disabled"; 1002cf03cd7eSKonrad Dybcio }; 1003cf03cd7eSKonrad Dybcio 1004cf03cd7eSKonrad Dybcio i2c2: i2c@988000 { 1005cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 1006cf03cd7eSKonrad Dybcio reg = <0 0x00988000 0 0x4000>; 1007cf03cd7eSKonrad Dybcio clock-names = "se"; 1008cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1009cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1010cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c2_default>; 1011cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 1012ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, 1013ddc97e7dSBjorn Andersson <&gpi_dma0 1 2 QCOM_GPI_I2C>; 1014ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1015cf03cd7eSKonrad Dybcio #address-cells = <1>; 1016cf03cd7eSKonrad Dybcio #size-cells = <0>; 1017cf03cd7eSKonrad Dybcio status = "disabled"; 1018cf03cd7eSKonrad Dybcio }; 1019cf03cd7eSKonrad Dybcio 1020cf03cd7eSKonrad Dybcio spi2: spi@988000 { 1021cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1022cf03cd7eSKonrad Dybcio reg = <0 0x00988000 0 0x4000>; 1023cf03cd7eSKonrad Dybcio clock-names = "se"; 1024cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 1025cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 1026cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1027cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1028ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, 1029ddc97e7dSBjorn Andersson <&gpi_dma0 1 2 QCOM_GPI_SPI>; 1030ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1031cf03cd7eSKonrad Dybcio #address-cells = <1>; 1032cf03cd7eSKonrad Dybcio #size-cells = <0>; 1033cf03cd7eSKonrad Dybcio status = "disabled"; 1034cf03cd7eSKonrad Dybcio }; 1035cf03cd7eSKonrad Dybcio 1036b7e8f433SVinod Koul uart2: serial@98c000 { 1037b7e8f433SVinod Koul compatible = "qcom,geni-debug-uart"; 1038b7e8f433SVinod Koul reg = <0 0x0098c000 0 0x4000>; 1039b7e8f433SVinod Koul clock-names = "se"; 10406d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1041b7e8f433SVinod Koul pinctrl-names = "default"; 1042b7e8f433SVinod Koul pinctrl-0 = <&qup_uart3_default_state>; 1043b7e8f433SVinod Koul interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 1044cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1045cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1046cf03cd7eSKonrad Dybcio #address-cells = <1>; 1047cf03cd7eSKonrad Dybcio #size-cells = <0>; 1048cf03cd7eSKonrad Dybcio status = "disabled"; 1049cf03cd7eSKonrad Dybcio }; 1050cf03cd7eSKonrad Dybcio 1051cf03cd7eSKonrad Dybcio /* QUP no. 3 seems to be strictly SPI-only */ 1052cf03cd7eSKonrad Dybcio 1053cf03cd7eSKonrad Dybcio spi3: spi@98c000 { 1054cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1055cf03cd7eSKonrad Dybcio reg = <0 0x0098c000 0 0x4000>; 1056cf03cd7eSKonrad Dybcio clock-names = "se"; 1057cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 1058cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 1059cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1060cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1061ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, 1062ddc97e7dSBjorn Andersson <&gpi_dma0 1 3 QCOM_GPI_SPI>; 1063ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1064cf03cd7eSKonrad Dybcio #address-cells = <1>; 1065cf03cd7eSKonrad Dybcio #size-cells = <0>; 1066cf03cd7eSKonrad Dybcio status = "disabled"; 1067cf03cd7eSKonrad Dybcio }; 1068cf03cd7eSKonrad Dybcio 1069cf03cd7eSKonrad Dybcio i2c4: i2c@990000 { 1070cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 1071cf03cd7eSKonrad Dybcio reg = <0 0x00990000 0 0x4000>; 1072cf03cd7eSKonrad Dybcio clock-names = "se"; 1073cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1074cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1075cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c4_default>; 1076cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 1077ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, 1078ddc97e7dSBjorn Andersson <&gpi_dma0 1 4 QCOM_GPI_I2C>; 1079ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1080cf03cd7eSKonrad Dybcio #address-cells = <1>; 1081cf03cd7eSKonrad Dybcio #size-cells = <0>; 1082cf03cd7eSKonrad Dybcio status = "disabled"; 1083cf03cd7eSKonrad Dybcio }; 1084cf03cd7eSKonrad Dybcio 1085cf03cd7eSKonrad Dybcio spi4: spi@990000 { 1086cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1087cf03cd7eSKonrad Dybcio reg = <0 0x00990000 0 0x4000>; 1088cf03cd7eSKonrad Dybcio clock-names = "se"; 1089cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 1090cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 1091cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1092cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1093ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, 1094ddc97e7dSBjorn Andersson <&gpi_dma0 1 4 QCOM_GPI_SPI>; 1095ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1096cf03cd7eSKonrad Dybcio #address-cells = <1>; 1097cf03cd7eSKonrad Dybcio #size-cells = <0>; 1098cf03cd7eSKonrad Dybcio status = "disabled"; 1099cf03cd7eSKonrad Dybcio }; 1100cf03cd7eSKonrad Dybcio 1101cf03cd7eSKonrad Dybcio i2c5: i2c@994000 { 1102cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 1103cf03cd7eSKonrad Dybcio reg = <0 0x00994000 0 0x4000>; 1104cf03cd7eSKonrad Dybcio clock-names = "se"; 1105cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1106cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1107cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c5_default>; 1108cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 1109ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, 1110ddc97e7dSBjorn Andersson <&gpi_dma0 1 5 QCOM_GPI_I2C>; 1111ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1112cf03cd7eSKonrad Dybcio #address-cells = <1>; 1113cf03cd7eSKonrad Dybcio #size-cells = <0>; 1114cf03cd7eSKonrad Dybcio status = "disabled"; 1115cf03cd7eSKonrad Dybcio }; 1116cf03cd7eSKonrad Dybcio 1117cf03cd7eSKonrad Dybcio spi5: spi@994000 { 1118cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1119cf03cd7eSKonrad Dybcio reg = <0 0x00994000 0 0x4000>; 1120cf03cd7eSKonrad Dybcio clock-names = "se"; 1121cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1122cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 1123cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1124cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1125ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, 1126ddc97e7dSBjorn Andersson <&gpi_dma0 1 5 QCOM_GPI_SPI>; 1127ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1128cf03cd7eSKonrad Dybcio #address-cells = <1>; 1129cf03cd7eSKonrad Dybcio #size-cells = <0>; 1130cf03cd7eSKonrad Dybcio status = "disabled"; 1131cf03cd7eSKonrad Dybcio }; 1132cf03cd7eSKonrad Dybcio 1133cf03cd7eSKonrad Dybcio i2c6: i2c@998000 { 1134cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 1135cf03cd7eSKonrad Dybcio reg = <0 0x00998000 0 0x4000>; 1136cf03cd7eSKonrad Dybcio clock-names = "se"; 1137cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1138cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1139cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c6_default>; 1140cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 1141ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, 1142ddc97e7dSBjorn Andersson <&gpi_dma0 1 6 QCOM_GPI_I2C>; 1143ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1144cf03cd7eSKonrad Dybcio #address-cells = <1>; 1145cf03cd7eSKonrad Dybcio #size-cells = <0>; 1146cf03cd7eSKonrad Dybcio status = "disabled"; 1147cf03cd7eSKonrad Dybcio }; 1148cf03cd7eSKonrad Dybcio 1149cf03cd7eSKonrad Dybcio spi6: spi@998000 { 1150cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1151cf03cd7eSKonrad Dybcio reg = <0 0x00998000 0 0x4000>; 1152cf03cd7eSKonrad Dybcio clock-names = "se"; 1153cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1154cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 1155cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1156cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1157ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>, 1158ddc97e7dSBjorn Andersson <&gpi_dma0 1 6 QCOM_GPI_SPI>; 1159ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1160cf03cd7eSKonrad Dybcio #address-cells = <1>; 1161cf03cd7eSKonrad Dybcio #size-cells = <0>; 1162cf03cd7eSKonrad Dybcio status = "disabled"; 1163cf03cd7eSKonrad Dybcio }; 1164cf03cd7eSKonrad Dybcio 1165cf03cd7eSKonrad Dybcio uart6: serial@998000 { 1166cf03cd7eSKonrad Dybcio compatible = "qcom,geni-uart"; 1167cf03cd7eSKonrad Dybcio reg = <0 0x00998000 0 0x4000>; 1168cf03cd7eSKonrad Dybcio clock-names = "se"; 1169cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1170cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1171cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_uart6_default>; 1172cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 1173cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1174cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1175cf03cd7eSKonrad Dybcio status = "disabled"; 1176cf03cd7eSKonrad Dybcio }; 1177cf03cd7eSKonrad Dybcio 1178cf03cd7eSKonrad Dybcio i2c7: i2c@99c000 { 1179cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 1180cf03cd7eSKonrad Dybcio reg = <0 0x0099c000 0 0x4000>; 1181cf03cd7eSKonrad Dybcio clock-names = "se"; 1182cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1183cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1184cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c7_default>; 1185cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 1186ddc97e7dSBjorn Andersson dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>, 1187ddc97e7dSBjorn Andersson <&gpi_dma0 1 7 QCOM_GPI_I2C>; 1188ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 1189cf03cd7eSKonrad Dybcio #address-cells = <1>; 1190cf03cd7eSKonrad Dybcio #size-cells = <0>; 1191cf03cd7eSKonrad Dybcio status = "disabled"; 1192cf03cd7eSKonrad Dybcio }; 1193cf03cd7eSKonrad Dybcio 1194cf03cd7eSKonrad Dybcio spi7: spi@99c000 { 1195cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1196cf03cd7eSKonrad Dybcio reg = <0 0x0099c000 0 0x4000>; 1197cf03cd7eSKonrad Dybcio clock-names = "se"; 1198cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1199cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 1200cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1201cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1202bc08fbf4SBjorn Andersson dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>, 1203bc08fbf4SBjorn Andersson <&gpi_dma0 1 7 QCOM_GPI_SPI>; 1204bc08fbf4SBjorn Andersson dma-names = "tx", "rx"; 1205b7e8f433SVinod Koul #address-cells = <1>; 1206b7e8f433SVinod Koul #size-cells = <0>; 1207b7e8f433SVinod Koul status = "disabled"; 1208b7e8f433SVinod Koul }; 1209b7e8f433SVinod Koul }; 1210b7e8f433SVinod Koul 1211bc08fbf4SBjorn Andersson gpi_dma1: dma-controller@a00000 { 1212bc08fbf4SBjorn Andersson compatible = "qcom,sm8350-gpi-dma"; 1213bc08fbf4SBjorn Andersson reg = <0 0x00a00000 0 0x60000>; 1214bc08fbf4SBjorn Andersson interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 1215bc08fbf4SBjorn Andersson <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 1216bc08fbf4SBjorn Andersson <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 1217bc08fbf4SBjorn Andersson <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 1218bc08fbf4SBjorn Andersson <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 1219bc08fbf4SBjorn Andersson <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 1220bc08fbf4SBjorn Andersson <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 1221bc08fbf4SBjorn Andersson <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 1222bc08fbf4SBjorn Andersson <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, 1223bc08fbf4SBjorn Andersson <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 1224bc08fbf4SBjorn Andersson <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 1225bc08fbf4SBjorn Andersson <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; 1226bc08fbf4SBjorn Andersson dma-channels = <12>; 1227bc08fbf4SBjorn Andersson dma-channel-mask = <0xff>; 1228bc08fbf4SBjorn Andersson iommus = <&apps_smmu 0x56 0x0>; 1229bc08fbf4SBjorn Andersson #dma-cells = <3>; 1230bc08fbf4SBjorn Andersson status = "disabled"; 1231bc08fbf4SBjorn Andersson }; 1232bc08fbf4SBjorn Andersson 123306bf656eSJonathan Marek qupv3_id_1: geniqup@ac0000 { 123406bf656eSJonathan Marek compatible = "qcom,geni-se-qup"; 123506bf656eSJonathan Marek reg = <0x0 0x00ac0000 0x0 0x6000>; 123606bf656eSJonathan Marek clock-names = "m-ahb", "s-ahb"; 123706bf656eSJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 123806bf656eSJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 12399bc2c8feSKonrad Dybcio iommus = <&apps_smmu 0x43 0>; 124006bf656eSJonathan Marek #address-cells = <2>; 124106bf656eSJonathan Marek #size-cells = <2>; 124206bf656eSJonathan Marek ranges; 124306bf656eSJonathan Marek status = "disabled"; 124406bf656eSJonathan Marek 124589345355SKonrad Dybcio i2c8: i2c@a80000 { 124689345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 124789345355SKonrad Dybcio reg = <0 0x00a80000 0 0x4000>; 124889345355SKonrad Dybcio clock-names = "se"; 124989345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 125089345355SKonrad Dybcio pinctrl-names = "default"; 125189345355SKonrad Dybcio pinctrl-0 = <&qup_i2c8_default>; 125289345355SKonrad Dybcio interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1253ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, 1254ddc97e7dSBjorn Andersson <&gpi_dma1 1 0 QCOM_GPI_I2C>; 1255ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 125689345355SKonrad Dybcio #address-cells = <1>; 125789345355SKonrad Dybcio #size-cells = <0>; 125889345355SKonrad Dybcio status = "disabled"; 125989345355SKonrad Dybcio }; 126089345355SKonrad Dybcio 126189345355SKonrad Dybcio spi8: spi@a80000 { 126289345355SKonrad Dybcio compatible = "qcom,geni-spi"; 126389345355SKonrad Dybcio reg = <0 0x00a80000 0 0x4000>; 126489345355SKonrad Dybcio clock-names = "se"; 126589345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 126689345355SKonrad Dybcio interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 126789345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 126889345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_120mhz>; 1269ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>, 1270ddc97e7dSBjorn Andersson <&gpi_dma1 1 0 QCOM_GPI_SPI>; 1271ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 127289345355SKonrad Dybcio #address-cells = <1>; 127389345355SKonrad Dybcio #size-cells = <0>; 127489345355SKonrad Dybcio status = "disabled"; 127589345355SKonrad Dybcio }; 127689345355SKonrad Dybcio 127789345355SKonrad Dybcio i2c9: i2c@a84000 { 127889345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 127989345355SKonrad Dybcio reg = <0 0x00a84000 0 0x4000>; 128089345355SKonrad Dybcio clock-names = "se"; 128189345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 128289345355SKonrad Dybcio pinctrl-names = "default"; 128389345355SKonrad Dybcio pinctrl-0 = <&qup_i2c9_default>; 128489345355SKonrad Dybcio interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1285ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, 1286ddc97e7dSBjorn Andersson <&gpi_dma1 1 1 QCOM_GPI_I2C>; 1287ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 128889345355SKonrad Dybcio #address-cells = <1>; 128989345355SKonrad Dybcio #size-cells = <0>; 129089345355SKonrad Dybcio status = "disabled"; 129189345355SKonrad Dybcio }; 129289345355SKonrad Dybcio 129389345355SKonrad Dybcio spi9: spi@a84000 { 129489345355SKonrad Dybcio compatible = "qcom,geni-spi"; 129589345355SKonrad Dybcio reg = <0 0x00a84000 0 0x4000>; 129689345355SKonrad Dybcio clock-names = "se"; 129789345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 129889345355SKonrad Dybcio interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 129989345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 130089345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1301ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>, 1302ddc97e7dSBjorn Andersson <&gpi_dma1 1 1 QCOM_GPI_SPI>; 1303ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 130489345355SKonrad Dybcio #address-cells = <1>; 130589345355SKonrad Dybcio #size-cells = <0>; 130689345355SKonrad Dybcio status = "disabled"; 130789345355SKonrad Dybcio }; 130889345355SKonrad Dybcio 130989345355SKonrad Dybcio i2c10: i2c@a88000 { 131089345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 131189345355SKonrad Dybcio reg = <0 0x00a88000 0 0x4000>; 131289345355SKonrad Dybcio clock-names = "se"; 131389345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 131489345355SKonrad Dybcio pinctrl-names = "default"; 131589345355SKonrad Dybcio pinctrl-0 = <&qup_i2c10_default>; 131689345355SKonrad Dybcio interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1317ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, 1318ddc97e7dSBjorn Andersson <&gpi_dma1 1 2 QCOM_GPI_I2C>; 1319ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 132089345355SKonrad Dybcio #address-cells = <1>; 132189345355SKonrad Dybcio #size-cells = <0>; 132289345355SKonrad Dybcio status = "disabled"; 132389345355SKonrad Dybcio }; 132489345355SKonrad Dybcio 132589345355SKonrad Dybcio spi10: spi@a88000 { 132689345355SKonrad Dybcio compatible = "qcom,geni-spi"; 132789345355SKonrad Dybcio reg = <0 0x00a88000 0 0x4000>; 132889345355SKonrad Dybcio clock-names = "se"; 132989345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 133089345355SKonrad Dybcio interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 133189345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 133289345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1333ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>, 1334ddc97e7dSBjorn Andersson <&gpi_dma1 1 2 QCOM_GPI_SPI>; 1335ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 133689345355SKonrad Dybcio #address-cells = <1>; 133789345355SKonrad Dybcio #size-cells = <0>; 133889345355SKonrad Dybcio status = "disabled"; 133989345355SKonrad Dybcio }; 134089345355SKonrad Dybcio 134189345355SKonrad Dybcio i2c11: i2c@a8c000 { 134289345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 134389345355SKonrad Dybcio reg = <0 0x00a8c000 0 0x4000>; 134489345355SKonrad Dybcio clock-names = "se"; 134589345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 134689345355SKonrad Dybcio pinctrl-names = "default"; 134789345355SKonrad Dybcio pinctrl-0 = <&qup_i2c11_default>; 134889345355SKonrad Dybcio interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1349ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, 1350ddc97e7dSBjorn Andersson <&gpi_dma1 1 3 QCOM_GPI_I2C>; 1351ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 135289345355SKonrad Dybcio #address-cells = <1>; 135389345355SKonrad Dybcio #size-cells = <0>; 135489345355SKonrad Dybcio status = "disabled"; 135589345355SKonrad Dybcio }; 135689345355SKonrad Dybcio 135789345355SKonrad Dybcio spi11: spi@a8c000 { 135889345355SKonrad Dybcio compatible = "qcom,geni-spi"; 135989345355SKonrad Dybcio reg = <0 0x00a8c000 0 0x4000>; 136089345355SKonrad Dybcio clock-names = "se"; 136189345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 136289345355SKonrad Dybcio interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 136389345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 136489345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1365ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>, 1366ddc97e7dSBjorn Andersson <&gpi_dma1 1 3 QCOM_GPI_SPI>; 1367ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 136889345355SKonrad Dybcio #address-cells = <1>; 136989345355SKonrad Dybcio #size-cells = <0>; 137089345355SKonrad Dybcio status = "disabled"; 137189345355SKonrad Dybcio }; 137289345355SKonrad Dybcio 137389345355SKonrad Dybcio i2c12: i2c@a90000 { 137489345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 137589345355SKonrad Dybcio reg = <0 0x00a90000 0 0x4000>; 137689345355SKonrad Dybcio clock-names = "se"; 137789345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 137889345355SKonrad Dybcio pinctrl-names = "default"; 137989345355SKonrad Dybcio pinctrl-0 = <&qup_i2c12_default>; 138089345355SKonrad Dybcio interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1381ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, 1382ddc97e7dSBjorn Andersson <&gpi_dma1 1 4 QCOM_GPI_I2C>; 1383ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 138489345355SKonrad Dybcio #address-cells = <1>; 138589345355SKonrad Dybcio #size-cells = <0>; 138689345355SKonrad Dybcio status = "disabled"; 138789345355SKonrad Dybcio }; 138889345355SKonrad Dybcio 138989345355SKonrad Dybcio spi12: spi@a90000 { 139089345355SKonrad Dybcio compatible = "qcom,geni-spi"; 139189345355SKonrad Dybcio reg = <0 0x00a90000 0 0x4000>; 139289345355SKonrad Dybcio clock-names = "se"; 139389345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 139489345355SKonrad Dybcio interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 139589345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 139689345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1397ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>, 1398ddc97e7dSBjorn Andersson <&gpi_dma1 1 4 QCOM_GPI_SPI>; 1399ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 140089345355SKonrad Dybcio #address-cells = <1>; 140189345355SKonrad Dybcio #size-cells = <0>; 140289345355SKonrad Dybcio status = "disabled"; 140389345355SKonrad Dybcio }; 140489345355SKonrad Dybcio 140506bf656eSJonathan Marek i2c13: i2c@a94000 { 140606bf656eSJonathan Marek compatible = "qcom,geni-i2c"; 140706bf656eSJonathan Marek reg = <0 0x00a94000 0 0x4000>; 140806bf656eSJonathan Marek clock-names = "se"; 140906bf656eSJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 141006bf656eSJonathan Marek pinctrl-names = "default"; 141189345355SKonrad Dybcio pinctrl-0 = <&qup_i2c13_default>; 141206bf656eSJonathan Marek interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1413ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, 1414ddc97e7dSBjorn Andersson <&gpi_dma1 1 5 QCOM_GPI_I2C>; 1415ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 141606bf656eSJonathan Marek #address-cells = <1>; 141706bf656eSJonathan Marek #size-cells = <0>; 141806bf656eSJonathan Marek status = "disabled"; 141906bf656eSJonathan Marek }; 142089345355SKonrad Dybcio 142189345355SKonrad Dybcio spi13: spi@a94000 { 142289345355SKonrad Dybcio compatible = "qcom,geni-spi"; 142389345355SKonrad Dybcio reg = <0 0x00a94000 0 0x4000>; 142489345355SKonrad Dybcio clock-names = "se"; 142589345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 142689345355SKonrad Dybcio interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 142789345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 142889345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1429ddc97e7dSBjorn Andersson dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>, 1430ddc97e7dSBjorn Andersson <&gpi_dma1 1 5 QCOM_GPI_SPI>; 1431ddc97e7dSBjorn Andersson dma-names = "tx", "rx"; 143289345355SKonrad Dybcio #address-cells = <1>; 143389345355SKonrad Dybcio #size-cells = <0>; 143489345355SKonrad Dybcio status = "disabled"; 143589345355SKonrad Dybcio }; 143606bf656eSJonathan Marek }; 143706bf656eSJonathan Marek 1438187f65b7SVinod Koul apps_smmu: iommu@15000000 { 1439187f65b7SVinod Koul compatible = "qcom,sm8350-smmu-500", "arm,mmu-500"; 1440187f65b7SVinod Koul reg = <0 0x15000000 0 0x100000>; 1441187f65b7SVinod Koul #iommu-cells = <2>; 1442187f65b7SVinod Koul #global-interrupts = <2>; 1443187f65b7SVinod Koul interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 1444187f65b7SVinod Koul <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 1445187f65b7SVinod Koul <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 1446187f65b7SVinod Koul <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1447187f65b7SVinod Koul <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 1448187f65b7SVinod Koul <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1449187f65b7SVinod Koul <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1450187f65b7SVinod Koul <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1451187f65b7SVinod Koul <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1452187f65b7SVinod Koul <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1453187f65b7SVinod Koul <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1454187f65b7SVinod Koul <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1455187f65b7SVinod Koul <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1456187f65b7SVinod Koul <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1457187f65b7SVinod Koul <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1458187f65b7SVinod Koul <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1459187f65b7SVinod Koul <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1460187f65b7SVinod Koul <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1461187f65b7SVinod Koul <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1462187f65b7SVinod Koul <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1463187f65b7SVinod Koul <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 1464187f65b7SVinod Koul <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1465187f65b7SVinod Koul <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1466187f65b7SVinod Koul <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 1467187f65b7SVinod Koul <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 1468187f65b7SVinod Koul <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 1469187f65b7SVinod Koul <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 1470187f65b7SVinod Koul <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 1471187f65b7SVinod Koul <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 1472187f65b7SVinod Koul <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 1473187f65b7SVinod Koul <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 1474187f65b7SVinod Koul <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 1475187f65b7SVinod Koul <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 1476187f65b7SVinod Koul <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 1477187f65b7SVinod Koul <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 1478187f65b7SVinod Koul <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 1479187f65b7SVinod Koul <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1480187f65b7SVinod Koul <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1481187f65b7SVinod Koul <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1482187f65b7SVinod Koul <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1483187f65b7SVinod Koul <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 1484187f65b7SVinod Koul <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1485187f65b7SVinod Koul <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1486187f65b7SVinod Koul <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1487187f65b7SVinod Koul <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1488187f65b7SVinod Koul <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1489187f65b7SVinod Koul <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1490187f65b7SVinod Koul <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1491187f65b7SVinod Koul <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1492187f65b7SVinod Koul <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1493187f65b7SVinod Koul <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1494187f65b7SVinod Koul <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1495187f65b7SVinod Koul <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1496187f65b7SVinod Koul <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1497187f65b7SVinod Koul <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1498187f65b7SVinod Koul <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1499187f65b7SVinod Koul <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1500187f65b7SVinod Koul <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1501187f65b7SVinod Koul <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1502187f65b7SVinod Koul <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1503187f65b7SVinod Koul <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1504187f65b7SVinod Koul <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1505187f65b7SVinod Koul <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1506187f65b7SVinod Koul <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1507187f65b7SVinod Koul <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1508187f65b7SVinod Koul <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1509187f65b7SVinod Koul <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 1510187f65b7SVinod Koul <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 1511187f65b7SVinod Koul <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 1512187f65b7SVinod Koul <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 1513187f65b7SVinod Koul <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 1514187f65b7SVinod Koul <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 1515187f65b7SVinod Koul <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 1516187f65b7SVinod Koul <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 1517187f65b7SVinod Koul <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 1518187f65b7SVinod Koul <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 1519187f65b7SVinod Koul <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 1520187f65b7SVinod Koul <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 1521187f65b7SVinod Koul <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 1522187f65b7SVinod Koul <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 1523187f65b7SVinod Koul <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 1524187f65b7SVinod Koul <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 1525187f65b7SVinod Koul <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 1526187f65b7SVinod Koul <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1527187f65b7SVinod Koul <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1528187f65b7SVinod Koul <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1529187f65b7SVinod Koul <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1530187f65b7SVinod Koul <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1531187f65b7SVinod Koul <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1532187f65b7SVinod Koul <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 1533187f65b7SVinod Koul <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 1534187f65b7SVinod Koul <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 1535187f65b7SVinod Koul <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 1536187f65b7SVinod Koul <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 1537187f65b7SVinod Koul <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 1538187f65b7SVinod Koul <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 1539187f65b7SVinod Koul <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 1540187f65b7SVinod Koul <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 1541187f65b7SVinod Koul }; 1542187f65b7SVinod Koul 1543da6b2482SVinod Koul config_noc: interconnect@1500000 { 1544da6b2482SVinod Koul compatible = "qcom,sm8350-config-noc"; 1545da6b2482SVinod Koul reg = <0 0x01500000 0 0xa580>; 1546da6b2482SVinod Koul #interconnect-cells = <1>; 1547da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1548da6b2482SVinod Koul }; 1549da6b2482SVinod Koul 1550da6b2482SVinod Koul mc_virt: interconnect@1580000 { 1551da6b2482SVinod Koul compatible = "qcom,sm8350-mc-virt"; 1552da6b2482SVinod Koul reg = <0 0x01580000 0 0x1000>; 1553da6b2482SVinod Koul #interconnect-cells = <1>; 1554da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1555da6b2482SVinod Koul }; 1556da6b2482SVinod Koul 1557da6b2482SVinod Koul system_noc: interconnect@1680000 { 1558da6b2482SVinod Koul compatible = "qcom,sm8350-system-noc"; 1559da6b2482SVinod Koul reg = <0 0x01680000 0 0x1c200>; 1560da6b2482SVinod Koul #interconnect-cells = <1>; 1561da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1562da6b2482SVinod Koul }; 1563da6b2482SVinod Koul 1564da6b2482SVinod Koul aggre1_noc: interconnect@16e0000 { 1565da6b2482SVinod Koul compatible = "qcom,sm8350-aggre1-noc"; 1566da6b2482SVinod Koul reg = <0 0x016e0000 0 0x1f180>; 1567da6b2482SVinod Koul #interconnect-cells = <1>; 1568da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1569da6b2482SVinod Koul }; 1570da6b2482SVinod Koul 1571da6b2482SVinod Koul aggre2_noc: interconnect@1700000 { 1572da6b2482SVinod Koul compatible = "qcom,sm8350-aggre2-noc"; 1573da6b2482SVinod Koul reg = <0 0x01700000 0 0x33000>; 1574da6b2482SVinod Koul #interconnect-cells = <1>; 1575da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1576da6b2482SVinod Koul }; 1577da6b2482SVinod Koul 1578da6b2482SVinod Koul mmss_noc: interconnect@1740000 { 1579da6b2482SVinod Koul compatible = "qcom,sm8350-mmss-noc"; 1580da6b2482SVinod Koul reg = <0 0x01740000 0 0x1f080>; 1581da6b2482SVinod Koul #interconnect-cells = <1>; 1582da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1583da6b2482SVinod Koul }; 1584da6b2482SVinod Koul 1585da6b2482SVinod Koul lpass_ag_noc: interconnect@3c40000 { 1586da6b2482SVinod Koul compatible = "qcom,sm8350-lpass-ag-noc"; 1587da6b2482SVinod Koul reg = <0 0x03c40000 0 0xf080>; 1588da6b2482SVinod Koul #interconnect-cells = <1>; 1589da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1590da6b2482SVinod Koul }; 1591da6b2482SVinod Koul 1592da6b2482SVinod Koul compute_noc: interconnect@a0c0000{ 1593da6b2482SVinod Koul compatible = "qcom,sm8350-compute-noc"; 1594da6b2482SVinod Koul reg = <0 0x0a0c0000 0 0xa180>; 1595da6b2482SVinod Koul #interconnect-cells = <1>; 1596da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1597da6b2482SVinod Koul }; 1598da6b2482SVinod Koul 1599f11d3e7dSAlex Elder ipa: ipa@1e40000 { 1600f11d3e7dSAlex Elder compatible = "qcom,sm8350-ipa"; 1601f11d3e7dSAlex Elder 1602f11d3e7dSAlex Elder iommus = <&apps_smmu 0x5c0 0x0>, 1603f11d3e7dSAlex Elder <&apps_smmu 0x5c2 0x0>; 1604f11d3e7dSAlex Elder reg = <0 0x1e40000 0 0x8000>, 1605f11d3e7dSAlex Elder <0 0x1e50000 0 0x4b20>, 1606f11d3e7dSAlex Elder <0 0x1e04000 0 0x23000>; 1607f11d3e7dSAlex Elder reg-names = "ipa-reg", 1608f11d3e7dSAlex Elder "ipa-shared", 1609f11d3e7dSAlex Elder "gsi"; 1610f11d3e7dSAlex Elder 1611f11d3e7dSAlex Elder interrupts-extended = <&intc GIC_SPI 655 IRQ_TYPE_EDGE_RISING>, 1612f11d3e7dSAlex Elder <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, 1613f11d3e7dSAlex Elder <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 1614f11d3e7dSAlex Elder <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; 1615f11d3e7dSAlex Elder interrupt-names = "ipa", 1616f11d3e7dSAlex Elder "gsi", 1617f11d3e7dSAlex Elder "ipa-clock-query", 1618f11d3e7dSAlex Elder "ipa-setup-ready"; 1619f11d3e7dSAlex Elder 1620f11d3e7dSAlex Elder clocks = <&rpmhcc RPMH_IPA_CLK>; 1621f11d3e7dSAlex Elder clock-names = "core"; 1622f11d3e7dSAlex Elder 162384173ca3SAlex Elder interconnects = <&aggre2_noc MASTER_IPA &mc_virt SLAVE_EBI1>, 1624f11d3e7dSAlex Elder <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>; 162584173ca3SAlex Elder interconnect-names = "memory", 162684173ca3SAlex Elder "config"; 1627f11d3e7dSAlex Elder 162873419e4dSAlex Elder qcom,qmp = <&aoss_qmp>; 162973419e4dSAlex Elder 1630f11d3e7dSAlex Elder qcom,smem-states = <&ipa_smp2p_out 0>, 1631f11d3e7dSAlex Elder <&ipa_smp2p_out 1>; 1632f11d3e7dSAlex Elder qcom,smem-state-names = "ipa-clock-enabled-valid", 1633f11d3e7dSAlex Elder "ipa-clock-enabled"; 1634f11d3e7dSAlex Elder 1635f11d3e7dSAlex Elder status = "disabled"; 1636f11d3e7dSAlex Elder }; 1637f11d3e7dSAlex Elder 1638b7e8f433SVinod Koul tcsr_mutex: hwlock@1f40000 { 1639b7e8f433SVinod Koul compatible = "qcom,tcsr-mutex"; 1640b7e8f433SVinod Koul reg = <0x0 0x01f40000 0x0 0x40000>; 1641b7e8f433SVinod Koul #hwlock-cells = <1>; 1642b7e8f433SVinod Koul }; 1643b7e8f433SVinod Koul 1644177fcf0aSVinod Koul mpss: remoteproc@4080000 { 1645177fcf0aSVinod Koul compatible = "qcom,sm8350-mpss-pas"; 1646177fcf0aSVinod Koul reg = <0x0 0x04080000 0x0 0x4040>; 1647177fcf0aSVinod Koul 1648177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 1649177fcf0aSVinod Koul <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, 1650177fcf0aSVinod Koul <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, 1651177fcf0aSVinod Koul <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, 1652177fcf0aSVinod Koul <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, 1653177fcf0aSVinod Koul <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; 1654177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", "handover", 1655177fcf0aSVinod Koul "stop-ack", "shutdown-ack"; 1656177fcf0aSVinod Koul 1657177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1658177fcf0aSVinod Koul clock-names = "xo"; 1659177fcf0aSVinod Koul 1660*d0e285c3SRobert Foss power-domains = <&rpmhpd SM8350_CX>, 1661*d0e285c3SRobert Foss <&rpmhpd SM8350_MSS>; 16626b7cb2d2SSibi Sankar power-domain-names = "cx", "mss"; 1663177fcf0aSVinod Koul 166484c856d0SVinod Koul interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; 1665da6b2482SVinod Koul 1666177fcf0aSVinod Koul memory-region = <&pil_modem_mem>; 1667177fcf0aSVinod Koul 16686b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 16696b7cb2d2SSibi Sankar 1670177fcf0aSVinod Koul qcom,smem-states = <&smp2p_modem_out 0>; 1671177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1672177fcf0aSVinod Koul 1673177fcf0aSVinod Koul status = "disabled"; 1674177fcf0aSVinod Koul 1675177fcf0aSVinod Koul glink-edge { 1676177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 1677177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1678177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1679177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 1680177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1681177fcf0aSVinod Koul label = "modem"; 1682177fcf0aSVinod Koul qcom,remote-pid = <1>; 1683177fcf0aSVinod Koul }; 1684177fcf0aSVinod Koul }; 1685177fcf0aSVinod Koul 1686b7e8f433SVinod Koul pdc: interrupt-controller@b220000 { 1687b7e8f433SVinod Koul compatible = "qcom,sm8350-pdc", "qcom,pdc"; 1688b7e8f433SVinod Koul reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 1689b7e8f433SVinod Koul qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>, 1690b7e8f433SVinod Koul <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>, 1691b7e8f433SVinod Koul <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>, 1692b7e8f433SVinod Koul <156 716 12>; 1693b7e8f433SVinod Koul #interrupt-cells = <2>; 1694b7e8f433SVinod Koul interrupt-parent = <&intc>; 1695b7e8f433SVinod Koul interrupt-controller; 1696b7e8f433SVinod Koul }; 1697b7e8f433SVinod Koul 16981dee9e3bSVinod Koul tsens0: thermal-sensor@c263000 { 169920f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 170020f9d94eSRobert Foss reg = <0 0x0c263000 0 0x1ff>, /* TM */ 170120f9d94eSRobert Foss <0 0x0c222000 0 0x8>; /* SROT */ 170220f9d94eSRobert Foss #qcom,sensors = <15>; 17039e7f7b65SKonrad Dybcio interrupts-extended = <&pdc 26 IRQ_TYPE_LEVEL_HIGH>, 170420f9d94eSRobert Foss <&pdc 28 IRQ_TYPE_LEVEL_HIGH>; 170520f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 170620f9d94eSRobert Foss #thermal-sensor-cells = <1>; 170720f9d94eSRobert Foss }; 170820f9d94eSRobert Foss 17091dee9e3bSVinod Koul tsens1: thermal-sensor@c265000 { 171020f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 171120f9d94eSRobert Foss reg = <0 0x0c265000 0 0x1ff>, /* TM */ 171220f9d94eSRobert Foss <0 0x0c223000 0 0x8>; /* SROT */ 171320f9d94eSRobert Foss #qcom,sensors = <14>; 17149e7f7b65SKonrad Dybcio interrupts-extended = <&pdc 27 IRQ_TYPE_LEVEL_HIGH>, 171520f9d94eSRobert Foss <&pdc 29 IRQ_TYPE_LEVEL_HIGH>; 171620f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 171720f9d94eSRobert Foss #thermal-sensor-cells = <1>; 171820f9d94eSRobert Foss }; 171920f9d94eSRobert Foss 172097832fa8SSai Prakash Ranjan aoss_qmp: power-controller@c300000 { 17216ba93ba9SKrzysztof Kozlowski compatible = "qcom,sm8350-aoss-qmp", "qcom,aoss-qmp"; 172247cb6a06SMaulik Shah reg = <0 0x0c300000 0 0x400>; 1723b7e8f433SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP 1724b7e8f433SVinod Koul IRQ_TYPE_EDGE_RISING>; 1725b7e8f433SVinod Koul mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; 1726b7e8f433SVinod Koul 1727b7e8f433SVinod Koul #clock-cells = <0>; 1728b7e8f433SVinod Koul }; 1729b7e8f433SVinod Koul 173047cb6a06SMaulik Shah sram@c3f0000 { 173147cb6a06SMaulik Shah compatible = "qcom,rpmh-stats"; 173247cb6a06SMaulik Shah reg = <0 0x0c3f0000 0 0x400>; 173347cb6a06SMaulik Shah }; 173447cb6a06SMaulik Shah 1735389cd7acSVinod Koul spmi_bus: spmi@c440000 { 1736389cd7acSVinod Koul compatible = "qcom,spmi-pmic-arb"; 1737389cd7acSVinod Koul reg = <0x0 0xc440000 0x0 0x1100>, 1738389cd7acSVinod Koul <0x0 0xc600000 0x0 0x2000000>, 1739389cd7acSVinod Koul <0x0 0xe600000 0x0 0x100000>, 1740389cd7acSVinod Koul <0x0 0xe700000 0x0 0xa0000>, 1741389cd7acSVinod Koul <0x0 0xc40a000 0x0 0x26000>; 1742389cd7acSVinod Koul reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 1743389cd7acSVinod Koul interrupt-names = "periph_irq"; 1744389cd7acSVinod Koul interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 1745389cd7acSVinod Koul qcom,ee = <0>; 1746389cd7acSVinod Koul qcom,channel = <0>; 1747389cd7acSVinod Koul #address-cells = <2>; 1748389cd7acSVinod Koul #size-cells = <0>; 1749389cd7acSVinod Koul interrupt-controller; 1750389cd7acSVinod Koul #interrupt-cells = <4>; 1751389cd7acSVinod Koul }; 1752389cd7acSVinod Koul 1753b7e8f433SVinod Koul tlmm: pinctrl@f100000 { 1754b7e8f433SVinod Koul compatible = "qcom,sm8350-tlmm"; 1755b7e8f433SVinod Koul reg = <0 0x0f100000 0 0x300000>; 1756b7e8f433SVinod Koul interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 1757b7e8f433SVinod Koul gpio-controller; 1758b7e8f433SVinod Koul #gpio-cells = <2>; 1759b7e8f433SVinod Koul interrupt-controller; 1760b7e8f433SVinod Koul #interrupt-cells = <2>; 176179015857SShawn Guo gpio-ranges = <&tlmm 0 0 204>; 176267146f07SBjorn Andersson wakeup-parent = <&pdc>; 1763b7e8f433SVinod Koul 1764b7e8f433SVinod Koul qup_uart3_default_state: qup-uart3-default-state { 1765b7e8f433SVinod Koul rx { 1766b7e8f433SVinod Koul pins = "gpio18"; 1767b7e8f433SVinod Koul function = "qup3"; 1768b7e8f433SVinod Koul }; 1769b7e8f433SVinod Koul tx { 1770b7e8f433SVinod Koul pins = "gpio19"; 1771b7e8f433SVinod Koul function = "qup3"; 1772b7e8f433SVinod Koul }; 1773b7e8f433SVinod Koul }; 177406bf656eSJonathan Marek 1775cf03cd7eSKonrad Dybcio qup_uart6_default: qup-uart6-default { 1776cf03cd7eSKonrad Dybcio pins = "gpio30", "gpio31"; 1777cf03cd7eSKonrad Dybcio function = "qup6"; 1778cf03cd7eSKonrad Dybcio drive-strength = <2>; 1779cf03cd7eSKonrad Dybcio bias-disable; 1780cf03cd7eSKonrad Dybcio }; 1781cf03cd7eSKonrad Dybcio 178298374e69SKonrad Dybcio qup_uart18_default: qup-uart18-default { 178398374e69SKonrad Dybcio pins = "gpio58", "gpio59"; 178498374e69SKonrad Dybcio function = "qup18"; 178598374e69SKonrad Dybcio drive-strength = <2>; 178698374e69SKonrad Dybcio bias-disable; 178798374e69SKonrad Dybcio }; 178898374e69SKonrad Dybcio 1789cf03cd7eSKonrad Dybcio qup_i2c0_default: qup-i2c0-default { 1790cf03cd7eSKonrad Dybcio pins = "gpio4", "gpio5"; 1791cf03cd7eSKonrad Dybcio function = "qup0"; 1792cf03cd7eSKonrad Dybcio drive-strength = <2>; 1793cf03cd7eSKonrad Dybcio bias-pull-up; 1794cf03cd7eSKonrad Dybcio }; 1795cf03cd7eSKonrad Dybcio 1796cf03cd7eSKonrad Dybcio qup_i2c1_default: qup-i2c1-default { 1797cf03cd7eSKonrad Dybcio pins = "gpio8", "gpio9"; 1798cf03cd7eSKonrad Dybcio function = "qup1"; 1799cf03cd7eSKonrad Dybcio drive-strength = <2>; 1800cf03cd7eSKonrad Dybcio bias-pull-up; 1801cf03cd7eSKonrad Dybcio }; 1802cf03cd7eSKonrad Dybcio 1803cf03cd7eSKonrad Dybcio qup_i2c2_default: qup-i2c2-default { 1804cf03cd7eSKonrad Dybcio pins = "gpio12", "gpio13"; 1805cf03cd7eSKonrad Dybcio function = "qup2"; 1806cf03cd7eSKonrad Dybcio drive-strength = <2>; 1807cf03cd7eSKonrad Dybcio bias-pull-up; 1808cf03cd7eSKonrad Dybcio }; 1809cf03cd7eSKonrad Dybcio 1810cf03cd7eSKonrad Dybcio qup_i2c4_default: qup-i2c4-default { 1811cf03cd7eSKonrad Dybcio pins = "gpio20", "gpio21"; 1812cf03cd7eSKonrad Dybcio function = "qup4"; 1813cf03cd7eSKonrad Dybcio drive-strength = <2>; 1814cf03cd7eSKonrad Dybcio bias-pull-up; 1815cf03cd7eSKonrad Dybcio }; 1816cf03cd7eSKonrad Dybcio 1817cf03cd7eSKonrad Dybcio qup_i2c5_default: qup-i2c5-default { 1818cf03cd7eSKonrad Dybcio pins = "gpio24", "gpio25"; 1819cf03cd7eSKonrad Dybcio function = "qup5"; 1820cf03cd7eSKonrad Dybcio drive-strength = <2>; 1821cf03cd7eSKonrad Dybcio bias-pull-up; 1822cf03cd7eSKonrad Dybcio }; 1823cf03cd7eSKonrad Dybcio 1824cf03cd7eSKonrad Dybcio qup_i2c6_default: qup-i2c6-default { 1825cf03cd7eSKonrad Dybcio pins = "gpio28", "gpio29"; 1826cf03cd7eSKonrad Dybcio function = "qup6"; 1827cf03cd7eSKonrad Dybcio drive-strength = <2>; 1828cf03cd7eSKonrad Dybcio bias-pull-up; 1829cf03cd7eSKonrad Dybcio }; 1830cf03cd7eSKonrad Dybcio 1831cf03cd7eSKonrad Dybcio qup_i2c7_default: qup-i2c7-default { 1832cf03cd7eSKonrad Dybcio pins = "gpio32", "gpio33"; 1833cf03cd7eSKonrad Dybcio function = "qup7"; 1834cf03cd7eSKonrad Dybcio drive-strength = <2>; 1835cf03cd7eSKonrad Dybcio bias-disable; 1836cf03cd7eSKonrad Dybcio }; 1837cf03cd7eSKonrad Dybcio 183889345355SKonrad Dybcio qup_i2c8_default: qup-i2c8-default { 183989345355SKonrad Dybcio pins = "gpio36", "gpio37"; 184089345355SKonrad Dybcio function = "qup8"; 184106bf656eSJonathan Marek drive-strength = <2>; 184206bf656eSJonathan Marek bias-pull-up; 184306bf656eSJonathan Marek }; 184489345355SKonrad Dybcio 184589345355SKonrad Dybcio qup_i2c9_default: qup-i2c9-default { 184689345355SKonrad Dybcio pins = "gpio40", "gpio41"; 184789345355SKonrad Dybcio function = "qup9"; 184889345355SKonrad Dybcio drive-strength = <2>; 184989345355SKonrad Dybcio bias-pull-up; 185089345355SKonrad Dybcio }; 185189345355SKonrad Dybcio 185289345355SKonrad Dybcio qup_i2c10_default: qup-i2c10-default { 185389345355SKonrad Dybcio pins = "gpio44", "gpio45"; 185489345355SKonrad Dybcio function = "qup10"; 185589345355SKonrad Dybcio drive-strength = <2>; 185689345355SKonrad Dybcio bias-pull-up; 185789345355SKonrad Dybcio }; 185889345355SKonrad Dybcio 185989345355SKonrad Dybcio qup_i2c11_default: qup-i2c11-default { 186089345355SKonrad Dybcio pins = "gpio48", "gpio49"; 186189345355SKonrad Dybcio function = "qup11"; 186289345355SKonrad Dybcio drive-strength = <2>; 186389345355SKonrad Dybcio bias-pull-up; 186489345355SKonrad Dybcio }; 186589345355SKonrad Dybcio 186689345355SKonrad Dybcio qup_i2c12_default: qup-i2c12-default { 186789345355SKonrad Dybcio pins = "gpio52", "gpio53"; 186889345355SKonrad Dybcio function = "qup12"; 186989345355SKonrad Dybcio drive-strength = <2>; 187089345355SKonrad Dybcio bias-pull-up; 187189345355SKonrad Dybcio }; 187289345355SKonrad Dybcio 187389345355SKonrad Dybcio qup_i2c13_default: qup-i2c13-default { 187489345355SKonrad Dybcio pins = "gpio0", "gpio1"; 187589345355SKonrad Dybcio function = "qup13"; 187689345355SKonrad Dybcio drive-strength = <2>; 187789345355SKonrad Dybcio bias-pull-up; 187806bf656eSJonathan Marek }; 187998374e69SKonrad Dybcio 188098374e69SKonrad Dybcio qup_i2c14_default: qup-i2c14-default { 188198374e69SKonrad Dybcio pins = "gpio56", "gpio57"; 188298374e69SKonrad Dybcio function = "qup14"; 188398374e69SKonrad Dybcio drive-strength = <2>; 188498374e69SKonrad Dybcio bias-disable; 188598374e69SKonrad Dybcio }; 188698374e69SKonrad Dybcio 188798374e69SKonrad Dybcio qup_i2c15_default: qup-i2c15-default { 188898374e69SKonrad Dybcio pins = "gpio60", "gpio61"; 188998374e69SKonrad Dybcio function = "qup15"; 189098374e69SKonrad Dybcio drive-strength = <2>; 189198374e69SKonrad Dybcio bias-disable; 189298374e69SKonrad Dybcio }; 189398374e69SKonrad Dybcio 189498374e69SKonrad Dybcio qup_i2c16_default: qup-i2c16-default { 189598374e69SKonrad Dybcio pins = "gpio64", "gpio65"; 189698374e69SKonrad Dybcio function = "qup16"; 189798374e69SKonrad Dybcio drive-strength = <2>; 189898374e69SKonrad Dybcio bias-disable; 189998374e69SKonrad Dybcio }; 190098374e69SKonrad Dybcio 190198374e69SKonrad Dybcio qup_i2c17_default: qup-i2c17-default { 190298374e69SKonrad Dybcio pins = "gpio72", "gpio73"; 190398374e69SKonrad Dybcio function = "qup17"; 190498374e69SKonrad Dybcio drive-strength = <2>; 190598374e69SKonrad Dybcio bias-disable; 190698374e69SKonrad Dybcio }; 190798374e69SKonrad Dybcio 190898374e69SKonrad Dybcio qup_i2c19_default: qup-i2c19-default { 190998374e69SKonrad Dybcio pins = "gpio76", "gpio77"; 191098374e69SKonrad Dybcio function = "qup19"; 191198374e69SKonrad Dybcio drive-strength = <2>; 191298374e69SKonrad Dybcio bias-disable; 191398374e69SKonrad Dybcio }; 1914b7e8f433SVinod Koul }; 1915b7e8f433SVinod Koul 191624e3eb2eSRobert Foss rng: rng@10d3000 { 191724e3eb2eSRobert Foss compatible = "qcom,prng-ee"; 191824e3eb2eSRobert Foss reg = <0 0x010d3000 0 0x1000>; 191924e3eb2eSRobert Foss clocks = <&rpmhcc RPMH_HWKM_CLK>; 192024e3eb2eSRobert Foss clock-names = "core"; 192124e3eb2eSRobert Foss }; 192224e3eb2eSRobert Foss 1923b7e8f433SVinod Koul intc: interrupt-controller@17a00000 { 1924b7e8f433SVinod Koul compatible = "arm,gic-v3"; 1925b7e8f433SVinod Koul #interrupt-cells = <3>; 1926b7e8f433SVinod Koul interrupt-controller; 1927f4d4ca9fSKonrad Dybcio #redistributor-regions = <1>; 1928f4d4ca9fSKonrad Dybcio redistributor-stride = <0 0x20000>; 1929b7e8f433SVinod Koul reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 1930b7e8f433SVinod Koul <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 1931b7e8f433SVinod Koul interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1932b7e8f433SVinod Koul }; 1933b7e8f433SVinod Koul 1934b7e8f433SVinod Koul timer@17c20000 { 1935b7e8f433SVinod Koul compatible = "arm,armv7-timer-mem"; 1936458ebdbbSDavid Heidelberg #address-cells = <1>; 1937458ebdbbSDavid Heidelberg #size-cells = <1>; 1938458ebdbbSDavid Heidelberg ranges = <0 0 0 0x20000000>; 1939b7e8f433SVinod Koul reg = <0x0 0x17c20000 0x0 0x1000>; 1940b7e8f433SVinod Koul clock-frequency = <19200000>; 1941b7e8f433SVinod Koul 1942b7e8f433SVinod Koul frame@17c21000 { 1943b7e8f433SVinod Koul frame-number = <0>; 1944b7e8f433SVinod Koul interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 1945b7e8f433SVinod Koul <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 1946458ebdbbSDavid Heidelberg reg = <0x17c21000 0x1000>, 1947458ebdbbSDavid Heidelberg <0x17c22000 0x1000>; 1948b7e8f433SVinod Koul }; 1949b7e8f433SVinod Koul 1950b7e8f433SVinod Koul frame@17c23000 { 1951b7e8f433SVinod Koul frame-number = <1>; 1952b7e8f433SVinod Koul interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 1953458ebdbbSDavid Heidelberg reg = <0x17c23000 0x1000>; 1954b7e8f433SVinod Koul status = "disabled"; 1955b7e8f433SVinod Koul }; 1956b7e8f433SVinod Koul 1957b7e8f433SVinod Koul frame@17c25000 { 1958b7e8f433SVinod Koul frame-number = <2>; 1959b7e8f433SVinod Koul interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1960458ebdbbSDavid Heidelberg reg = <0x17c25000 0x1000>; 1961b7e8f433SVinod Koul status = "disabled"; 1962b7e8f433SVinod Koul }; 1963b7e8f433SVinod Koul 1964b7e8f433SVinod Koul frame@17c27000 { 1965b7e8f433SVinod Koul frame-number = <3>; 1966b7e8f433SVinod Koul interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 1967458ebdbbSDavid Heidelberg reg = <0x17c27000 0x1000>; 1968b7e8f433SVinod Koul status = "disabled"; 1969b7e8f433SVinod Koul }; 1970b7e8f433SVinod Koul 1971b7e8f433SVinod Koul frame@17c29000 { 1972b7e8f433SVinod Koul frame-number = <4>; 1973b7e8f433SVinod Koul interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1974458ebdbbSDavid Heidelberg reg = <0x17c29000 0x1000>; 1975b7e8f433SVinod Koul status = "disabled"; 1976b7e8f433SVinod Koul }; 1977b7e8f433SVinod Koul 1978b7e8f433SVinod Koul frame@17c2b000 { 1979b7e8f433SVinod Koul frame-number = <5>; 1980b7e8f433SVinod Koul interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1981458ebdbbSDavid Heidelberg reg = <0x17c2b000 0x1000>; 1982b7e8f433SVinod Koul status = "disabled"; 1983b7e8f433SVinod Koul }; 1984b7e8f433SVinod Koul 1985b7e8f433SVinod Koul frame@17c2d000 { 1986b7e8f433SVinod Koul frame-number = <6>; 1987b7e8f433SVinod Koul interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1988458ebdbbSDavid Heidelberg reg = <0x17c2d000 0x1000>; 1989b7e8f433SVinod Koul status = "disabled"; 1990b7e8f433SVinod Koul }; 1991b7e8f433SVinod Koul }; 1992b7e8f433SVinod Koul 1993b7e8f433SVinod Koul apps_rsc: rsc@18200000 { 1994b7e8f433SVinod Koul label = "apps_rsc"; 1995b7e8f433SVinod Koul compatible = "qcom,rpmh-rsc"; 1996b7e8f433SVinod Koul reg = <0x0 0x18200000 0x0 0x10000>, 1997b7e8f433SVinod Koul <0x0 0x18210000 0x0 0x10000>, 1998b7e8f433SVinod Koul <0x0 0x18220000 0x0 0x10000>; 1999b7e8f433SVinod Koul reg-names = "drv-0", "drv-1", "drv-2"; 2000b7e8f433SVinod Koul interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 2001b7e8f433SVinod Koul <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 2002b7e8f433SVinod Koul <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 2003b7e8f433SVinod Koul qcom,tcs-offset = <0xd00>; 2004b7e8f433SVinod Koul qcom,drv-id = <2>; 2005b7e8f433SVinod Koul qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 2006a131255eSMaulik Shah <WAKE_TCS 3>, <CONTROL_TCS 0>; 2007b7e8f433SVinod Koul 2008b7e8f433SVinod Koul rpmhcc: clock-controller { 2009b7e8f433SVinod Koul compatible = "qcom,sm8350-rpmh-clk"; 2010b7e8f433SVinod Koul #clock-cells = <1>; 2011b7e8f433SVinod Koul clock-names = "xo"; 2012b7e8f433SVinod Koul clocks = <&xo_board>; 2013b7e8f433SVinod Koul }; 2014b7e8f433SVinod Koul 201590f57509SVinod Koul rpmhpd: power-controller { 201690f57509SVinod Koul compatible = "qcom,sm8350-rpmhpd"; 201790f57509SVinod Koul #power-domain-cells = <1>; 201890f57509SVinod Koul operating-points-v2 = <&rpmhpd_opp_table>; 201990f57509SVinod Koul 202090f57509SVinod Koul rpmhpd_opp_table: opp-table { 202190f57509SVinod Koul compatible = "operating-points-v2"; 202290f57509SVinod Koul 202390f57509SVinod Koul rpmhpd_opp_ret: opp1 { 202490f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 202590f57509SVinod Koul }; 202690f57509SVinod Koul 202790f57509SVinod Koul rpmhpd_opp_min_svs: opp2 { 202890f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 202990f57509SVinod Koul }; 203090f57509SVinod Koul 203190f57509SVinod Koul rpmhpd_opp_low_svs: opp3 { 203290f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 203390f57509SVinod Koul }; 203490f57509SVinod Koul 203590f57509SVinod Koul rpmhpd_opp_svs: opp4 { 203690f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 203790f57509SVinod Koul }; 203890f57509SVinod Koul 203990f57509SVinod Koul rpmhpd_opp_svs_l1: opp5 { 204090f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 204190f57509SVinod Koul }; 204290f57509SVinod Koul 204390f57509SVinod Koul rpmhpd_opp_nom: opp6 { 204490f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 204590f57509SVinod Koul }; 204690f57509SVinod Koul 204790f57509SVinod Koul rpmhpd_opp_nom_l1: opp7 { 204890f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 204990f57509SVinod Koul }; 205090f57509SVinod Koul 205190f57509SVinod Koul rpmhpd_opp_nom_l2: opp8 { 205290f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 205390f57509SVinod Koul }; 205490f57509SVinod Koul 205590f57509SVinod Koul rpmhpd_opp_turbo: opp9 { 205690f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 205790f57509SVinod Koul }; 205890f57509SVinod Koul 205990f57509SVinod Koul rpmhpd_opp_turbo_l1: opp10 { 206090f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 206190f57509SVinod Koul }; 206290f57509SVinod Koul }; 206390f57509SVinod Koul }; 2064da6b2482SVinod Koul 2065fc0e7dd6SKrzysztof Kozlowski apps_bcm_voter: bcm-voter { 2066da6b2482SVinod Koul compatible = "qcom,bcm-voter"; 2067da6b2482SVinod Koul }; 2068b7e8f433SVinod Koul }; 2069e780fb31SJack Pham 2070ccbb3abbSVinod Koul cpufreq_hw: cpufreq@18591000 { 2071ccbb3abbSVinod Koul compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss"; 2072ccbb3abbSVinod Koul reg = <0 0x18591000 0 0x1000>, 2073ccbb3abbSVinod Koul <0 0x18592000 0 0x1000>, 2074ccbb3abbSVinod Koul <0 0x18593000 0 0x1000>; 2075ccbb3abbSVinod Koul reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; 2076ccbb3abbSVinod Koul 2077ccbb3abbSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; 2078ccbb3abbSVinod Koul clock-names = "xo", "alternate"; 2079ccbb3abbSVinod Koul 2080ccbb3abbSVinod Koul #freq-domain-cells = <1>; 2081ccbb3abbSVinod Koul }; 2082ccbb3abbSVinod Koul 208359c7cf81SVinod Koul ufs_mem_hc: ufshc@1d84000 { 208459c7cf81SVinod Koul compatible = "qcom,sm8350-ufshc", "qcom,ufshc", 208559c7cf81SVinod Koul "jedec,ufs-2.0"; 208659c7cf81SVinod Koul reg = <0 0x01d84000 0 0x3000>; 208759c7cf81SVinod Koul interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 208859c7cf81SVinod Koul phys = <&ufs_mem_phy_lanes>; 208959c7cf81SVinod Koul phy-names = "ufsphy"; 209059c7cf81SVinod Koul lanes-per-direction = <2>; 209159c7cf81SVinod Koul #reset-cells = <1>; 20926d91e201SVinod Koul resets = <&gcc GCC_UFS_PHY_BCR>; 209359c7cf81SVinod Koul reset-names = "rst"; 209459c7cf81SVinod Koul 20956d91e201SVinod Koul power-domains = <&gcc UFS_PHY_GDSC>; 209659c7cf81SVinod Koul 209759c7cf81SVinod Koul iommus = <&apps_smmu 0xe0 0x0>; 209859c7cf81SVinod Koul 209959c7cf81SVinod Koul clock-names = 210059c7cf81SVinod Koul "core_clk", 210159c7cf81SVinod Koul "bus_aggr_clk", 210259c7cf81SVinod Koul "iface_clk", 210359c7cf81SVinod Koul "core_clk_unipro", 210459c7cf81SVinod Koul "ref_clk", 210559c7cf81SVinod Koul "tx_lane0_sync_clk", 210659c7cf81SVinod Koul "rx_lane0_sync_clk", 210759c7cf81SVinod Koul "rx_lane1_sync_clk"; 210859c7cf81SVinod Koul clocks = 21096d91e201SVinod Koul <&gcc GCC_UFS_PHY_AXI_CLK>, 21106d91e201SVinod Koul <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 21116d91e201SVinod Koul <&gcc GCC_UFS_PHY_AHB_CLK>, 21126d91e201SVinod Koul <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 211359c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 21146d91e201SVinod Koul <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 21156d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 21166d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 211759c7cf81SVinod Koul freq-table-hz = 211859c7cf81SVinod Koul <75000000 300000000>, 211959c7cf81SVinod Koul <0 0>, 212059c7cf81SVinod Koul <0 0>, 212159c7cf81SVinod Koul <75000000 300000000>, 212259c7cf81SVinod Koul <0 0>, 212359c7cf81SVinod Koul <0 0>, 21240fd4dcb6SBjorn Andersson <0 0>, 21250fd4dcb6SBjorn Andersson <0 0>; 212659c7cf81SVinod Koul status = "disabled"; 212759c7cf81SVinod Koul }; 212859c7cf81SVinod Koul 212959c7cf81SVinod Koul ufs_mem_phy: phy@1d87000 { 213059c7cf81SVinod Koul compatible = "qcom,sm8350-qmp-ufs-phy"; 213159c7cf81SVinod Koul reg = <0 0x01d87000 0 0xe10>; 213259c7cf81SVinod Koul #address-cells = <2>; 213359c7cf81SVinod Koul #size-cells = <2>; 213459c7cf81SVinod Koul ranges; 213559c7cf81SVinod Koul clock-names = "ref", 213659c7cf81SVinod Koul "ref_aux"; 213759c7cf81SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, 21386d91e201SVinod Koul <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 213959c7cf81SVinod Koul 214059c7cf81SVinod Koul resets = <&ufs_mem_hc 0>; 214159c7cf81SVinod Koul reset-names = "ufsphy"; 214259c7cf81SVinod Koul status = "disabled"; 214359c7cf81SVinod Koul 21441351512fSShawn Guo ufs_mem_phy_lanes: phy@1d87400 { 214559c7cf81SVinod Koul reg = <0 0x01d87400 0 0x108>, 214659c7cf81SVinod Koul <0 0x01d87600 0 0x1e0>, 214759c7cf81SVinod Koul <0 0x01d87c00 0 0x1dc>, 214859c7cf81SVinod Koul <0 0x01d87800 0 0x108>, 214959c7cf81SVinod Koul <0 0x01d87a00 0 0x1e0>; 215059c7cf81SVinod Koul #phy-cells = <0>; 215159c7cf81SVinod Koul #clock-cells = <0>; 215259c7cf81SVinod Koul }; 215359c7cf81SVinod Koul }; 215459c7cf81SVinod Koul 2155177fcf0aSVinod Koul slpi: remoteproc@5c00000 { 2156177fcf0aSVinod Koul compatible = "qcom,sm8350-slpi-pas"; 2157177fcf0aSVinod Koul reg = <0 0x05c00000 0 0x4000>; 2158177fcf0aSVinod Koul 2159177fcf0aSVinod Koul interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 2160177fcf0aSVinod Koul <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 2161177fcf0aSVinod Koul <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 2162177fcf0aSVinod Koul <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 2163177fcf0aSVinod Koul <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 2164177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 2165177fcf0aSVinod Koul "handover", "stop-ack"; 2166177fcf0aSVinod Koul 2167177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 2168177fcf0aSVinod Koul clock-names = "xo"; 2169177fcf0aSVinod Koul 2170*d0e285c3SRobert Foss power-domains = <&rpmhpd SM8350_LCX>, 2171*d0e285c3SRobert Foss <&rpmhpd SM8350_LMX>; 21726b7cb2d2SSibi Sankar power-domain-names = "lcx", "lmx"; 2173177fcf0aSVinod Koul 2174177fcf0aSVinod Koul memory-region = <&pil_slpi_mem>; 2175177fcf0aSVinod Koul 21766b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 21776b7cb2d2SSibi Sankar 2178177fcf0aSVinod Koul qcom,smem-states = <&smp2p_slpi_out 0>; 2179177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 2180177fcf0aSVinod Koul 2181177fcf0aSVinod Koul status = "disabled"; 2182177fcf0aSVinod Koul 2183177fcf0aSVinod Koul glink-edge { 2184177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 2185177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 2186177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 2187177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 2188177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 2189177fcf0aSVinod Koul 2190177fcf0aSVinod Koul label = "slpi"; 2191177fcf0aSVinod Koul qcom,remote-pid = <3>; 2192177fcf0aSVinod Koul 2193178056a4SOla Jeppsson fastrpc { 2194178056a4SOla Jeppsson compatible = "qcom,fastrpc"; 2195178056a4SOla Jeppsson qcom,glink-channels = "fastrpcglink-apps-dsp"; 2196178056a4SOla Jeppsson label = "sdsp"; 21978c8ce95bSJeya R qcom,non-secure-domain; 2198178056a4SOla Jeppsson #address-cells = <1>; 2199178056a4SOla Jeppsson #size-cells = <0>; 2200178056a4SOla Jeppsson 2201178056a4SOla Jeppsson compute-cb@1 { 2202178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2203178056a4SOla Jeppsson reg = <1>; 2204178056a4SOla Jeppsson iommus = <&apps_smmu 0x0541 0x0>; 2205178056a4SOla Jeppsson }; 2206178056a4SOla Jeppsson 2207178056a4SOla Jeppsson compute-cb@2 { 2208178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2209178056a4SOla Jeppsson reg = <2>; 2210178056a4SOla Jeppsson iommus = <&apps_smmu 0x0542 0x0>; 2211178056a4SOla Jeppsson }; 2212178056a4SOla Jeppsson 2213178056a4SOla Jeppsson compute-cb@3 { 2214178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2215178056a4SOla Jeppsson reg = <3>; 2216178056a4SOla Jeppsson iommus = <&apps_smmu 0x0543 0x0>; 2217178056a4SOla Jeppsson /* note: shared-cb = <4> in downstream */ 2218178056a4SOla Jeppsson }; 2219178056a4SOla Jeppsson }; 2220177fcf0aSVinod Koul }; 2221177fcf0aSVinod Koul }; 2222177fcf0aSVinod Koul 2223177fcf0aSVinod Koul cdsp: remoteproc@98900000 { 2224177fcf0aSVinod Koul compatible = "qcom,sm8350-cdsp-pas"; 2225177fcf0aSVinod Koul reg = <0 0x098900000 0 0x1400000>; 2226177fcf0aSVinod Koul 2227177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 2228177fcf0aSVinod Koul <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 2229177fcf0aSVinod Koul <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 2230177fcf0aSVinod Koul <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 2231177fcf0aSVinod Koul <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 2232177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 2233177fcf0aSVinod Koul "handover", "stop-ack"; 2234177fcf0aSVinod Koul 2235177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 2236177fcf0aSVinod Koul clock-names = "xo"; 2237177fcf0aSVinod Koul 2238*d0e285c3SRobert Foss power-domains = <&rpmhpd SM8350_CX>, 2239*d0e285c3SRobert Foss <&rpmhpd SM8350_MXC>; 22406b7cb2d2SSibi Sankar power-domain-names = "cx", "mxc"; 2241177fcf0aSVinod Koul 224284c856d0SVinod Koul interconnects = <&compute_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>; 2243da6b2482SVinod Koul 2244177fcf0aSVinod Koul memory-region = <&pil_cdsp_mem>; 2245177fcf0aSVinod Koul 22466b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 22476b7cb2d2SSibi Sankar 2248177fcf0aSVinod Koul qcom,smem-states = <&smp2p_cdsp_out 0>; 2249177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 2250177fcf0aSVinod Koul 2251177fcf0aSVinod Koul status = "disabled"; 2252177fcf0aSVinod Koul 2253177fcf0aSVinod Koul glink-edge { 2254177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 2255177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 2256177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 2257177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 2258177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 2259177fcf0aSVinod Koul 2260177fcf0aSVinod Koul label = "cdsp"; 2261177fcf0aSVinod Koul qcom,remote-pid = <5>; 2262178056a4SOla Jeppsson 2263178056a4SOla Jeppsson fastrpc { 2264178056a4SOla Jeppsson compatible = "qcom,fastrpc"; 2265178056a4SOla Jeppsson qcom,glink-channels = "fastrpcglink-apps-dsp"; 2266178056a4SOla Jeppsson label = "cdsp"; 22678c8ce95bSJeya R qcom,non-secure-domain; 2268178056a4SOla Jeppsson #address-cells = <1>; 2269178056a4SOla Jeppsson #size-cells = <0>; 2270178056a4SOla Jeppsson 2271178056a4SOla Jeppsson compute-cb@1 { 2272178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2273178056a4SOla Jeppsson reg = <1>; 2274178056a4SOla Jeppsson iommus = <&apps_smmu 0x2161 0x0400>, 2275178056a4SOla Jeppsson <&apps_smmu 0x1181 0x0420>; 2276178056a4SOla Jeppsson }; 2277178056a4SOla Jeppsson 2278178056a4SOla Jeppsson compute-cb@2 { 2279178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2280178056a4SOla Jeppsson reg = <2>; 2281178056a4SOla Jeppsson iommus = <&apps_smmu 0x2162 0x0400>, 2282178056a4SOla Jeppsson <&apps_smmu 0x1182 0x0420>; 2283178056a4SOla Jeppsson }; 2284178056a4SOla Jeppsson 2285178056a4SOla Jeppsson compute-cb@3 { 2286178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2287178056a4SOla Jeppsson reg = <3>; 2288178056a4SOla Jeppsson iommus = <&apps_smmu 0x2163 0x0400>, 2289178056a4SOla Jeppsson <&apps_smmu 0x1183 0x0420>; 2290178056a4SOla Jeppsson }; 2291178056a4SOla Jeppsson 2292178056a4SOla Jeppsson compute-cb@4 { 2293178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2294178056a4SOla Jeppsson reg = <4>; 2295178056a4SOla Jeppsson iommus = <&apps_smmu 0x2164 0x0400>, 2296178056a4SOla Jeppsson <&apps_smmu 0x1184 0x0420>; 2297178056a4SOla Jeppsson }; 2298178056a4SOla Jeppsson 2299178056a4SOla Jeppsson compute-cb@5 { 2300178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2301178056a4SOla Jeppsson reg = <5>; 2302178056a4SOla Jeppsson iommus = <&apps_smmu 0x2165 0x0400>, 2303178056a4SOla Jeppsson <&apps_smmu 0x1185 0x0420>; 2304178056a4SOla Jeppsson }; 2305178056a4SOla Jeppsson 2306178056a4SOla Jeppsson compute-cb@6 { 2307178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2308178056a4SOla Jeppsson reg = <6>; 2309178056a4SOla Jeppsson iommus = <&apps_smmu 0x2166 0x0400>, 2310178056a4SOla Jeppsson <&apps_smmu 0x1186 0x0420>; 2311178056a4SOla Jeppsson }; 2312178056a4SOla Jeppsson 2313178056a4SOla Jeppsson compute-cb@7 { 2314178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2315178056a4SOla Jeppsson reg = <7>; 2316178056a4SOla Jeppsson iommus = <&apps_smmu 0x2167 0x0400>, 2317178056a4SOla Jeppsson <&apps_smmu 0x1187 0x0420>; 2318178056a4SOla Jeppsson }; 2319178056a4SOla Jeppsson 2320178056a4SOla Jeppsson compute-cb@8 { 2321178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2322178056a4SOla Jeppsson reg = <8>; 2323178056a4SOla Jeppsson iommus = <&apps_smmu 0x2168 0x0400>, 2324178056a4SOla Jeppsson <&apps_smmu 0x1188 0x0420>; 2325178056a4SOla Jeppsson }; 2326178056a4SOla Jeppsson 2327178056a4SOla Jeppsson /* note: secure cb9 in downstream */ 2328178056a4SOla Jeppsson }; 2329177fcf0aSVinod Koul }; 2330177fcf0aSVinod Koul }; 2331177fcf0aSVinod Koul 2332e780fb31SJack Pham usb_1_hsphy: phy@88e3000 { 2333e780fb31SJack Pham compatible = "qcom,sm8350-usb-hs-phy", 2334e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 2335e780fb31SJack Pham reg = <0 0x088e3000 0 0x400>; 2336e780fb31SJack Pham status = "disabled"; 2337e780fb31SJack Pham #phy-cells = <0>; 2338e780fb31SJack Pham 2339e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 2340e780fb31SJack Pham clock-names = "ref"; 2341e780fb31SJack Pham 23426d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 2343e780fb31SJack Pham }; 2344e780fb31SJack Pham 2345e780fb31SJack Pham usb_2_hsphy: phy@88e4000 { 2346e780fb31SJack Pham compatible = "qcom,sm8250-usb-hs-phy", 2347e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 2348e780fb31SJack Pham reg = <0 0x088e4000 0 0x400>; 2349e780fb31SJack Pham status = "disabled"; 2350e780fb31SJack Pham #phy-cells = <0>; 2351e780fb31SJack Pham 2352e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 2353e780fb31SJack Pham clock-names = "ref"; 2354e780fb31SJack Pham 23556d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 2356e780fb31SJack Pham }; 2357e780fb31SJack Pham 2358e780fb31SJack Pham usb_1_qmpphy: phy-wrapper@88e9000 { 2359e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-phy"; 2360e780fb31SJack Pham reg = <0 0x088e9000 0 0x200>, 2361e780fb31SJack Pham <0 0x088e8000 0 0x20>; 2362e780fb31SJack Pham status = "disabled"; 2363e780fb31SJack Pham #address-cells = <2>; 2364e780fb31SJack Pham #size-cells = <2>; 2365e780fb31SJack Pham ranges; 2366e780fb31SJack Pham 23676d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 2368e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 23696d91e201SVinod Koul <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 2370e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "com_aux"; 2371e780fb31SJack Pham 23726d91e201SVinod Koul resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 23736d91e201SVinod Koul <&gcc GCC_USB3_PHY_PRIM_BCR>; 2374e780fb31SJack Pham reset-names = "phy", "common"; 2375e780fb31SJack Pham 2376e780fb31SJack Pham usb_1_ssphy: phy@88e9200 { 2377e780fb31SJack Pham reg = <0 0x088e9200 0 0x200>, 2378e780fb31SJack Pham <0 0x088e9400 0 0x200>, 2379e780fb31SJack Pham <0 0x088e9c00 0 0x400>, 2380e780fb31SJack Pham <0 0x088e9600 0 0x200>, 2381e780fb31SJack Pham <0 0x088e9800 0 0x200>, 2382e780fb31SJack Pham <0 0x088e9a00 0 0x100>; 2383e780fb31SJack Pham #phy-cells = <0>; 2384e780fb31SJack Pham #clock-cells = <1>; 23856d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 2386e780fb31SJack Pham clock-names = "pipe0"; 2387e780fb31SJack Pham clock-output-names = "usb3_phy_pipe_clk_src"; 2388e780fb31SJack Pham }; 2389e780fb31SJack Pham }; 2390e780fb31SJack Pham 2391e780fb31SJack Pham usb_2_qmpphy: phy-wrapper@88eb000 { 2392e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-uni-phy"; 2393e780fb31SJack Pham reg = <0 0x088eb000 0 0x200>; 2394e780fb31SJack Pham status = "disabled"; 2395e780fb31SJack Pham #address-cells = <2>; 2396e780fb31SJack Pham #size-cells = <2>; 2397e780fb31SJack Pham ranges; 2398e780fb31SJack Pham 23996d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 2400e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 24016d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>, 24026d91e201SVinod Koul <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 2403e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 2404e780fb31SJack Pham 24056d91e201SVinod Koul resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 24066d91e201SVinod Koul <&gcc GCC_USB3_PHY_SEC_BCR>; 2407e780fb31SJack Pham reset-names = "phy", "common"; 2408e780fb31SJack Pham 2409e780fb31SJack Pham usb_2_ssphy: phy@88ebe00 { 2410e780fb31SJack Pham reg = <0 0x088ebe00 0 0x200>, 2411e780fb31SJack Pham <0 0x088ec000 0 0x200>, 2412e780fb31SJack Pham <0 0x088eb200 0 0x1100>; 2413e780fb31SJack Pham #phy-cells = <0>; 2414e780fb31SJack Pham #clock-cells = <1>; 24156d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 2416e780fb31SJack Pham clock-names = "pipe0"; 2417e780fb31SJack Pham clock-output-names = "usb3_uni_phy_pipe_clk_src"; 2418e780fb31SJack Pham }; 2419e780fb31SJack Pham }; 2420e780fb31SJack Pham 24211dee9e3bSVinod Koul dc_noc: interconnect@90c0000 { 2422da6b2482SVinod Koul compatible = "qcom,sm8350-dc-noc"; 2423da6b2482SVinod Koul reg = <0 0x090c0000 0 0x4200>; 2424da6b2482SVinod Koul #interconnect-cells = <1>; 2425da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 2426da6b2482SVinod Koul }; 2427da6b2482SVinod Koul 2428da6b2482SVinod Koul gem_noc: interconnect@9100000 { 2429da6b2482SVinod Koul compatible = "qcom,sm8350-gem-noc"; 2430da6b2482SVinod Koul reg = <0 0x09100000 0 0xb4000>; 2431da6b2482SVinod Koul #interconnect-cells = <1>; 2432da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 2433da6b2482SVinod Koul }; 2434da6b2482SVinod Koul 24359ac8999eSKonrad Dybcio system-cache-controller@9200000 { 24369ac8999eSKonrad Dybcio compatible = "qcom,sm8350-llcc"; 24379ac8999eSKonrad Dybcio reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; 24389ac8999eSKonrad Dybcio reg-names = "llcc_base", "llcc_broadcast_base"; 24399ac8999eSKonrad Dybcio }; 24409ac8999eSKonrad Dybcio 2441e780fb31SJack Pham usb_1: usb@a6f8800 { 2442e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 2443e780fb31SJack Pham reg = <0 0x0a6f8800 0 0x400>; 2444e780fb31SJack Pham status = "disabled"; 2445e780fb31SJack Pham #address-cells = <2>; 2446e780fb31SJack Pham #size-cells = <2>; 2447e780fb31SJack Pham ranges; 2448e780fb31SJack Pham 24496d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 24506d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>, 24516d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 24528d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 24538d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; 24548d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 24558d5fd4e4SKrzysztof Kozlowski "core", 24568d5fd4e4SKrzysztof Kozlowski "iface", 24578d5fd4e4SKrzysztof Kozlowski "sleep", 24588d5fd4e4SKrzysztof Kozlowski "mock_utmi"; 2459e780fb31SJack Pham 24606d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 24616d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>; 2462e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 2463e780fb31SJack Pham 2464e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 2465e780fb31SJack Pham <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 2466e780fb31SJack Pham <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 2467e780fb31SJack Pham <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 2468e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 2469e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 2470e780fb31SJack Pham 24716d91e201SVinod Koul power-domains = <&gcc USB30_PRIM_GDSC>; 2472e780fb31SJack Pham 24736d91e201SVinod Koul resets = <&gcc GCC_USB30_PRIM_BCR>; 2474e780fb31SJack Pham 24752aa2b50dSBhupesh Sharma usb_1_dwc3: usb@a600000 { 2476e780fb31SJack Pham compatible = "snps,dwc3"; 2477e780fb31SJack Pham reg = <0 0x0a600000 0 0xcd00>; 2478e780fb31SJack Pham interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 2479e780fb31SJack Pham iommus = <&apps_smmu 0x0 0x0>; 2480e780fb31SJack Pham snps,dis_u2_susphy_quirk; 2481e780fb31SJack Pham snps,dis_enblslpm_quirk; 2482e780fb31SJack Pham phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 2483e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 2484e780fb31SJack Pham }; 2485e780fb31SJack Pham }; 2486e780fb31SJack Pham 2487e780fb31SJack Pham usb_2: usb@a8f8800 { 2488e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 2489e780fb31SJack Pham reg = <0 0x0a8f8800 0 0x400>; 2490e780fb31SJack Pham status = "disabled"; 2491e780fb31SJack Pham #address-cells = <2>; 2492e780fb31SJack Pham #size-cells = <2>; 2493e780fb31SJack Pham ranges; 2494e780fb31SJack Pham 24956d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 24966d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>, 24976d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 24986d91e201SVinod Koul <&gcc GCC_USB30_SEC_SLEEP_CLK>, 24998d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 25006d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>; 25018d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 25028d5fd4e4SKrzysztof Kozlowski "core", 25038d5fd4e4SKrzysztof Kozlowski "iface", 25048d5fd4e4SKrzysztof Kozlowski "sleep", 25058d5fd4e4SKrzysztof Kozlowski "mock_utmi", 25068d5fd4e4SKrzysztof Kozlowski "xo"; 2507e780fb31SJack Pham 25086d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 25096d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>; 2510e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 2511e780fb31SJack Pham 2512e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 2513e780fb31SJack Pham <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 2514e780fb31SJack Pham <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 2515e780fb31SJack Pham <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 2516e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 2517e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 2518e780fb31SJack Pham 25196d91e201SVinod Koul power-domains = <&gcc USB30_SEC_GDSC>; 2520e780fb31SJack Pham 25216d91e201SVinod Koul resets = <&gcc GCC_USB30_SEC_BCR>; 2522e780fb31SJack Pham 25232aa2b50dSBhupesh Sharma usb_2_dwc3: usb@a800000 { 2524e780fb31SJack Pham compatible = "snps,dwc3"; 2525e780fb31SJack Pham reg = <0 0x0a800000 0 0xcd00>; 2526e780fb31SJack Pham interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 2527e780fb31SJack Pham iommus = <&apps_smmu 0x20 0x0>; 2528e780fb31SJack Pham snps,dis_u2_susphy_quirk; 2529e780fb31SJack Pham snps,dis_enblslpm_quirk; 2530e780fb31SJack Pham phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 2531e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 2532e780fb31SJack Pham }; 2533e780fb31SJack Pham }; 2534177fcf0aSVinod Koul 25359fd4887cSRobert Foss dispcc: clock-controller@af00000 { 25369fd4887cSRobert Foss compatible = "qcom,sm8350-dispcc"; 25379fd4887cSRobert Foss reg = <0 0x0af00000 0 0x10000>; 25389fd4887cSRobert Foss clocks = <&rpmhcc RPMH_CXO_CLK>, 25399fd4887cSRobert Foss <0>, 25409fd4887cSRobert Foss <0>, 25419fd4887cSRobert Foss <0>, 25429fd4887cSRobert Foss <0>, 25439fd4887cSRobert Foss <0>, 25449fd4887cSRobert Foss <0>; 25459fd4887cSRobert Foss clock-names = "bi_tcxo", 25469fd4887cSRobert Foss "dsi0_phy_pll_out_byteclk", 25479fd4887cSRobert Foss "dsi0_phy_pll_out_dsiclk", 25489fd4887cSRobert Foss "dsi1_phy_pll_out_byteclk", 25499fd4887cSRobert Foss "dsi1_phy_pll_out_dsiclk", 25509fd4887cSRobert Foss "dp_phy_pll_link_clk", 25519fd4887cSRobert Foss "dp_phy_pll_vco_div_clk"; 25529fd4887cSRobert Foss #clock-cells = <1>; 25539fd4887cSRobert Foss #reset-cells = <1>; 25549fd4887cSRobert Foss #power-domain-cells = <1>; 25559fd4887cSRobert Foss 25569fd4887cSRobert Foss power-domains = <&rpmhpd SM8350_MMCX>; 25579fd4887cSRobert Foss power-domain-names = "mmcx"; 25589fd4887cSRobert Foss }; 25599fd4887cSRobert Foss 2560177fcf0aSVinod Koul adsp: remoteproc@17300000 { 2561177fcf0aSVinod Koul compatible = "qcom,sm8350-adsp-pas"; 2562177fcf0aSVinod Koul reg = <0 0x17300000 0 0x100>; 2563177fcf0aSVinod Koul 2564177fcf0aSVinod Koul interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 2565177fcf0aSVinod Koul <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 2566177fcf0aSVinod Koul <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 2567177fcf0aSVinod Koul <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 2568177fcf0aSVinod Koul <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 2569177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 2570177fcf0aSVinod Koul "handover", "stop-ack"; 2571177fcf0aSVinod Koul 2572177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 2573177fcf0aSVinod Koul clock-names = "xo"; 2574177fcf0aSVinod Koul 2575*d0e285c3SRobert Foss power-domains = <&rpmhpd SM8350_LCX>, 2576*d0e285c3SRobert Foss <&rpmhpd SM8350_LMX>; 25776b7cb2d2SSibi Sankar power-domain-names = "lcx", "lmx"; 2578177fcf0aSVinod Koul 2579177fcf0aSVinod Koul memory-region = <&pil_adsp_mem>; 2580177fcf0aSVinod Koul 25816b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 25826b7cb2d2SSibi Sankar 2583177fcf0aSVinod Koul qcom,smem-states = <&smp2p_adsp_out 0>; 2584177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 2585177fcf0aSVinod Koul 2586177fcf0aSVinod Koul status = "disabled"; 2587177fcf0aSVinod Koul 2588177fcf0aSVinod Koul glink-edge { 2589177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 2590177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 2591177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 2592177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 2593177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 2594177fcf0aSVinod Koul 2595177fcf0aSVinod Koul label = "lpass"; 2596177fcf0aSVinod Koul qcom,remote-pid = <2>; 2597178056a4SOla Jeppsson 2598178056a4SOla Jeppsson fastrpc { 2599178056a4SOla Jeppsson compatible = "qcom,fastrpc"; 2600178056a4SOla Jeppsson qcom,glink-channels = "fastrpcglink-apps-dsp"; 2601178056a4SOla Jeppsson label = "adsp"; 26028c8ce95bSJeya R qcom,non-secure-domain; 2603178056a4SOla Jeppsson #address-cells = <1>; 2604178056a4SOla Jeppsson #size-cells = <0>; 2605178056a4SOla Jeppsson 2606178056a4SOla Jeppsson compute-cb@3 { 2607178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2608178056a4SOla Jeppsson reg = <3>; 2609178056a4SOla Jeppsson iommus = <&apps_smmu 0x1803 0x0>; 2610178056a4SOla Jeppsson }; 2611178056a4SOla Jeppsson 2612178056a4SOla Jeppsson compute-cb@4 { 2613178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2614178056a4SOla Jeppsson reg = <4>; 2615178056a4SOla Jeppsson iommus = <&apps_smmu 0x1804 0x0>; 2616178056a4SOla Jeppsson }; 2617178056a4SOla Jeppsson 2618178056a4SOla Jeppsson compute-cb@5 { 2619178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2620178056a4SOla Jeppsson reg = <5>; 2621178056a4SOla Jeppsson iommus = <&apps_smmu 0x1805 0x0>; 2622178056a4SOla Jeppsson }; 2623178056a4SOla Jeppsson }; 2624177fcf0aSVinod Koul }; 2625177fcf0aSVinod Koul }; 2626b7e8f433SVinod Koul }; 2627b7e8f433SVinod Koul 26284dcaa68eSsatya priya thermal_zones: thermal-zones { 262920f9d94eSRobert Foss cpu0-thermal { 263020f9d94eSRobert Foss polling-delay-passive = <250>; 263120f9d94eSRobert Foss polling-delay = <1000>; 263220f9d94eSRobert Foss 263320f9d94eSRobert Foss thermal-sensors = <&tsens0 1>; 263420f9d94eSRobert Foss 263520f9d94eSRobert Foss trips { 263620f9d94eSRobert Foss cpu0_alert0: trip-point0 { 263720f9d94eSRobert Foss temperature = <90000>; 263820f9d94eSRobert Foss hysteresis = <2000>; 263920f9d94eSRobert Foss type = "passive"; 264020f9d94eSRobert Foss }; 264120f9d94eSRobert Foss 264220f9d94eSRobert Foss cpu0_alert1: trip-point1 { 264320f9d94eSRobert Foss temperature = <95000>; 264420f9d94eSRobert Foss hysteresis = <2000>; 264520f9d94eSRobert Foss type = "passive"; 264620f9d94eSRobert Foss }; 264720f9d94eSRobert Foss 264820f9d94eSRobert Foss cpu0_crit: cpu_crit { 264920f9d94eSRobert Foss temperature = <110000>; 265020f9d94eSRobert Foss hysteresis = <1000>; 265120f9d94eSRobert Foss type = "critical"; 265220f9d94eSRobert Foss }; 265320f9d94eSRobert Foss }; 265420f9d94eSRobert Foss 265520f9d94eSRobert Foss cooling-maps { 265620f9d94eSRobert Foss map0 { 265720f9d94eSRobert Foss trip = <&cpu0_alert0>; 265820f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 265920f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 266020f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 266120f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 266220f9d94eSRobert Foss }; 266320f9d94eSRobert Foss map1 { 266420f9d94eSRobert Foss trip = <&cpu0_alert1>; 266520f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 266620f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 266720f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 266820f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 266920f9d94eSRobert Foss }; 267020f9d94eSRobert Foss }; 267120f9d94eSRobert Foss }; 267220f9d94eSRobert Foss 267320f9d94eSRobert Foss cpu1-thermal { 267420f9d94eSRobert Foss polling-delay-passive = <250>; 267520f9d94eSRobert Foss polling-delay = <1000>; 267620f9d94eSRobert Foss 267720f9d94eSRobert Foss thermal-sensors = <&tsens0 2>; 267820f9d94eSRobert Foss 267920f9d94eSRobert Foss trips { 268020f9d94eSRobert Foss cpu1_alert0: trip-point0 { 268120f9d94eSRobert Foss temperature = <90000>; 268220f9d94eSRobert Foss hysteresis = <2000>; 268320f9d94eSRobert Foss type = "passive"; 268420f9d94eSRobert Foss }; 268520f9d94eSRobert Foss 268620f9d94eSRobert Foss cpu1_alert1: trip-point1 { 268720f9d94eSRobert Foss temperature = <95000>; 268820f9d94eSRobert Foss hysteresis = <2000>; 268920f9d94eSRobert Foss type = "passive"; 269020f9d94eSRobert Foss }; 269120f9d94eSRobert Foss 269220f9d94eSRobert Foss cpu1_crit: cpu_crit { 269320f9d94eSRobert Foss temperature = <110000>; 269420f9d94eSRobert Foss hysteresis = <1000>; 269520f9d94eSRobert Foss type = "critical"; 269620f9d94eSRobert Foss }; 269720f9d94eSRobert Foss }; 269820f9d94eSRobert Foss 269920f9d94eSRobert Foss cooling-maps { 270020f9d94eSRobert Foss map0 { 270120f9d94eSRobert Foss trip = <&cpu1_alert0>; 270220f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 270320f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 270420f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 270520f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 270620f9d94eSRobert Foss }; 270720f9d94eSRobert Foss map1 { 270820f9d94eSRobert Foss trip = <&cpu1_alert1>; 270920f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 271020f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 271120f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 271220f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 271320f9d94eSRobert Foss }; 271420f9d94eSRobert Foss }; 271520f9d94eSRobert Foss }; 271620f9d94eSRobert Foss 271720f9d94eSRobert Foss cpu2-thermal { 271820f9d94eSRobert Foss polling-delay-passive = <250>; 271920f9d94eSRobert Foss polling-delay = <1000>; 272020f9d94eSRobert Foss 272120f9d94eSRobert Foss thermal-sensors = <&tsens0 3>; 272220f9d94eSRobert Foss 272320f9d94eSRobert Foss trips { 272420f9d94eSRobert Foss cpu2_alert0: trip-point0 { 272520f9d94eSRobert Foss temperature = <90000>; 272620f9d94eSRobert Foss hysteresis = <2000>; 272720f9d94eSRobert Foss type = "passive"; 272820f9d94eSRobert Foss }; 272920f9d94eSRobert Foss 273020f9d94eSRobert Foss cpu2_alert1: trip-point1 { 273120f9d94eSRobert Foss temperature = <95000>; 273220f9d94eSRobert Foss hysteresis = <2000>; 273320f9d94eSRobert Foss type = "passive"; 273420f9d94eSRobert Foss }; 273520f9d94eSRobert Foss 273620f9d94eSRobert Foss cpu2_crit: cpu_crit { 273720f9d94eSRobert Foss temperature = <110000>; 273820f9d94eSRobert Foss hysteresis = <1000>; 273920f9d94eSRobert Foss type = "critical"; 274020f9d94eSRobert Foss }; 274120f9d94eSRobert Foss }; 274220f9d94eSRobert Foss 274320f9d94eSRobert Foss cooling-maps { 274420f9d94eSRobert Foss map0 { 274520f9d94eSRobert Foss trip = <&cpu2_alert0>; 274620f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 274720f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 274820f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 274920f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 275020f9d94eSRobert Foss }; 275120f9d94eSRobert Foss map1 { 275220f9d94eSRobert Foss trip = <&cpu2_alert1>; 275320f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 275420f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 275520f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 275620f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 275720f9d94eSRobert Foss }; 275820f9d94eSRobert Foss }; 275920f9d94eSRobert Foss }; 276020f9d94eSRobert Foss 276120f9d94eSRobert Foss cpu3-thermal { 276220f9d94eSRobert Foss polling-delay-passive = <250>; 276320f9d94eSRobert Foss polling-delay = <1000>; 276420f9d94eSRobert Foss 276520f9d94eSRobert Foss thermal-sensors = <&tsens0 4>; 276620f9d94eSRobert Foss 276720f9d94eSRobert Foss trips { 276820f9d94eSRobert Foss cpu3_alert0: trip-point0 { 276920f9d94eSRobert Foss temperature = <90000>; 277020f9d94eSRobert Foss hysteresis = <2000>; 277120f9d94eSRobert Foss type = "passive"; 277220f9d94eSRobert Foss }; 277320f9d94eSRobert Foss 277420f9d94eSRobert Foss cpu3_alert1: trip-point1 { 277520f9d94eSRobert Foss temperature = <95000>; 277620f9d94eSRobert Foss hysteresis = <2000>; 277720f9d94eSRobert Foss type = "passive"; 277820f9d94eSRobert Foss }; 277920f9d94eSRobert Foss 278020f9d94eSRobert Foss cpu3_crit: cpu_crit { 278120f9d94eSRobert Foss temperature = <110000>; 278220f9d94eSRobert Foss hysteresis = <1000>; 278320f9d94eSRobert Foss type = "critical"; 278420f9d94eSRobert Foss }; 278520f9d94eSRobert Foss }; 278620f9d94eSRobert Foss 278720f9d94eSRobert Foss cooling-maps { 278820f9d94eSRobert Foss map0 { 278920f9d94eSRobert Foss trip = <&cpu3_alert0>; 279020f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 279120f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 279220f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 279320f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 279420f9d94eSRobert Foss }; 279520f9d94eSRobert Foss map1 { 279620f9d94eSRobert Foss trip = <&cpu3_alert1>; 279720f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 279820f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 279920f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 280020f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 280120f9d94eSRobert Foss }; 280220f9d94eSRobert Foss }; 280320f9d94eSRobert Foss }; 280420f9d94eSRobert Foss 280520f9d94eSRobert Foss cpu4-top-thermal { 280620f9d94eSRobert Foss polling-delay-passive = <250>; 280720f9d94eSRobert Foss polling-delay = <1000>; 280820f9d94eSRobert Foss 280920f9d94eSRobert Foss thermal-sensors = <&tsens0 7>; 281020f9d94eSRobert Foss 281120f9d94eSRobert Foss trips { 281220f9d94eSRobert Foss cpu4_top_alert0: trip-point0 { 281320f9d94eSRobert Foss temperature = <90000>; 281420f9d94eSRobert Foss hysteresis = <2000>; 281520f9d94eSRobert Foss type = "passive"; 281620f9d94eSRobert Foss }; 281720f9d94eSRobert Foss 281820f9d94eSRobert Foss cpu4_top_alert1: trip-point1 { 281920f9d94eSRobert Foss temperature = <95000>; 282020f9d94eSRobert Foss hysteresis = <2000>; 282120f9d94eSRobert Foss type = "passive"; 282220f9d94eSRobert Foss }; 282320f9d94eSRobert Foss 282420f9d94eSRobert Foss cpu4_top_crit: cpu_crit { 282520f9d94eSRobert Foss temperature = <110000>; 282620f9d94eSRobert Foss hysteresis = <1000>; 282720f9d94eSRobert Foss type = "critical"; 282820f9d94eSRobert Foss }; 282920f9d94eSRobert Foss }; 283020f9d94eSRobert Foss 283120f9d94eSRobert Foss cooling-maps { 283220f9d94eSRobert Foss map0 { 283320f9d94eSRobert Foss trip = <&cpu4_top_alert0>; 283420f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 283520f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 283620f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 283720f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 283820f9d94eSRobert Foss }; 283920f9d94eSRobert Foss map1 { 284020f9d94eSRobert Foss trip = <&cpu4_top_alert1>; 284120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 284220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 284320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 284420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 284520f9d94eSRobert Foss }; 284620f9d94eSRobert Foss }; 284720f9d94eSRobert Foss }; 284820f9d94eSRobert Foss 284920f9d94eSRobert Foss cpu5-top-thermal { 285020f9d94eSRobert Foss polling-delay-passive = <250>; 285120f9d94eSRobert Foss polling-delay = <1000>; 285220f9d94eSRobert Foss 285320f9d94eSRobert Foss thermal-sensors = <&tsens0 8>; 285420f9d94eSRobert Foss 285520f9d94eSRobert Foss trips { 285620f9d94eSRobert Foss cpu5_top_alert0: trip-point0 { 285720f9d94eSRobert Foss temperature = <90000>; 285820f9d94eSRobert Foss hysteresis = <2000>; 285920f9d94eSRobert Foss type = "passive"; 286020f9d94eSRobert Foss }; 286120f9d94eSRobert Foss 286220f9d94eSRobert Foss cpu5_top_alert1: trip-point1 { 286320f9d94eSRobert Foss temperature = <95000>; 286420f9d94eSRobert Foss hysteresis = <2000>; 286520f9d94eSRobert Foss type = "passive"; 286620f9d94eSRobert Foss }; 286720f9d94eSRobert Foss 286820f9d94eSRobert Foss cpu5_top_crit: cpu_crit { 286920f9d94eSRobert Foss temperature = <110000>; 287020f9d94eSRobert Foss hysteresis = <1000>; 287120f9d94eSRobert Foss type = "critical"; 287220f9d94eSRobert Foss }; 287320f9d94eSRobert Foss }; 287420f9d94eSRobert Foss 287520f9d94eSRobert Foss cooling-maps { 287620f9d94eSRobert Foss map0 { 287720f9d94eSRobert Foss trip = <&cpu5_top_alert0>; 287820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 287920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 288020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 288120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 288220f9d94eSRobert Foss }; 288320f9d94eSRobert Foss map1 { 288420f9d94eSRobert Foss trip = <&cpu5_top_alert1>; 288520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 288620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 288720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 288820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 288920f9d94eSRobert Foss }; 289020f9d94eSRobert Foss }; 289120f9d94eSRobert Foss }; 289220f9d94eSRobert Foss 289320f9d94eSRobert Foss cpu6-top-thermal { 289420f9d94eSRobert Foss polling-delay-passive = <250>; 289520f9d94eSRobert Foss polling-delay = <1000>; 289620f9d94eSRobert Foss 289720f9d94eSRobert Foss thermal-sensors = <&tsens0 9>; 289820f9d94eSRobert Foss 289920f9d94eSRobert Foss trips { 290020f9d94eSRobert Foss cpu6_top_alert0: trip-point0 { 290120f9d94eSRobert Foss temperature = <90000>; 290220f9d94eSRobert Foss hysteresis = <2000>; 290320f9d94eSRobert Foss type = "passive"; 290420f9d94eSRobert Foss }; 290520f9d94eSRobert Foss 290620f9d94eSRobert Foss cpu6_top_alert1: trip-point1 { 290720f9d94eSRobert Foss temperature = <95000>; 290820f9d94eSRobert Foss hysteresis = <2000>; 290920f9d94eSRobert Foss type = "passive"; 291020f9d94eSRobert Foss }; 291120f9d94eSRobert Foss 291220f9d94eSRobert Foss cpu6_top_crit: cpu_crit { 291320f9d94eSRobert Foss temperature = <110000>; 291420f9d94eSRobert Foss hysteresis = <1000>; 291520f9d94eSRobert Foss type = "critical"; 291620f9d94eSRobert Foss }; 291720f9d94eSRobert Foss }; 291820f9d94eSRobert Foss 291920f9d94eSRobert Foss cooling-maps { 292020f9d94eSRobert Foss map0 { 292120f9d94eSRobert Foss trip = <&cpu6_top_alert0>; 292220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 292320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 292420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 292520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 292620f9d94eSRobert Foss }; 292720f9d94eSRobert Foss map1 { 292820f9d94eSRobert Foss trip = <&cpu6_top_alert1>; 292920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 293020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 293120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 293220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 293320f9d94eSRobert Foss }; 293420f9d94eSRobert Foss }; 293520f9d94eSRobert Foss }; 293620f9d94eSRobert Foss 293720f9d94eSRobert Foss cpu7-top-thermal { 293820f9d94eSRobert Foss polling-delay-passive = <250>; 293920f9d94eSRobert Foss polling-delay = <1000>; 294020f9d94eSRobert Foss 294120f9d94eSRobert Foss thermal-sensors = <&tsens0 10>; 294220f9d94eSRobert Foss 294320f9d94eSRobert Foss trips { 294420f9d94eSRobert Foss cpu7_top_alert0: trip-point0 { 294520f9d94eSRobert Foss temperature = <90000>; 294620f9d94eSRobert Foss hysteresis = <2000>; 294720f9d94eSRobert Foss type = "passive"; 294820f9d94eSRobert Foss }; 294920f9d94eSRobert Foss 295020f9d94eSRobert Foss cpu7_top_alert1: trip-point1 { 295120f9d94eSRobert Foss temperature = <95000>; 295220f9d94eSRobert Foss hysteresis = <2000>; 295320f9d94eSRobert Foss type = "passive"; 295420f9d94eSRobert Foss }; 295520f9d94eSRobert Foss 295620f9d94eSRobert Foss cpu7_top_crit: cpu_crit { 295720f9d94eSRobert Foss temperature = <110000>; 295820f9d94eSRobert Foss hysteresis = <1000>; 295920f9d94eSRobert Foss type = "critical"; 296020f9d94eSRobert Foss }; 296120f9d94eSRobert Foss }; 296220f9d94eSRobert Foss 296320f9d94eSRobert Foss cooling-maps { 296420f9d94eSRobert Foss map0 { 296520f9d94eSRobert Foss trip = <&cpu7_top_alert0>; 296620f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 296720f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 296820f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 296920f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 297020f9d94eSRobert Foss }; 297120f9d94eSRobert Foss map1 { 297220f9d94eSRobert Foss trip = <&cpu7_top_alert1>; 297320f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 297420f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 297520f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 297620f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 297720f9d94eSRobert Foss }; 297820f9d94eSRobert Foss }; 297920f9d94eSRobert Foss }; 298020f9d94eSRobert Foss 298120f9d94eSRobert Foss cpu4-bottom-thermal { 298220f9d94eSRobert Foss polling-delay-passive = <250>; 298320f9d94eSRobert Foss polling-delay = <1000>; 298420f9d94eSRobert Foss 298520f9d94eSRobert Foss thermal-sensors = <&tsens0 11>; 298620f9d94eSRobert Foss 298720f9d94eSRobert Foss trips { 298820f9d94eSRobert Foss cpu4_bottom_alert0: trip-point0 { 298920f9d94eSRobert Foss temperature = <90000>; 299020f9d94eSRobert Foss hysteresis = <2000>; 299120f9d94eSRobert Foss type = "passive"; 299220f9d94eSRobert Foss }; 299320f9d94eSRobert Foss 299420f9d94eSRobert Foss cpu4_bottom_alert1: trip-point1 { 299520f9d94eSRobert Foss temperature = <95000>; 299620f9d94eSRobert Foss hysteresis = <2000>; 299720f9d94eSRobert Foss type = "passive"; 299820f9d94eSRobert Foss }; 299920f9d94eSRobert Foss 300020f9d94eSRobert Foss cpu4_bottom_crit: cpu_crit { 300120f9d94eSRobert Foss temperature = <110000>; 300220f9d94eSRobert Foss hysteresis = <1000>; 300320f9d94eSRobert Foss type = "critical"; 300420f9d94eSRobert Foss }; 300520f9d94eSRobert Foss }; 300620f9d94eSRobert Foss 300720f9d94eSRobert Foss cooling-maps { 300820f9d94eSRobert Foss map0 { 300920f9d94eSRobert Foss trip = <&cpu4_bottom_alert0>; 301020f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 301120f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 301220f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 301320f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 301420f9d94eSRobert Foss }; 301520f9d94eSRobert Foss map1 { 301620f9d94eSRobert Foss trip = <&cpu4_bottom_alert1>; 301720f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 301820f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 301920f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 302020f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 302120f9d94eSRobert Foss }; 302220f9d94eSRobert Foss }; 302320f9d94eSRobert Foss }; 302420f9d94eSRobert Foss 302520f9d94eSRobert Foss cpu5-bottom-thermal { 302620f9d94eSRobert Foss polling-delay-passive = <250>; 302720f9d94eSRobert Foss polling-delay = <1000>; 302820f9d94eSRobert Foss 302920f9d94eSRobert Foss thermal-sensors = <&tsens0 12>; 303020f9d94eSRobert Foss 303120f9d94eSRobert Foss trips { 303220f9d94eSRobert Foss cpu5_bottom_alert0: trip-point0 { 303320f9d94eSRobert Foss temperature = <90000>; 303420f9d94eSRobert Foss hysteresis = <2000>; 303520f9d94eSRobert Foss type = "passive"; 303620f9d94eSRobert Foss }; 303720f9d94eSRobert Foss 303820f9d94eSRobert Foss cpu5_bottom_alert1: trip-point1 { 303920f9d94eSRobert Foss temperature = <95000>; 304020f9d94eSRobert Foss hysteresis = <2000>; 304120f9d94eSRobert Foss type = "passive"; 304220f9d94eSRobert Foss }; 304320f9d94eSRobert Foss 304420f9d94eSRobert Foss cpu5_bottom_crit: cpu_crit { 304520f9d94eSRobert Foss temperature = <110000>; 304620f9d94eSRobert Foss hysteresis = <1000>; 304720f9d94eSRobert Foss type = "critical"; 304820f9d94eSRobert Foss }; 304920f9d94eSRobert Foss }; 305020f9d94eSRobert Foss 305120f9d94eSRobert Foss cooling-maps { 305220f9d94eSRobert Foss map0 { 305320f9d94eSRobert Foss trip = <&cpu5_bottom_alert0>; 305420f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 305520f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 305620f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 305720f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 305820f9d94eSRobert Foss }; 305920f9d94eSRobert Foss map1 { 306020f9d94eSRobert Foss trip = <&cpu5_bottom_alert1>; 306120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 306220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 306320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 306420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 306520f9d94eSRobert Foss }; 306620f9d94eSRobert Foss }; 306720f9d94eSRobert Foss }; 306820f9d94eSRobert Foss 306920f9d94eSRobert Foss cpu6-bottom-thermal { 307020f9d94eSRobert Foss polling-delay-passive = <250>; 307120f9d94eSRobert Foss polling-delay = <1000>; 307220f9d94eSRobert Foss 307320f9d94eSRobert Foss thermal-sensors = <&tsens0 13>; 307420f9d94eSRobert Foss 307520f9d94eSRobert Foss trips { 307620f9d94eSRobert Foss cpu6_bottom_alert0: trip-point0 { 307720f9d94eSRobert Foss temperature = <90000>; 307820f9d94eSRobert Foss hysteresis = <2000>; 307920f9d94eSRobert Foss type = "passive"; 308020f9d94eSRobert Foss }; 308120f9d94eSRobert Foss 308220f9d94eSRobert Foss cpu6_bottom_alert1: trip-point1 { 308320f9d94eSRobert Foss temperature = <95000>; 308420f9d94eSRobert Foss hysteresis = <2000>; 308520f9d94eSRobert Foss type = "passive"; 308620f9d94eSRobert Foss }; 308720f9d94eSRobert Foss 308820f9d94eSRobert Foss cpu6_bottom_crit: cpu_crit { 308920f9d94eSRobert Foss temperature = <110000>; 309020f9d94eSRobert Foss hysteresis = <1000>; 309120f9d94eSRobert Foss type = "critical"; 309220f9d94eSRobert Foss }; 309320f9d94eSRobert Foss }; 309420f9d94eSRobert Foss 309520f9d94eSRobert Foss cooling-maps { 309620f9d94eSRobert Foss map0 { 309720f9d94eSRobert Foss trip = <&cpu6_bottom_alert0>; 309820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 309920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 310020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 310120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 310220f9d94eSRobert Foss }; 310320f9d94eSRobert Foss map1 { 310420f9d94eSRobert Foss trip = <&cpu6_bottom_alert1>; 310520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 310620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 310720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 310820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 310920f9d94eSRobert Foss }; 311020f9d94eSRobert Foss }; 311120f9d94eSRobert Foss }; 311220f9d94eSRobert Foss 311320f9d94eSRobert Foss cpu7-bottom-thermal { 311420f9d94eSRobert Foss polling-delay-passive = <250>; 311520f9d94eSRobert Foss polling-delay = <1000>; 311620f9d94eSRobert Foss 311720f9d94eSRobert Foss thermal-sensors = <&tsens0 14>; 311820f9d94eSRobert Foss 311920f9d94eSRobert Foss trips { 312020f9d94eSRobert Foss cpu7_bottom_alert0: trip-point0 { 312120f9d94eSRobert Foss temperature = <90000>; 312220f9d94eSRobert Foss hysteresis = <2000>; 312320f9d94eSRobert Foss type = "passive"; 312420f9d94eSRobert Foss }; 312520f9d94eSRobert Foss 312620f9d94eSRobert Foss cpu7_bottom_alert1: trip-point1 { 312720f9d94eSRobert Foss temperature = <95000>; 312820f9d94eSRobert Foss hysteresis = <2000>; 312920f9d94eSRobert Foss type = "passive"; 313020f9d94eSRobert Foss }; 313120f9d94eSRobert Foss 313220f9d94eSRobert Foss cpu7_bottom_crit: cpu_crit { 313320f9d94eSRobert Foss temperature = <110000>; 313420f9d94eSRobert Foss hysteresis = <1000>; 313520f9d94eSRobert Foss type = "critical"; 313620f9d94eSRobert Foss }; 313720f9d94eSRobert Foss }; 313820f9d94eSRobert Foss 313920f9d94eSRobert Foss cooling-maps { 314020f9d94eSRobert Foss map0 { 314120f9d94eSRobert Foss trip = <&cpu7_bottom_alert0>; 314220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 314320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 314420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 314520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 314620f9d94eSRobert Foss }; 314720f9d94eSRobert Foss map1 { 314820f9d94eSRobert Foss trip = <&cpu7_bottom_alert1>; 314920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 315020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 315120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 315220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 315320f9d94eSRobert Foss }; 315420f9d94eSRobert Foss }; 315520f9d94eSRobert Foss }; 315620f9d94eSRobert Foss 315720f9d94eSRobert Foss aoss0-thermal { 315820f9d94eSRobert Foss polling-delay-passive = <250>; 315920f9d94eSRobert Foss polling-delay = <1000>; 316020f9d94eSRobert Foss 316120f9d94eSRobert Foss thermal-sensors = <&tsens0 0>; 316220f9d94eSRobert Foss 316320f9d94eSRobert Foss trips { 316420f9d94eSRobert Foss aoss0_alert0: trip-point0 { 316520f9d94eSRobert Foss temperature = <90000>; 316620f9d94eSRobert Foss hysteresis = <2000>; 316720f9d94eSRobert Foss type = "hot"; 316820f9d94eSRobert Foss }; 316920f9d94eSRobert Foss }; 317020f9d94eSRobert Foss }; 317120f9d94eSRobert Foss 317220f9d94eSRobert Foss cluster0-thermal { 317320f9d94eSRobert Foss polling-delay-passive = <250>; 317420f9d94eSRobert Foss polling-delay = <1000>; 317520f9d94eSRobert Foss 317620f9d94eSRobert Foss thermal-sensors = <&tsens0 5>; 317720f9d94eSRobert Foss 317820f9d94eSRobert Foss trips { 317920f9d94eSRobert Foss cluster0_alert0: trip-point0 { 318020f9d94eSRobert Foss temperature = <90000>; 318120f9d94eSRobert Foss hysteresis = <2000>; 318220f9d94eSRobert Foss type = "hot"; 318320f9d94eSRobert Foss }; 318420f9d94eSRobert Foss cluster0_crit: cluster0_crit { 318520f9d94eSRobert Foss temperature = <110000>; 318620f9d94eSRobert Foss hysteresis = <2000>; 318720f9d94eSRobert Foss type = "critical"; 318820f9d94eSRobert Foss }; 318920f9d94eSRobert Foss }; 319020f9d94eSRobert Foss }; 319120f9d94eSRobert Foss 319220f9d94eSRobert Foss cluster1-thermal { 319320f9d94eSRobert Foss polling-delay-passive = <250>; 319420f9d94eSRobert Foss polling-delay = <1000>; 319520f9d94eSRobert Foss 319620f9d94eSRobert Foss thermal-sensors = <&tsens0 6>; 319720f9d94eSRobert Foss 319820f9d94eSRobert Foss trips { 319920f9d94eSRobert Foss cluster1_alert0: trip-point0 { 320020f9d94eSRobert Foss temperature = <90000>; 320120f9d94eSRobert Foss hysteresis = <2000>; 320220f9d94eSRobert Foss type = "hot"; 320320f9d94eSRobert Foss }; 320420f9d94eSRobert Foss cluster1_crit: cluster1_crit { 320520f9d94eSRobert Foss temperature = <110000>; 320620f9d94eSRobert Foss hysteresis = <2000>; 320720f9d94eSRobert Foss type = "critical"; 320820f9d94eSRobert Foss }; 320920f9d94eSRobert Foss }; 321020f9d94eSRobert Foss }; 321120f9d94eSRobert Foss 321220f9d94eSRobert Foss aoss1-thermal { 321320f9d94eSRobert Foss polling-delay-passive = <250>; 321420f9d94eSRobert Foss polling-delay = <1000>; 321520f9d94eSRobert Foss 321620f9d94eSRobert Foss thermal-sensors = <&tsens1 0>; 321720f9d94eSRobert Foss 321820f9d94eSRobert Foss trips { 321920f9d94eSRobert Foss aoss1_alert0: trip-point0 { 322020f9d94eSRobert Foss temperature = <90000>; 322120f9d94eSRobert Foss hysteresis = <2000>; 322220f9d94eSRobert Foss type = "hot"; 322320f9d94eSRobert Foss }; 322420f9d94eSRobert Foss }; 322520f9d94eSRobert Foss }; 322620f9d94eSRobert Foss 32277be1c395SDavid Heidelberg gpu-top-thermal { 322820f9d94eSRobert Foss polling-delay-passive = <250>; 322920f9d94eSRobert Foss polling-delay = <1000>; 323020f9d94eSRobert Foss 323120f9d94eSRobert Foss thermal-sensors = <&tsens1 1>; 323220f9d94eSRobert Foss 323320f9d94eSRobert Foss trips { 323420f9d94eSRobert Foss gpu1_alert0: trip-point0 { 323520f9d94eSRobert Foss temperature = <90000>; 323620f9d94eSRobert Foss hysteresis = <1000>; 323720f9d94eSRobert Foss type = "hot"; 323820f9d94eSRobert Foss }; 323920f9d94eSRobert Foss }; 324020f9d94eSRobert Foss }; 324120f9d94eSRobert Foss 32427be1c395SDavid Heidelberg gpu-bottom-thermal { 324320f9d94eSRobert Foss polling-delay-passive = <250>; 324420f9d94eSRobert Foss polling-delay = <1000>; 324520f9d94eSRobert Foss 324620f9d94eSRobert Foss thermal-sensors = <&tsens1 2>; 324720f9d94eSRobert Foss 324820f9d94eSRobert Foss trips { 324920f9d94eSRobert Foss gpu2_alert0: trip-point0 { 325020f9d94eSRobert Foss temperature = <90000>; 325120f9d94eSRobert Foss hysteresis = <1000>; 325220f9d94eSRobert Foss type = "hot"; 325320f9d94eSRobert Foss }; 325420f9d94eSRobert Foss }; 325520f9d94eSRobert Foss }; 325620f9d94eSRobert Foss 325720f9d94eSRobert Foss nspss1-thermal { 325820f9d94eSRobert Foss polling-delay-passive = <250>; 325920f9d94eSRobert Foss polling-delay = <1000>; 326020f9d94eSRobert Foss 326120f9d94eSRobert Foss thermal-sensors = <&tsens1 3>; 326220f9d94eSRobert Foss 326320f9d94eSRobert Foss trips { 326420f9d94eSRobert Foss nspss1_alert0: trip-point0 { 326520f9d94eSRobert Foss temperature = <90000>; 326620f9d94eSRobert Foss hysteresis = <1000>; 326720f9d94eSRobert Foss type = "hot"; 326820f9d94eSRobert Foss }; 326920f9d94eSRobert Foss }; 327020f9d94eSRobert Foss }; 327120f9d94eSRobert Foss 327220f9d94eSRobert Foss nspss2-thermal { 327320f9d94eSRobert Foss polling-delay-passive = <250>; 327420f9d94eSRobert Foss polling-delay = <1000>; 327520f9d94eSRobert Foss 327620f9d94eSRobert Foss thermal-sensors = <&tsens1 4>; 327720f9d94eSRobert Foss 327820f9d94eSRobert Foss trips { 327920f9d94eSRobert Foss nspss2_alert0: trip-point0 { 328020f9d94eSRobert Foss temperature = <90000>; 328120f9d94eSRobert Foss hysteresis = <1000>; 328220f9d94eSRobert Foss type = "hot"; 328320f9d94eSRobert Foss }; 328420f9d94eSRobert Foss }; 328520f9d94eSRobert Foss }; 328620f9d94eSRobert Foss 328720f9d94eSRobert Foss nspss3-thermal { 328820f9d94eSRobert Foss polling-delay-passive = <250>; 328920f9d94eSRobert Foss polling-delay = <1000>; 329020f9d94eSRobert Foss 329120f9d94eSRobert Foss thermal-sensors = <&tsens1 5>; 329220f9d94eSRobert Foss 329320f9d94eSRobert Foss trips { 329420f9d94eSRobert Foss nspss3_alert0: trip-point0 { 329520f9d94eSRobert Foss temperature = <90000>; 329620f9d94eSRobert Foss hysteresis = <1000>; 329720f9d94eSRobert Foss type = "hot"; 329820f9d94eSRobert Foss }; 329920f9d94eSRobert Foss }; 330020f9d94eSRobert Foss }; 330120f9d94eSRobert Foss 330220f9d94eSRobert Foss video-thermal { 330320f9d94eSRobert Foss polling-delay-passive = <250>; 330420f9d94eSRobert Foss polling-delay = <1000>; 330520f9d94eSRobert Foss 330620f9d94eSRobert Foss thermal-sensors = <&tsens1 6>; 330720f9d94eSRobert Foss 330820f9d94eSRobert Foss trips { 330920f9d94eSRobert Foss video_alert0: trip-point0 { 331020f9d94eSRobert Foss temperature = <90000>; 331120f9d94eSRobert Foss hysteresis = <2000>; 331220f9d94eSRobert Foss type = "hot"; 331320f9d94eSRobert Foss }; 331420f9d94eSRobert Foss }; 331520f9d94eSRobert Foss }; 331620f9d94eSRobert Foss 331720f9d94eSRobert Foss mem-thermal { 331820f9d94eSRobert Foss polling-delay-passive = <250>; 331920f9d94eSRobert Foss polling-delay = <1000>; 332020f9d94eSRobert Foss 332120f9d94eSRobert Foss thermal-sensors = <&tsens1 7>; 332220f9d94eSRobert Foss 332320f9d94eSRobert Foss trips { 332420f9d94eSRobert Foss mem_alert0: trip-point0 { 332520f9d94eSRobert Foss temperature = <90000>; 332620f9d94eSRobert Foss hysteresis = <2000>; 332720f9d94eSRobert Foss type = "hot"; 332820f9d94eSRobert Foss }; 332920f9d94eSRobert Foss }; 333020f9d94eSRobert Foss }; 333120f9d94eSRobert Foss 33327be1c395SDavid Heidelberg modem1-top-thermal { 333320f9d94eSRobert Foss polling-delay-passive = <250>; 333420f9d94eSRobert Foss polling-delay = <1000>; 333520f9d94eSRobert Foss 333620f9d94eSRobert Foss thermal-sensors = <&tsens1 8>; 333720f9d94eSRobert Foss 333820f9d94eSRobert Foss trips { 333920f9d94eSRobert Foss modem1_alert0: trip-point0 { 334020f9d94eSRobert Foss temperature = <90000>; 334120f9d94eSRobert Foss hysteresis = <2000>; 334220f9d94eSRobert Foss type = "hot"; 334320f9d94eSRobert Foss }; 334420f9d94eSRobert Foss }; 334520f9d94eSRobert Foss }; 334620f9d94eSRobert Foss 33477be1c395SDavid Heidelberg modem2-top-thermal { 334820f9d94eSRobert Foss polling-delay-passive = <250>; 334920f9d94eSRobert Foss polling-delay = <1000>; 335020f9d94eSRobert Foss 335120f9d94eSRobert Foss thermal-sensors = <&tsens1 9>; 335220f9d94eSRobert Foss 335320f9d94eSRobert Foss trips { 335420f9d94eSRobert Foss modem2_alert0: trip-point0 { 335520f9d94eSRobert Foss temperature = <90000>; 335620f9d94eSRobert Foss hysteresis = <2000>; 335720f9d94eSRobert Foss type = "hot"; 335820f9d94eSRobert Foss }; 335920f9d94eSRobert Foss }; 336020f9d94eSRobert Foss }; 336120f9d94eSRobert Foss 33627be1c395SDavid Heidelberg modem3-top-thermal { 336320f9d94eSRobert Foss polling-delay-passive = <250>; 336420f9d94eSRobert Foss polling-delay = <1000>; 336520f9d94eSRobert Foss 336620f9d94eSRobert Foss thermal-sensors = <&tsens1 10>; 336720f9d94eSRobert Foss 336820f9d94eSRobert Foss trips { 336920f9d94eSRobert Foss modem3_alert0: trip-point0 { 337020f9d94eSRobert Foss temperature = <90000>; 337120f9d94eSRobert Foss hysteresis = <2000>; 337220f9d94eSRobert Foss type = "hot"; 337320f9d94eSRobert Foss }; 337420f9d94eSRobert Foss }; 337520f9d94eSRobert Foss }; 337620f9d94eSRobert Foss 33777be1c395SDavid Heidelberg modem4-top-thermal { 337820f9d94eSRobert Foss polling-delay-passive = <250>; 337920f9d94eSRobert Foss polling-delay = <1000>; 338020f9d94eSRobert Foss 338120f9d94eSRobert Foss thermal-sensors = <&tsens1 11>; 338220f9d94eSRobert Foss 338320f9d94eSRobert Foss trips { 338420f9d94eSRobert Foss modem4_alert0: trip-point0 { 338520f9d94eSRobert Foss temperature = <90000>; 338620f9d94eSRobert Foss hysteresis = <2000>; 338720f9d94eSRobert Foss type = "hot"; 338820f9d94eSRobert Foss }; 338920f9d94eSRobert Foss }; 339020f9d94eSRobert Foss }; 339120f9d94eSRobert Foss 33927be1c395SDavid Heidelberg camera-top-thermal { 339320f9d94eSRobert Foss polling-delay-passive = <250>; 339420f9d94eSRobert Foss polling-delay = <1000>; 339520f9d94eSRobert Foss 339620f9d94eSRobert Foss thermal-sensors = <&tsens1 12>; 339720f9d94eSRobert Foss 339820f9d94eSRobert Foss trips { 339920f9d94eSRobert Foss camera1_alert0: trip-point0 { 340020f9d94eSRobert Foss temperature = <90000>; 340120f9d94eSRobert Foss hysteresis = <2000>; 340220f9d94eSRobert Foss type = "hot"; 340320f9d94eSRobert Foss }; 340420f9d94eSRobert Foss }; 340520f9d94eSRobert Foss }; 340620f9d94eSRobert Foss 34077be1c395SDavid Heidelberg cam-bottom-thermal { 340820f9d94eSRobert Foss polling-delay-passive = <250>; 340920f9d94eSRobert Foss polling-delay = <1000>; 341020f9d94eSRobert Foss 341120f9d94eSRobert Foss thermal-sensors = <&tsens1 13>; 341220f9d94eSRobert Foss 341320f9d94eSRobert Foss trips { 341420f9d94eSRobert Foss camera2_alert0: trip-point0 { 341520f9d94eSRobert Foss temperature = <90000>; 341620f9d94eSRobert Foss hysteresis = <2000>; 341720f9d94eSRobert Foss type = "hot"; 341820f9d94eSRobert Foss }; 341920f9d94eSRobert Foss }; 342020f9d94eSRobert Foss }; 342120f9d94eSRobert Foss }; 342220f9d94eSRobert Foss 3423b7e8f433SVinod Koul timer { 3424b7e8f433SVinod Koul compatible = "arm,armv8-timer"; 3425b7e8f433SVinod Koul interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3426b7e8f433SVinod Koul <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3427b7e8f433SVinod Koul <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3428b7e8f433SVinod Koul <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3429b7e8f433SVinod Koul }; 3430b7e8f433SVinod Koul}; 3431