1b7e8f433SVinod Koul// SPDX-License-Identifier: BSD-3-Clause 2b7e8f433SVinod Koul/* 34f23d2a5SVinod Koul * Copyright (c) 2020, Linaro Limited 4b7e8f433SVinod Koul */ 5b7e8f433SVinod Koul 6b7e8f433SVinod Koul#include <dt-bindings/interrupt-controller/arm-gic.h> 76d91e201SVinod Koul#include <dt-bindings/clock/qcom,gcc-sm8350.h> 8b7e8f433SVinod Koul#include <dt-bindings/clock/qcom,rpmh.h> 9f0360a7cSKonrad Dybcio#include <dt-bindings/gpio/gpio.h> 1084c856d0SVinod Koul#include <dt-bindings/interconnect/qcom,sm8350.h> 11b7e8f433SVinod Koul#include <dt-bindings/mailbox/qcom-ipcc.h> 12b7e8f433SVinod Koul#include <dt-bindings/power/qcom-rpmpd.h> 13b7e8f433SVinod Koul#include <dt-bindings/soc/qcom,rpmh-rsc.h> 1420f9d94eSRobert Foss#include <dt-bindings/thermal/thermal.h> 15f11d3e7dSAlex Elder#include <dt-bindings/interconnect/qcom,sm8350.h> 16b7e8f433SVinod Koul 17b7e8f433SVinod Koul/ { 18b7e8f433SVinod Koul interrupt-parent = <&intc>; 19b7e8f433SVinod Koul 20b7e8f433SVinod Koul #address-cells = <2>; 21b7e8f433SVinod Koul #size-cells = <2>; 22b7e8f433SVinod Koul 23b7e8f433SVinod Koul chosen { }; 24b7e8f433SVinod Koul 25b7e8f433SVinod Koul clocks { 26b7e8f433SVinod Koul xo_board: xo-board { 27b7e8f433SVinod Koul compatible = "fixed-clock"; 28b7e8f433SVinod Koul #clock-cells = <0>; 29b7e8f433SVinod Koul clock-frequency = <38400000>; 30b7e8f433SVinod Koul clock-output-names = "xo_board"; 31b7e8f433SVinod Koul }; 32b7e8f433SVinod Koul 33b7e8f433SVinod Koul sleep_clk: sleep-clk { 34b7e8f433SVinod Koul compatible = "fixed-clock"; 35b7e8f433SVinod Koul clock-frequency = <32000>; 36b7e8f433SVinod Koul #clock-cells = <0>; 37b7e8f433SVinod Koul }; 38b7e8f433SVinod Koul }; 39b7e8f433SVinod Koul 40b7e8f433SVinod Koul cpus { 41b7e8f433SVinod Koul #address-cells = <2>; 42b7e8f433SVinod Koul #size-cells = <0>; 43b7e8f433SVinod Koul 44b7e8f433SVinod Koul CPU0: cpu@0 { 45b7e8f433SVinod Koul device_type = "cpu"; 46b7e8f433SVinod Koul compatible = "qcom,kryo685"; 47b7e8f433SVinod Koul reg = <0x0 0x0>; 48b7e8f433SVinod Koul enable-method = "psci"; 49b7e8f433SVinod Koul next-level-cache = <&L2_0>; 50ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 5107ddb302SBjorn Andersson power-domains = <&CPU_PD0>; 5207ddb302SBjorn Andersson power-domain-names = "psci"; 5320f9d94eSRobert Foss #cooling-cells = <2>; 54b7e8f433SVinod Koul L2_0: l2-cache { 55b7e8f433SVinod Koul compatible = "cache"; 56b7e8f433SVinod Koul next-level-cache = <&L3_0>; 57b7e8f433SVinod Koul L3_0: l3-cache { 58b7e8f433SVinod Koul compatible = "cache"; 59b7e8f433SVinod Koul }; 60b7e8f433SVinod Koul }; 61b7e8f433SVinod Koul }; 62b7e8f433SVinod Koul 63b7e8f433SVinod Koul CPU1: cpu@100 { 64b7e8f433SVinod Koul device_type = "cpu"; 65b7e8f433SVinod Koul compatible = "qcom,kryo685"; 66b7e8f433SVinod Koul reg = <0x0 0x100>; 67b7e8f433SVinod Koul enable-method = "psci"; 68b7e8f433SVinod Koul next-level-cache = <&L2_100>; 69ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 7007ddb302SBjorn Andersson power-domains = <&CPU_PD1>; 7107ddb302SBjorn Andersson power-domain-names = "psci"; 7220f9d94eSRobert Foss #cooling-cells = <2>; 73b7e8f433SVinod Koul L2_100: l2-cache { 74b7e8f433SVinod Koul compatible = "cache"; 75b7e8f433SVinod Koul next-level-cache = <&L3_0>; 76b7e8f433SVinod Koul }; 77b7e8f433SVinod Koul }; 78b7e8f433SVinod Koul 79b7e8f433SVinod Koul CPU2: cpu@200 { 80b7e8f433SVinod Koul device_type = "cpu"; 81b7e8f433SVinod Koul compatible = "qcom,kryo685"; 82b7e8f433SVinod Koul reg = <0x0 0x200>; 83b7e8f433SVinod Koul enable-method = "psci"; 84b7e8f433SVinod Koul next-level-cache = <&L2_200>; 85ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 8607ddb302SBjorn Andersson power-domains = <&CPU_PD2>; 8707ddb302SBjorn Andersson power-domain-names = "psci"; 8820f9d94eSRobert Foss #cooling-cells = <2>; 89b7e8f433SVinod Koul L2_200: l2-cache { 90b7e8f433SVinod Koul compatible = "cache"; 91b7e8f433SVinod Koul next-level-cache = <&L3_0>; 92b7e8f433SVinod Koul }; 93b7e8f433SVinod Koul }; 94b7e8f433SVinod Koul 95b7e8f433SVinod Koul CPU3: cpu@300 { 96b7e8f433SVinod Koul device_type = "cpu"; 97b7e8f433SVinod Koul compatible = "qcom,kryo685"; 98b7e8f433SVinod Koul reg = <0x0 0x300>; 99b7e8f433SVinod Koul enable-method = "psci"; 100b7e8f433SVinod Koul next-level-cache = <&L2_300>; 101ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 10207ddb302SBjorn Andersson power-domains = <&CPU_PD3>; 10307ddb302SBjorn Andersson power-domain-names = "psci"; 10420f9d94eSRobert Foss #cooling-cells = <2>; 105b7e8f433SVinod Koul L2_300: l2-cache { 106b7e8f433SVinod Koul compatible = "cache"; 107b7e8f433SVinod Koul next-level-cache = <&L3_0>; 108b7e8f433SVinod Koul }; 109b7e8f433SVinod Koul }; 110b7e8f433SVinod Koul 111b7e8f433SVinod Koul CPU4: cpu@400 { 112b7e8f433SVinod Koul device_type = "cpu"; 113b7e8f433SVinod Koul compatible = "qcom,kryo685"; 114b7e8f433SVinod Koul reg = <0x0 0x400>; 115b7e8f433SVinod Koul enable-method = "psci"; 116b7e8f433SVinod Koul next-level-cache = <&L2_400>; 117ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 11807ddb302SBjorn Andersson power-domains = <&CPU_PD4>; 11907ddb302SBjorn Andersson power-domain-names = "psci"; 12020f9d94eSRobert Foss #cooling-cells = <2>; 121b7e8f433SVinod Koul L2_400: l2-cache { 122b7e8f433SVinod Koul compatible = "cache"; 123b7e8f433SVinod Koul next-level-cache = <&L3_0>; 124b7e8f433SVinod Koul }; 125b7e8f433SVinod Koul }; 126b7e8f433SVinod Koul 127b7e8f433SVinod Koul CPU5: cpu@500 { 128b7e8f433SVinod Koul device_type = "cpu"; 129b7e8f433SVinod Koul compatible = "qcom,kryo685"; 130b7e8f433SVinod Koul reg = <0x0 0x500>; 131b7e8f433SVinod Koul enable-method = "psci"; 132b7e8f433SVinod Koul next-level-cache = <&L2_500>; 133ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 13407ddb302SBjorn Andersson power-domains = <&CPU_PD5>; 13507ddb302SBjorn Andersson power-domain-names = "psci"; 13620f9d94eSRobert Foss #cooling-cells = <2>; 137b7e8f433SVinod Koul L2_500: l2-cache { 138b7e8f433SVinod Koul compatible = "cache"; 139b7e8f433SVinod Koul next-level-cache = <&L3_0>; 140b7e8f433SVinod Koul }; 141b7e8f433SVinod Koul 142b7e8f433SVinod Koul }; 143b7e8f433SVinod Koul 144b7e8f433SVinod Koul CPU6: cpu@600 { 145b7e8f433SVinod Koul device_type = "cpu"; 146b7e8f433SVinod Koul compatible = "qcom,kryo685"; 147b7e8f433SVinod Koul reg = <0x0 0x600>; 148b7e8f433SVinod Koul enable-method = "psci"; 149b7e8f433SVinod Koul next-level-cache = <&L2_600>; 150ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 15107ddb302SBjorn Andersson power-domains = <&CPU_PD6>; 15207ddb302SBjorn Andersson power-domain-names = "psci"; 15320f9d94eSRobert Foss #cooling-cells = <2>; 154b7e8f433SVinod Koul L2_600: l2-cache { 155b7e8f433SVinod Koul compatible = "cache"; 156b7e8f433SVinod Koul next-level-cache = <&L3_0>; 157b7e8f433SVinod Koul }; 158b7e8f433SVinod Koul }; 159b7e8f433SVinod Koul 160b7e8f433SVinod Koul CPU7: cpu@700 { 161b7e8f433SVinod Koul device_type = "cpu"; 162b7e8f433SVinod Koul compatible = "qcom,kryo685"; 163b7e8f433SVinod Koul reg = <0x0 0x700>; 164b7e8f433SVinod Koul enable-method = "psci"; 165b7e8f433SVinod Koul next-level-cache = <&L2_700>; 166ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 2>; 16707ddb302SBjorn Andersson power-domains = <&CPU_PD7>; 16807ddb302SBjorn Andersson power-domain-names = "psci"; 16920f9d94eSRobert Foss #cooling-cells = <2>; 170b7e8f433SVinod Koul L2_700: l2-cache { 171b7e8f433SVinod Koul compatible = "cache"; 172b7e8f433SVinod Koul next-level-cache = <&L3_0>; 173b7e8f433SVinod Koul }; 174b7e8f433SVinod Koul }; 17507ddb302SBjorn Andersson 17607ddb302SBjorn Andersson cpu-map { 17707ddb302SBjorn Andersson cluster0 { 17807ddb302SBjorn Andersson core0 { 17907ddb302SBjorn Andersson cpu = <&CPU0>; 18007ddb302SBjorn Andersson }; 18107ddb302SBjorn Andersson 18207ddb302SBjorn Andersson core1 { 18307ddb302SBjorn Andersson cpu = <&CPU1>; 18407ddb302SBjorn Andersson }; 18507ddb302SBjorn Andersson 18607ddb302SBjorn Andersson core2 { 18707ddb302SBjorn Andersson cpu = <&CPU2>; 18807ddb302SBjorn Andersson }; 18907ddb302SBjorn Andersson 19007ddb302SBjorn Andersson core3 { 19107ddb302SBjorn Andersson cpu = <&CPU3>; 19207ddb302SBjorn Andersson }; 19307ddb302SBjorn Andersson 19407ddb302SBjorn Andersson core4 { 19507ddb302SBjorn Andersson cpu = <&CPU4>; 19607ddb302SBjorn Andersson }; 19707ddb302SBjorn Andersson 19807ddb302SBjorn Andersson core5 { 19907ddb302SBjorn Andersson cpu = <&CPU5>; 20007ddb302SBjorn Andersson }; 20107ddb302SBjorn Andersson 20207ddb302SBjorn Andersson core6 { 20307ddb302SBjorn Andersson cpu = <&CPU6>; 20407ddb302SBjorn Andersson }; 20507ddb302SBjorn Andersson 20607ddb302SBjorn Andersson core7 { 20707ddb302SBjorn Andersson cpu = <&CPU7>; 20807ddb302SBjorn Andersson }; 20907ddb302SBjorn Andersson }; 21007ddb302SBjorn Andersson }; 21107ddb302SBjorn Andersson 21207ddb302SBjorn Andersson idle-states { 21307ddb302SBjorn Andersson entry-method = "psci"; 21407ddb302SBjorn Andersson 21507ddb302SBjorn Andersson LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { 21607ddb302SBjorn Andersson compatible = "arm,idle-state"; 21707ddb302SBjorn Andersson idle-state-name = "silver-rail-power-collapse"; 21807ddb302SBjorn Andersson arm,psci-suspend-param = <0x40000004>; 21907ddb302SBjorn Andersson entry-latency-us = <355>; 22007ddb302SBjorn Andersson exit-latency-us = <909>; 22107ddb302SBjorn Andersson min-residency-us = <3934>; 22207ddb302SBjorn Andersson local-timer-stop; 22307ddb302SBjorn Andersson }; 22407ddb302SBjorn Andersson 22507ddb302SBjorn Andersson BIG_CPU_SLEEP_0: cpu-sleep-1-0 { 22607ddb302SBjorn Andersson compatible = "arm,idle-state"; 22707ddb302SBjorn Andersson idle-state-name = "gold-rail-power-collapse"; 22807ddb302SBjorn Andersson arm,psci-suspend-param = <0x40000004>; 22907ddb302SBjorn Andersson entry-latency-us = <241>; 23007ddb302SBjorn Andersson exit-latency-us = <1461>; 23107ddb302SBjorn Andersson min-residency-us = <4488>; 23207ddb302SBjorn Andersson local-timer-stop; 23307ddb302SBjorn Andersson }; 23407ddb302SBjorn Andersson }; 23507ddb302SBjorn Andersson 23607ddb302SBjorn Andersson domain-idle-states { 23707ddb302SBjorn Andersson CLUSTER_SLEEP_0: cluster-sleep-0 { 23807ddb302SBjorn Andersson compatible = "domain-idle-state"; 23907ddb302SBjorn Andersson idle-state-name = "cluster-power-collapse"; 24007ddb302SBjorn Andersson arm,psci-suspend-param = <0x4100c344>; 24107ddb302SBjorn Andersson entry-latency-us = <3263>; 24207ddb302SBjorn Andersson exit-latency-us = <6562>; 24307ddb302SBjorn Andersson min-residency-us = <9987>; 24407ddb302SBjorn Andersson local-timer-stop; 24507ddb302SBjorn Andersson }; 24607ddb302SBjorn Andersson }; 247b7e8f433SVinod Koul }; 248b7e8f433SVinod Koul 249b7e8f433SVinod Koul firmware { 250b7e8f433SVinod Koul scm: scm { 251b7e8f433SVinod Koul compatible = "qcom,scm-sm8350", "qcom,scm"; 252b7e8f433SVinod Koul #reset-cells = <1>; 253b7e8f433SVinod Koul }; 254b7e8f433SVinod Koul }; 255b7e8f433SVinod Koul 256b7e8f433SVinod Koul memory@80000000 { 257b7e8f433SVinod Koul device_type = "memory"; 258b7e8f433SVinod Koul /* We expect the bootloader to fill in the size */ 259b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x0>; 260b7e8f433SVinod Koul }; 261b7e8f433SVinod Koul 262b7e8f433SVinod Koul pmu { 263b7e8f433SVinod Koul compatible = "arm,armv8-pmuv3"; 264794d3e30SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 265b7e8f433SVinod Koul }; 266b7e8f433SVinod Koul 267b7e8f433SVinod Koul psci { 268b7e8f433SVinod Koul compatible = "arm,psci-1.0"; 269b7e8f433SVinod Koul method = "smc"; 27007ddb302SBjorn Andersson 27107ddb302SBjorn Andersson CPU_PD0: cpu0 { 27207ddb302SBjorn Andersson #power-domain-cells = <0>; 27307ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 27407ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 27507ddb302SBjorn Andersson }; 27607ddb302SBjorn Andersson 27707ddb302SBjorn Andersson CPU_PD1: cpu1 { 27807ddb302SBjorn Andersson #power-domain-cells = <0>; 27907ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 28007ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 28107ddb302SBjorn Andersson }; 28207ddb302SBjorn Andersson 28307ddb302SBjorn Andersson CPU_PD2: cpu2 { 28407ddb302SBjorn Andersson #power-domain-cells = <0>; 28507ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 28607ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 28707ddb302SBjorn Andersson }; 28807ddb302SBjorn Andersson 28907ddb302SBjorn Andersson CPU_PD3: cpu3 { 29007ddb302SBjorn Andersson #power-domain-cells = <0>; 29107ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 29207ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 29307ddb302SBjorn Andersson }; 29407ddb302SBjorn Andersson 29507ddb302SBjorn Andersson CPU_PD4: cpu4 { 29607ddb302SBjorn Andersson #power-domain-cells = <0>; 29707ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 29807ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 29907ddb302SBjorn Andersson }; 30007ddb302SBjorn Andersson 30107ddb302SBjorn Andersson CPU_PD5: cpu5 { 30207ddb302SBjorn Andersson #power-domain-cells = <0>; 30307ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 30407ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 30507ddb302SBjorn Andersson }; 30607ddb302SBjorn Andersson 30707ddb302SBjorn Andersson CPU_PD6: cpu6 { 30807ddb302SBjorn Andersson #power-domain-cells = <0>; 30907ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 31007ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 31107ddb302SBjorn Andersson }; 31207ddb302SBjorn Andersson 31307ddb302SBjorn Andersson CPU_PD7: cpu7 { 31407ddb302SBjorn Andersson #power-domain-cells = <0>; 31507ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 31607ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 31707ddb302SBjorn Andersson }; 31807ddb302SBjorn Andersson 31907ddb302SBjorn Andersson CLUSTER_PD: cpu-cluster0 { 32007ddb302SBjorn Andersson #power-domain-cells = <0>; 32107ddb302SBjorn Andersson domain-idle-states = <&CLUSTER_SLEEP_0>; 32207ddb302SBjorn Andersson }; 323b7e8f433SVinod Koul }; 324b7e8f433SVinod Koul 325b7e8f433SVinod Koul reserved_memory: reserved-memory { 326b7e8f433SVinod Koul #address-cells = <2>; 327b7e8f433SVinod Koul #size-cells = <2>; 328b7e8f433SVinod Koul ranges; 329b7e8f433SVinod Koul 330b7e8f433SVinod Koul hyp_mem: memory@80000000 { 331b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x600000>; 332b7e8f433SVinod Koul no-map; 333b7e8f433SVinod Koul }; 334b7e8f433SVinod Koul 335b7e8f433SVinod Koul xbl_aop_mem: memory@80700000 { 336b7e8f433SVinod Koul no-map; 337b7e8f433SVinod Koul reg = <0x0 0x80700000 0x0 0x160000>; 338b7e8f433SVinod Koul }; 339b7e8f433SVinod Koul 340b7e8f433SVinod Koul cmd_db: memory@80860000 { 341b7e8f433SVinod Koul compatible = "qcom,cmd-db"; 342b7e8f433SVinod Koul reg = <0x0 0x80860000 0x0 0x20000>; 343b7e8f433SVinod Koul no-map; 344b7e8f433SVinod Koul }; 345b7e8f433SVinod Koul 346b7e8f433SVinod Koul reserved_xbl_uefi_log: memory@80880000 { 347b7e8f433SVinod Koul reg = <0x0 0x80880000 0x0 0x14000>; 348b7e8f433SVinod Koul no-map; 349b7e8f433SVinod Koul }; 350b7e8f433SVinod Koul 351b7e8f433SVinod Koul smem_mem: memory@80900000 { 352b7e8f433SVinod Koul reg = <0x0 0x80900000 0x0 0x200000>; 353b7e8f433SVinod Koul no-map; 354b7e8f433SVinod Koul }; 355b7e8f433SVinod Koul 356b7e8f433SVinod Koul cpucp_fw_mem: memory@80b00000 { 357b7e8f433SVinod Koul reg = <0x0 0x80b00000 0x0 0x100000>; 358b7e8f433SVinod Koul no-map; 359b7e8f433SVinod Koul }; 360b7e8f433SVinod Koul 361b7e8f433SVinod Koul cdsp_secure_heap: memory@80c00000 { 362b7e8f433SVinod Koul reg = <0x0 0x80c00000 0x0 0x4600000>; 363b7e8f433SVinod Koul no-map; 364b7e8f433SVinod Koul }; 365b7e8f433SVinod Koul 366b7e8f433SVinod Koul pil_camera_mem: mmeory@85200000 { 367b7e8f433SVinod Koul reg = <0x0 0x85200000 0x0 0x500000>; 368b7e8f433SVinod Koul no-map; 369b7e8f433SVinod Koul }; 370b7e8f433SVinod Koul 371b7e8f433SVinod Koul pil_video_mem: memory@85700000 { 372b7e8f433SVinod Koul reg = <0x0 0x85700000 0x0 0x500000>; 373b7e8f433SVinod Koul no-map; 374b7e8f433SVinod Koul }; 375b7e8f433SVinod Koul 376b7e8f433SVinod Koul pil_cvp_mem: memory@85c00000 { 377b7e8f433SVinod Koul reg = <0x0 0x85c00000 0x0 0x500000>; 378b7e8f433SVinod Koul no-map; 379b7e8f433SVinod Koul }; 380b7e8f433SVinod Koul 381b7e8f433SVinod Koul pil_adsp_mem: memory@86100000 { 382b7e8f433SVinod Koul reg = <0x0 0x86100000 0x0 0x2100000>; 383b7e8f433SVinod Koul no-map; 384b7e8f433SVinod Koul }; 385b7e8f433SVinod Koul 386b7e8f433SVinod Koul pil_slpi_mem: memory@88200000 { 387b7e8f433SVinod Koul reg = <0x0 0x88200000 0x0 0x1500000>; 388b7e8f433SVinod Koul no-map; 389b7e8f433SVinod Koul }; 390b7e8f433SVinod Koul 391b7e8f433SVinod Koul pil_cdsp_mem: memory@89700000 { 392b7e8f433SVinod Koul reg = <0x0 0x89700000 0x0 0x1e00000>; 393b7e8f433SVinod Koul no-map; 394b7e8f433SVinod Koul }; 395b7e8f433SVinod Koul 396b7e8f433SVinod Koul pil_ipa_fw_mem: memory@8b500000 { 397b7e8f433SVinod Koul reg = <0x0 0x8b500000 0x0 0x10000>; 398b7e8f433SVinod Koul no-map; 399b7e8f433SVinod Koul }; 400b7e8f433SVinod Koul 401b7e8f433SVinod Koul pil_ipa_gsi_mem: memory@8b510000 { 402b7e8f433SVinod Koul reg = <0x0 0x8b510000 0x0 0xa000>; 403b7e8f433SVinod Koul no-map; 404b7e8f433SVinod Koul }; 405b7e8f433SVinod Koul 406b7e8f433SVinod Koul pil_gpu_mem: memory@8b51a000 { 407b7e8f433SVinod Koul reg = <0x0 0x8b51a000 0x0 0x2000>; 408b7e8f433SVinod Koul no-map; 409b7e8f433SVinod Koul }; 410b7e8f433SVinod Koul 411b7e8f433SVinod Koul pil_spss_mem: memory@8b600000 { 412b7e8f433SVinod Koul reg = <0x0 0x8b600000 0x0 0x100000>; 413b7e8f433SVinod Koul no-map; 414b7e8f433SVinod Koul }; 415b7e8f433SVinod Koul 416b7e8f433SVinod Koul pil_modem_mem: memory@8b800000 { 417b7e8f433SVinod Koul reg = <0x0 0x8b800000 0x0 0x10000000>; 418b7e8f433SVinod Koul no-map; 419b7e8f433SVinod Koul }; 420b7e8f433SVinod Koul 421774890c9SVinod Koul rmtfs_mem: memory@9b800000 { 422774890c9SVinod Koul compatible = "qcom,rmtfs-mem"; 423774890c9SVinod Koul reg = <0x0 0x9b800000 0x0 0x280000>; 424774890c9SVinod Koul no-map; 425774890c9SVinod Koul 426774890c9SVinod Koul qcom,client-id = <1>; 427774890c9SVinod Koul qcom,vmid = <15>; 428774890c9SVinod Koul }; 429774890c9SVinod Koul 430b7e8f433SVinod Koul hyp_reserved_mem: memory@d0000000 { 431b7e8f433SVinod Koul reg = <0x0 0xd0000000 0x0 0x800000>; 432b7e8f433SVinod Koul no-map; 433b7e8f433SVinod Koul }; 434b7e8f433SVinod Koul 435b7e8f433SVinod Koul pil_trustedvm_mem: memory@d0800000 { 436b7e8f433SVinod Koul reg = <0x0 0xd0800000 0x0 0x76f7000>; 437b7e8f433SVinod Koul no-map; 438b7e8f433SVinod Koul }; 439b7e8f433SVinod Koul 440b7e8f433SVinod Koul qrtr_shbuf: memory@d7ef7000 { 441b7e8f433SVinod Koul reg = <0x0 0xd7ef7000 0x0 0x9000>; 442b7e8f433SVinod Koul no-map; 443b7e8f433SVinod Koul }; 444b7e8f433SVinod Koul 445b7e8f433SVinod Koul chan0_shbuf: memory@d7f00000 { 446b7e8f433SVinod Koul reg = <0x0 0xd7f00000 0x0 0x80000>; 447b7e8f433SVinod Koul no-map; 448b7e8f433SVinod Koul }; 449b7e8f433SVinod Koul 450b7e8f433SVinod Koul chan1_shbuf: memory@d7f80000 { 451b7e8f433SVinod Koul reg = <0x0 0xd7f80000 0x0 0x80000>; 452b7e8f433SVinod Koul no-map; 453b7e8f433SVinod Koul }; 454b7e8f433SVinod Koul 455b7e8f433SVinod Koul removed_mem: memory@d8800000 { 456b7e8f433SVinod Koul reg = <0x0 0xd8800000 0x0 0x6800000>; 457b7e8f433SVinod Koul no-map; 458b7e8f433SVinod Koul }; 459b7e8f433SVinod Koul }; 460b7e8f433SVinod Koul 461b7e8f433SVinod Koul smem: qcom,smem { 462b7e8f433SVinod Koul compatible = "qcom,smem"; 463b7e8f433SVinod Koul memory-region = <&smem_mem>; 464b7e8f433SVinod Koul hwlocks = <&tcsr_mutex 3>; 465b7e8f433SVinod Koul }; 466b7e8f433SVinod Koul 46703a41991SVinod Koul smp2p-adsp { 46803a41991SVinod Koul compatible = "qcom,smp2p"; 46903a41991SVinod Koul qcom,smem = <443>, <429>; 47003a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 47103a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 47203a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 47303a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 47403a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 47503a41991SVinod Koul 47603a41991SVinod Koul qcom,local-pid = <0>; 47703a41991SVinod Koul qcom,remote-pid = <2>; 47803a41991SVinod Koul 47903a41991SVinod Koul smp2p_adsp_out: master-kernel { 48003a41991SVinod Koul qcom,entry-name = "master-kernel"; 48103a41991SVinod Koul #qcom,smem-state-cells = <1>; 48203a41991SVinod Koul }; 48303a41991SVinod Koul 48403a41991SVinod Koul smp2p_adsp_in: slave-kernel { 48503a41991SVinod Koul qcom,entry-name = "slave-kernel"; 48603a41991SVinod Koul interrupt-controller; 48703a41991SVinod Koul #interrupt-cells = <2>; 48803a41991SVinod Koul }; 48903a41991SVinod Koul }; 49003a41991SVinod Koul 49103a41991SVinod Koul smp2p-cdsp { 49203a41991SVinod Koul compatible = "qcom,smp2p"; 49303a41991SVinod Koul qcom,smem = <94>, <432>; 49403a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 49503a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 49603a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 49703a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 49803a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 49903a41991SVinod Koul 50003a41991SVinod Koul qcom,local-pid = <0>; 50103a41991SVinod Koul qcom,remote-pid = <5>; 50203a41991SVinod Koul 50303a41991SVinod Koul smp2p_cdsp_out: master-kernel { 50403a41991SVinod Koul qcom,entry-name = "master-kernel"; 50503a41991SVinod Koul #qcom,smem-state-cells = <1>; 50603a41991SVinod Koul }; 50703a41991SVinod Koul 50803a41991SVinod Koul smp2p_cdsp_in: slave-kernel { 50903a41991SVinod Koul qcom,entry-name = "slave-kernel"; 51003a41991SVinod Koul interrupt-controller; 51103a41991SVinod Koul #interrupt-cells = <2>; 51203a41991SVinod Koul }; 51303a41991SVinod Koul }; 51403a41991SVinod Koul 51503a41991SVinod Koul smp2p-modem { 51603a41991SVinod Koul compatible = "qcom,smp2p"; 51703a41991SVinod Koul qcom,smem = <435>, <428>; 51803a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 51903a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 52003a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 52103a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 52203a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 52303a41991SVinod Koul 52403a41991SVinod Koul qcom,local-pid = <0>; 52503a41991SVinod Koul qcom,remote-pid = <1>; 52603a41991SVinod Koul 52703a41991SVinod Koul smp2p_modem_out: master-kernel { 52803a41991SVinod Koul qcom,entry-name = "master-kernel"; 52903a41991SVinod Koul #qcom,smem-state-cells = <1>; 53003a41991SVinod Koul }; 53103a41991SVinod Koul 53203a41991SVinod Koul smp2p_modem_in: slave-kernel { 53303a41991SVinod Koul qcom,entry-name = "slave-kernel"; 53403a41991SVinod Koul interrupt-controller; 53503a41991SVinod Koul #interrupt-cells = <2>; 53603a41991SVinod Koul }; 537f11d3e7dSAlex Elder 538f11d3e7dSAlex Elder ipa_smp2p_out: ipa-ap-to-modem { 539f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 540f11d3e7dSAlex Elder #qcom,smem-state-cells = <1>; 541f11d3e7dSAlex Elder }; 542f11d3e7dSAlex Elder 543f11d3e7dSAlex Elder ipa_smp2p_in: ipa-modem-to-ap { 544f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 545f11d3e7dSAlex Elder interrupt-controller; 546f11d3e7dSAlex Elder #interrupt-cells = <2>; 547f11d3e7dSAlex Elder }; 54803a41991SVinod Koul }; 54903a41991SVinod Koul 55003a41991SVinod Koul smp2p-slpi { 55103a41991SVinod Koul compatible = "qcom,smp2p"; 55203a41991SVinod Koul qcom,smem = <481>, <430>; 55303a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 55403a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 55503a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 55603a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 55703a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 55803a41991SVinod Koul 55903a41991SVinod Koul qcom,local-pid = <0>; 56003a41991SVinod Koul qcom,remote-pid = <3>; 56103a41991SVinod Koul 56203a41991SVinod Koul smp2p_slpi_out: master-kernel { 56303a41991SVinod Koul qcom,entry-name = "master-kernel"; 56403a41991SVinod Koul #qcom,smem-state-cells = <1>; 56503a41991SVinod Koul }; 56603a41991SVinod Koul 56703a41991SVinod Koul smp2p_slpi_in: slave-kernel { 56803a41991SVinod Koul qcom,entry-name = "slave-kernel"; 56903a41991SVinod Koul interrupt-controller; 57003a41991SVinod Koul #interrupt-cells = <2>; 57103a41991SVinod Koul }; 57203a41991SVinod Koul }; 57303a41991SVinod Koul 574b7e8f433SVinod Koul soc: soc@0 { 575b7e8f433SVinod Koul #address-cells = <2>; 576b7e8f433SVinod Koul #size-cells = <2>; 577b7e8f433SVinod Koul ranges = <0 0 0 0 0x10 0>; 578b7e8f433SVinod Koul dma-ranges = <0 0 0 0 0x10 0>; 579b7e8f433SVinod Koul compatible = "simple-bus"; 580b7e8f433SVinod Koul 581b7e8f433SVinod Koul gcc: clock-controller@100000 { 582b7e8f433SVinod Koul compatible = "qcom,gcc-sm8350"; 583b7e8f433SVinod Koul reg = <0x0 0x00100000 0x0 0x1f0000>; 584b7e8f433SVinod Koul #clock-cells = <1>; 585b7e8f433SVinod Koul #reset-cells = <1>; 586b7e8f433SVinod Koul #power-domain-cells = <1>; 5879ea9eb36SKonrad Dybcio clock-names = "bi_tcxo", 5889ea9eb36SKonrad Dybcio "sleep_clk", 5899ea9eb36SKonrad Dybcio "pcie_0_pipe_clk", 5909ea9eb36SKonrad Dybcio "pcie_1_pipe_clk", 5919ea9eb36SKonrad Dybcio "ufs_card_rx_symbol_0_clk", 5929ea9eb36SKonrad Dybcio "ufs_card_rx_symbol_1_clk", 5939ea9eb36SKonrad Dybcio "ufs_card_tx_symbol_0_clk", 5949ea9eb36SKonrad Dybcio "ufs_phy_rx_symbol_0_clk", 5959ea9eb36SKonrad Dybcio "ufs_phy_rx_symbol_1_clk", 5969ea9eb36SKonrad Dybcio "ufs_phy_tx_symbol_0_clk", 5979ea9eb36SKonrad Dybcio "usb3_phy_wrapper_gcc_usb30_pipe_clk", 5989ea9eb36SKonrad Dybcio "usb3_uni_phy_sec_gcc_usb30_pipe_clk"; 5999ea9eb36SKonrad Dybcio clocks = <&rpmhcc RPMH_CXO_CLK>, 6009ea9eb36SKonrad Dybcio <&sleep_clk>, 6019ea9eb36SKonrad Dybcio <0>, 6029ea9eb36SKonrad Dybcio <0>, 6039ea9eb36SKonrad Dybcio <0>, 6049ea9eb36SKonrad Dybcio <0>, 6059ea9eb36SKonrad Dybcio <0>, 6069ea9eb36SKonrad Dybcio <0>, 6079ea9eb36SKonrad Dybcio <0>, 6089ea9eb36SKonrad Dybcio <0>, 6099ea9eb36SKonrad Dybcio <0>, 6109ea9eb36SKonrad Dybcio <0>; 611b7e8f433SVinod Koul }; 612b7e8f433SVinod Koul 613b7e8f433SVinod Koul ipcc: mailbox@408000 { 614b7e8f433SVinod Koul compatible = "qcom,sm8350-ipcc", "qcom,ipcc"; 615b7e8f433SVinod Koul reg = <0 0x00408000 0 0x1000>; 616b7e8f433SVinod Koul interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 617b7e8f433SVinod Koul interrupt-controller; 618b7e8f433SVinod Koul #interrupt-cells = <3>; 619b7e8f433SVinod Koul #mbox-cells = <2>; 620b7e8f433SVinod Koul }; 621b7e8f433SVinod Koul 622cf03cd7eSKonrad Dybcio qup_opp_table_100mhz: qup-100mhz-opp-table { 623cf03cd7eSKonrad Dybcio compatible = "operating-points-v2"; 624cf03cd7eSKonrad Dybcio 625cf03cd7eSKonrad Dybcio opp-50000000 { 626cf03cd7eSKonrad Dybcio opp-hz = /bits/ 64 <50000000>; 627cf03cd7eSKonrad Dybcio required-opps = <&rpmhpd_opp_min_svs>; 628cf03cd7eSKonrad Dybcio }; 629cf03cd7eSKonrad Dybcio 630cf03cd7eSKonrad Dybcio opp-75000000 { 631cf03cd7eSKonrad Dybcio opp-hz = /bits/ 64 <75000000>; 632cf03cd7eSKonrad Dybcio required-opps = <&rpmhpd_opp_low_svs>; 633cf03cd7eSKonrad Dybcio }; 634cf03cd7eSKonrad Dybcio 635cf03cd7eSKonrad Dybcio opp-100000000 { 636cf03cd7eSKonrad Dybcio opp-hz = /bits/ 64 <100000000>; 637cf03cd7eSKonrad Dybcio required-opps = <&rpmhpd_opp_svs>; 638cf03cd7eSKonrad Dybcio }; 639cf03cd7eSKonrad Dybcio }; 640cf03cd7eSKonrad Dybcio 64189345355SKonrad Dybcio qup_opp_table_120mhz: qup-120mhz-opp-table { 64289345355SKonrad Dybcio compatible = "operating-points-v2"; 64389345355SKonrad Dybcio 64489345355SKonrad Dybcio opp-50000000 { 64589345355SKonrad Dybcio opp-hz = /bits/ 64 <50000000>; 64689345355SKonrad Dybcio required-opps = <&rpmhpd_opp_min_svs>; 64789345355SKonrad Dybcio }; 64889345355SKonrad Dybcio 64989345355SKonrad Dybcio opp-75000000 { 65089345355SKonrad Dybcio opp-hz = /bits/ 64 <75000000>; 65189345355SKonrad Dybcio required-opps = <&rpmhpd_opp_low_svs>; 65289345355SKonrad Dybcio }; 65389345355SKonrad Dybcio 65489345355SKonrad Dybcio opp-120000000 { 65589345355SKonrad Dybcio opp-hz = /bits/ 64 <120000000>; 65689345355SKonrad Dybcio required-opps = <&rpmhpd_opp_svs>; 65789345355SKonrad Dybcio }; 65889345355SKonrad Dybcio }; 65989345355SKonrad Dybcio 660e84d04a2SKonrad Dybcio qupv3_id_2: geniqup@8c0000 { 661e84d04a2SKonrad Dybcio compatible = "qcom,geni-se-qup"; 662e84d04a2SKonrad Dybcio reg = <0x0 0x008c0000 0x0 0x6000>; 663e84d04a2SKonrad Dybcio clock-names = "m-ahb", "s-ahb"; 664e84d04a2SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 665e84d04a2SKonrad Dybcio <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 6669bc2c8feSKonrad Dybcio iommus = <&apps_smmu 0x5e3 0x0>; 667e84d04a2SKonrad Dybcio #address-cells = <2>; 668e84d04a2SKonrad Dybcio #size-cells = <2>; 669e84d04a2SKonrad Dybcio ranges; 670e84d04a2SKonrad Dybcio status = "disabled"; 67198374e69SKonrad Dybcio 67298374e69SKonrad Dybcio i2c14: i2c@880000 { 67398374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 67498374e69SKonrad Dybcio reg = <0 0x00880000 0 0x4000>; 67598374e69SKonrad Dybcio clock-names = "se"; 67698374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 67798374e69SKonrad Dybcio pinctrl-names = "default"; 67898374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c14_default>; 67998374e69SKonrad Dybcio interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 68098374e69SKonrad Dybcio #address-cells = <1>; 68198374e69SKonrad Dybcio #size-cells = <0>; 68298374e69SKonrad Dybcio status = "disabled"; 68398374e69SKonrad Dybcio }; 68498374e69SKonrad Dybcio 68598374e69SKonrad Dybcio spi14: spi@880000 { 68698374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 68798374e69SKonrad Dybcio reg = <0 0x00880000 0 0x4000>; 68898374e69SKonrad Dybcio clock-names = "se"; 68998374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 69098374e69SKonrad Dybcio interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 69198374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 69298374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_120mhz>; 69398374e69SKonrad Dybcio #address-cells = <1>; 69498374e69SKonrad Dybcio #size-cells = <0>; 69598374e69SKonrad Dybcio status = "disabled"; 69698374e69SKonrad Dybcio }; 69798374e69SKonrad Dybcio 69898374e69SKonrad Dybcio i2c15: i2c@884000 { 69998374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 70098374e69SKonrad Dybcio reg = <0 0x00884000 0 0x4000>; 70198374e69SKonrad Dybcio clock-names = "se"; 70298374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 70398374e69SKonrad Dybcio pinctrl-names = "default"; 70498374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c15_default>; 70598374e69SKonrad Dybcio interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 70698374e69SKonrad Dybcio #address-cells = <1>; 70798374e69SKonrad Dybcio #size-cells = <0>; 70898374e69SKonrad Dybcio status = "disabled"; 70998374e69SKonrad Dybcio }; 71098374e69SKonrad Dybcio 71198374e69SKonrad Dybcio spi15: spi@884000 { 71298374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 71398374e69SKonrad Dybcio reg = <0 0x00884000 0 0x4000>; 71498374e69SKonrad Dybcio clock-names = "se"; 71598374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 71698374e69SKonrad Dybcio interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 71798374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 71898374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_120mhz>; 71998374e69SKonrad Dybcio #address-cells = <1>; 72098374e69SKonrad Dybcio #size-cells = <0>; 72198374e69SKonrad Dybcio status = "disabled"; 72298374e69SKonrad Dybcio }; 72398374e69SKonrad Dybcio 72498374e69SKonrad Dybcio i2c16: i2c@888000 { 72598374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 72698374e69SKonrad Dybcio reg = <0 0x00888000 0 0x4000>; 72798374e69SKonrad Dybcio clock-names = "se"; 72898374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 72998374e69SKonrad Dybcio pinctrl-names = "default"; 73098374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c16_default>; 73198374e69SKonrad Dybcio interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 73298374e69SKonrad Dybcio #address-cells = <1>; 73398374e69SKonrad Dybcio #size-cells = <0>; 73498374e69SKonrad Dybcio status = "disabled"; 73598374e69SKonrad Dybcio }; 73698374e69SKonrad Dybcio 73798374e69SKonrad Dybcio spi16: spi@888000 { 73898374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 73998374e69SKonrad Dybcio reg = <0 0x00888000 0 0x4000>; 74098374e69SKonrad Dybcio clock-names = "se"; 74198374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 74298374e69SKonrad Dybcio interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 74398374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 74498374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 74598374e69SKonrad Dybcio #address-cells = <1>; 74698374e69SKonrad Dybcio #size-cells = <0>; 74798374e69SKonrad Dybcio status = "disabled"; 74898374e69SKonrad Dybcio }; 74998374e69SKonrad Dybcio 75098374e69SKonrad Dybcio i2c17: i2c@88c000 { 75198374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 75298374e69SKonrad Dybcio reg = <0 0x0088c000 0 0x4000>; 75398374e69SKonrad Dybcio clock-names = "se"; 75498374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 75598374e69SKonrad Dybcio pinctrl-names = "default"; 75698374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c17_default>; 75798374e69SKonrad Dybcio interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 75898374e69SKonrad Dybcio #address-cells = <1>; 75998374e69SKonrad Dybcio #size-cells = <0>; 76098374e69SKonrad Dybcio status = "disabled"; 76198374e69SKonrad Dybcio }; 76298374e69SKonrad Dybcio 76398374e69SKonrad Dybcio spi17: spi@88c000 { 76498374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 76598374e69SKonrad Dybcio reg = <0 0x0088c000 0 0x4000>; 76698374e69SKonrad Dybcio clock-names = "se"; 76798374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 76898374e69SKonrad Dybcio interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 76998374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 77098374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 77198374e69SKonrad Dybcio #address-cells = <1>; 77298374e69SKonrad Dybcio #size-cells = <0>; 77398374e69SKonrad Dybcio status = "disabled"; 77498374e69SKonrad Dybcio }; 77598374e69SKonrad Dybcio 77698374e69SKonrad Dybcio /* QUP no. 18 seems to be strictly SPI/UART-only */ 77798374e69SKonrad Dybcio 77898374e69SKonrad Dybcio spi18: spi@890000 { 77998374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 78098374e69SKonrad Dybcio reg = <0 0x00890000 0 0x4000>; 78198374e69SKonrad Dybcio clock-names = "se"; 78298374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 78398374e69SKonrad Dybcio interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 78498374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 78598374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 78698374e69SKonrad Dybcio #address-cells = <1>; 78798374e69SKonrad Dybcio #size-cells = <0>; 78898374e69SKonrad Dybcio status = "disabled"; 78998374e69SKonrad Dybcio }; 79098374e69SKonrad Dybcio 79198374e69SKonrad Dybcio uart18: serial@890000 { 79298374e69SKonrad Dybcio compatible = "qcom,geni-uart"; 79398374e69SKonrad Dybcio reg = <0 0x00890000 0 0x4000>; 79498374e69SKonrad Dybcio clock-names = "se"; 79598374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 79698374e69SKonrad Dybcio pinctrl-names = "default"; 79798374e69SKonrad Dybcio pinctrl-0 = <&qup_uart18_default>; 79898374e69SKonrad Dybcio interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 79998374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 80098374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 80198374e69SKonrad Dybcio status = "disabled"; 80298374e69SKonrad Dybcio }; 80398374e69SKonrad Dybcio 80498374e69SKonrad Dybcio i2c19: i2c@894000 { 80598374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 80698374e69SKonrad Dybcio reg = <0 0x00894000 0 0x4000>; 80798374e69SKonrad Dybcio clock-names = "se"; 80898374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 80998374e69SKonrad Dybcio pinctrl-names = "default"; 81098374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c19_default>; 81198374e69SKonrad Dybcio interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 81298374e69SKonrad Dybcio #address-cells = <1>; 81398374e69SKonrad Dybcio #size-cells = <0>; 81498374e69SKonrad Dybcio status = "disabled"; 81598374e69SKonrad Dybcio }; 81698374e69SKonrad Dybcio 81798374e69SKonrad Dybcio spi19: spi@894000 { 81898374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 81998374e69SKonrad Dybcio reg = <0 0x00894000 0 0x4000>; 82098374e69SKonrad Dybcio clock-names = "se"; 82198374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 82298374e69SKonrad Dybcio interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 82398374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 82498374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 82598374e69SKonrad Dybcio #address-cells = <1>; 82698374e69SKonrad Dybcio #size-cells = <0>; 82798374e69SKonrad Dybcio status = "disabled"; 82898374e69SKonrad Dybcio }; 829e84d04a2SKonrad Dybcio }; 830e84d04a2SKonrad Dybcio 83187f0b434SRobert Foss qupv3_id_0: geniqup@9c0000 { 832b7e8f433SVinod Koul compatible = "qcom,geni-se-qup"; 833b7e8f433SVinod Koul reg = <0x0 0x009c0000 0x0 0x6000>; 834b7e8f433SVinod Koul clock-names = "m-ahb", "s-ahb"; 8356d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 8366d91e201SVinod Koul <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 8379bc2c8feSKonrad Dybcio iommus = <&apps_smmu 0x5a3 0>; 838b7e8f433SVinod Koul #address-cells = <2>; 839b7e8f433SVinod Koul #size-cells = <2>; 840b7e8f433SVinod Koul ranges; 841b7e8f433SVinod Koul status = "disabled"; 842b7e8f433SVinod Koul 843cf03cd7eSKonrad Dybcio i2c0: i2c@980000 { 844cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 845cf03cd7eSKonrad Dybcio reg = <0 0x00980000 0 0x4000>; 846cf03cd7eSKonrad Dybcio clock-names = "se"; 847cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 848cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 849cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c0_default>; 850cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 851cf03cd7eSKonrad Dybcio #address-cells = <1>; 852cf03cd7eSKonrad Dybcio #size-cells = <0>; 853cf03cd7eSKonrad Dybcio status = "disabled"; 854cf03cd7eSKonrad Dybcio }; 855cf03cd7eSKonrad Dybcio 856cf03cd7eSKonrad Dybcio spi0: spi@980000 { 857cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 858cf03cd7eSKonrad Dybcio reg = <0 0x00980000 0 0x4000>; 859cf03cd7eSKonrad Dybcio clock-names = "se"; 860cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 861cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 862cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 863cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 864cf03cd7eSKonrad Dybcio #address-cells = <1>; 865cf03cd7eSKonrad Dybcio #size-cells = <0>; 866cf03cd7eSKonrad Dybcio status = "disabled"; 867cf03cd7eSKonrad Dybcio }; 868cf03cd7eSKonrad Dybcio 869cf03cd7eSKonrad Dybcio i2c1: i2c@984000 { 870cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 871cf03cd7eSKonrad Dybcio reg = <0 0x00984000 0 0x4000>; 872cf03cd7eSKonrad Dybcio clock-names = "se"; 873cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 874cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 875cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c1_default>; 876cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 877cf03cd7eSKonrad Dybcio #address-cells = <1>; 878cf03cd7eSKonrad Dybcio #size-cells = <0>; 879cf03cd7eSKonrad Dybcio status = "disabled"; 880cf03cd7eSKonrad Dybcio }; 881cf03cd7eSKonrad Dybcio 882cf03cd7eSKonrad Dybcio spi1: spi@984000 { 883cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 884cf03cd7eSKonrad Dybcio reg = <0 0x00984000 0 0x4000>; 885cf03cd7eSKonrad Dybcio clock-names = "se"; 886cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 887cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 888cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 889cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 890cf03cd7eSKonrad Dybcio #address-cells = <1>; 891cf03cd7eSKonrad Dybcio #size-cells = <0>; 892cf03cd7eSKonrad Dybcio status = "disabled"; 893cf03cd7eSKonrad Dybcio }; 894cf03cd7eSKonrad Dybcio 895cf03cd7eSKonrad Dybcio i2c2: i2c@988000 { 896cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 897cf03cd7eSKonrad Dybcio reg = <0 0x00988000 0 0x4000>; 898cf03cd7eSKonrad Dybcio clock-names = "se"; 899cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 900cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 901cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c2_default>; 902cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 903cf03cd7eSKonrad Dybcio #address-cells = <1>; 904cf03cd7eSKonrad Dybcio #size-cells = <0>; 905cf03cd7eSKonrad Dybcio status = "disabled"; 906cf03cd7eSKonrad Dybcio }; 907cf03cd7eSKonrad Dybcio 908cf03cd7eSKonrad Dybcio spi2: spi@988000 { 909cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 910cf03cd7eSKonrad Dybcio reg = <0 0x00988000 0 0x4000>; 911cf03cd7eSKonrad Dybcio clock-names = "se"; 912cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 913cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 914cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 915cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 916cf03cd7eSKonrad Dybcio #address-cells = <1>; 917cf03cd7eSKonrad Dybcio #size-cells = <0>; 918cf03cd7eSKonrad Dybcio status = "disabled"; 919cf03cd7eSKonrad Dybcio }; 920cf03cd7eSKonrad Dybcio 921b7e8f433SVinod Koul uart2: serial@98c000 { 922b7e8f433SVinod Koul compatible = "qcom,geni-debug-uart"; 923b7e8f433SVinod Koul reg = <0 0x0098c000 0 0x4000>; 924b7e8f433SVinod Koul clock-names = "se"; 9256d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 926b7e8f433SVinod Koul pinctrl-names = "default"; 927b7e8f433SVinod Koul pinctrl-0 = <&qup_uart3_default_state>; 928b7e8f433SVinod Koul interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 929cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 930cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 931cf03cd7eSKonrad Dybcio #address-cells = <1>; 932cf03cd7eSKonrad Dybcio #size-cells = <0>; 933cf03cd7eSKonrad Dybcio status = "disabled"; 934cf03cd7eSKonrad Dybcio }; 935cf03cd7eSKonrad Dybcio 936cf03cd7eSKonrad Dybcio /* QUP no. 3 seems to be strictly SPI-only */ 937cf03cd7eSKonrad Dybcio 938cf03cd7eSKonrad Dybcio spi3: spi@98c000 { 939cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 940cf03cd7eSKonrad Dybcio reg = <0 0x0098c000 0 0x4000>; 941cf03cd7eSKonrad Dybcio clock-names = "se"; 942cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 943cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 944cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 945cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 946cf03cd7eSKonrad Dybcio #address-cells = <1>; 947cf03cd7eSKonrad Dybcio #size-cells = <0>; 948cf03cd7eSKonrad Dybcio status = "disabled"; 949cf03cd7eSKonrad Dybcio }; 950cf03cd7eSKonrad Dybcio 951cf03cd7eSKonrad Dybcio i2c4: i2c@990000 { 952cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 953cf03cd7eSKonrad Dybcio reg = <0 0x00990000 0 0x4000>; 954cf03cd7eSKonrad Dybcio clock-names = "se"; 955cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 956cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 957cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c4_default>; 958cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 959cf03cd7eSKonrad Dybcio #address-cells = <1>; 960cf03cd7eSKonrad Dybcio #size-cells = <0>; 961cf03cd7eSKonrad Dybcio status = "disabled"; 962cf03cd7eSKonrad Dybcio }; 963cf03cd7eSKonrad Dybcio 964cf03cd7eSKonrad Dybcio spi4: spi@990000 { 965cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 966cf03cd7eSKonrad Dybcio reg = <0 0x00990000 0 0x4000>; 967cf03cd7eSKonrad Dybcio clock-names = "se"; 968cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 969cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 970cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 971cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 972cf03cd7eSKonrad Dybcio #address-cells = <1>; 973cf03cd7eSKonrad Dybcio #size-cells = <0>; 974cf03cd7eSKonrad Dybcio status = "disabled"; 975cf03cd7eSKonrad Dybcio }; 976cf03cd7eSKonrad Dybcio 977cf03cd7eSKonrad Dybcio i2c5: i2c@994000 { 978cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 979cf03cd7eSKonrad Dybcio reg = <0 0x00994000 0 0x4000>; 980cf03cd7eSKonrad Dybcio clock-names = "se"; 981cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 982cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 983cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c5_default>; 984cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 985cf03cd7eSKonrad Dybcio #address-cells = <1>; 986cf03cd7eSKonrad Dybcio #size-cells = <0>; 987cf03cd7eSKonrad Dybcio status = "disabled"; 988cf03cd7eSKonrad Dybcio }; 989cf03cd7eSKonrad Dybcio 990cf03cd7eSKonrad Dybcio spi5: spi@994000 { 991cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 992cf03cd7eSKonrad Dybcio reg = <0 0x00994000 0 0x4000>; 993cf03cd7eSKonrad Dybcio clock-names = "se"; 994cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 995cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 996cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 997cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 998cf03cd7eSKonrad Dybcio #address-cells = <1>; 999cf03cd7eSKonrad Dybcio #size-cells = <0>; 1000cf03cd7eSKonrad Dybcio status = "disabled"; 1001cf03cd7eSKonrad Dybcio }; 1002cf03cd7eSKonrad Dybcio 1003cf03cd7eSKonrad Dybcio i2c6: i2c@998000 { 1004cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 1005cf03cd7eSKonrad Dybcio reg = <0 0x00998000 0 0x4000>; 1006cf03cd7eSKonrad Dybcio clock-names = "se"; 1007cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1008cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1009cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c6_default>; 1010cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 1011cf03cd7eSKonrad Dybcio #address-cells = <1>; 1012cf03cd7eSKonrad Dybcio #size-cells = <0>; 1013cf03cd7eSKonrad Dybcio status = "disabled"; 1014cf03cd7eSKonrad Dybcio }; 1015cf03cd7eSKonrad Dybcio 1016cf03cd7eSKonrad Dybcio spi6: spi@998000 { 1017cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1018cf03cd7eSKonrad Dybcio reg = <0 0x00998000 0 0x4000>; 1019cf03cd7eSKonrad Dybcio clock-names = "se"; 1020cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1021cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 1022cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1023cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1024cf03cd7eSKonrad Dybcio #address-cells = <1>; 1025cf03cd7eSKonrad Dybcio #size-cells = <0>; 1026cf03cd7eSKonrad Dybcio status = "disabled"; 1027cf03cd7eSKonrad Dybcio }; 1028cf03cd7eSKonrad Dybcio 1029cf03cd7eSKonrad Dybcio uart6: serial@998000 { 1030cf03cd7eSKonrad Dybcio compatible = "qcom,geni-uart"; 1031cf03cd7eSKonrad Dybcio reg = <0 0x00998000 0 0x4000>; 1032cf03cd7eSKonrad Dybcio clock-names = "se"; 1033cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1034cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1035cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_uart6_default>; 1036cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 1037cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1038cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1039cf03cd7eSKonrad Dybcio status = "disabled"; 1040cf03cd7eSKonrad Dybcio }; 1041cf03cd7eSKonrad Dybcio 1042cf03cd7eSKonrad Dybcio i2c7: i2c@99c000 { 1043cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 1044cf03cd7eSKonrad Dybcio reg = <0 0x0099c000 0 0x4000>; 1045cf03cd7eSKonrad Dybcio clock-names = "se"; 1046cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1047cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1048cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c7_default>; 1049cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 1050cf03cd7eSKonrad Dybcio #address-cells = <1>; 1051cf03cd7eSKonrad Dybcio #size-cells = <0>; 1052cf03cd7eSKonrad Dybcio status = "disabled"; 1053cf03cd7eSKonrad Dybcio }; 1054cf03cd7eSKonrad Dybcio 1055cf03cd7eSKonrad Dybcio spi7: spi@99c000 { 1056cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1057cf03cd7eSKonrad Dybcio reg = <0 0x0099c000 0 0x4000>; 1058cf03cd7eSKonrad Dybcio clock-names = "se"; 1059cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1060cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 1061cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1062cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1063b7e8f433SVinod Koul #address-cells = <1>; 1064b7e8f433SVinod Koul #size-cells = <0>; 1065b7e8f433SVinod Koul status = "disabled"; 1066b7e8f433SVinod Koul }; 1067b7e8f433SVinod Koul }; 1068b7e8f433SVinod Koul 106906bf656eSJonathan Marek qupv3_id_1: geniqup@ac0000 { 107006bf656eSJonathan Marek compatible = "qcom,geni-se-qup"; 107106bf656eSJonathan Marek reg = <0x0 0x00ac0000 0x0 0x6000>; 107206bf656eSJonathan Marek clock-names = "m-ahb", "s-ahb"; 107306bf656eSJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 107406bf656eSJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 10759bc2c8feSKonrad Dybcio iommus = <&apps_smmu 0x43 0>; 107606bf656eSJonathan Marek #address-cells = <2>; 107706bf656eSJonathan Marek #size-cells = <2>; 107806bf656eSJonathan Marek ranges; 107906bf656eSJonathan Marek status = "disabled"; 108006bf656eSJonathan Marek 108189345355SKonrad Dybcio i2c8: i2c@a80000 { 108289345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 108389345355SKonrad Dybcio reg = <0 0x00a80000 0 0x4000>; 108489345355SKonrad Dybcio clock-names = "se"; 108589345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 108689345355SKonrad Dybcio pinctrl-names = "default"; 108789345355SKonrad Dybcio pinctrl-0 = <&qup_i2c8_default>; 108889345355SKonrad Dybcio interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 108989345355SKonrad Dybcio #address-cells = <1>; 109089345355SKonrad Dybcio #size-cells = <0>; 109189345355SKonrad Dybcio status = "disabled"; 109289345355SKonrad Dybcio }; 109389345355SKonrad Dybcio 109489345355SKonrad Dybcio spi8: spi@a80000 { 109589345355SKonrad Dybcio compatible = "qcom,geni-spi"; 109689345355SKonrad Dybcio reg = <0 0x00a80000 0 0x4000>; 109789345355SKonrad Dybcio clock-names = "se"; 109889345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 109989345355SKonrad Dybcio interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 110089345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 110189345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_120mhz>; 110289345355SKonrad Dybcio #address-cells = <1>; 110389345355SKonrad Dybcio #size-cells = <0>; 110489345355SKonrad Dybcio status = "disabled"; 110589345355SKonrad Dybcio }; 110689345355SKonrad Dybcio 110789345355SKonrad Dybcio i2c9: i2c@a84000 { 110889345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 110989345355SKonrad Dybcio reg = <0 0x00a84000 0 0x4000>; 111089345355SKonrad Dybcio clock-names = "se"; 111189345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 111289345355SKonrad Dybcio pinctrl-names = "default"; 111389345355SKonrad Dybcio pinctrl-0 = <&qup_i2c9_default>; 111489345355SKonrad Dybcio interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 111589345355SKonrad Dybcio #address-cells = <1>; 111689345355SKonrad Dybcio #size-cells = <0>; 111789345355SKonrad Dybcio status = "disabled"; 111889345355SKonrad Dybcio }; 111989345355SKonrad Dybcio 112089345355SKonrad Dybcio spi9: spi@a84000 { 112189345355SKonrad Dybcio compatible = "qcom,geni-spi"; 112289345355SKonrad Dybcio reg = <0 0x00a84000 0 0x4000>; 112389345355SKonrad Dybcio clock-names = "se"; 112489345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 112589345355SKonrad Dybcio interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 112689345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 112789345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 112889345355SKonrad Dybcio #address-cells = <1>; 112989345355SKonrad Dybcio #size-cells = <0>; 113089345355SKonrad Dybcio status = "disabled"; 113189345355SKonrad Dybcio }; 113289345355SKonrad Dybcio 113389345355SKonrad Dybcio i2c10: i2c@a88000 { 113489345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 113589345355SKonrad Dybcio reg = <0 0x00a88000 0 0x4000>; 113689345355SKonrad Dybcio clock-names = "se"; 113789345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 113889345355SKonrad Dybcio pinctrl-names = "default"; 113989345355SKonrad Dybcio pinctrl-0 = <&qup_i2c10_default>; 114089345355SKonrad Dybcio interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 114189345355SKonrad Dybcio #address-cells = <1>; 114289345355SKonrad Dybcio #size-cells = <0>; 114389345355SKonrad Dybcio status = "disabled"; 114489345355SKonrad Dybcio }; 114589345355SKonrad Dybcio 114689345355SKonrad Dybcio spi10: spi@a88000 { 114789345355SKonrad Dybcio compatible = "qcom,geni-spi"; 114889345355SKonrad Dybcio reg = <0 0x00a88000 0 0x4000>; 114989345355SKonrad Dybcio clock-names = "se"; 115089345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 115189345355SKonrad Dybcio interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 115289345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 115389345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 115489345355SKonrad Dybcio #address-cells = <1>; 115589345355SKonrad Dybcio #size-cells = <0>; 115689345355SKonrad Dybcio status = "disabled"; 115789345355SKonrad Dybcio }; 115889345355SKonrad Dybcio 115989345355SKonrad Dybcio i2c11: i2c@a8c000 { 116089345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 116189345355SKonrad Dybcio reg = <0 0x00a8c000 0 0x4000>; 116289345355SKonrad Dybcio clock-names = "se"; 116389345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 116489345355SKonrad Dybcio pinctrl-names = "default"; 116589345355SKonrad Dybcio pinctrl-0 = <&qup_i2c11_default>; 116689345355SKonrad Dybcio interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 116789345355SKonrad Dybcio #address-cells = <1>; 116889345355SKonrad Dybcio #size-cells = <0>; 116989345355SKonrad Dybcio status = "disabled"; 117089345355SKonrad Dybcio }; 117189345355SKonrad Dybcio 117289345355SKonrad Dybcio spi11: spi@a8c000 { 117389345355SKonrad Dybcio compatible = "qcom,geni-spi"; 117489345355SKonrad Dybcio reg = <0 0x00a8c000 0 0x4000>; 117589345355SKonrad Dybcio clock-names = "se"; 117689345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 117789345355SKonrad Dybcio interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 117889345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 117989345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 118089345355SKonrad Dybcio #address-cells = <1>; 118189345355SKonrad Dybcio #size-cells = <0>; 118289345355SKonrad Dybcio status = "disabled"; 118389345355SKonrad Dybcio }; 118489345355SKonrad Dybcio 118589345355SKonrad Dybcio i2c12: i2c@a90000 { 118689345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 118789345355SKonrad Dybcio reg = <0 0x00a90000 0 0x4000>; 118889345355SKonrad Dybcio clock-names = "se"; 118989345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 119089345355SKonrad Dybcio pinctrl-names = "default"; 119189345355SKonrad Dybcio pinctrl-0 = <&qup_i2c12_default>; 119289345355SKonrad Dybcio interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 119389345355SKonrad Dybcio #address-cells = <1>; 119489345355SKonrad Dybcio #size-cells = <0>; 119589345355SKonrad Dybcio status = "disabled"; 119689345355SKonrad Dybcio }; 119789345355SKonrad Dybcio 119889345355SKonrad Dybcio spi12: spi@a90000 { 119989345355SKonrad Dybcio compatible = "qcom,geni-spi"; 120089345355SKonrad Dybcio reg = <0 0x00a90000 0 0x4000>; 120189345355SKonrad Dybcio clock-names = "se"; 120289345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 120389345355SKonrad Dybcio interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 120489345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 120589345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 120689345355SKonrad Dybcio #address-cells = <1>; 120789345355SKonrad Dybcio #size-cells = <0>; 120889345355SKonrad Dybcio status = "disabled"; 120989345355SKonrad Dybcio }; 121089345355SKonrad Dybcio 121106bf656eSJonathan Marek i2c13: i2c@a94000 { 121206bf656eSJonathan Marek compatible = "qcom,geni-i2c"; 121306bf656eSJonathan Marek reg = <0 0x00a94000 0 0x4000>; 121406bf656eSJonathan Marek clock-names = "se"; 121506bf656eSJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 121606bf656eSJonathan Marek pinctrl-names = "default"; 121789345355SKonrad Dybcio pinctrl-0 = <&qup_i2c13_default>; 121806bf656eSJonathan Marek interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 121906bf656eSJonathan Marek #address-cells = <1>; 122006bf656eSJonathan Marek #size-cells = <0>; 122106bf656eSJonathan Marek status = "disabled"; 122206bf656eSJonathan Marek }; 122389345355SKonrad Dybcio 122489345355SKonrad Dybcio spi13: spi@a94000 { 122589345355SKonrad Dybcio compatible = "qcom,geni-spi"; 122689345355SKonrad Dybcio reg = <0 0x00a94000 0 0x4000>; 122789345355SKonrad Dybcio clock-names = "se"; 122889345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 122989345355SKonrad Dybcio interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 123089345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 123189345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 123289345355SKonrad Dybcio #address-cells = <1>; 123389345355SKonrad Dybcio #size-cells = <0>; 123489345355SKonrad Dybcio status = "disabled"; 123589345355SKonrad Dybcio }; 123606bf656eSJonathan Marek }; 123706bf656eSJonathan Marek 1238187f65b7SVinod Koul apps_smmu: iommu@15000000 { 1239187f65b7SVinod Koul compatible = "qcom,sm8350-smmu-500", "arm,mmu-500"; 1240187f65b7SVinod Koul reg = <0 0x15000000 0 0x100000>; 1241187f65b7SVinod Koul #iommu-cells = <2>; 1242187f65b7SVinod Koul #global-interrupts = <2>; 1243187f65b7SVinod Koul interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 1244187f65b7SVinod Koul <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 1245187f65b7SVinod Koul <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 1246187f65b7SVinod Koul <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1247187f65b7SVinod Koul <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 1248187f65b7SVinod Koul <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1249187f65b7SVinod Koul <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1250187f65b7SVinod Koul <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1251187f65b7SVinod Koul <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1252187f65b7SVinod Koul <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1253187f65b7SVinod Koul <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1254187f65b7SVinod Koul <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1255187f65b7SVinod Koul <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1256187f65b7SVinod Koul <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1257187f65b7SVinod Koul <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1258187f65b7SVinod Koul <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1259187f65b7SVinod Koul <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1260187f65b7SVinod Koul <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1261187f65b7SVinod Koul <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1262187f65b7SVinod Koul <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1263187f65b7SVinod Koul <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 1264187f65b7SVinod Koul <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1265187f65b7SVinod Koul <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1266187f65b7SVinod Koul <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 1267187f65b7SVinod Koul <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 1268187f65b7SVinod Koul <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 1269187f65b7SVinod Koul <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 1270187f65b7SVinod Koul <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 1271187f65b7SVinod Koul <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 1272187f65b7SVinod Koul <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 1273187f65b7SVinod Koul <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 1274187f65b7SVinod Koul <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 1275187f65b7SVinod Koul <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 1276187f65b7SVinod Koul <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 1277187f65b7SVinod Koul <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 1278187f65b7SVinod Koul <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 1279187f65b7SVinod Koul <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1280187f65b7SVinod Koul <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1281187f65b7SVinod Koul <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1282187f65b7SVinod Koul <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1283187f65b7SVinod Koul <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 1284187f65b7SVinod Koul <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1285187f65b7SVinod Koul <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1286187f65b7SVinod Koul <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1287187f65b7SVinod Koul <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1288187f65b7SVinod Koul <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1289187f65b7SVinod Koul <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1290187f65b7SVinod Koul <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1291187f65b7SVinod Koul <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1292187f65b7SVinod Koul <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1293187f65b7SVinod Koul <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1294187f65b7SVinod Koul <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1295187f65b7SVinod Koul <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1296187f65b7SVinod Koul <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1297187f65b7SVinod Koul <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1298187f65b7SVinod Koul <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1299187f65b7SVinod Koul <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1300187f65b7SVinod Koul <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1301187f65b7SVinod Koul <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1302187f65b7SVinod Koul <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1303187f65b7SVinod Koul <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1304187f65b7SVinod Koul <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1305187f65b7SVinod Koul <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1306187f65b7SVinod Koul <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1307187f65b7SVinod Koul <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1308187f65b7SVinod Koul <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1309187f65b7SVinod Koul <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 1310187f65b7SVinod Koul <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 1311187f65b7SVinod Koul <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 1312187f65b7SVinod Koul <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 1313187f65b7SVinod Koul <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 1314187f65b7SVinod Koul <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 1315187f65b7SVinod Koul <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 1316187f65b7SVinod Koul <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 1317187f65b7SVinod Koul <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 1318187f65b7SVinod Koul <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 1319187f65b7SVinod Koul <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 1320187f65b7SVinod Koul <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 1321187f65b7SVinod Koul <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 1322187f65b7SVinod Koul <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 1323187f65b7SVinod Koul <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 1324187f65b7SVinod Koul <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 1325187f65b7SVinod Koul <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 1326187f65b7SVinod Koul <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1327187f65b7SVinod Koul <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1328187f65b7SVinod Koul <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1329187f65b7SVinod Koul <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1330187f65b7SVinod Koul <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1331187f65b7SVinod Koul <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1332187f65b7SVinod Koul <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 1333187f65b7SVinod Koul <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 1334187f65b7SVinod Koul <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 1335187f65b7SVinod Koul <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 1336187f65b7SVinod Koul <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 1337187f65b7SVinod Koul <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 1338187f65b7SVinod Koul <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 1339187f65b7SVinod Koul <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 1340187f65b7SVinod Koul <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 1341187f65b7SVinod Koul }; 1342187f65b7SVinod Koul 1343da6b2482SVinod Koul config_noc: interconnect@1500000 { 1344da6b2482SVinod Koul compatible = "qcom,sm8350-config-noc"; 1345da6b2482SVinod Koul reg = <0 0x01500000 0 0xa580>; 1346da6b2482SVinod Koul #interconnect-cells = <1>; 1347da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1348da6b2482SVinod Koul }; 1349da6b2482SVinod Koul 1350da6b2482SVinod Koul mc_virt: interconnect@1580000 { 1351da6b2482SVinod Koul compatible = "qcom,sm8350-mc-virt"; 1352da6b2482SVinod Koul reg = <0 0x01580000 0 0x1000>; 1353da6b2482SVinod Koul #interconnect-cells = <1>; 1354da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1355da6b2482SVinod Koul }; 1356da6b2482SVinod Koul 1357da6b2482SVinod Koul system_noc: interconnect@1680000 { 1358da6b2482SVinod Koul compatible = "qcom,sm8350-system-noc"; 1359da6b2482SVinod Koul reg = <0 0x01680000 0 0x1c200>; 1360da6b2482SVinod Koul #interconnect-cells = <1>; 1361da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1362da6b2482SVinod Koul }; 1363da6b2482SVinod Koul 1364da6b2482SVinod Koul aggre1_noc: interconnect@16e0000 { 1365da6b2482SVinod Koul compatible = "qcom,sm8350-aggre1-noc"; 1366da6b2482SVinod Koul reg = <0 0x016e0000 0 0x1f180>; 1367da6b2482SVinod Koul #interconnect-cells = <1>; 1368da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1369da6b2482SVinod Koul }; 1370da6b2482SVinod Koul 1371da6b2482SVinod Koul aggre2_noc: interconnect@1700000 { 1372da6b2482SVinod Koul compatible = "qcom,sm8350-aggre2-noc"; 1373da6b2482SVinod Koul reg = <0 0x01700000 0 0x33000>; 1374da6b2482SVinod Koul #interconnect-cells = <1>; 1375da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1376da6b2482SVinod Koul }; 1377da6b2482SVinod Koul 1378da6b2482SVinod Koul mmss_noc: interconnect@1740000 { 1379da6b2482SVinod Koul compatible = "qcom,sm8350-mmss-noc"; 1380da6b2482SVinod Koul reg = <0 0x01740000 0 0x1f080>; 1381da6b2482SVinod Koul #interconnect-cells = <1>; 1382da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1383da6b2482SVinod Koul }; 1384da6b2482SVinod Koul 1385da6b2482SVinod Koul lpass_ag_noc: interconnect@3c40000 { 1386da6b2482SVinod Koul compatible = "qcom,sm8350-lpass-ag-noc"; 1387da6b2482SVinod Koul reg = <0 0x03c40000 0 0xf080>; 1388da6b2482SVinod Koul #interconnect-cells = <1>; 1389da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1390da6b2482SVinod Koul }; 1391da6b2482SVinod Koul 1392da6b2482SVinod Koul compute_noc: interconnect@a0c0000{ 1393da6b2482SVinod Koul compatible = "qcom,sm8350-compute-noc"; 1394da6b2482SVinod Koul reg = <0 0x0a0c0000 0 0xa180>; 1395da6b2482SVinod Koul #interconnect-cells = <1>; 1396da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1397da6b2482SVinod Koul }; 1398da6b2482SVinod Koul 1399f11d3e7dSAlex Elder ipa: ipa@1e40000 { 1400f11d3e7dSAlex Elder compatible = "qcom,sm8350-ipa"; 1401f11d3e7dSAlex Elder 1402f11d3e7dSAlex Elder iommus = <&apps_smmu 0x5c0 0x0>, 1403f11d3e7dSAlex Elder <&apps_smmu 0x5c2 0x0>; 1404f11d3e7dSAlex Elder reg = <0 0x1e40000 0 0x8000>, 1405f11d3e7dSAlex Elder <0 0x1e50000 0 0x4b20>, 1406f11d3e7dSAlex Elder <0 0x1e04000 0 0x23000>; 1407f11d3e7dSAlex Elder reg-names = "ipa-reg", 1408f11d3e7dSAlex Elder "ipa-shared", 1409f11d3e7dSAlex Elder "gsi"; 1410f11d3e7dSAlex Elder 1411f11d3e7dSAlex Elder interrupts-extended = <&intc GIC_SPI 655 IRQ_TYPE_EDGE_RISING>, 1412f11d3e7dSAlex Elder <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, 1413f11d3e7dSAlex Elder <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 1414f11d3e7dSAlex Elder <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; 1415f11d3e7dSAlex Elder interrupt-names = "ipa", 1416f11d3e7dSAlex Elder "gsi", 1417f11d3e7dSAlex Elder "ipa-clock-query", 1418f11d3e7dSAlex Elder "ipa-setup-ready"; 1419f11d3e7dSAlex Elder 1420f11d3e7dSAlex Elder clocks = <&rpmhcc RPMH_IPA_CLK>; 1421f11d3e7dSAlex Elder clock-names = "core"; 1422f11d3e7dSAlex Elder 142384173ca3SAlex Elder interconnects = <&aggre2_noc MASTER_IPA &mc_virt SLAVE_EBI1>, 1424f11d3e7dSAlex Elder <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>; 142584173ca3SAlex Elder interconnect-names = "memory", 142684173ca3SAlex Elder "config"; 1427f11d3e7dSAlex Elder 1428f11d3e7dSAlex Elder qcom,smem-states = <&ipa_smp2p_out 0>, 1429f11d3e7dSAlex Elder <&ipa_smp2p_out 1>; 1430f11d3e7dSAlex Elder qcom,smem-state-names = "ipa-clock-enabled-valid", 1431f11d3e7dSAlex Elder "ipa-clock-enabled"; 1432f11d3e7dSAlex Elder 1433f11d3e7dSAlex Elder status = "disabled"; 1434f11d3e7dSAlex Elder }; 1435f11d3e7dSAlex Elder 1436b7e8f433SVinod Koul tcsr_mutex: hwlock@1f40000 { 1437b7e8f433SVinod Koul compatible = "qcom,tcsr-mutex"; 1438b7e8f433SVinod Koul reg = <0x0 0x01f40000 0x0 0x40000>; 1439b7e8f433SVinod Koul #hwlock-cells = <1>; 1440b7e8f433SVinod Koul }; 1441b7e8f433SVinod Koul 1442177fcf0aSVinod Koul mpss: remoteproc@4080000 { 1443177fcf0aSVinod Koul compatible = "qcom,sm8350-mpss-pas"; 1444177fcf0aSVinod Koul reg = <0x0 0x04080000 0x0 0x4040>; 1445177fcf0aSVinod Koul 1446177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 1447177fcf0aSVinod Koul <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, 1448177fcf0aSVinod Koul <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, 1449177fcf0aSVinod Koul <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, 1450177fcf0aSVinod Koul <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, 1451177fcf0aSVinod Koul <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; 1452177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", "handover", 1453177fcf0aSVinod Koul "stop-ack", "shutdown-ack"; 1454177fcf0aSVinod Koul 1455177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1456177fcf0aSVinod Koul clock-names = "xo"; 1457177fcf0aSVinod Koul 14586b7cb2d2SSibi Sankar power-domains = <&rpmhpd 0>, 1459177fcf0aSVinod Koul <&rpmhpd 12>; 14606b7cb2d2SSibi Sankar power-domain-names = "cx", "mss"; 1461177fcf0aSVinod Koul 146284c856d0SVinod Koul interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; 1463da6b2482SVinod Koul 1464177fcf0aSVinod Koul memory-region = <&pil_modem_mem>; 1465177fcf0aSVinod Koul 14666b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 14676b7cb2d2SSibi Sankar 1468177fcf0aSVinod Koul qcom,smem-states = <&smp2p_modem_out 0>; 1469177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1470177fcf0aSVinod Koul 1471177fcf0aSVinod Koul status = "disabled"; 1472177fcf0aSVinod Koul 1473177fcf0aSVinod Koul glink-edge { 1474177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 1475177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1476177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1477177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 1478177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1479177fcf0aSVinod Koul interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; 1480177fcf0aSVinod Koul label = "modem"; 1481177fcf0aSVinod Koul qcom,remote-pid = <1>; 1482177fcf0aSVinod Koul }; 1483177fcf0aSVinod Koul }; 1484177fcf0aSVinod Koul 1485b7e8f433SVinod Koul pdc: interrupt-controller@b220000 { 1486b7e8f433SVinod Koul compatible = "qcom,sm8350-pdc", "qcom,pdc"; 1487b7e8f433SVinod Koul reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 1488b7e8f433SVinod Koul qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>, 1489b7e8f433SVinod Koul <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>, 1490b7e8f433SVinod Koul <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>, 1491b7e8f433SVinod Koul <156 716 12>; 1492b7e8f433SVinod Koul #interrupt-cells = <2>; 1493b7e8f433SVinod Koul interrupt-parent = <&intc>; 1494b7e8f433SVinod Koul interrupt-controller; 1495b7e8f433SVinod Koul }; 1496b7e8f433SVinod Koul 14971dee9e3bSVinod Koul tsens0: thermal-sensor@c263000 { 149820f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 149920f9d94eSRobert Foss reg = <0 0x0c263000 0 0x1ff>, /* TM */ 150020f9d94eSRobert Foss <0 0x0c222000 0 0x8>; /* SROT */ 150120f9d94eSRobert Foss #qcom,sensors = <15>; 15029e7f7b65SKonrad Dybcio interrupts-extended = <&pdc 26 IRQ_TYPE_LEVEL_HIGH>, 150320f9d94eSRobert Foss <&pdc 28 IRQ_TYPE_LEVEL_HIGH>; 150420f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 150520f9d94eSRobert Foss #thermal-sensor-cells = <1>; 150620f9d94eSRobert Foss }; 150720f9d94eSRobert Foss 15081dee9e3bSVinod Koul tsens1: thermal-sensor@c265000 { 150920f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 151020f9d94eSRobert Foss reg = <0 0x0c265000 0 0x1ff>, /* TM */ 151120f9d94eSRobert Foss <0 0x0c223000 0 0x8>; /* SROT */ 151220f9d94eSRobert Foss #qcom,sensors = <14>; 15139e7f7b65SKonrad Dybcio interrupts-extended = <&pdc 27 IRQ_TYPE_LEVEL_HIGH>, 151420f9d94eSRobert Foss <&pdc 29 IRQ_TYPE_LEVEL_HIGH>; 151520f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 151620f9d94eSRobert Foss #thermal-sensor-cells = <1>; 151720f9d94eSRobert Foss }; 151820f9d94eSRobert Foss 151997832fa8SSai Prakash Ranjan aoss_qmp: power-controller@c300000 { 1520b7e8f433SVinod Koul compatible = "qcom,sm8350-aoss-qmp"; 152147cb6a06SMaulik Shah reg = <0 0x0c300000 0 0x400>; 1522b7e8f433SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP 1523b7e8f433SVinod Koul IRQ_TYPE_EDGE_RISING>; 1524b7e8f433SVinod Koul mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; 1525b7e8f433SVinod Koul 1526b7e8f433SVinod Koul #clock-cells = <0>; 1527b7e8f433SVinod Koul }; 1528b7e8f433SVinod Koul 152947cb6a06SMaulik Shah sram@c3f0000 { 153047cb6a06SMaulik Shah compatible = "qcom,rpmh-stats"; 153147cb6a06SMaulik Shah reg = <0 0x0c3f0000 0 0x400>; 153247cb6a06SMaulik Shah }; 153347cb6a06SMaulik Shah 1534389cd7acSVinod Koul spmi_bus: spmi@c440000 { 1535389cd7acSVinod Koul compatible = "qcom,spmi-pmic-arb"; 1536389cd7acSVinod Koul reg = <0x0 0xc440000 0x0 0x1100>, 1537389cd7acSVinod Koul <0x0 0xc600000 0x0 0x2000000>, 1538389cd7acSVinod Koul <0x0 0xe600000 0x0 0x100000>, 1539389cd7acSVinod Koul <0x0 0xe700000 0x0 0xa0000>, 1540389cd7acSVinod Koul <0x0 0xc40a000 0x0 0x26000>; 1541389cd7acSVinod Koul reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 1542389cd7acSVinod Koul interrupt-names = "periph_irq"; 1543389cd7acSVinod Koul interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 1544389cd7acSVinod Koul qcom,ee = <0>; 1545389cd7acSVinod Koul qcom,channel = <0>; 1546389cd7acSVinod Koul #address-cells = <2>; 1547389cd7acSVinod Koul #size-cells = <0>; 1548389cd7acSVinod Koul interrupt-controller; 1549389cd7acSVinod Koul #interrupt-cells = <4>; 1550389cd7acSVinod Koul }; 1551389cd7acSVinod Koul 1552b7e8f433SVinod Koul tlmm: pinctrl@f100000 { 1553b7e8f433SVinod Koul compatible = "qcom,sm8350-tlmm"; 1554b7e8f433SVinod Koul reg = <0 0x0f100000 0 0x300000>; 1555b7e8f433SVinod Koul interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 1556b7e8f433SVinod Koul gpio-controller; 1557b7e8f433SVinod Koul #gpio-cells = <2>; 1558b7e8f433SVinod Koul interrupt-controller; 1559b7e8f433SVinod Koul #interrupt-cells = <2>; 156079015857SShawn Guo gpio-ranges = <&tlmm 0 0 204>; 156167146f07SBjorn Andersson wakeup-parent = <&pdc>; 1562b7e8f433SVinod Koul 1563b7e8f433SVinod Koul qup_uart3_default_state: qup-uart3-default-state { 1564b7e8f433SVinod Koul rx { 1565b7e8f433SVinod Koul pins = "gpio18"; 1566b7e8f433SVinod Koul function = "qup3"; 1567b7e8f433SVinod Koul }; 1568b7e8f433SVinod Koul tx { 1569b7e8f433SVinod Koul pins = "gpio19"; 1570b7e8f433SVinod Koul function = "qup3"; 1571b7e8f433SVinod Koul }; 1572b7e8f433SVinod Koul }; 157306bf656eSJonathan Marek 1574cf03cd7eSKonrad Dybcio qup_uart6_default: qup-uart6-default { 1575cf03cd7eSKonrad Dybcio pins = "gpio30", "gpio31"; 1576cf03cd7eSKonrad Dybcio function = "qup6"; 1577cf03cd7eSKonrad Dybcio drive-strength = <2>; 1578cf03cd7eSKonrad Dybcio bias-disable; 1579cf03cd7eSKonrad Dybcio }; 1580cf03cd7eSKonrad Dybcio 158198374e69SKonrad Dybcio qup_uart18_default: qup-uart18-default { 158298374e69SKonrad Dybcio pins = "gpio58", "gpio59"; 158398374e69SKonrad Dybcio function = "qup18"; 158498374e69SKonrad Dybcio drive-strength = <2>; 158598374e69SKonrad Dybcio bias-disable; 158698374e69SKonrad Dybcio }; 158798374e69SKonrad Dybcio 1588cf03cd7eSKonrad Dybcio qup_i2c0_default: qup-i2c0-default { 1589cf03cd7eSKonrad Dybcio pins = "gpio4", "gpio5"; 1590cf03cd7eSKonrad Dybcio function = "qup0"; 1591cf03cd7eSKonrad Dybcio drive-strength = <2>; 1592cf03cd7eSKonrad Dybcio bias-pull-up; 1593cf03cd7eSKonrad Dybcio }; 1594cf03cd7eSKonrad Dybcio 1595cf03cd7eSKonrad Dybcio qup_i2c1_default: qup-i2c1-default { 1596cf03cd7eSKonrad Dybcio pins = "gpio8", "gpio9"; 1597cf03cd7eSKonrad Dybcio function = "qup1"; 1598cf03cd7eSKonrad Dybcio drive-strength = <2>; 1599cf03cd7eSKonrad Dybcio bias-pull-up; 1600cf03cd7eSKonrad Dybcio }; 1601cf03cd7eSKonrad Dybcio 1602cf03cd7eSKonrad Dybcio qup_i2c2_default: qup-i2c2-default { 1603cf03cd7eSKonrad Dybcio pins = "gpio12", "gpio13"; 1604cf03cd7eSKonrad Dybcio function = "qup2"; 1605cf03cd7eSKonrad Dybcio drive-strength = <2>; 1606cf03cd7eSKonrad Dybcio bias-pull-up; 1607cf03cd7eSKonrad Dybcio }; 1608cf03cd7eSKonrad Dybcio 1609cf03cd7eSKonrad Dybcio qup_i2c4_default: qup-i2c4-default { 1610cf03cd7eSKonrad Dybcio pins = "gpio20", "gpio21"; 1611cf03cd7eSKonrad Dybcio function = "qup4"; 1612cf03cd7eSKonrad Dybcio drive-strength = <2>; 1613cf03cd7eSKonrad Dybcio bias-pull-up; 1614cf03cd7eSKonrad Dybcio }; 1615cf03cd7eSKonrad Dybcio 1616cf03cd7eSKonrad Dybcio qup_i2c5_default: qup-i2c5-default { 1617cf03cd7eSKonrad Dybcio pins = "gpio24", "gpio25"; 1618cf03cd7eSKonrad Dybcio function = "qup5"; 1619cf03cd7eSKonrad Dybcio drive-strength = <2>; 1620cf03cd7eSKonrad Dybcio bias-pull-up; 1621cf03cd7eSKonrad Dybcio }; 1622cf03cd7eSKonrad Dybcio 1623cf03cd7eSKonrad Dybcio qup_i2c6_default: qup-i2c6-default { 1624cf03cd7eSKonrad Dybcio pins = "gpio28", "gpio29"; 1625cf03cd7eSKonrad Dybcio function = "qup6"; 1626cf03cd7eSKonrad Dybcio drive-strength = <2>; 1627cf03cd7eSKonrad Dybcio bias-pull-up; 1628cf03cd7eSKonrad Dybcio }; 1629cf03cd7eSKonrad Dybcio 1630cf03cd7eSKonrad Dybcio qup_i2c7_default: qup-i2c7-default { 1631cf03cd7eSKonrad Dybcio pins = "gpio32", "gpio33"; 1632cf03cd7eSKonrad Dybcio function = "qup7"; 1633cf03cd7eSKonrad Dybcio drive-strength = <2>; 1634cf03cd7eSKonrad Dybcio bias-disable; 1635cf03cd7eSKonrad Dybcio }; 1636cf03cd7eSKonrad Dybcio 163789345355SKonrad Dybcio qup_i2c8_default: qup-i2c8-default { 163889345355SKonrad Dybcio pins = "gpio36", "gpio37"; 163989345355SKonrad Dybcio function = "qup8"; 164006bf656eSJonathan Marek drive-strength = <2>; 164106bf656eSJonathan Marek bias-pull-up; 164206bf656eSJonathan Marek }; 164389345355SKonrad Dybcio 164489345355SKonrad Dybcio qup_i2c9_default: qup-i2c9-default { 164589345355SKonrad Dybcio pins = "gpio40", "gpio41"; 164689345355SKonrad Dybcio function = "qup9"; 164789345355SKonrad Dybcio drive-strength = <2>; 164889345355SKonrad Dybcio bias-pull-up; 164989345355SKonrad Dybcio }; 165089345355SKonrad Dybcio 165189345355SKonrad Dybcio qup_i2c10_default: qup-i2c10-default { 165289345355SKonrad Dybcio pins = "gpio44", "gpio45"; 165389345355SKonrad Dybcio function = "qup10"; 165489345355SKonrad Dybcio drive-strength = <2>; 165589345355SKonrad Dybcio bias-pull-up; 165689345355SKonrad Dybcio }; 165789345355SKonrad Dybcio 165889345355SKonrad Dybcio qup_i2c11_default: qup-i2c11-default { 165989345355SKonrad Dybcio pins = "gpio48", "gpio49"; 166089345355SKonrad Dybcio function = "qup11"; 166189345355SKonrad Dybcio drive-strength = <2>; 166289345355SKonrad Dybcio bias-pull-up; 166389345355SKonrad Dybcio }; 166489345355SKonrad Dybcio 166589345355SKonrad Dybcio qup_i2c12_default: qup-i2c12-default { 166689345355SKonrad Dybcio pins = "gpio52", "gpio53"; 166789345355SKonrad Dybcio function = "qup12"; 166889345355SKonrad Dybcio drive-strength = <2>; 166989345355SKonrad Dybcio bias-pull-up; 167089345355SKonrad Dybcio }; 167189345355SKonrad Dybcio 167289345355SKonrad Dybcio qup_i2c13_default: qup-i2c13-default { 167389345355SKonrad Dybcio pins = "gpio0", "gpio1"; 167489345355SKonrad Dybcio function = "qup13"; 167589345355SKonrad Dybcio drive-strength = <2>; 167689345355SKonrad Dybcio bias-pull-up; 167706bf656eSJonathan Marek }; 167898374e69SKonrad Dybcio 167998374e69SKonrad Dybcio qup_i2c14_default: qup-i2c14-default { 168098374e69SKonrad Dybcio pins = "gpio56", "gpio57"; 168198374e69SKonrad Dybcio function = "qup14"; 168298374e69SKonrad Dybcio drive-strength = <2>; 168398374e69SKonrad Dybcio bias-disable; 168498374e69SKonrad Dybcio }; 168598374e69SKonrad Dybcio 168698374e69SKonrad Dybcio qup_i2c15_default: qup-i2c15-default { 168798374e69SKonrad Dybcio pins = "gpio60", "gpio61"; 168898374e69SKonrad Dybcio function = "qup15"; 168998374e69SKonrad Dybcio drive-strength = <2>; 169098374e69SKonrad Dybcio bias-disable; 169198374e69SKonrad Dybcio }; 169298374e69SKonrad Dybcio 169398374e69SKonrad Dybcio qup_i2c16_default: qup-i2c16-default { 169498374e69SKonrad Dybcio pins = "gpio64", "gpio65"; 169598374e69SKonrad Dybcio function = "qup16"; 169698374e69SKonrad Dybcio drive-strength = <2>; 169798374e69SKonrad Dybcio bias-disable; 169898374e69SKonrad Dybcio }; 169998374e69SKonrad Dybcio 170098374e69SKonrad Dybcio qup_i2c17_default: qup-i2c17-default { 170198374e69SKonrad Dybcio pins = "gpio72", "gpio73"; 170298374e69SKonrad Dybcio function = "qup17"; 170398374e69SKonrad Dybcio drive-strength = <2>; 170498374e69SKonrad Dybcio bias-disable; 170598374e69SKonrad Dybcio }; 170698374e69SKonrad Dybcio 170798374e69SKonrad Dybcio qup_i2c19_default: qup-i2c19-default { 170898374e69SKonrad Dybcio pins = "gpio76", "gpio77"; 170998374e69SKonrad Dybcio function = "qup19"; 171098374e69SKonrad Dybcio drive-strength = <2>; 171198374e69SKonrad Dybcio bias-disable; 171298374e69SKonrad Dybcio }; 1713b7e8f433SVinod Koul }; 1714b7e8f433SVinod Koul 171524e3eb2eSRobert Foss rng: rng@10d3000 { 171624e3eb2eSRobert Foss compatible = "qcom,prng-ee"; 171724e3eb2eSRobert Foss reg = <0 0x010d3000 0 0x1000>; 171824e3eb2eSRobert Foss clocks = <&rpmhcc RPMH_HWKM_CLK>; 171924e3eb2eSRobert Foss clock-names = "core"; 172024e3eb2eSRobert Foss }; 172124e3eb2eSRobert Foss 1722b7e8f433SVinod Koul intc: interrupt-controller@17a00000 { 1723b7e8f433SVinod Koul compatible = "arm,gic-v3"; 1724b7e8f433SVinod Koul #interrupt-cells = <3>; 1725b7e8f433SVinod Koul interrupt-controller; 1726f4d4ca9fSKonrad Dybcio #redistributor-regions = <1>; 1727f4d4ca9fSKonrad Dybcio redistributor-stride = <0 0x20000>; 1728b7e8f433SVinod Koul reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 1729b7e8f433SVinod Koul <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 1730b7e8f433SVinod Koul interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1731b7e8f433SVinod Koul }; 1732b7e8f433SVinod Koul 1733b7e8f433SVinod Koul timer@17c20000 { 1734b7e8f433SVinod Koul compatible = "arm,armv7-timer-mem"; 1735b7e8f433SVinod Koul #address-cells = <2>; 1736b7e8f433SVinod Koul #size-cells = <2>; 1737b7e8f433SVinod Koul ranges; 1738b7e8f433SVinod Koul reg = <0x0 0x17c20000 0x0 0x1000>; 1739b7e8f433SVinod Koul clock-frequency = <19200000>; 1740b7e8f433SVinod Koul 1741b7e8f433SVinod Koul frame@17c21000 { 1742b7e8f433SVinod Koul frame-number = <0>; 1743b7e8f433SVinod Koul interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 1744b7e8f433SVinod Koul <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 1745b7e8f433SVinod Koul reg = <0x0 0x17c21000 0x0 0x1000>, 1746b7e8f433SVinod Koul <0x0 0x17c22000 0x0 0x1000>; 1747b7e8f433SVinod Koul }; 1748b7e8f433SVinod Koul 1749b7e8f433SVinod Koul frame@17c23000 { 1750b7e8f433SVinod Koul frame-number = <1>; 1751b7e8f433SVinod Koul interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 1752b7e8f433SVinod Koul reg = <0x0 0x17c23000 0x0 0x1000>; 1753b7e8f433SVinod Koul status = "disabled"; 1754b7e8f433SVinod Koul }; 1755b7e8f433SVinod Koul 1756b7e8f433SVinod Koul frame@17c25000 { 1757b7e8f433SVinod Koul frame-number = <2>; 1758b7e8f433SVinod Koul interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1759b7e8f433SVinod Koul reg = <0x0 0x17c25000 0x0 0x1000>; 1760b7e8f433SVinod Koul status = "disabled"; 1761b7e8f433SVinod Koul }; 1762b7e8f433SVinod Koul 1763b7e8f433SVinod Koul frame@17c27000 { 1764b7e8f433SVinod Koul frame-number = <3>; 1765b7e8f433SVinod Koul interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 1766b7e8f433SVinod Koul reg = <0x0 0x17c27000 0x0 0x1000>; 1767b7e8f433SVinod Koul status = "disabled"; 1768b7e8f433SVinod Koul }; 1769b7e8f433SVinod Koul 1770b7e8f433SVinod Koul frame@17c29000 { 1771b7e8f433SVinod Koul frame-number = <4>; 1772b7e8f433SVinod Koul interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1773b7e8f433SVinod Koul reg = <0x0 0x17c29000 0x0 0x1000>; 1774b7e8f433SVinod Koul status = "disabled"; 1775b7e8f433SVinod Koul }; 1776b7e8f433SVinod Koul 1777b7e8f433SVinod Koul frame@17c2b000 { 1778b7e8f433SVinod Koul frame-number = <5>; 1779b7e8f433SVinod Koul interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1780b7e8f433SVinod Koul reg = <0x0 0x17c2b000 0x0 0x1000>; 1781b7e8f433SVinod Koul status = "disabled"; 1782b7e8f433SVinod Koul }; 1783b7e8f433SVinod Koul 1784b7e8f433SVinod Koul frame@17c2d000 { 1785b7e8f433SVinod Koul frame-number = <6>; 1786b7e8f433SVinod Koul interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1787b7e8f433SVinod Koul reg = <0x0 0x17c2d000 0x0 0x1000>; 1788b7e8f433SVinod Koul status = "disabled"; 1789b7e8f433SVinod Koul }; 1790b7e8f433SVinod Koul }; 1791b7e8f433SVinod Koul 1792b7e8f433SVinod Koul apps_rsc: rsc@18200000 { 1793b7e8f433SVinod Koul label = "apps_rsc"; 1794b7e8f433SVinod Koul compatible = "qcom,rpmh-rsc"; 1795b7e8f433SVinod Koul reg = <0x0 0x18200000 0x0 0x10000>, 1796b7e8f433SVinod Koul <0x0 0x18210000 0x0 0x10000>, 1797b7e8f433SVinod Koul <0x0 0x18220000 0x0 0x10000>; 1798b7e8f433SVinod Koul reg-names = "drv-0", "drv-1", "drv-2"; 1799b7e8f433SVinod Koul interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 1800b7e8f433SVinod Koul <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 1801b7e8f433SVinod Koul <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 1802b7e8f433SVinod Koul qcom,tcs-offset = <0xd00>; 1803b7e8f433SVinod Koul qcom,drv-id = <2>; 1804b7e8f433SVinod Koul qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 1805*a131255eSMaulik Shah <WAKE_TCS 3>, <CONTROL_TCS 0>; 1806b7e8f433SVinod Koul 1807b7e8f433SVinod Koul rpmhcc: clock-controller { 1808b7e8f433SVinod Koul compatible = "qcom,sm8350-rpmh-clk"; 1809b7e8f433SVinod Koul #clock-cells = <1>; 1810b7e8f433SVinod Koul clock-names = "xo"; 1811b7e8f433SVinod Koul clocks = <&xo_board>; 1812b7e8f433SVinod Koul }; 1813b7e8f433SVinod Koul 181490f57509SVinod Koul rpmhpd: power-controller { 181590f57509SVinod Koul compatible = "qcom,sm8350-rpmhpd"; 181690f57509SVinod Koul #power-domain-cells = <1>; 181790f57509SVinod Koul operating-points-v2 = <&rpmhpd_opp_table>; 181890f57509SVinod Koul 181990f57509SVinod Koul rpmhpd_opp_table: opp-table { 182090f57509SVinod Koul compatible = "operating-points-v2"; 182190f57509SVinod Koul 182290f57509SVinod Koul rpmhpd_opp_ret: opp1 { 182390f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 182490f57509SVinod Koul }; 182590f57509SVinod Koul 182690f57509SVinod Koul rpmhpd_opp_min_svs: opp2 { 182790f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 182890f57509SVinod Koul }; 182990f57509SVinod Koul 183090f57509SVinod Koul rpmhpd_opp_low_svs: opp3 { 183190f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 183290f57509SVinod Koul }; 183390f57509SVinod Koul 183490f57509SVinod Koul rpmhpd_opp_svs: opp4 { 183590f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 183690f57509SVinod Koul }; 183790f57509SVinod Koul 183890f57509SVinod Koul rpmhpd_opp_svs_l1: opp5 { 183990f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 184090f57509SVinod Koul }; 184190f57509SVinod Koul 184290f57509SVinod Koul rpmhpd_opp_nom: opp6 { 184390f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 184490f57509SVinod Koul }; 184590f57509SVinod Koul 184690f57509SVinod Koul rpmhpd_opp_nom_l1: opp7 { 184790f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 184890f57509SVinod Koul }; 184990f57509SVinod Koul 185090f57509SVinod Koul rpmhpd_opp_nom_l2: opp8 { 185190f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 185290f57509SVinod Koul }; 185390f57509SVinod Koul 185490f57509SVinod Koul rpmhpd_opp_turbo: opp9 { 185590f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 185690f57509SVinod Koul }; 185790f57509SVinod Koul 185890f57509SVinod Koul rpmhpd_opp_turbo_l1: opp10 { 185990f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 186090f57509SVinod Koul }; 186190f57509SVinod Koul }; 186290f57509SVinod Koul }; 1863da6b2482SVinod Koul 1864da6b2482SVinod Koul apps_bcm_voter: bcm_voter { 1865da6b2482SVinod Koul compatible = "qcom,bcm-voter"; 1866da6b2482SVinod Koul }; 1867b7e8f433SVinod Koul }; 1868e780fb31SJack Pham 1869ccbb3abbSVinod Koul cpufreq_hw: cpufreq@18591000 { 1870ccbb3abbSVinod Koul compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss"; 1871ccbb3abbSVinod Koul reg = <0 0x18591000 0 0x1000>, 1872ccbb3abbSVinod Koul <0 0x18592000 0 0x1000>, 1873ccbb3abbSVinod Koul <0 0x18593000 0 0x1000>; 1874ccbb3abbSVinod Koul reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; 1875ccbb3abbSVinod Koul 1876ccbb3abbSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; 1877ccbb3abbSVinod Koul clock-names = "xo", "alternate"; 1878ccbb3abbSVinod Koul 1879ccbb3abbSVinod Koul #freq-domain-cells = <1>; 1880ccbb3abbSVinod Koul }; 1881ccbb3abbSVinod Koul 188259c7cf81SVinod Koul ufs_mem_hc: ufshc@1d84000 { 188359c7cf81SVinod Koul compatible = "qcom,sm8350-ufshc", "qcom,ufshc", 188459c7cf81SVinod Koul "jedec,ufs-2.0"; 188559c7cf81SVinod Koul reg = <0 0x01d84000 0 0x3000>; 188659c7cf81SVinod Koul interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 188759c7cf81SVinod Koul phys = <&ufs_mem_phy_lanes>; 188859c7cf81SVinod Koul phy-names = "ufsphy"; 188959c7cf81SVinod Koul lanes-per-direction = <2>; 189059c7cf81SVinod Koul #reset-cells = <1>; 18916d91e201SVinod Koul resets = <&gcc GCC_UFS_PHY_BCR>; 189259c7cf81SVinod Koul reset-names = "rst"; 189359c7cf81SVinod Koul 18946d91e201SVinod Koul power-domains = <&gcc UFS_PHY_GDSC>; 189559c7cf81SVinod Koul 189659c7cf81SVinod Koul iommus = <&apps_smmu 0xe0 0x0>; 189759c7cf81SVinod Koul 189859c7cf81SVinod Koul clock-names = 189959c7cf81SVinod Koul "ref_clk", 190059c7cf81SVinod Koul "core_clk", 190159c7cf81SVinod Koul "bus_aggr_clk", 190259c7cf81SVinod Koul "iface_clk", 190359c7cf81SVinod Koul "core_clk_unipro", 190459c7cf81SVinod Koul "ref_clk", 190559c7cf81SVinod Koul "tx_lane0_sync_clk", 190659c7cf81SVinod Koul "rx_lane0_sync_clk", 190759c7cf81SVinod Koul "rx_lane1_sync_clk"; 190859c7cf81SVinod Koul clocks = 190959c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 19106d91e201SVinod Koul <&gcc GCC_UFS_PHY_AXI_CLK>, 19116d91e201SVinod Koul <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 19126d91e201SVinod Koul <&gcc GCC_UFS_PHY_AHB_CLK>, 19136d91e201SVinod Koul <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 191459c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 19156d91e201SVinod Koul <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 19166d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 19176d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 191859c7cf81SVinod Koul freq-table-hz = 191959c7cf81SVinod Koul <75000000 300000000>, 192059c7cf81SVinod Koul <75000000 300000000>, 192159c7cf81SVinod Koul <0 0>, 192259c7cf81SVinod Koul <0 0>, 192359c7cf81SVinod Koul <75000000 300000000>, 192459c7cf81SVinod Koul <0 0>, 192559c7cf81SVinod Koul <0 0>, 192659c7cf81SVinod Koul <75000000 300000000>, 192759c7cf81SVinod Koul <75000000 300000000>; 192859c7cf81SVinod Koul status = "disabled"; 192959c7cf81SVinod Koul }; 193059c7cf81SVinod Koul 193159c7cf81SVinod Koul ufs_mem_phy: phy@1d87000 { 193259c7cf81SVinod Koul compatible = "qcom,sm8350-qmp-ufs-phy"; 193359c7cf81SVinod Koul reg = <0 0x01d87000 0 0xe10>; 193459c7cf81SVinod Koul #address-cells = <2>; 193559c7cf81SVinod Koul #size-cells = <2>; 193659c7cf81SVinod Koul ranges; 193759c7cf81SVinod Koul clock-names = "ref", 193859c7cf81SVinod Koul "ref_aux"; 193959c7cf81SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, 19406d91e201SVinod Koul <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 194159c7cf81SVinod Koul 194259c7cf81SVinod Koul resets = <&ufs_mem_hc 0>; 194359c7cf81SVinod Koul reset-names = "ufsphy"; 194459c7cf81SVinod Koul status = "disabled"; 194559c7cf81SVinod Koul 19461351512fSShawn Guo ufs_mem_phy_lanes: phy@1d87400 { 194759c7cf81SVinod Koul reg = <0 0x01d87400 0 0x108>, 194859c7cf81SVinod Koul <0 0x01d87600 0 0x1e0>, 194959c7cf81SVinod Koul <0 0x01d87c00 0 0x1dc>, 195059c7cf81SVinod Koul <0 0x01d87800 0 0x108>, 195159c7cf81SVinod Koul <0 0x01d87a00 0 0x1e0>; 195259c7cf81SVinod Koul #phy-cells = <0>; 195359c7cf81SVinod Koul #clock-cells = <0>; 195459c7cf81SVinod Koul }; 195559c7cf81SVinod Koul }; 195659c7cf81SVinod Koul 1957177fcf0aSVinod Koul slpi: remoteproc@5c00000 { 1958177fcf0aSVinod Koul compatible = "qcom,sm8350-slpi-pas"; 1959177fcf0aSVinod Koul reg = <0 0x05c00000 0 0x4000>; 1960177fcf0aSVinod Koul 1961177fcf0aSVinod Koul interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 1962177fcf0aSVinod Koul <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 1963177fcf0aSVinod Koul <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 1964177fcf0aSVinod Koul <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 1965177fcf0aSVinod Koul <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 1966177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1967177fcf0aSVinod Koul "handover", "stop-ack"; 1968177fcf0aSVinod Koul 1969177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1970177fcf0aSVinod Koul clock-names = "xo"; 1971177fcf0aSVinod Koul 19726b7cb2d2SSibi Sankar power-domains = <&rpmhpd 4>, 1973177fcf0aSVinod Koul <&rpmhpd 5>; 19746b7cb2d2SSibi Sankar power-domain-names = "lcx", "lmx"; 1975177fcf0aSVinod Koul 1976177fcf0aSVinod Koul memory-region = <&pil_slpi_mem>; 1977177fcf0aSVinod Koul 19786b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 19796b7cb2d2SSibi Sankar 1980177fcf0aSVinod Koul qcom,smem-states = <&smp2p_slpi_out 0>; 1981177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1982177fcf0aSVinod Koul 1983177fcf0aSVinod Koul status = "disabled"; 1984177fcf0aSVinod Koul 1985177fcf0aSVinod Koul glink-edge { 1986177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 1987177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1988177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1989177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 1990177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1991177fcf0aSVinod Koul 1992177fcf0aSVinod Koul label = "slpi"; 1993177fcf0aSVinod Koul qcom,remote-pid = <3>; 1994177fcf0aSVinod Koul 1995178056a4SOla Jeppsson fastrpc { 1996178056a4SOla Jeppsson compatible = "qcom,fastrpc"; 1997178056a4SOla Jeppsson qcom,glink-channels = "fastrpcglink-apps-dsp"; 1998178056a4SOla Jeppsson label = "sdsp"; 1999178056a4SOla Jeppsson #address-cells = <1>; 2000178056a4SOla Jeppsson #size-cells = <0>; 2001178056a4SOla Jeppsson 2002178056a4SOla Jeppsson compute-cb@1 { 2003178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2004178056a4SOla Jeppsson reg = <1>; 2005178056a4SOla Jeppsson iommus = <&apps_smmu 0x0541 0x0>; 2006178056a4SOla Jeppsson }; 2007178056a4SOla Jeppsson 2008178056a4SOla Jeppsson compute-cb@2 { 2009178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2010178056a4SOla Jeppsson reg = <2>; 2011178056a4SOla Jeppsson iommus = <&apps_smmu 0x0542 0x0>; 2012178056a4SOla Jeppsson }; 2013178056a4SOla Jeppsson 2014178056a4SOla Jeppsson compute-cb@3 { 2015178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2016178056a4SOla Jeppsson reg = <3>; 2017178056a4SOla Jeppsson iommus = <&apps_smmu 0x0543 0x0>; 2018178056a4SOla Jeppsson /* note: shared-cb = <4> in downstream */ 2019178056a4SOla Jeppsson }; 2020178056a4SOla Jeppsson }; 2021177fcf0aSVinod Koul }; 2022177fcf0aSVinod Koul }; 2023177fcf0aSVinod Koul 2024177fcf0aSVinod Koul cdsp: remoteproc@98900000 { 2025177fcf0aSVinod Koul compatible = "qcom,sm8350-cdsp-pas"; 2026177fcf0aSVinod Koul reg = <0 0x098900000 0 0x1400000>; 2027177fcf0aSVinod Koul 2028177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 2029177fcf0aSVinod Koul <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 2030177fcf0aSVinod Koul <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 2031177fcf0aSVinod Koul <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 2032177fcf0aSVinod Koul <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 2033177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 2034177fcf0aSVinod Koul "handover", "stop-ack"; 2035177fcf0aSVinod Koul 2036177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 2037177fcf0aSVinod Koul clock-names = "xo"; 2038177fcf0aSVinod Koul 20396b7cb2d2SSibi Sankar power-domains = <&rpmhpd 0>, 2040177fcf0aSVinod Koul <&rpmhpd 10>; 20416b7cb2d2SSibi Sankar power-domain-names = "cx", "mxc"; 2042177fcf0aSVinod Koul 204384c856d0SVinod Koul interconnects = <&compute_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>; 2044da6b2482SVinod Koul 2045177fcf0aSVinod Koul memory-region = <&pil_cdsp_mem>; 2046177fcf0aSVinod Koul 20476b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 20486b7cb2d2SSibi Sankar 2049177fcf0aSVinod Koul qcom,smem-states = <&smp2p_cdsp_out 0>; 2050177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 2051177fcf0aSVinod Koul 2052177fcf0aSVinod Koul status = "disabled"; 2053177fcf0aSVinod Koul 2054177fcf0aSVinod Koul glink-edge { 2055177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 2056177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 2057177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 2058177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 2059177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 2060177fcf0aSVinod Koul 2061177fcf0aSVinod Koul label = "cdsp"; 2062177fcf0aSVinod Koul qcom,remote-pid = <5>; 2063178056a4SOla Jeppsson 2064178056a4SOla Jeppsson fastrpc { 2065178056a4SOla Jeppsson compatible = "qcom,fastrpc"; 2066178056a4SOla Jeppsson qcom,glink-channels = "fastrpcglink-apps-dsp"; 2067178056a4SOla Jeppsson label = "cdsp"; 2068178056a4SOla Jeppsson #address-cells = <1>; 2069178056a4SOla Jeppsson #size-cells = <0>; 2070178056a4SOla Jeppsson 2071178056a4SOla Jeppsson compute-cb@1 { 2072178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2073178056a4SOla Jeppsson reg = <1>; 2074178056a4SOla Jeppsson iommus = <&apps_smmu 0x2161 0x0400>, 2075178056a4SOla Jeppsson <&apps_smmu 0x1181 0x0420>; 2076178056a4SOla Jeppsson }; 2077178056a4SOla Jeppsson 2078178056a4SOla Jeppsson compute-cb@2 { 2079178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2080178056a4SOla Jeppsson reg = <2>; 2081178056a4SOla Jeppsson iommus = <&apps_smmu 0x2162 0x0400>, 2082178056a4SOla Jeppsson <&apps_smmu 0x1182 0x0420>; 2083178056a4SOla Jeppsson }; 2084178056a4SOla Jeppsson 2085178056a4SOla Jeppsson compute-cb@3 { 2086178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2087178056a4SOla Jeppsson reg = <3>; 2088178056a4SOla Jeppsson iommus = <&apps_smmu 0x2163 0x0400>, 2089178056a4SOla Jeppsson <&apps_smmu 0x1183 0x0420>; 2090178056a4SOla Jeppsson }; 2091178056a4SOla Jeppsson 2092178056a4SOla Jeppsson compute-cb@4 { 2093178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2094178056a4SOla Jeppsson reg = <4>; 2095178056a4SOla Jeppsson iommus = <&apps_smmu 0x2164 0x0400>, 2096178056a4SOla Jeppsson <&apps_smmu 0x1184 0x0420>; 2097178056a4SOla Jeppsson }; 2098178056a4SOla Jeppsson 2099178056a4SOla Jeppsson compute-cb@5 { 2100178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2101178056a4SOla Jeppsson reg = <5>; 2102178056a4SOla Jeppsson iommus = <&apps_smmu 0x2165 0x0400>, 2103178056a4SOla Jeppsson <&apps_smmu 0x1185 0x0420>; 2104178056a4SOla Jeppsson }; 2105178056a4SOla Jeppsson 2106178056a4SOla Jeppsson compute-cb@6 { 2107178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2108178056a4SOla Jeppsson reg = <6>; 2109178056a4SOla Jeppsson iommus = <&apps_smmu 0x2166 0x0400>, 2110178056a4SOla Jeppsson <&apps_smmu 0x1186 0x0420>; 2111178056a4SOla Jeppsson }; 2112178056a4SOla Jeppsson 2113178056a4SOla Jeppsson compute-cb@7 { 2114178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2115178056a4SOla Jeppsson reg = <7>; 2116178056a4SOla Jeppsson iommus = <&apps_smmu 0x2167 0x0400>, 2117178056a4SOla Jeppsson <&apps_smmu 0x1187 0x0420>; 2118178056a4SOla Jeppsson }; 2119178056a4SOla Jeppsson 2120178056a4SOla Jeppsson compute-cb@8 { 2121178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2122178056a4SOla Jeppsson reg = <8>; 2123178056a4SOla Jeppsson iommus = <&apps_smmu 0x2168 0x0400>, 2124178056a4SOla Jeppsson <&apps_smmu 0x1188 0x0420>; 2125178056a4SOla Jeppsson }; 2126178056a4SOla Jeppsson 2127178056a4SOla Jeppsson /* note: secure cb9 in downstream */ 2128178056a4SOla Jeppsson }; 2129177fcf0aSVinod Koul }; 2130177fcf0aSVinod Koul }; 2131177fcf0aSVinod Koul 2132e780fb31SJack Pham usb_1_hsphy: phy@88e3000 { 2133e780fb31SJack Pham compatible = "qcom,sm8350-usb-hs-phy", 2134e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 2135e780fb31SJack Pham reg = <0 0x088e3000 0 0x400>; 2136e780fb31SJack Pham status = "disabled"; 2137e780fb31SJack Pham #phy-cells = <0>; 2138e780fb31SJack Pham 2139e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 2140e780fb31SJack Pham clock-names = "ref"; 2141e780fb31SJack Pham 21426d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 2143e780fb31SJack Pham }; 2144e780fb31SJack Pham 2145e780fb31SJack Pham usb_2_hsphy: phy@88e4000 { 2146e780fb31SJack Pham compatible = "qcom,sm8250-usb-hs-phy", 2147e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 2148e780fb31SJack Pham reg = <0 0x088e4000 0 0x400>; 2149e780fb31SJack Pham status = "disabled"; 2150e780fb31SJack Pham #phy-cells = <0>; 2151e780fb31SJack Pham 2152e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 2153e780fb31SJack Pham clock-names = "ref"; 2154e780fb31SJack Pham 21556d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 2156e780fb31SJack Pham }; 2157e780fb31SJack Pham 2158e780fb31SJack Pham usb_1_qmpphy: phy-wrapper@88e9000 { 2159e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-phy"; 2160e780fb31SJack Pham reg = <0 0x088e9000 0 0x200>, 2161e780fb31SJack Pham <0 0x088e8000 0 0x20>; 2162e780fb31SJack Pham status = "disabled"; 2163e780fb31SJack Pham #address-cells = <2>; 2164e780fb31SJack Pham #size-cells = <2>; 2165e780fb31SJack Pham ranges; 2166e780fb31SJack Pham 21676d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 2168e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 21696d91e201SVinod Koul <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 2170e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "com_aux"; 2171e780fb31SJack Pham 21726d91e201SVinod Koul resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 21736d91e201SVinod Koul <&gcc GCC_USB3_PHY_PRIM_BCR>; 2174e780fb31SJack Pham reset-names = "phy", "common"; 2175e780fb31SJack Pham 2176e780fb31SJack Pham usb_1_ssphy: phy@88e9200 { 2177e780fb31SJack Pham reg = <0 0x088e9200 0 0x200>, 2178e780fb31SJack Pham <0 0x088e9400 0 0x200>, 2179e780fb31SJack Pham <0 0x088e9c00 0 0x400>, 2180e780fb31SJack Pham <0 0x088e9600 0 0x200>, 2181e780fb31SJack Pham <0 0x088e9800 0 0x200>, 2182e780fb31SJack Pham <0 0x088e9a00 0 0x100>; 2183e780fb31SJack Pham #phy-cells = <0>; 2184e780fb31SJack Pham #clock-cells = <1>; 21856d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 2186e780fb31SJack Pham clock-names = "pipe0"; 2187e780fb31SJack Pham clock-output-names = "usb3_phy_pipe_clk_src"; 2188e780fb31SJack Pham }; 2189e780fb31SJack Pham }; 2190e780fb31SJack Pham 2191e780fb31SJack Pham usb_2_qmpphy: phy-wrapper@88eb000 { 2192e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-uni-phy"; 2193e780fb31SJack Pham reg = <0 0x088eb000 0 0x200>; 2194e780fb31SJack Pham status = "disabled"; 2195e780fb31SJack Pham #address-cells = <2>; 2196e780fb31SJack Pham #size-cells = <2>; 2197e780fb31SJack Pham ranges; 2198e780fb31SJack Pham 21996d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 2200e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 22016d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>, 22026d91e201SVinod Koul <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 2203e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 2204e780fb31SJack Pham 22056d91e201SVinod Koul resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 22066d91e201SVinod Koul <&gcc GCC_USB3_PHY_SEC_BCR>; 2207e780fb31SJack Pham reset-names = "phy", "common"; 2208e780fb31SJack Pham 2209e780fb31SJack Pham usb_2_ssphy: phy@88ebe00 { 2210e780fb31SJack Pham reg = <0 0x088ebe00 0 0x200>, 2211e780fb31SJack Pham <0 0x088ec000 0 0x200>, 2212e780fb31SJack Pham <0 0x088eb200 0 0x1100>; 2213e780fb31SJack Pham #phy-cells = <0>; 2214e780fb31SJack Pham #clock-cells = <1>; 22156d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 2216e780fb31SJack Pham clock-names = "pipe0"; 2217e780fb31SJack Pham clock-output-names = "usb3_uni_phy_pipe_clk_src"; 2218e780fb31SJack Pham }; 2219e780fb31SJack Pham }; 2220e780fb31SJack Pham 22211dee9e3bSVinod Koul dc_noc: interconnect@90c0000 { 2222da6b2482SVinod Koul compatible = "qcom,sm8350-dc-noc"; 2223da6b2482SVinod Koul reg = <0 0x090c0000 0 0x4200>; 2224da6b2482SVinod Koul #interconnect-cells = <1>; 2225da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 2226da6b2482SVinod Koul }; 2227da6b2482SVinod Koul 2228da6b2482SVinod Koul gem_noc: interconnect@9100000 { 2229da6b2482SVinod Koul compatible = "qcom,sm8350-gem-noc"; 2230da6b2482SVinod Koul reg = <0 0x09100000 0 0xb4000>; 2231da6b2482SVinod Koul #interconnect-cells = <1>; 2232da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 2233da6b2482SVinod Koul }; 2234da6b2482SVinod Koul 22359ac8999eSKonrad Dybcio system-cache-controller@9200000 { 22369ac8999eSKonrad Dybcio compatible = "qcom,sm8350-llcc"; 22379ac8999eSKonrad Dybcio reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; 22389ac8999eSKonrad Dybcio reg-names = "llcc_base", "llcc_broadcast_base"; 22399ac8999eSKonrad Dybcio }; 22409ac8999eSKonrad Dybcio 2241e780fb31SJack Pham usb_1: usb@a6f8800 { 2242e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 2243e780fb31SJack Pham reg = <0 0x0a6f8800 0 0x400>; 2244e780fb31SJack Pham status = "disabled"; 2245e780fb31SJack Pham #address-cells = <2>; 2246e780fb31SJack Pham #size-cells = <2>; 2247e780fb31SJack Pham ranges; 2248e780fb31SJack Pham 22496d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 22506d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>, 22516d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 22526d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 22536d91e201SVinod Koul <&gcc GCC_USB30_PRIM_SLEEP_CLK>; 2254e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 2255e780fb31SJack Pham "sleep"; 2256e780fb31SJack Pham 22576d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 22586d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>; 2259e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 2260e780fb31SJack Pham 2261e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 2262e780fb31SJack Pham <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 2263e780fb31SJack Pham <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 2264e780fb31SJack Pham <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 2265e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 2266e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 2267e780fb31SJack Pham 22686d91e201SVinod Koul power-domains = <&gcc USB30_PRIM_GDSC>; 2269e780fb31SJack Pham 22706d91e201SVinod Koul resets = <&gcc GCC_USB30_PRIM_BCR>; 2271e780fb31SJack Pham 22722aa2b50dSBhupesh Sharma usb_1_dwc3: usb@a600000 { 2273e780fb31SJack Pham compatible = "snps,dwc3"; 2274e780fb31SJack Pham reg = <0 0x0a600000 0 0xcd00>; 2275e780fb31SJack Pham interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 2276e780fb31SJack Pham iommus = <&apps_smmu 0x0 0x0>; 2277e780fb31SJack Pham snps,dis_u2_susphy_quirk; 2278e780fb31SJack Pham snps,dis_enblslpm_quirk; 2279e780fb31SJack Pham phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 2280e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 2281e780fb31SJack Pham }; 2282e780fb31SJack Pham }; 2283e780fb31SJack Pham 2284e780fb31SJack Pham usb_2: usb@a8f8800 { 2285e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 2286e780fb31SJack Pham reg = <0 0x0a8f8800 0 0x400>; 2287e780fb31SJack Pham status = "disabled"; 2288e780fb31SJack Pham #address-cells = <2>; 2289e780fb31SJack Pham #size-cells = <2>; 2290e780fb31SJack Pham ranges; 2291e780fb31SJack Pham 22926d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 22936d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>, 22946d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 22956d91e201SVinod Koul <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 22966d91e201SVinod Koul <&gcc GCC_USB30_SEC_SLEEP_CLK>, 22976d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>; 2298e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 2299e780fb31SJack Pham "sleep", "xo"; 2300e780fb31SJack Pham 23016d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 23026d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>; 2303e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 2304e780fb31SJack Pham 2305e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 2306e780fb31SJack Pham <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 2307e780fb31SJack Pham <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 2308e780fb31SJack Pham <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 2309e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 2310e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 2311e780fb31SJack Pham 23126d91e201SVinod Koul power-domains = <&gcc USB30_SEC_GDSC>; 2313e780fb31SJack Pham 23146d91e201SVinod Koul resets = <&gcc GCC_USB30_SEC_BCR>; 2315e780fb31SJack Pham 23162aa2b50dSBhupesh Sharma usb_2_dwc3: usb@a800000 { 2317e780fb31SJack Pham compatible = "snps,dwc3"; 2318e780fb31SJack Pham reg = <0 0x0a800000 0 0xcd00>; 2319e780fb31SJack Pham interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 2320e780fb31SJack Pham iommus = <&apps_smmu 0x20 0x0>; 2321e780fb31SJack Pham snps,dis_u2_susphy_quirk; 2322e780fb31SJack Pham snps,dis_enblslpm_quirk; 2323e780fb31SJack Pham phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 2324e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 2325e780fb31SJack Pham }; 2326e780fb31SJack Pham }; 2327177fcf0aSVinod Koul 2328177fcf0aSVinod Koul adsp: remoteproc@17300000 { 2329177fcf0aSVinod Koul compatible = "qcom,sm8350-adsp-pas"; 2330177fcf0aSVinod Koul reg = <0 0x17300000 0 0x100>; 2331177fcf0aSVinod Koul 2332177fcf0aSVinod Koul interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 2333177fcf0aSVinod Koul <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 2334177fcf0aSVinod Koul <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 2335177fcf0aSVinod Koul <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 2336177fcf0aSVinod Koul <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 2337177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 2338177fcf0aSVinod Koul "handover", "stop-ack"; 2339177fcf0aSVinod Koul 2340177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 2341177fcf0aSVinod Koul clock-names = "xo"; 2342177fcf0aSVinod Koul 23436b7cb2d2SSibi Sankar power-domains = <&rpmhpd 4>, 2344177fcf0aSVinod Koul <&rpmhpd 5>; 23456b7cb2d2SSibi Sankar power-domain-names = "lcx", "lmx"; 2346177fcf0aSVinod Koul 2347177fcf0aSVinod Koul memory-region = <&pil_adsp_mem>; 2348177fcf0aSVinod Koul 23496b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 23506b7cb2d2SSibi Sankar 2351177fcf0aSVinod Koul qcom,smem-states = <&smp2p_adsp_out 0>; 2352177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 2353177fcf0aSVinod Koul 2354177fcf0aSVinod Koul status = "disabled"; 2355177fcf0aSVinod Koul 2356177fcf0aSVinod Koul glink-edge { 2357177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 2358177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 2359177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 2360177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 2361177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 2362177fcf0aSVinod Koul 2363177fcf0aSVinod Koul label = "lpass"; 2364177fcf0aSVinod Koul qcom,remote-pid = <2>; 2365178056a4SOla Jeppsson 2366178056a4SOla Jeppsson fastrpc { 2367178056a4SOla Jeppsson compatible = "qcom,fastrpc"; 2368178056a4SOla Jeppsson qcom,glink-channels = "fastrpcglink-apps-dsp"; 2369178056a4SOla Jeppsson label = "adsp"; 2370178056a4SOla Jeppsson #address-cells = <1>; 2371178056a4SOla Jeppsson #size-cells = <0>; 2372178056a4SOla Jeppsson 2373178056a4SOla Jeppsson compute-cb@3 { 2374178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2375178056a4SOla Jeppsson reg = <3>; 2376178056a4SOla Jeppsson iommus = <&apps_smmu 0x1803 0x0>; 2377178056a4SOla Jeppsson }; 2378178056a4SOla Jeppsson 2379178056a4SOla Jeppsson compute-cb@4 { 2380178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2381178056a4SOla Jeppsson reg = <4>; 2382178056a4SOla Jeppsson iommus = <&apps_smmu 0x1804 0x0>; 2383178056a4SOla Jeppsson }; 2384178056a4SOla Jeppsson 2385178056a4SOla Jeppsson compute-cb@5 { 2386178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2387178056a4SOla Jeppsson reg = <5>; 2388178056a4SOla Jeppsson iommus = <&apps_smmu 0x1805 0x0>; 2389178056a4SOla Jeppsson }; 2390178056a4SOla Jeppsson }; 2391177fcf0aSVinod Koul }; 2392177fcf0aSVinod Koul }; 2393b7e8f433SVinod Koul }; 2394b7e8f433SVinod Koul 23954dcaa68eSsatya priya thermal_zones: thermal-zones { 239620f9d94eSRobert Foss cpu0-thermal { 239720f9d94eSRobert Foss polling-delay-passive = <250>; 239820f9d94eSRobert Foss polling-delay = <1000>; 239920f9d94eSRobert Foss 240020f9d94eSRobert Foss thermal-sensors = <&tsens0 1>; 240120f9d94eSRobert Foss 240220f9d94eSRobert Foss trips { 240320f9d94eSRobert Foss cpu0_alert0: trip-point0 { 240420f9d94eSRobert Foss temperature = <90000>; 240520f9d94eSRobert Foss hysteresis = <2000>; 240620f9d94eSRobert Foss type = "passive"; 240720f9d94eSRobert Foss }; 240820f9d94eSRobert Foss 240920f9d94eSRobert Foss cpu0_alert1: trip-point1 { 241020f9d94eSRobert Foss temperature = <95000>; 241120f9d94eSRobert Foss hysteresis = <2000>; 241220f9d94eSRobert Foss type = "passive"; 241320f9d94eSRobert Foss }; 241420f9d94eSRobert Foss 241520f9d94eSRobert Foss cpu0_crit: cpu_crit { 241620f9d94eSRobert Foss temperature = <110000>; 241720f9d94eSRobert Foss hysteresis = <1000>; 241820f9d94eSRobert Foss type = "critical"; 241920f9d94eSRobert Foss }; 242020f9d94eSRobert Foss }; 242120f9d94eSRobert Foss 242220f9d94eSRobert Foss cooling-maps { 242320f9d94eSRobert Foss map0 { 242420f9d94eSRobert Foss trip = <&cpu0_alert0>; 242520f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 242620f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 242720f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 242820f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 242920f9d94eSRobert Foss }; 243020f9d94eSRobert Foss map1 { 243120f9d94eSRobert Foss trip = <&cpu0_alert1>; 243220f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 243320f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 243420f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 243520f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 243620f9d94eSRobert Foss }; 243720f9d94eSRobert Foss }; 243820f9d94eSRobert Foss }; 243920f9d94eSRobert Foss 244020f9d94eSRobert Foss cpu1-thermal { 244120f9d94eSRobert Foss polling-delay-passive = <250>; 244220f9d94eSRobert Foss polling-delay = <1000>; 244320f9d94eSRobert Foss 244420f9d94eSRobert Foss thermal-sensors = <&tsens0 2>; 244520f9d94eSRobert Foss 244620f9d94eSRobert Foss trips { 244720f9d94eSRobert Foss cpu1_alert0: trip-point0 { 244820f9d94eSRobert Foss temperature = <90000>; 244920f9d94eSRobert Foss hysteresis = <2000>; 245020f9d94eSRobert Foss type = "passive"; 245120f9d94eSRobert Foss }; 245220f9d94eSRobert Foss 245320f9d94eSRobert Foss cpu1_alert1: trip-point1 { 245420f9d94eSRobert Foss temperature = <95000>; 245520f9d94eSRobert Foss hysteresis = <2000>; 245620f9d94eSRobert Foss type = "passive"; 245720f9d94eSRobert Foss }; 245820f9d94eSRobert Foss 245920f9d94eSRobert Foss cpu1_crit: cpu_crit { 246020f9d94eSRobert Foss temperature = <110000>; 246120f9d94eSRobert Foss hysteresis = <1000>; 246220f9d94eSRobert Foss type = "critical"; 246320f9d94eSRobert Foss }; 246420f9d94eSRobert Foss }; 246520f9d94eSRobert Foss 246620f9d94eSRobert Foss cooling-maps { 246720f9d94eSRobert Foss map0 { 246820f9d94eSRobert Foss trip = <&cpu1_alert0>; 246920f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 247020f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 247120f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 247220f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 247320f9d94eSRobert Foss }; 247420f9d94eSRobert Foss map1 { 247520f9d94eSRobert Foss trip = <&cpu1_alert1>; 247620f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 247720f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 247820f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 247920f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 248020f9d94eSRobert Foss }; 248120f9d94eSRobert Foss }; 248220f9d94eSRobert Foss }; 248320f9d94eSRobert Foss 248420f9d94eSRobert Foss cpu2-thermal { 248520f9d94eSRobert Foss polling-delay-passive = <250>; 248620f9d94eSRobert Foss polling-delay = <1000>; 248720f9d94eSRobert Foss 248820f9d94eSRobert Foss thermal-sensors = <&tsens0 3>; 248920f9d94eSRobert Foss 249020f9d94eSRobert Foss trips { 249120f9d94eSRobert Foss cpu2_alert0: trip-point0 { 249220f9d94eSRobert Foss temperature = <90000>; 249320f9d94eSRobert Foss hysteresis = <2000>; 249420f9d94eSRobert Foss type = "passive"; 249520f9d94eSRobert Foss }; 249620f9d94eSRobert Foss 249720f9d94eSRobert Foss cpu2_alert1: trip-point1 { 249820f9d94eSRobert Foss temperature = <95000>; 249920f9d94eSRobert Foss hysteresis = <2000>; 250020f9d94eSRobert Foss type = "passive"; 250120f9d94eSRobert Foss }; 250220f9d94eSRobert Foss 250320f9d94eSRobert Foss cpu2_crit: cpu_crit { 250420f9d94eSRobert Foss temperature = <110000>; 250520f9d94eSRobert Foss hysteresis = <1000>; 250620f9d94eSRobert Foss type = "critical"; 250720f9d94eSRobert Foss }; 250820f9d94eSRobert Foss }; 250920f9d94eSRobert Foss 251020f9d94eSRobert Foss cooling-maps { 251120f9d94eSRobert Foss map0 { 251220f9d94eSRobert Foss trip = <&cpu2_alert0>; 251320f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 251420f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 251520f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 251620f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 251720f9d94eSRobert Foss }; 251820f9d94eSRobert Foss map1 { 251920f9d94eSRobert Foss trip = <&cpu2_alert1>; 252020f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 252120f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 252220f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 252320f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 252420f9d94eSRobert Foss }; 252520f9d94eSRobert Foss }; 252620f9d94eSRobert Foss }; 252720f9d94eSRobert Foss 252820f9d94eSRobert Foss cpu3-thermal { 252920f9d94eSRobert Foss polling-delay-passive = <250>; 253020f9d94eSRobert Foss polling-delay = <1000>; 253120f9d94eSRobert Foss 253220f9d94eSRobert Foss thermal-sensors = <&tsens0 4>; 253320f9d94eSRobert Foss 253420f9d94eSRobert Foss trips { 253520f9d94eSRobert Foss cpu3_alert0: trip-point0 { 253620f9d94eSRobert Foss temperature = <90000>; 253720f9d94eSRobert Foss hysteresis = <2000>; 253820f9d94eSRobert Foss type = "passive"; 253920f9d94eSRobert Foss }; 254020f9d94eSRobert Foss 254120f9d94eSRobert Foss cpu3_alert1: trip-point1 { 254220f9d94eSRobert Foss temperature = <95000>; 254320f9d94eSRobert Foss hysteresis = <2000>; 254420f9d94eSRobert Foss type = "passive"; 254520f9d94eSRobert Foss }; 254620f9d94eSRobert Foss 254720f9d94eSRobert Foss cpu3_crit: cpu_crit { 254820f9d94eSRobert Foss temperature = <110000>; 254920f9d94eSRobert Foss hysteresis = <1000>; 255020f9d94eSRobert Foss type = "critical"; 255120f9d94eSRobert Foss }; 255220f9d94eSRobert Foss }; 255320f9d94eSRobert Foss 255420f9d94eSRobert Foss cooling-maps { 255520f9d94eSRobert Foss map0 { 255620f9d94eSRobert Foss trip = <&cpu3_alert0>; 255720f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 255820f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 255920f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 256020f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 256120f9d94eSRobert Foss }; 256220f9d94eSRobert Foss map1 { 256320f9d94eSRobert Foss trip = <&cpu3_alert1>; 256420f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 256520f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 256620f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 256720f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 256820f9d94eSRobert Foss }; 256920f9d94eSRobert Foss }; 257020f9d94eSRobert Foss }; 257120f9d94eSRobert Foss 257220f9d94eSRobert Foss cpu4-top-thermal { 257320f9d94eSRobert Foss polling-delay-passive = <250>; 257420f9d94eSRobert Foss polling-delay = <1000>; 257520f9d94eSRobert Foss 257620f9d94eSRobert Foss thermal-sensors = <&tsens0 7>; 257720f9d94eSRobert Foss 257820f9d94eSRobert Foss trips { 257920f9d94eSRobert Foss cpu4_top_alert0: trip-point0 { 258020f9d94eSRobert Foss temperature = <90000>; 258120f9d94eSRobert Foss hysteresis = <2000>; 258220f9d94eSRobert Foss type = "passive"; 258320f9d94eSRobert Foss }; 258420f9d94eSRobert Foss 258520f9d94eSRobert Foss cpu4_top_alert1: trip-point1 { 258620f9d94eSRobert Foss temperature = <95000>; 258720f9d94eSRobert Foss hysteresis = <2000>; 258820f9d94eSRobert Foss type = "passive"; 258920f9d94eSRobert Foss }; 259020f9d94eSRobert Foss 259120f9d94eSRobert Foss cpu4_top_crit: cpu_crit { 259220f9d94eSRobert Foss temperature = <110000>; 259320f9d94eSRobert Foss hysteresis = <1000>; 259420f9d94eSRobert Foss type = "critical"; 259520f9d94eSRobert Foss }; 259620f9d94eSRobert Foss }; 259720f9d94eSRobert Foss 259820f9d94eSRobert Foss cooling-maps { 259920f9d94eSRobert Foss map0 { 260020f9d94eSRobert Foss trip = <&cpu4_top_alert0>; 260120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 260220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 260320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 260420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 260520f9d94eSRobert Foss }; 260620f9d94eSRobert Foss map1 { 260720f9d94eSRobert Foss trip = <&cpu4_top_alert1>; 260820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 260920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 261020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 261120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 261220f9d94eSRobert Foss }; 261320f9d94eSRobert Foss }; 261420f9d94eSRobert Foss }; 261520f9d94eSRobert Foss 261620f9d94eSRobert Foss cpu5-top-thermal { 261720f9d94eSRobert Foss polling-delay-passive = <250>; 261820f9d94eSRobert Foss polling-delay = <1000>; 261920f9d94eSRobert Foss 262020f9d94eSRobert Foss thermal-sensors = <&tsens0 8>; 262120f9d94eSRobert Foss 262220f9d94eSRobert Foss trips { 262320f9d94eSRobert Foss cpu5_top_alert0: trip-point0 { 262420f9d94eSRobert Foss temperature = <90000>; 262520f9d94eSRobert Foss hysteresis = <2000>; 262620f9d94eSRobert Foss type = "passive"; 262720f9d94eSRobert Foss }; 262820f9d94eSRobert Foss 262920f9d94eSRobert Foss cpu5_top_alert1: trip-point1 { 263020f9d94eSRobert Foss temperature = <95000>; 263120f9d94eSRobert Foss hysteresis = <2000>; 263220f9d94eSRobert Foss type = "passive"; 263320f9d94eSRobert Foss }; 263420f9d94eSRobert Foss 263520f9d94eSRobert Foss cpu5_top_crit: cpu_crit { 263620f9d94eSRobert Foss temperature = <110000>; 263720f9d94eSRobert Foss hysteresis = <1000>; 263820f9d94eSRobert Foss type = "critical"; 263920f9d94eSRobert Foss }; 264020f9d94eSRobert Foss }; 264120f9d94eSRobert Foss 264220f9d94eSRobert Foss cooling-maps { 264320f9d94eSRobert Foss map0 { 264420f9d94eSRobert Foss trip = <&cpu5_top_alert0>; 264520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 264620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 264720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 264820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 264920f9d94eSRobert Foss }; 265020f9d94eSRobert Foss map1 { 265120f9d94eSRobert Foss trip = <&cpu5_top_alert1>; 265220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 265320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 265420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 265520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 265620f9d94eSRobert Foss }; 265720f9d94eSRobert Foss }; 265820f9d94eSRobert Foss }; 265920f9d94eSRobert Foss 266020f9d94eSRobert Foss cpu6-top-thermal { 266120f9d94eSRobert Foss polling-delay-passive = <250>; 266220f9d94eSRobert Foss polling-delay = <1000>; 266320f9d94eSRobert Foss 266420f9d94eSRobert Foss thermal-sensors = <&tsens0 9>; 266520f9d94eSRobert Foss 266620f9d94eSRobert Foss trips { 266720f9d94eSRobert Foss cpu6_top_alert0: trip-point0 { 266820f9d94eSRobert Foss temperature = <90000>; 266920f9d94eSRobert Foss hysteresis = <2000>; 267020f9d94eSRobert Foss type = "passive"; 267120f9d94eSRobert Foss }; 267220f9d94eSRobert Foss 267320f9d94eSRobert Foss cpu6_top_alert1: trip-point1 { 267420f9d94eSRobert Foss temperature = <95000>; 267520f9d94eSRobert Foss hysteresis = <2000>; 267620f9d94eSRobert Foss type = "passive"; 267720f9d94eSRobert Foss }; 267820f9d94eSRobert Foss 267920f9d94eSRobert Foss cpu6_top_crit: cpu_crit { 268020f9d94eSRobert Foss temperature = <110000>; 268120f9d94eSRobert Foss hysteresis = <1000>; 268220f9d94eSRobert Foss type = "critical"; 268320f9d94eSRobert Foss }; 268420f9d94eSRobert Foss }; 268520f9d94eSRobert Foss 268620f9d94eSRobert Foss cooling-maps { 268720f9d94eSRobert Foss map0 { 268820f9d94eSRobert Foss trip = <&cpu6_top_alert0>; 268920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 269020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 269120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 269220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 269320f9d94eSRobert Foss }; 269420f9d94eSRobert Foss map1 { 269520f9d94eSRobert Foss trip = <&cpu6_top_alert1>; 269620f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 269720f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 269820f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 269920f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 270020f9d94eSRobert Foss }; 270120f9d94eSRobert Foss }; 270220f9d94eSRobert Foss }; 270320f9d94eSRobert Foss 270420f9d94eSRobert Foss cpu7-top-thermal { 270520f9d94eSRobert Foss polling-delay-passive = <250>; 270620f9d94eSRobert Foss polling-delay = <1000>; 270720f9d94eSRobert Foss 270820f9d94eSRobert Foss thermal-sensors = <&tsens0 10>; 270920f9d94eSRobert Foss 271020f9d94eSRobert Foss trips { 271120f9d94eSRobert Foss cpu7_top_alert0: trip-point0 { 271220f9d94eSRobert Foss temperature = <90000>; 271320f9d94eSRobert Foss hysteresis = <2000>; 271420f9d94eSRobert Foss type = "passive"; 271520f9d94eSRobert Foss }; 271620f9d94eSRobert Foss 271720f9d94eSRobert Foss cpu7_top_alert1: trip-point1 { 271820f9d94eSRobert Foss temperature = <95000>; 271920f9d94eSRobert Foss hysteresis = <2000>; 272020f9d94eSRobert Foss type = "passive"; 272120f9d94eSRobert Foss }; 272220f9d94eSRobert Foss 272320f9d94eSRobert Foss cpu7_top_crit: cpu_crit { 272420f9d94eSRobert Foss temperature = <110000>; 272520f9d94eSRobert Foss hysteresis = <1000>; 272620f9d94eSRobert Foss type = "critical"; 272720f9d94eSRobert Foss }; 272820f9d94eSRobert Foss }; 272920f9d94eSRobert Foss 273020f9d94eSRobert Foss cooling-maps { 273120f9d94eSRobert Foss map0 { 273220f9d94eSRobert Foss trip = <&cpu7_top_alert0>; 273320f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 273420f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 273520f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 273620f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 273720f9d94eSRobert Foss }; 273820f9d94eSRobert Foss map1 { 273920f9d94eSRobert Foss trip = <&cpu7_top_alert1>; 274020f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 274120f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 274220f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 274320f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 274420f9d94eSRobert Foss }; 274520f9d94eSRobert Foss }; 274620f9d94eSRobert Foss }; 274720f9d94eSRobert Foss 274820f9d94eSRobert Foss cpu4-bottom-thermal { 274920f9d94eSRobert Foss polling-delay-passive = <250>; 275020f9d94eSRobert Foss polling-delay = <1000>; 275120f9d94eSRobert Foss 275220f9d94eSRobert Foss thermal-sensors = <&tsens0 11>; 275320f9d94eSRobert Foss 275420f9d94eSRobert Foss trips { 275520f9d94eSRobert Foss cpu4_bottom_alert0: trip-point0 { 275620f9d94eSRobert Foss temperature = <90000>; 275720f9d94eSRobert Foss hysteresis = <2000>; 275820f9d94eSRobert Foss type = "passive"; 275920f9d94eSRobert Foss }; 276020f9d94eSRobert Foss 276120f9d94eSRobert Foss cpu4_bottom_alert1: trip-point1 { 276220f9d94eSRobert Foss temperature = <95000>; 276320f9d94eSRobert Foss hysteresis = <2000>; 276420f9d94eSRobert Foss type = "passive"; 276520f9d94eSRobert Foss }; 276620f9d94eSRobert Foss 276720f9d94eSRobert Foss cpu4_bottom_crit: cpu_crit { 276820f9d94eSRobert Foss temperature = <110000>; 276920f9d94eSRobert Foss hysteresis = <1000>; 277020f9d94eSRobert Foss type = "critical"; 277120f9d94eSRobert Foss }; 277220f9d94eSRobert Foss }; 277320f9d94eSRobert Foss 277420f9d94eSRobert Foss cooling-maps { 277520f9d94eSRobert Foss map0 { 277620f9d94eSRobert Foss trip = <&cpu4_bottom_alert0>; 277720f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 277820f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 277920f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 278020f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 278120f9d94eSRobert Foss }; 278220f9d94eSRobert Foss map1 { 278320f9d94eSRobert Foss trip = <&cpu4_bottom_alert1>; 278420f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 278520f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 278620f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 278720f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 278820f9d94eSRobert Foss }; 278920f9d94eSRobert Foss }; 279020f9d94eSRobert Foss }; 279120f9d94eSRobert Foss 279220f9d94eSRobert Foss cpu5-bottom-thermal { 279320f9d94eSRobert Foss polling-delay-passive = <250>; 279420f9d94eSRobert Foss polling-delay = <1000>; 279520f9d94eSRobert Foss 279620f9d94eSRobert Foss thermal-sensors = <&tsens0 12>; 279720f9d94eSRobert Foss 279820f9d94eSRobert Foss trips { 279920f9d94eSRobert Foss cpu5_bottom_alert0: trip-point0 { 280020f9d94eSRobert Foss temperature = <90000>; 280120f9d94eSRobert Foss hysteresis = <2000>; 280220f9d94eSRobert Foss type = "passive"; 280320f9d94eSRobert Foss }; 280420f9d94eSRobert Foss 280520f9d94eSRobert Foss cpu5_bottom_alert1: trip-point1 { 280620f9d94eSRobert Foss temperature = <95000>; 280720f9d94eSRobert Foss hysteresis = <2000>; 280820f9d94eSRobert Foss type = "passive"; 280920f9d94eSRobert Foss }; 281020f9d94eSRobert Foss 281120f9d94eSRobert Foss cpu5_bottom_crit: cpu_crit { 281220f9d94eSRobert Foss temperature = <110000>; 281320f9d94eSRobert Foss hysteresis = <1000>; 281420f9d94eSRobert Foss type = "critical"; 281520f9d94eSRobert Foss }; 281620f9d94eSRobert Foss }; 281720f9d94eSRobert Foss 281820f9d94eSRobert Foss cooling-maps { 281920f9d94eSRobert Foss map0 { 282020f9d94eSRobert Foss trip = <&cpu5_bottom_alert0>; 282120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 282220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 282320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 282420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 282520f9d94eSRobert Foss }; 282620f9d94eSRobert Foss map1 { 282720f9d94eSRobert Foss trip = <&cpu5_bottom_alert1>; 282820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 282920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 283020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 283120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 283220f9d94eSRobert Foss }; 283320f9d94eSRobert Foss }; 283420f9d94eSRobert Foss }; 283520f9d94eSRobert Foss 283620f9d94eSRobert Foss cpu6-bottom-thermal { 283720f9d94eSRobert Foss polling-delay-passive = <250>; 283820f9d94eSRobert Foss polling-delay = <1000>; 283920f9d94eSRobert Foss 284020f9d94eSRobert Foss thermal-sensors = <&tsens0 13>; 284120f9d94eSRobert Foss 284220f9d94eSRobert Foss trips { 284320f9d94eSRobert Foss cpu6_bottom_alert0: trip-point0 { 284420f9d94eSRobert Foss temperature = <90000>; 284520f9d94eSRobert Foss hysteresis = <2000>; 284620f9d94eSRobert Foss type = "passive"; 284720f9d94eSRobert Foss }; 284820f9d94eSRobert Foss 284920f9d94eSRobert Foss cpu6_bottom_alert1: trip-point1 { 285020f9d94eSRobert Foss temperature = <95000>; 285120f9d94eSRobert Foss hysteresis = <2000>; 285220f9d94eSRobert Foss type = "passive"; 285320f9d94eSRobert Foss }; 285420f9d94eSRobert Foss 285520f9d94eSRobert Foss cpu6_bottom_crit: cpu_crit { 285620f9d94eSRobert Foss temperature = <110000>; 285720f9d94eSRobert Foss hysteresis = <1000>; 285820f9d94eSRobert Foss type = "critical"; 285920f9d94eSRobert Foss }; 286020f9d94eSRobert Foss }; 286120f9d94eSRobert Foss 286220f9d94eSRobert Foss cooling-maps { 286320f9d94eSRobert Foss map0 { 286420f9d94eSRobert Foss trip = <&cpu6_bottom_alert0>; 286520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 286620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 286720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 286820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 286920f9d94eSRobert Foss }; 287020f9d94eSRobert Foss map1 { 287120f9d94eSRobert Foss trip = <&cpu6_bottom_alert1>; 287220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 287320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 287420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 287520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 287620f9d94eSRobert Foss }; 287720f9d94eSRobert Foss }; 287820f9d94eSRobert Foss }; 287920f9d94eSRobert Foss 288020f9d94eSRobert Foss cpu7-bottom-thermal { 288120f9d94eSRobert Foss polling-delay-passive = <250>; 288220f9d94eSRobert Foss polling-delay = <1000>; 288320f9d94eSRobert Foss 288420f9d94eSRobert Foss thermal-sensors = <&tsens0 14>; 288520f9d94eSRobert Foss 288620f9d94eSRobert Foss trips { 288720f9d94eSRobert Foss cpu7_bottom_alert0: trip-point0 { 288820f9d94eSRobert Foss temperature = <90000>; 288920f9d94eSRobert Foss hysteresis = <2000>; 289020f9d94eSRobert Foss type = "passive"; 289120f9d94eSRobert Foss }; 289220f9d94eSRobert Foss 289320f9d94eSRobert Foss cpu7_bottom_alert1: trip-point1 { 289420f9d94eSRobert Foss temperature = <95000>; 289520f9d94eSRobert Foss hysteresis = <2000>; 289620f9d94eSRobert Foss type = "passive"; 289720f9d94eSRobert Foss }; 289820f9d94eSRobert Foss 289920f9d94eSRobert Foss cpu7_bottom_crit: cpu_crit { 290020f9d94eSRobert Foss temperature = <110000>; 290120f9d94eSRobert Foss hysteresis = <1000>; 290220f9d94eSRobert Foss type = "critical"; 290320f9d94eSRobert Foss }; 290420f9d94eSRobert Foss }; 290520f9d94eSRobert Foss 290620f9d94eSRobert Foss cooling-maps { 290720f9d94eSRobert Foss map0 { 290820f9d94eSRobert Foss trip = <&cpu7_bottom_alert0>; 290920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 291020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 291120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 291220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 291320f9d94eSRobert Foss }; 291420f9d94eSRobert Foss map1 { 291520f9d94eSRobert Foss trip = <&cpu7_bottom_alert1>; 291620f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 291720f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 291820f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 291920f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 292020f9d94eSRobert Foss }; 292120f9d94eSRobert Foss }; 292220f9d94eSRobert Foss }; 292320f9d94eSRobert Foss 292420f9d94eSRobert Foss aoss0-thermal { 292520f9d94eSRobert Foss polling-delay-passive = <250>; 292620f9d94eSRobert Foss polling-delay = <1000>; 292720f9d94eSRobert Foss 292820f9d94eSRobert Foss thermal-sensors = <&tsens0 0>; 292920f9d94eSRobert Foss 293020f9d94eSRobert Foss trips { 293120f9d94eSRobert Foss aoss0_alert0: trip-point0 { 293220f9d94eSRobert Foss temperature = <90000>; 293320f9d94eSRobert Foss hysteresis = <2000>; 293420f9d94eSRobert Foss type = "hot"; 293520f9d94eSRobert Foss }; 293620f9d94eSRobert Foss }; 293720f9d94eSRobert Foss }; 293820f9d94eSRobert Foss 293920f9d94eSRobert Foss cluster0-thermal { 294020f9d94eSRobert Foss polling-delay-passive = <250>; 294120f9d94eSRobert Foss polling-delay = <1000>; 294220f9d94eSRobert Foss 294320f9d94eSRobert Foss thermal-sensors = <&tsens0 5>; 294420f9d94eSRobert Foss 294520f9d94eSRobert Foss trips { 294620f9d94eSRobert Foss cluster0_alert0: trip-point0 { 294720f9d94eSRobert Foss temperature = <90000>; 294820f9d94eSRobert Foss hysteresis = <2000>; 294920f9d94eSRobert Foss type = "hot"; 295020f9d94eSRobert Foss }; 295120f9d94eSRobert Foss cluster0_crit: cluster0_crit { 295220f9d94eSRobert Foss temperature = <110000>; 295320f9d94eSRobert Foss hysteresis = <2000>; 295420f9d94eSRobert Foss type = "critical"; 295520f9d94eSRobert Foss }; 295620f9d94eSRobert Foss }; 295720f9d94eSRobert Foss }; 295820f9d94eSRobert Foss 295920f9d94eSRobert Foss cluster1-thermal { 296020f9d94eSRobert Foss polling-delay-passive = <250>; 296120f9d94eSRobert Foss polling-delay = <1000>; 296220f9d94eSRobert Foss 296320f9d94eSRobert Foss thermal-sensors = <&tsens0 6>; 296420f9d94eSRobert Foss 296520f9d94eSRobert Foss trips { 296620f9d94eSRobert Foss cluster1_alert0: trip-point0 { 296720f9d94eSRobert Foss temperature = <90000>; 296820f9d94eSRobert Foss hysteresis = <2000>; 296920f9d94eSRobert Foss type = "hot"; 297020f9d94eSRobert Foss }; 297120f9d94eSRobert Foss cluster1_crit: cluster1_crit { 297220f9d94eSRobert Foss temperature = <110000>; 297320f9d94eSRobert Foss hysteresis = <2000>; 297420f9d94eSRobert Foss type = "critical"; 297520f9d94eSRobert Foss }; 297620f9d94eSRobert Foss }; 297720f9d94eSRobert Foss }; 297820f9d94eSRobert Foss 297920f9d94eSRobert Foss aoss1-thermal { 298020f9d94eSRobert Foss polling-delay-passive = <250>; 298120f9d94eSRobert Foss polling-delay = <1000>; 298220f9d94eSRobert Foss 298320f9d94eSRobert Foss thermal-sensors = <&tsens1 0>; 298420f9d94eSRobert Foss 298520f9d94eSRobert Foss trips { 298620f9d94eSRobert Foss aoss1_alert0: trip-point0 { 298720f9d94eSRobert Foss temperature = <90000>; 298820f9d94eSRobert Foss hysteresis = <2000>; 298920f9d94eSRobert Foss type = "hot"; 299020f9d94eSRobert Foss }; 299120f9d94eSRobert Foss }; 299220f9d94eSRobert Foss }; 299320f9d94eSRobert Foss 29947be1c395SDavid Heidelberg gpu-top-thermal { 299520f9d94eSRobert Foss polling-delay-passive = <250>; 299620f9d94eSRobert Foss polling-delay = <1000>; 299720f9d94eSRobert Foss 299820f9d94eSRobert Foss thermal-sensors = <&tsens1 1>; 299920f9d94eSRobert Foss 300020f9d94eSRobert Foss trips { 300120f9d94eSRobert Foss gpu1_alert0: trip-point0 { 300220f9d94eSRobert Foss temperature = <90000>; 300320f9d94eSRobert Foss hysteresis = <1000>; 300420f9d94eSRobert Foss type = "hot"; 300520f9d94eSRobert Foss }; 300620f9d94eSRobert Foss }; 300720f9d94eSRobert Foss }; 300820f9d94eSRobert Foss 30097be1c395SDavid Heidelberg gpu-bottom-thermal { 301020f9d94eSRobert Foss polling-delay-passive = <250>; 301120f9d94eSRobert Foss polling-delay = <1000>; 301220f9d94eSRobert Foss 301320f9d94eSRobert Foss thermal-sensors = <&tsens1 2>; 301420f9d94eSRobert Foss 301520f9d94eSRobert Foss trips { 301620f9d94eSRobert Foss gpu2_alert0: trip-point0 { 301720f9d94eSRobert Foss temperature = <90000>; 301820f9d94eSRobert Foss hysteresis = <1000>; 301920f9d94eSRobert Foss type = "hot"; 302020f9d94eSRobert Foss }; 302120f9d94eSRobert Foss }; 302220f9d94eSRobert Foss }; 302320f9d94eSRobert Foss 302420f9d94eSRobert Foss nspss1-thermal { 302520f9d94eSRobert Foss polling-delay-passive = <250>; 302620f9d94eSRobert Foss polling-delay = <1000>; 302720f9d94eSRobert Foss 302820f9d94eSRobert Foss thermal-sensors = <&tsens1 3>; 302920f9d94eSRobert Foss 303020f9d94eSRobert Foss trips { 303120f9d94eSRobert Foss nspss1_alert0: trip-point0 { 303220f9d94eSRobert Foss temperature = <90000>; 303320f9d94eSRobert Foss hysteresis = <1000>; 303420f9d94eSRobert Foss type = "hot"; 303520f9d94eSRobert Foss }; 303620f9d94eSRobert Foss }; 303720f9d94eSRobert Foss }; 303820f9d94eSRobert Foss 303920f9d94eSRobert Foss nspss2-thermal { 304020f9d94eSRobert Foss polling-delay-passive = <250>; 304120f9d94eSRobert Foss polling-delay = <1000>; 304220f9d94eSRobert Foss 304320f9d94eSRobert Foss thermal-sensors = <&tsens1 4>; 304420f9d94eSRobert Foss 304520f9d94eSRobert Foss trips { 304620f9d94eSRobert Foss nspss2_alert0: trip-point0 { 304720f9d94eSRobert Foss temperature = <90000>; 304820f9d94eSRobert Foss hysteresis = <1000>; 304920f9d94eSRobert Foss type = "hot"; 305020f9d94eSRobert Foss }; 305120f9d94eSRobert Foss }; 305220f9d94eSRobert Foss }; 305320f9d94eSRobert Foss 305420f9d94eSRobert Foss nspss3-thermal { 305520f9d94eSRobert Foss polling-delay-passive = <250>; 305620f9d94eSRobert Foss polling-delay = <1000>; 305720f9d94eSRobert Foss 305820f9d94eSRobert Foss thermal-sensors = <&tsens1 5>; 305920f9d94eSRobert Foss 306020f9d94eSRobert Foss trips { 306120f9d94eSRobert Foss nspss3_alert0: trip-point0 { 306220f9d94eSRobert Foss temperature = <90000>; 306320f9d94eSRobert Foss hysteresis = <1000>; 306420f9d94eSRobert Foss type = "hot"; 306520f9d94eSRobert Foss }; 306620f9d94eSRobert Foss }; 306720f9d94eSRobert Foss }; 306820f9d94eSRobert Foss 306920f9d94eSRobert Foss video-thermal { 307020f9d94eSRobert Foss polling-delay-passive = <250>; 307120f9d94eSRobert Foss polling-delay = <1000>; 307220f9d94eSRobert Foss 307320f9d94eSRobert Foss thermal-sensors = <&tsens1 6>; 307420f9d94eSRobert Foss 307520f9d94eSRobert Foss trips { 307620f9d94eSRobert Foss video_alert0: trip-point0 { 307720f9d94eSRobert Foss temperature = <90000>; 307820f9d94eSRobert Foss hysteresis = <2000>; 307920f9d94eSRobert Foss type = "hot"; 308020f9d94eSRobert Foss }; 308120f9d94eSRobert Foss }; 308220f9d94eSRobert Foss }; 308320f9d94eSRobert Foss 308420f9d94eSRobert Foss mem-thermal { 308520f9d94eSRobert Foss polling-delay-passive = <250>; 308620f9d94eSRobert Foss polling-delay = <1000>; 308720f9d94eSRobert Foss 308820f9d94eSRobert Foss thermal-sensors = <&tsens1 7>; 308920f9d94eSRobert Foss 309020f9d94eSRobert Foss trips { 309120f9d94eSRobert Foss mem_alert0: trip-point0 { 309220f9d94eSRobert Foss temperature = <90000>; 309320f9d94eSRobert Foss hysteresis = <2000>; 309420f9d94eSRobert Foss type = "hot"; 309520f9d94eSRobert Foss }; 309620f9d94eSRobert Foss }; 309720f9d94eSRobert Foss }; 309820f9d94eSRobert Foss 30997be1c395SDavid Heidelberg modem1-top-thermal { 310020f9d94eSRobert Foss polling-delay-passive = <250>; 310120f9d94eSRobert Foss polling-delay = <1000>; 310220f9d94eSRobert Foss 310320f9d94eSRobert Foss thermal-sensors = <&tsens1 8>; 310420f9d94eSRobert Foss 310520f9d94eSRobert Foss trips { 310620f9d94eSRobert Foss modem1_alert0: trip-point0 { 310720f9d94eSRobert Foss temperature = <90000>; 310820f9d94eSRobert Foss hysteresis = <2000>; 310920f9d94eSRobert Foss type = "hot"; 311020f9d94eSRobert Foss }; 311120f9d94eSRobert Foss }; 311220f9d94eSRobert Foss }; 311320f9d94eSRobert Foss 31147be1c395SDavid Heidelberg modem2-top-thermal { 311520f9d94eSRobert Foss polling-delay-passive = <250>; 311620f9d94eSRobert Foss polling-delay = <1000>; 311720f9d94eSRobert Foss 311820f9d94eSRobert Foss thermal-sensors = <&tsens1 9>; 311920f9d94eSRobert Foss 312020f9d94eSRobert Foss trips { 312120f9d94eSRobert Foss modem2_alert0: trip-point0 { 312220f9d94eSRobert Foss temperature = <90000>; 312320f9d94eSRobert Foss hysteresis = <2000>; 312420f9d94eSRobert Foss type = "hot"; 312520f9d94eSRobert Foss }; 312620f9d94eSRobert Foss }; 312720f9d94eSRobert Foss }; 312820f9d94eSRobert Foss 31297be1c395SDavid Heidelberg modem3-top-thermal { 313020f9d94eSRobert Foss polling-delay-passive = <250>; 313120f9d94eSRobert Foss polling-delay = <1000>; 313220f9d94eSRobert Foss 313320f9d94eSRobert Foss thermal-sensors = <&tsens1 10>; 313420f9d94eSRobert Foss 313520f9d94eSRobert Foss trips { 313620f9d94eSRobert Foss modem3_alert0: trip-point0 { 313720f9d94eSRobert Foss temperature = <90000>; 313820f9d94eSRobert Foss hysteresis = <2000>; 313920f9d94eSRobert Foss type = "hot"; 314020f9d94eSRobert Foss }; 314120f9d94eSRobert Foss }; 314220f9d94eSRobert Foss }; 314320f9d94eSRobert Foss 31447be1c395SDavid Heidelberg modem4-top-thermal { 314520f9d94eSRobert Foss polling-delay-passive = <250>; 314620f9d94eSRobert Foss polling-delay = <1000>; 314720f9d94eSRobert Foss 314820f9d94eSRobert Foss thermal-sensors = <&tsens1 11>; 314920f9d94eSRobert Foss 315020f9d94eSRobert Foss trips { 315120f9d94eSRobert Foss modem4_alert0: trip-point0 { 315220f9d94eSRobert Foss temperature = <90000>; 315320f9d94eSRobert Foss hysteresis = <2000>; 315420f9d94eSRobert Foss type = "hot"; 315520f9d94eSRobert Foss }; 315620f9d94eSRobert Foss }; 315720f9d94eSRobert Foss }; 315820f9d94eSRobert Foss 31597be1c395SDavid Heidelberg camera-top-thermal { 316020f9d94eSRobert Foss polling-delay-passive = <250>; 316120f9d94eSRobert Foss polling-delay = <1000>; 316220f9d94eSRobert Foss 316320f9d94eSRobert Foss thermal-sensors = <&tsens1 12>; 316420f9d94eSRobert Foss 316520f9d94eSRobert Foss trips { 316620f9d94eSRobert Foss camera1_alert0: trip-point0 { 316720f9d94eSRobert Foss temperature = <90000>; 316820f9d94eSRobert Foss hysteresis = <2000>; 316920f9d94eSRobert Foss type = "hot"; 317020f9d94eSRobert Foss }; 317120f9d94eSRobert Foss }; 317220f9d94eSRobert Foss }; 317320f9d94eSRobert Foss 31747be1c395SDavid Heidelberg cam-bottom-thermal { 317520f9d94eSRobert Foss polling-delay-passive = <250>; 317620f9d94eSRobert Foss polling-delay = <1000>; 317720f9d94eSRobert Foss 317820f9d94eSRobert Foss thermal-sensors = <&tsens1 13>; 317920f9d94eSRobert Foss 318020f9d94eSRobert Foss trips { 318120f9d94eSRobert Foss camera2_alert0: trip-point0 { 318220f9d94eSRobert Foss temperature = <90000>; 318320f9d94eSRobert Foss hysteresis = <2000>; 318420f9d94eSRobert Foss type = "hot"; 318520f9d94eSRobert Foss }; 318620f9d94eSRobert Foss }; 318720f9d94eSRobert Foss }; 318820f9d94eSRobert Foss }; 318920f9d94eSRobert Foss 3190b7e8f433SVinod Koul timer { 3191b7e8f433SVinod Koul compatible = "arm,armv8-timer"; 3192b7e8f433SVinod Koul interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3193b7e8f433SVinod Koul <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3194b7e8f433SVinod Koul <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3195b7e8f433SVinod Koul <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3196b7e8f433SVinod Koul }; 3197b7e8f433SVinod Koul}; 3198