1b7e8f433SVinod Koul// SPDX-License-Identifier: BSD-3-Clause 2b7e8f433SVinod Koul/* 34f23d2a5SVinod Koul * Copyright (c) 2020, Linaro Limited 4b7e8f433SVinod Koul */ 5b7e8f433SVinod Koul 6b7e8f433SVinod Koul#include <dt-bindings/interrupt-controller/arm-gic.h> 76d91e201SVinod Koul#include <dt-bindings/clock/qcom,gcc-sm8350.h> 8b7e8f433SVinod Koul#include <dt-bindings/clock/qcom,rpmh.h> 9f0360a7cSKonrad Dybcio#include <dt-bindings/gpio/gpio.h> 1084c856d0SVinod Koul#include <dt-bindings/interconnect/qcom,sm8350.h> 11b7e8f433SVinod Koul#include <dt-bindings/mailbox/qcom-ipcc.h> 12b7e8f433SVinod Koul#include <dt-bindings/power/qcom-rpmpd.h> 13b7e8f433SVinod Koul#include <dt-bindings/soc/qcom,rpmh-rsc.h> 1420f9d94eSRobert Foss#include <dt-bindings/thermal/thermal.h> 15f11d3e7dSAlex Elder#include <dt-bindings/interconnect/qcom,sm8350.h> 16b7e8f433SVinod Koul 17b7e8f433SVinod Koul/ { 18b7e8f433SVinod Koul interrupt-parent = <&intc>; 19b7e8f433SVinod Koul 20b7e8f433SVinod Koul #address-cells = <2>; 21b7e8f433SVinod Koul #size-cells = <2>; 22b7e8f433SVinod Koul 23b7e8f433SVinod Koul chosen { }; 24b7e8f433SVinod Koul 25b7e8f433SVinod Koul clocks { 26b7e8f433SVinod Koul xo_board: xo-board { 27b7e8f433SVinod Koul compatible = "fixed-clock"; 28b7e8f433SVinod Koul #clock-cells = <0>; 29b7e8f433SVinod Koul clock-frequency = <38400000>; 30b7e8f433SVinod Koul clock-output-names = "xo_board"; 31b7e8f433SVinod Koul }; 32b7e8f433SVinod Koul 33b7e8f433SVinod Koul sleep_clk: sleep-clk { 34b7e8f433SVinod Koul compatible = "fixed-clock"; 35b7e8f433SVinod Koul clock-frequency = <32000>; 36b7e8f433SVinod Koul #clock-cells = <0>; 37b7e8f433SVinod Koul }; 380fd4dcb6SBjorn Andersson 390fd4dcb6SBjorn Andersson ufs_phy_rx_symbol_0_clk: ufs-phy-rx-symbol-0 { 400fd4dcb6SBjorn Andersson compatible = "fixed-clock"; 410fd4dcb6SBjorn Andersson clock-frequency = <1000>; 420fd4dcb6SBjorn Andersson #clock-cells = <0>; 430fd4dcb6SBjorn Andersson }; 440fd4dcb6SBjorn Andersson 450fd4dcb6SBjorn Andersson ufs_phy_rx_symbol_1_clk: ufs-phy-rx-symbol-1 { 460fd4dcb6SBjorn Andersson compatible = "fixed-clock"; 470fd4dcb6SBjorn Andersson clock-frequency = <1000>; 480fd4dcb6SBjorn Andersson #clock-cells = <0>; 490fd4dcb6SBjorn Andersson }; 500fd4dcb6SBjorn Andersson 510fd4dcb6SBjorn Andersson ufs_phy_tx_symbol_0_clk: ufs-phy-tx-symbol-0 { 520fd4dcb6SBjorn Andersson compatible = "fixed-clock"; 530fd4dcb6SBjorn Andersson clock-frequency = <1000>; 540fd4dcb6SBjorn Andersson #clock-cells = <0>; 550fd4dcb6SBjorn Andersson }; 56b7e8f433SVinod Koul }; 57b7e8f433SVinod Koul 58b7e8f433SVinod Koul cpus { 59b7e8f433SVinod Koul #address-cells = <2>; 60b7e8f433SVinod Koul #size-cells = <0>; 61b7e8f433SVinod Koul 62b7e8f433SVinod Koul CPU0: cpu@0 { 63b7e8f433SVinod Koul device_type = "cpu"; 64b7e8f433SVinod Koul compatible = "qcom,kryo685"; 65b7e8f433SVinod Koul reg = <0x0 0x0>; 66b7e8f433SVinod Koul enable-method = "psci"; 67b7e8f433SVinod Koul next-level-cache = <&L2_0>; 68ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 6907ddb302SBjorn Andersson power-domains = <&CPU_PD0>; 7007ddb302SBjorn Andersson power-domain-names = "psci"; 7120f9d94eSRobert Foss #cooling-cells = <2>; 72b7e8f433SVinod Koul L2_0: l2-cache { 73b7e8f433SVinod Koul compatible = "cache"; 74b7e8f433SVinod Koul next-level-cache = <&L3_0>; 75b7e8f433SVinod Koul L3_0: l3-cache { 76b7e8f433SVinod Koul compatible = "cache"; 77b7e8f433SVinod Koul }; 78b7e8f433SVinod Koul }; 79b7e8f433SVinod Koul }; 80b7e8f433SVinod Koul 81b7e8f433SVinod Koul CPU1: cpu@100 { 82b7e8f433SVinod Koul device_type = "cpu"; 83b7e8f433SVinod Koul compatible = "qcom,kryo685"; 84b7e8f433SVinod Koul reg = <0x0 0x100>; 85b7e8f433SVinod Koul enable-method = "psci"; 86b7e8f433SVinod Koul next-level-cache = <&L2_100>; 87ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 8807ddb302SBjorn Andersson power-domains = <&CPU_PD1>; 8907ddb302SBjorn Andersson power-domain-names = "psci"; 9020f9d94eSRobert Foss #cooling-cells = <2>; 91b7e8f433SVinod Koul L2_100: l2-cache { 92b7e8f433SVinod Koul compatible = "cache"; 93b7e8f433SVinod Koul next-level-cache = <&L3_0>; 94b7e8f433SVinod Koul }; 95b7e8f433SVinod Koul }; 96b7e8f433SVinod Koul 97b7e8f433SVinod Koul CPU2: cpu@200 { 98b7e8f433SVinod Koul device_type = "cpu"; 99b7e8f433SVinod Koul compatible = "qcom,kryo685"; 100b7e8f433SVinod Koul reg = <0x0 0x200>; 101b7e8f433SVinod Koul enable-method = "psci"; 102b7e8f433SVinod Koul next-level-cache = <&L2_200>; 103ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 10407ddb302SBjorn Andersson power-domains = <&CPU_PD2>; 10507ddb302SBjorn Andersson power-domain-names = "psci"; 10620f9d94eSRobert Foss #cooling-cells = <2>; 107b7e8f433SVinod Koul L2_200: l2-cache { 108b7e8f433SVinod Koul compatible = "cache"; 109b7e8f433SVinod Koul next-level-cache = <&L3_0>; 110b7e8f433SVinod Koul }; 111b7e8f433SVinod Koul }; 112b7e8f433SVinod Koul 113b7e8f433SVinod Koul CPU3: cpu@300 { 114b7e8f433SVinod Koul device_type = "cpu"; 115b7e8f433SVinod Koul compatible = "qcom,kryo685"; 116b7e8f433SVinod Koul reg = <0x0 0x300>; 117b7e8f433SVinod Koul enable-method = "psci"; 118b7e8f433SVinod Koul next-level-cache = <&L2_300>; 119ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 12007ddb302SBjorn Andersson power-domains = <&CPU_PD3>; 12107ddb302SBjorn Andersson power-domain-names = "psci"; 12220f9d94eSRobert Foss #cooling-cells = <2>; 123b7e8f433SVinod Koul L2_300: l2-cache { 124b7e8f433SVinod Koul compatible = "cache"; 125b7e8f433SVinod Koul next-level-cache = <&L3_0>; 126b7e8f433SVinod Koul }; 127b7e8f433SVinod Koul }; 128b7e8f433SVinod Koul 129b7e8f433SVinod Koul CPU4: cpu@400 { 130b7e8f433SVinod Koul device_type = "cpu"; 131b7e8f433SVinod Koul compatible = "qcom,kryo685"; 132b7e8f433SVinod Koul reg = <0x0 0x400>; 133b7e8f433SVinod Koul enable-method = "psci"; 134b7e8f433SVinod Koul next-level-cache = <&L2_400>; 135ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 13607ddb302SBjorn Andersson power-domains = <&CPU_PD4>; 13707ddb302SBjorn Andersson power-domain-names = "psci"; 13820f9d94eSRobert Foss #cooling-cells = <2>; 139b7e8f433SVinod Koul L2_400: l2-cache { 140b7e8f433SVinod Koul compatible = "cache"; 141b7e8f433SVinod Koul next-level-cache = <&L3_0>; 142b7e8f433SVinod Koul }; 143b7e8f433SVinod Koul }; 144b7e8f433SVinod Koul 145b7e8f433SVinod Koul CPU5: cpu@500 { 146b7e8f433SVinod Koul device_type = "cpu"; 147b7e8f433SVinod Koul compatible = "qcom,kryo685"; 148b7e8f433SVinod Koul reg = <0x0 0x500>; 149b7e8f433SVinod Koul enable-method = "psci"; 150b7e8f433SVinod Koul next-level-cache = <&L2_500>; 151ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 15207ddb302SBjorn Andersson power-domains = <&CPU_PD5>; 15307ddb302SBjorn Andersson power-domain-names = "psci"; 15420f9d94eSRobert Foss #cooling-cells = <2>; 155b7e8f433SVinod Koul L2_500: l2-cache { 156b7e8f433SVinod Koul compatible = "cache"; 157b7e8f433SVinod Koul next-level-cache = <&L3_0>; 158b7e8f433SVinod Koul }; 159b7e8f433SVinod Koul 160b7e8f433SVinod Koul }; 161b7e8f433SVinod Koul 162b7e8f433SVinod Koul CPU6: cpu@600 { 163b7e8f433SVinod Koul device_type = "cpu"; 164b7e8f433SVinod Koul compatible = "qcom,kryo685"; 165b7e8f433SVinod Koul reg = <0x0 0x600>; 166b7e8f433SVinod Koul enable-method = "psci"; 167b7e8f433SVinod Koul next-level-cache = <&L2_600>; 168ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 16907ddb302SBjorn Andersson power-domains = <&CPU_PD6>; 17007ddb302SBjorn Andersson power-domain-names = "psci"; 17120f9d94eSRobert Foss #cooling-cells = <2>; 172b7e8f433SVinod Koul L2_600: l2-cache { 173b7e8f433SVinod Koul compatible = "cache"; 174b7e8f433SVinod Koul next-level-cache = <&L3_0>; 175b7e8f433SVinod Koul }; 176b7e8f433SVinod Koul }; 177b7e8f433SVinod Koul 178b7e8f433SVinod Koul CPU7: cpu@700 { 179b7e8f433SVinod Koul device_type = "cpu"; 180b7e8f433SVinod Koul compatible = "qcom,kryo685"; 181b7e8f433SVinod Koul reg = <0x0 0x700>; 182b7e8f433SVinod Koul enable-method = "psci"; 183b7e8f433SVinod Koul next-level-cache = <&L2_700>; 184ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 2>; 18507ddb302SBjorn Andersson power-domains = <&CPU_PD7>; 18607ddb302SBjorn Andersson power-domain-names = "psci"; 18720f9d94eSRobert Foss #cooling-cells = <2>; 188b7e8f433SVinod Koul L2_700: l2-cache { 189b7e8f433SVinod Koul compatible = "cache"; 190b7e8f433SVinod Koul next-level-cache = <&L3_0>; 191b7e8f433SVinod Koul }; 192b7e8f433SVinod Koul }; 19307ddb302SBjorn Andersson 19407ddb302SBjorn Andersson cpu-map { 19507ddb302SBjorn Andersson cluster0 { 19607ddb302SBjorn Andersson core0 { 19707ddb302SBjorn Andersson cpu = <&CPU0>; 19807ddb302SBjorn Andersson }; 19907ddb302SBjorn Andersson 20007ddb302SBjorn Andersson core1 { 20107ddb302SBjorn Andersson cpu = <&CPU1>; 20207ddb302SBjorn Andersson }; 20307ddb302SBjorn Andersson 20407ddb302SBjorn Andersson core2 { 20507ddb302SBjorn Andersson cpu = <&CPU2>; 20607ddb302SBjorn Andersson }; 20707ddb302SBjorn Andersson 20807ddb302SBjorn Andersson core3 { 20907ddb302SBjorn Andersson cpu = <&CPU3>; 21007ddb302SBjorn Andersson }; 21107ddb302SBjorn Andersson 21207ddb302SBjorn Andersson core4 { 21307ddb302SBjorn Andersson cpu = <&CPU4>; 21407ddb302SBjorn Andersson }; 21507ddb302SBjorn Andersson 21607ddb302SBjorn Andersson core5 { 21707ddb302SBjorn Andersson cpu = <&CPU5>; 21807ddb302SBjorn Andersson }; 21907ddb302SBjorn Andersson 22007ddb302SBjorn Andersson core6 { 22107ddb302SBjorn Andersson cpu = <&CPU6>; 22207ddb302SBjorn Andersson }; 22307ddb302SBjorn Andersson 22407ddb302SBjorn Andersson core7 { 22507ddb302SBjorn Andersson cpu = <&CPU7>; 22607ddb302SBjorn Andersson }; 22707ddb302SBjorn Andersson }; 22807ddb302SBjorn Andersson }; 22907ddb302SBjorn Andersson 23007ddb302SBjorn Andersson idle-states { 23107ddb302SBjorn Andersson entry-method = "psci"; 23207ddb302SBjorn Andersson 23307ddb302SBjorn Andersson LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { 23407ddb302SBjorn Andersson compatible = "arm,idle-state"; 23507ddb302SBjorn Andersson idle-state-name = "silver-rail-power-collapse"; 23607ddb302SBjorn Andersson arm,psci-suspend-param = <0x40000004>; 23707ddb302SBjorn Andersson entry-latency-us = <355>; 23807ddb302SBjorn Andersson exit-latency-us = <909>; 23907ddb302SBjorn Andersson min-residency-us = <3934>; 24007ddb302SBjorn Andersson local-timer-stop; 24107ddb302SBjorn Andersson }; 24207ddb302SBjorn Andersson 24307ddb302SBjorn Andersson BIG_CPU_SLEEP_0: cpu-sleep-1-0 { 24407ddb302SBjorn Andersson compatible = "arm,idle-state"; 24507ddb302SBjorn Andersson idle-state-name = "gold-rail-power-collapse"; 24607ddb302SBjorn Andersson arm,psci-suspend-param = <0x40000004>; 24707ddb302SBjorn Andersson entry-latency-us = <241>; 24807ddb302SBjorn Andersson exit-latency-us = <1461>; 24907ddb302SBjorn Andersson min-residency-us = <4488>; 25007ddb302SBjorn Andersson local-timer-stop; 25107ddb302SBjorn Andersson }; 25207ddb302SBjorn Andersson }; 25307ddb302SBjorn Andersson 25407ddb302SBjorn Andersson domain-idle-states { 25507ddb302SBjorn Andersson CLUSTER_SLEEP_0: cluster-sleep-0 { 25607ddb302SBjorn Andersson compatible = "domain-idle-state"; 25707ddb302SBjorn Andersson idle-state-name = "cluster-power-collapse"; 25807ddb302SBjorn Andersson arm,psci-suspend-param = <0x4100c344>; 25907ddb302SBjorn Andersson entry-latency-us = <3263>; 26007ddb302SBjorn Andersson exit-latency-us = <6562>; 26107ddb302SBjorn Andersson min-residency-us = <9987>; 26207ddb302SBjorn Andersson local-timer-stop; 26307ddb302SBjorn Andersson }; 26407ddb302SBjorn Andersson }; 265b7e8f433SVinod Koul }; 266b7e8f433SVinod Koul 267b7e8f433SVinod Koul firmware { 268b7e8f433SVinod Koul scm: scm { 269b7e8f433SVinod Koul compatible = "qcom,scm-sm8350", "qcom,scm"; 270b7e8f433SVinod Koul #reset-cells = <1>; 271b7e8f433SVinod Koul }; 272b7e8f433SVinod Koul }; 273b7e8f433SVinod Koul 274b7e8f433SVinod Koul memory@80000000 { 275b7e8f433SVinod Koul device_type = "memory"; 276b7e8f433SVinod Koul /* We expect the bootloader to fill in the size */ 277b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x0>; 278b7e8f433SVinod Koul }; 279b7e8f433SVinod Koul 280b7e8f433SVinod Koul pmu { 281b7e8f433SVinod Koul compatible = "arm,armv8-pmuv3"; 282794d3e30SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 283b7e8f433SVinod Koul }; 284b7e8f433SVinod Koul 285b7e8f433SVinod Koul psci { 286b7e8f433SVinod Koul compatible = "arm,psci-1.0"; 287b7e8f433SVinod Koul method = "smc"; 28807ddb302SBjorn Andersson 28907ddb302SBjorn Andersson CPU_PD0: cpu0 { 29007ddb302SBjorn Andersson #power-domain-cells = <0>; 29107ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 29207ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 29307ddb302SBjorn Andersson }; 29407ddb302SBjorn Andersson 29507ddb302SBjorn Andersson CPU_PD1: cpu1 { 29607ddb302SBjorn Andersson #power-domain-cells = <0>; 29707ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 29807ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 29907ddb302SBjorn Andersson }; 30007ddb302SBjorn Andersson 30107ddb302SBjorn Andersson CPU_PD2: cpu2 { 30207ddb302SBjorn Andersson #power-domain-cells = <0>; 30307ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 30407ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 30507ddb302SBjorn Andersson }; 30607ddb302SBjorn Andersson 30707ddb302SBjorn Andersson CPU_PD3: cpu3 { 30807ddb302SBjorn Andersson #power-domain-cells = <0>; 30907ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 31007ddb302SBjorn Andersson domain-idle-states = <&LITTLE_CPU_SLEEP_0>; 31107ddb302SBjorn Andersson }; 31207ddb302SBjorn Andersson 31307ddb302SBjorn Andersson CPU_PD4: cpu4 { 31407ddb302SBjorn Andersson #power-domain-cells = <0>; 31507ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 31607ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 31707ddb302SBjorn Andersson }; 31807ddb302SBjorn Andersson 31907ddb302SBjorn Andersson CPU_PD5: cpu5 { 32007ddb302SBjorn Andersson #power-domain-cells = <0>; 32107ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 32207ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 32307ddb302SBjorn Andersson }; 32407ddb302SBjorn Andersson 32507ddb302SBjorn Andersson CPU_PD6: cpu6 { 32607ddb302SBjorn Andersson #power-domain-cells = <0>; 32707ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 32807ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 32907ddb302SBjorn Andersson }; 33007ddb302SBjorn Andersson 33107ddb302SBjorn Andersson CPU_PD7: cpu7 { 33207ddb302SBjorn Andersson #power-domain-cells = <0>; 33307ddb302SBjorn Andersson power-domains = <&CLUSTER_PD>; 33407ddb302SBjorn Andersson domain-idle-states = <&BIG_CPU_SLEEP_0>; 33507ddb302SBjorn Andersson }; 33607ddb302SBjorn Andersson 33707ddb302SBjorn Andersson CLUSTER_PD: cpu-cluster0 { 33807ddb302SBjorn Andersson #power-domain-cells = <0>; 33907ddb302SBjorn Andersson domain-idle-states = <&CLUSTER_SLEEP_0>; 34007ddb302SBjorn Andersson }; 341b7e8f433SVinod Koul }; 342b7e8f433SVinod Koul 343b7e8f433SVinod Koul reserved_memory: reserved-memory { 344b7e8f433SVinod Koul #address-cells = <2>; 345b7e8f433SVinod Koul #size-cells = <2>; 346b7e8f433SVinod Koul ranges; 347b7e8f433SVinod Koul 348b7e8f433SVinod Koul hyp_mem: memory@80000000 { 349b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x600000>; 350b7e8f433SVinod Koul no-map; 351b7e8f433SVinod Koul }; 352b7e8f433SVinod Koul 353b7e8f433SVinod Koul xbl_aop_mem: memory@80700000 { 354b7e8f433SVinod Koul no-map; 355b7e8f433SVinod Koul reg = <0x0 0x80700000 0x0 0x160000>; 356b7e8f433SVinod Koul }; 357b7e8f433SVinod Koul 358b7e8f433SVinod Koul cmd_db: memory@80860000 { 359b7e8f433SVinod Koul compatible = "qcom,cmd-db"; 360b7e8f433SVinod Koul reg = <0x0 0x80860000 0x0 0x20000>; 361b7e8f433SVinod Koul no-map; 362b7e8f433SVinod Koul }; 363b7e8f433SVinod Koul 364b7e8f433SVinod Koul reserved_xbl_uefi_log: memory@80880000 { 365b7e8f433SVinod Koul reg = <0x0 0x80880000 0x0 0x14000>; 366b7e8f433SVinod Koul no-map; 367b7e8f433SVinod Koul }; 368b7e8f433SVinod Koul 369b7e8f433SVinod Koul smem_mem: memory@80900000 { 370b7e8f433SVinod Koul reg = <0x0 0x80900000 0x0 0x200000>; 371b7e8f433SVinod Koul no-map; 372b7e8f433SVinod Koul }; 373b7e8f433SVinod Koul 374b7e8f433SVinod Koul cpucp_fw_mem: memory@80b00000 { 375b7e8f433SVinod Koul reg = <0x0 0x80b00000 0x0 0x100000>; 376b7e8f433SVinod Koul no-map; 377b7e8f433SVinod Koul }; 378b7e8f433SVinod Koul 379b7e8f433SVinod Koul cdsp_secure_heap: memory@80c00000 { 380b7e8f433SVinod Koul reg = <0x0 0x80c00000 0x0 0x4600000>; 381b7e8f433SVinod Koul no-map; 382b7e8f433SVinod Koul }; 383b7e8f433SVinod Koul 384b7e8f433SVinod Koul pil_camera_mem: mmeory@85200000 { 385b7e8f433SVinod Koul reg = <0x0 0x85200000 0x0 0x500000>; 386b7e8f433SVinod Koul no-map; 387b7e8f433SVinod Koul }; 388b7e8f433SVinod Koul 389b7e8f433SVinod Koul pil_video_mem: memory@85700000 { 390b7e8f433SVinod Koul reg = <0x0 0x85700000 0x0 0x500000>; 391b7e8f433SVinod Koul no-map; 392b7e8f433SVinod Koul }; 393b7e8f433SVinod Koul 394b7e8f433SVinod Koul pil_cvp_mem: memory@85c00000 { 395b7e8f433SVinod Koul reg = <0x0 0x85c00000 0x0 0x500000>; 396b7e8f433SVinod Koul no-map; 397b7e8f433SVinod Koul }; 398b7e8f433SVinod Koul 399b7e8f433SVinod Koul pil_adsp_mem: memory@86100000 { 400b7e8f433SVinod Koul reg = <0x0 0x86100000 0x0 0x2100000>; 401b7e8f433SVinod Koul no-map; 402b7e8f433SVinod Koul }; 403b7e8f433SVinod Koul 404b7e8f433SVinod Koul pil_slpi_mem: memory@88200000 { 405b7e8f433SVinod Koul reg = <0x0 0x88200000 0x0 0x1500000>; 406b7e8f433SVinod Koul no-map; 407b7e8f433SVinod Koul }; 408b7e8f433SVinod Koul 409b7e8f433SVinod Koul pil_cdsp_mem: memory@89700000 { 410b7e8f433SVinod Koul reg = <0x0 0x89700000 0x0 0x1e00000>; 411b7e8f433SVinod Koul no-map; 412b7e8f433SVinod Koul }; 413b7e8f433SVinod Koul 414b7e8f433SVinod Koul pil_ipa_fw_mem: memory@8b500000 { 415b7e8f433SVinod Koul reg = <0x0 0x8b500000 0x0 0x10000>; 416b7e8f433SVinod Koul no-map; 417b7e8f433SVinod Koul }; 418b7e8f433SVinod Koul 419b7e8f433SVinod Koul pil_ipa_gsi_mem: memory@8b510000 { 420b7e8f433SVinod Koul reg = <0x0 0x8b510000 0x0 0xa000>; 421b7e8f433SVinod Koul no-map; 422b7e8f433SVinod Koul }; 423b7e8f433SVinod Koul 424b7e8f433SVinod Koul pil_gpu_mem: memory@8b51a000 { 425b7e8f433SVinod Koul reg = <0x0 0x8b51a000 0x0 0x2000>; 426b7e8f433SVinod Koul no-map; 427b7e8f433SVinod Koul }; 428b7e8f433SVinod Koul 429b7e8f433SVinod Koul pil_spss_mem: memory@8b600000 { 430b7e8f433SVinod Koul reg = <0x0 0x8b600000 0x0 0x100000>; 431b7e8f433SVinod Koul no-map; 432b7e8f433SVinod Koul }; 433b7e8f433SVinod Koul 434b7e8f433SVinod Koul pil_modem_mem: memory@8b800000 { 435b7e8f433SVinod Koul reg = <0x0 0x8b800000 0x0 0x10000000>; 436b7e8f433SVinod Koul no-map; 437b7e8f433SVinod Koul }; 438b7e8f433SVinod Koul 439774890c9SVinod Koul rmtfs_mem: memory@9b800000 { 440774890c9SVinod Koul compatible = "qcom,rmtfs-mem"; 441774890c9SVinod Koul reg = <0x0 0x9b800000 0x0 0x280000>; 442774890c9SVinod Koul no-map; 443774890c9SVinod Koul 444774890c9SVinod Koul qcom,client-id = <1>; 445774890c9SVinod Koul qcom,vmid = <15>; 446774890c9SVinod Koul }; 447774890c9SVinod Koul 448b7e8f433SVinod Koul hyp_reserved_mem: memory@d0000000 { 449b7e8f433SVinod Koul reg = <0x0 0xd0000000 0x0 0x800000>; 450b7e8f433SVinod Koul no-map; 451b7e8f433SVinod Koul }; 452b7e8f433SVinod Koul 453b7e8f433SVinod Koul pil_trustedvm_mem: memory@d0800000 { 454b7e8f433SVinod Koul reg = <0x0 0xd0800000 0x0 0x76f7000>; 455b7e8f433SVinod Koul no-map; 456b7e8f433SVinod Koul }; 457b7e8f433SVinod Koul 458b7e8f433SVinod Koul qrtr_shbuf: memory@d7ef7000 { 459b7e8f433SVinod Koul reg = <0x0 0xd7ef7000 0x0 0x9000>; 460b7e8f433SVinod Koul no-map; 461b7e8f433SVinod Koul }; 462b7e8f433SVinod Koul 463b7e8f433SVinod Koul chan0_shbuf: memory@d7f00000 { 464b7e8f433SVinod Koul reg = <0x0 0xd7f00000 0x0 0x80000>; 465b7e8f433SVinod Koul no-map; 466b7e8f433SVinod Koul }; 467b7e8f433SVinod Koul 468b7e8f433SVinod Koul chan1_shbuf: memory@d7f80000 { 469b7e8f433SVinod Koul reg = <0x0 0xd7f80000 0x0 0x80000>; 470b7e8f433SVinod Koul no-map; 471b7e8f433SVinod Koul }; 472b7e8f433SVinod Koul 473b7e8f433SVinod Koul removed_mem: memory@d8800000 { 474b7e8f433SVinod Koul reg = <0x0 0xd8800000 0x0 0x6800000>; 475b7e8f433SVinod Koul no-map; 476b7e8f433SVinod Koul }; 477b7e8f433SVinod Koul }; 478b7e8f433SVinod Koul 479b7e8f433SVinod Koul smem: qcom,smem { 480b7e8f433SVinod Koul compatible = "qcom,smem"; 481b7e8f433SVinod Koul memory-region = <&smem_mem>; 482b7e8f433SVinod Koul hwlocks = <&tcsr_mutex 3>; 483b7e8f433SVinod Koul }; 484b7e8f433SVinod Koul 48503a41991SVinod Koul smp2p-adsp { 48603a41991SVinod Koul compatible = "qcom,smp2p"; 48703a41991SVinod Koul qcom,smem = <443>, <429>; 48803a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 48903a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 49003a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 49103a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 49203a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 49303a41991SVinod Koul 49403a41991SVinod Koul qcom,local-pid = <0>; 49503a41991SVinod Koul qcom,remote-pid = <2>; 49603a41991SVinod Koul 49703a41991SVinod Koul smp2p_adsp_out: master-kernel { 49803a41991SVinod Koul qcom,entry-name = "master-kernel"; 49903a41991SVinod Koul #qcom,smem-state-cells = <1>; 50003a41991SVinod Koul }; 50103a41991SVinod Koul 50203a41991SVinod Koul smp2p_adsp_in: slave-kernel { 50303a41991SVinod Koul qcom,entry-name = "slave-kernel"; 50403a41991SVinod Koul interrupt-controller; 50503a41991SVinod Koul #interrupt-cells = <2>; 50603a41991SVinod Koul }; 50703a41991SVinod Koul }; 50803a41991SVinod Koul 50903a41991SVinod Koul smp2p-cdsp { 51003a41991SVinod Koul compatible = "qcom,smp2p"; 51103a41991SVinod Koul qcom,smem = <94>, <432>; 51203a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 51303a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 51403a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 51503a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 51603a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 51703a41991SVinod Koul 51803a41991SVinod Koul qcom,local-pid = <0>; 51903a41991SVinod Koul qcom,remote-pid = <5>; 52003a41991SVinod Koul 52103a41991SVinod Koul smp2p_cdsp_out: master-kernel { 52203a41991SVinod Koul qcom,entry-name = "master-kernel"; 52303a41991SVinod Koul #qcom,smem-state-cells = <1>; 52403a41991SVinod Koul }; 52503a41991SVinod Koul 52603a41991SVinod Koul smp2p_cdsp_in: slave-kernel { 52703a41991SVinod Koul qcom,entry-name = "slave-kernel"; 52803a41991SVinod Koul interrupt-controller; 52903a41991SVinod Koul #interrupt-cells = <2>; 53003a41991SVinod Koul }; 53103a41991SVinod Koul }; 53203a41991SVinod Koul 53303a41991SVinod Koul smp2p-modem { 53403a41991SVinod Koul compatible = "qcom,smp2p"; 53503a41991SVinod Koul qcom,smem = <435>, <428>; 53603a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 53703a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 53803a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 53903a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 54003a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 54103a41991SVinod Koul 54203a41991SVinod Koul qcom,local-pid = <0>; 54303a41991SVinod Koul qcom,remote-pid = <1>; 54403a41991SVinod Koul 54503a41991SVinod Koul smp2p_modem_out: master-kernel { 54603a41991SVinod Koul qcom,entry-name = "master-kernel"; 54703a41991SVinod Koul #qcom,smem-state-cells = <1>; 54803a41991SVinod Koul }; 54903a41991SVinod Koul 55003a41991SVinod Koul smp2p_modem_in: slave-kernel { 55103a41991SVinod Koul qcom,entry-name = "slave-kernel"; 55203a41991SVinod Koul interrupt-controller; 55303a41991SVinod Koul #interrupt-cells = <2>; 55403a41991SVinod Koul }; 555f11d3e7dSAlex Elder 556f11d3e7dSAlex Elder ipa_smp2p_out: ipa-ap-to-modem { 557f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 558f11d3e7dSAlex Elder #qcom,smem-state-cells = <1>; 559f11d3e7dSAlex Elder }; 560f11d3e7dSAlex Elder 561f11d3e7dSAlex Elder ipa_smp2p_in: ipa-modem-to-ap { 562f11d3e7dSAlex Elder qcom,entry-name = "ipa"; 563f11d3e7dSAlex Elder interrupt-controller; 564f11d3e7dSAlex Elder #interrupt-cells = <2>; 565f11d3e7dSAlex Elder }; 56603a41991SVinod Koul }; 56703a41991SVinod Koul 56803a41991SVinod Koul smp2p-slpi { 56903a41991SVinod Koul compatible = "qcom,smp2p"; 57003a41991SVinod Koul qcom,smem = <481>, <430>; 57103a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 57203a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 57303a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 57403a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 57503a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 57603a41991SVinod Koul 57703a41991SVinod Koul qcom,local-pid = <0>; 57803a41991SVinod Koul qcom,remote-pid = <3>; 57903a41991SVinod Koul 58003a41991SVinod Koul smp2p_slpi_out: master-kernel { 58103a41991SVinod Koul qcom,entry-name = "master-kernel"; 58203a41991SVinod Koul #qcom,smem-state-cells = <1>; 58303a41991SVinod Koul }; 58403a41991SVinod Koul 58503a41991SVinod Koul smp2p_slpi_in: slave-kernel { 58603a41991SVinod Koul qcom,entry-name = "slave-kernel"; 58703a41991SVinod Koul interrupt-controller; 58803a41991SVinod Koul #interrupt-cells = <2>; 58903a41991SVinod Koul }; 59003a41991SVinod Koul }; 59103a41991SVinod Koul 592b7e8f433SVinod Koul soc: soc@0 { 593b7e8f433SVinod Koul #address-cells = <2>; 594b7e8f433SVinod Koul #size-cells = <2>; 595b7e8f433SVinod Koul ranges = <0 0 0 0 0x10 0>; 596b7e8f433SVinod Koul dma-ranges = <0 0 0 0 0x10 0>; 597b7e8f433SVinod Koul compatible = "simple-bus"; 598b7e8f433SVinod Koul 599b7e8f433SVinod Koul gcc: clock-controller@100000 { 600b7e8f433SVinod Koul compatible = "qcom,gcc-sm8350"; 601b7e8f433SVinod Koul reg = <0x0 0x00100000 0x0 0x1f0000>; 602b7e8f433SVinod Koul #clock-cells = <1>; 603b7e8f433SVinod Koul #reset-cells = <1>; 604b7e8f433SVinod Koul #power-domain-cells = <1>; 6059ea9eb36SKonrad Dybcio clock-names = "bi_tcxo", 6069ea9eb36SKonrad Dybcio "sleep_clk", 6079ea9eb36SKonrad Dybcio "pcie_0_pipe_clk", 6089ea9eb36SKonrad Dybcio "pcie_1_pipe_clk", 6099ea9eb36SKonrad Dybcio "ufs_card_rx_symbol_0_clk", 6109ea9eb36SKonrad Dybcio "ufs_card_rx_symbol_1_clk", 6119ea9eb36SKonrad Dybcio "ufs_card_tx_symbol_0_clk", 6129ea9eb36SKonrad Dybcio "ufs_phy_rx_symbol_0_clk", 6139ea9eb36SKonrad Dybcio "ufs_phy_rx_symbol_1_clk", 6149ea9eb36SKonrad Dybcio "ufs_phy_tx_symbol_0_clk", 6159ea9eb36SKonrad Dybcio "usb3_phy_wrapper_gcc_usb30_pipe_clk", 6169ea9eb36SKonrad Dybcio "usb3_uni_phy_sec_gcc_usb30_pipe_clk"; 6179ea9eb36SKonrad Dybcio clocks = <&rpmhcc RPMH_CXO_CLK>, 6189ea9eb36SKonrad Dybcio <&sleep_clk>, 6199ea9eb36SKonrad Dybcio <0>, 6209ea9eb36SKonrad Dybcio <0>, 6219ea9eb36SKonrad Dybcio <0>, 6229ea9eb36SKonrad Dybcio <0>, 6239ea9eb36SKonrad Dybcio <0>, 6240fd4dcb6SBjorn Andersson <&ufs_phy_rx_symbol_0_clk>, 6250fd4dcb6SBjorn Andersson <&ufs_phy_rx_symbol_1_clk>, 6260fd4dcb6SBjorn Andersson <&ufs_phy_tx_symbol_0_clk>, 6279ea9eb36SKonrad Dybcio <0>, 6289ea9eb36SKonrad Dybcio <0>; 629b7e8f433SVinod Koul }; 630b7e8f433SVinod Koul 631b7e8f433SVinod Koul ipcc: mailbox@408000 { 632b7e8f433SVinod Koul compatible = "qcom,sm8350-ipcc", "qcom,ipcc"; 633b7e8f433SVinod Koul reg = <0 0x00408000 0 0x1000>; 634b7e8f433SVinod Koul interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 635b7e8f433SVinod Koul interrupt-controller; 636b7e8f433SVinod Koul #interrupt-cells = <3>; 637b7e8f433SVinod Koul #mbox-cells = <2>; 638b7e8f433SVinod Koul }; 639b7e8f433SVinod Koul 640cf03cd7eSKonrad Dybcio qup_opp_table_100mhz: qup-100mhz-opp-table { 641cf03cd7eSKonrad Dybcio compatible = "operating-points-v2"; 642cf03cd7eSKonrad Dybcio 643cf03cd7eSKonrad Dybcio opp-50000000 { 644cf03cd7eSKonrad Dybcio opp-hz = /bits/ 64 <50000000>; 645cf03cd7eSKonrad Dybcio required-opps = <&rpmhpd_opp_min_svs>; 646cf03cd7eSKonrad Dybcio }; 647cf03cd7eSKonrad Dybcio 648cf03cd7eSKonrad Dybcio opp-75000000 { 649cf03cd7eSKonrad Dybcio opp-hz = /bits/ 64 <75000000>; 650cf03cd7eSKonrad Dybcio required-opps = <&rpmhpd_opp_low_svs>; 651cf03cd7eSKonrad Dybcio }; 652cf03cd7eSKonrad Dybcio 653cf03cd7eSKonrad Dybcio opp-100000000 { 654cf03cd7eSKonrad Dybcio opp-hz = /bits/ 64 <100000000>; 655cf03cd7eSKonrad Dybcio required-opps = <&rpmhpd_opp_svs>; 656cf03cd7eSKonrad Dybcio }; 657cf03cd7eSKonrad Dybcio }; 658cf03cd7eSKonrad Dybcio 65989345355SKonrad Dybcio qup_opp_table_120mhz: qup-120mhz-opp-table { 66089345355SKonrad Dybcio compatible = "operating-points-v2"; 66189345355SKonrad Dybcio 66289345355SKonrad Dybcio opp-50000000 { 66389345355SKonrad Dybcio opp-hz = /bits/ 64 <50000000>; 66489345355SKonrad Dybcio required-opps = <&rpmhpd_opp_min_svs>; 66589345355SKonrad Dybcio }; 66689345355SKonrad Dybcio 66789345355SKonrad Dybcio opp-75000000 { 66889345355SKonrad Dybcio opp-hz = /bits/ 64 <75000000>; 66989345355SKonrad Dybcio required-opps = <&rpmhpd_opp_low_svs>; 67089345355SKonrad Dybcio }; 67189345355SKonrad Dybcio 67289345355SKonrad Dybcio opp-120000000 { 67389345355SKonrad Dybcio opp-hz = /bits/ 64 <120000000>; 67489345355SKonrad Dybcio required-opps = <&rpmhpd_opp_svs>; 67589345355SKonrad Dybcio }; 67689345355SKonrad Dybcio }; 67789345355SKonrad Dybcio 678e84d04a2SKonrad Dybcio qupv3_id_2: geniqup@8c0000 { 679e84d04a2SKonrad Dybcio compatible = "qcom,geni-se-qup"; 680e84d04a2SKonrad Dybcio reg = <0x0 0x008c0000 0x0 0x6000>; 681e84d04a2SKonrad Dybcio clock-names = "m-ahb", "s-ahb"; 682e84d04a2SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 683e84d04a2SKonrad Dybcio <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; 6849bc2c8feSKonrad Dybcio iommus = <&apps_smmu 0x5e3 0x0>; 685e84d04a2SKonrad Dybcio #address-cells = <2>; 686e84d04a2SKonrad Dybcio #size-cells = <2>; 687e84d04a2SKonrad Dybcio ranges; 688e84d04a2SKonrad Dybcio status = "disabled"; 68998374e69SKonrad Dybcio 69098374e69SKonrad Dybcio i2c14: i2c@880000 { 69198374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 69298374e69SKonrad Dybcio reg = <0 0x00880000 0 0x4000>; 69398374e69SKonrad Dybcio clock-names = "se"; 69498374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 69598374e69SKonrad Dybcio pinctrl-names = "default"; 69698374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c14_default>; 69798374e69SKonrad Dybcio interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 69898374e69SKonrad Dybcio #address-cells = <1>; 69998374e69SKonrad Dybcio #size-cells = <0>; 70098374e69SKonrad Dybcio status = "disabled"; 70198374e69SKonrad Dybcio }; 70298374e69SKonrad Dybcio 70398374e69SKonrad Dybcio spi14: spi@880000 { 70498374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 70598374e69SKonrad Dybcio reg = <0 0x00880000 0 0x4000>; 70698374e69SKonrad Dybcio clock-names = "se"; 70798374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; 70898374e69SKonrad Dybcio interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 70998374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 71098374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_120mhz>; 71198374e69SKonrad Dybcio #address-cells = <1>; 71298374e69SKonrad Dybcio #size-cells = <0>; 71398374e69SKonrad Dybcio status = "disabled"; 71498374e69SKonrad Dybcio }; 71598374e69SKonrad Dybcio 71698374e69SKonrad Dybcio i2c15: i2c@884000 { 71798374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 71898374e69SKonrad Dybcio reg = <0 0x00884000 0 0x4000>; 71998374e69SKonrad Dybcio clock-names = "se"; 72098374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 72198374e69SKonrad Dybcio pinctrl-names = "default"; 72298374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c15_default>; 72398374e69SKonrad Dybcio interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 72498374e69SKonrad Dybcio #address-cells = <1>; 72598374e69SKonrad Dybcio #size-cells = <0>; 72698374e69SKonrad Dybcio status = "disabled"; 72798374e69SKonrad Dybcio }; 72898374e69SKonrad Dybcio 72998374e69SKonrad Dybcio spi15: spi@884000 { 73098374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 73198374e69SKonrad Dybcio reg = <0 0x00884000 0 0x4000>; 73298374e69SKonrad Dybcio clock-names = "se"; 73398374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; 73498374e69SKonrad Dybcio interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; 73598374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 73698374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_120mhz>; 73798374e69SKonrad Dybcio #address-cells = <1>; 73898374e69SKonrad Dybcio #size-cells = <0>; 73998374e69SKonrad Dybcio status = "disabled"; 74098374e69SKonrad Dybcio }; 74198374e69SKonrad Dybcio 74298374e69SKonrad Dybcio i2c16: i2c@888000 { 74398374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 74498374e69SKonrad Dybcio reg = <0 0x00888000 0 0x4000>; 74598374e69SKonrad Dybcio clock-names = "se"; 74698374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 74798374e69SKonrad Dybcio pinctrl-names = "default"; 74898374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c16_default>; 74998374e69SKonrad Dybcio interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 75098374e69SKonrad Dybcio #address-cells = <1>; 75198374e69SKonrad Dybcio #size-cells = <0>; 75298374e69SKonrad Dybcio status = "disabled"; 75398374e69SKonrad Dybcio }; 75498374e69SKonrad Dybcio 75598374e69SKonrad Dybcio spi16: spi@888000 { 75698374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 75798374e69SKonrad Dybcio reg = <0 0x00888000 0 0x4000>; 75898374e69SKonrad Dybcio clock-names = "se"; 75998374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; 76098374e69SKonrad Dybcio interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; 76198374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 76298374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 76398374e69SKonrad Dybcio #address-cells = <1>; 76498374e69SKonrad Dybcio #size-cells = <0>; 76598374e69SKonrad Dybcio status = "disabled"; 76698374e69SKonrad Dybcio }; 76798374e69SKonrad Dybcio 76898374e69SKonrad Dybcio i2c17: i2c@88c000 { 76998374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 77098374e69SKonrad Dybcio reg = <0 0x0088c000 0 0x4000>; 77198374e69SKonrad Dybcio clock-names = "se"; 77298374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 77398374e69SKonrad Dybcio pinctrl-names = "default"; 77498374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c17_default>; 77598374e69SKonrad Dybcio interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 77698374e69SKonrad Dybcio #address-cells = <1>; 77798374e69SKonrad Dybcio #size-cells = <0>; 77898374e69SKonrad Dybcio status = "disabled"; 77998374e69SKonrad Dybcio }; 78098374e69SKonrad Dybcio 78198374e69SKonrad Dybcio spi17: spi@88c000 { 78298374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 78398374e69SKonrad Dybcio reg = <0 0x0088c000 0 0x4000>; 78498374e69SKonrad Dybcio clock-names = "se"; 78598374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; 78698374e69SKonrad Dybcio interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; 78798374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 78898374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 78998374e69SKonrad Dybcio #address-cells = <1>; 79098374e69SKonrad Dybcio #size-cells = <0>; 79198374e69SKonrad Dybcio status = "disabled"; 79298374e69SKonrad Dybcio }; 79398374e69SKonrad Dybcio 79498374e69SKonrad Dybcio /* QUP no. 18 seems to be strictly SPI/UART-only */ 79598374e69SKonrad Dybcio 79698374e69SKonrad Dybcio spi18: spi@890000 { 79798374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 79898374e69SKonrad Dybcio reg = <0 0x00890000 0 0x4000>; 79998374e69SKonrad Dybcio clock-names = "se"; 80098374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 80198374e69SKonrad Dybcio interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 80298374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 80398374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 80498374e69SKonrad Dybcio #address-cells = <1>; 80598374e69SKonrad Dybcio #size-cells = <0>; 80698374e69SKonrad Dybcio status = "disabled"; 80798374e69SKonrad Dybcio }; 80898374e69SKonrad Dybcio 80998374e69SKonrad Dybcio uart18: serial@890000 { 81098374e69SKonrad Dybcio compatible = "qcom,geni-uart"; 81198374e69SKonrad Dybcio reg = <0 0x00890000 0 0x4000>; 81298374e69SKonrad Dybcio clock-names = "se"; 81398374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; 81498374e69SKonrad Dybcio pinctrl-names = "default"; 81598374e69SKonrad Dybcio pinctrl-0 = <&qup_uart18_default>; 81698374e69SKonrad Dybcio interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; 81798374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 81898374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 81998374e69SKonrad Dybcio status = "disabled"; 82098374e69SKonrad Dybcio }; 82198374e69SKonrad Dybcio 82298374e69SKonrad Dybcio i2c19: i2c@894000 { 82398374e69SKonrad Dybcio compatible = "qcom,geni-i2c"; 82498374e69SKonrad Dybcio reg = <0 0x00894000 0 0x4000>; 82598374e69SKonrad Dybcio clock-names = "se"; 82698374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 82798374e69SKonrad Dybcio pinctrl-names = "default"; 82898374e69SKonrad Dybcio pinctrl-0 = <&qup_i2c19_default>; 82998374e69SKonrad Dybcio interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 83098374e69SKonrad Dybcio #address-cells = <1>; 83198374e69SKonrad Dybcio #size-cells = <0>; 83298374e69SKonrad Dybcio status = "disabled"; 83398374e69SKonrad Dybcio }; 83498374e69SKonrad Dybcio 83598374e69SKonrad Dybcio spi19: spi@894000 { 83698374e69SKonrad Dybcio compatible = "qcom,geni-spi"; 83798374e69SKonrad Dybcio reg = <0 0x00894000 0 0x4000>; 83898374e69SKonrad Dybcio clock-names = "se"; 83998374e69SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; 84098374e69SKonrad Dybcio interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; 84198374e69SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 84298374e69SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 84398374e69SKonrad Dybcio #address-cells = <1>; 84498374e69SKonrad Dybcio #size-cells = <0>; 84598374e69SKonrad Dybcio status = "disabled"; 84698374e69SKonrad Dybcio }; 847e84d04a2SKonrad Dybcio }; 848e84d04a2SKonrad Dybcio 84987f0b434SRobert Foss qupv3_id_0: geniqup@9c0000 { 850b7e8f433SVinod Koul compatible = "qcom,geni-se-qup"; 851b7e8f433SVinod Koul reg = <0x0 0x009c0000 0x0 0x6000>; 852b7e8f433SVinod Koul clock-names = "m-ahb", "s-ahb"; 8536d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 8546d91e201SVinod Koul <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 8559bc2c8feSKonrad Dybcio iommus = <&apps_smmu 0x5a3 0>; 856b7e8f433SVinod Koul #address-cells = <2>; 857b7e8f433SVinod Koul #size-cells = <2>; 858b7e8f433SVinod Koul ranges; 859b7e8f433SVinod Koul status = "disabled"; 860b7e8f433SVinod Koul 861cf03cd7eSKonrad Dybcio i2c0: i2c@980000 { 862cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 863cf03cd7eSKonrad Dybcio reg = <0 0x00980000 0 0x4000>; 864cf03cd7eSKonrad Dybcio clock-names = "se"; 865cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 866cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 867cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c0_default>; 868cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 869cf03cd7eSKonrad Dybcio #address-cells = <1>; 870cf03cd7eSKonrad Dybcio #size-cells = <0>; 871cf03cd7eSKonrad Dybcio status = "disabled"; 872cf03cd7eSKonrad Dybcio }; 873cf03cd7eSKonrad Dybcio 874cf03cd7eSKonrad Dybcio spi0: spi@980000 { 875cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 876cf03cd7eSKonrad Dybcio reg = <0 0x00980000 0 0x4000>; 877cf03cd7eSKonrad Dybcio clock-names = "se"; 878cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 879cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 880cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 881cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 882cf03cd7eSKonrad Dybcio #address-cells = <1>; 883cf03cd7eSKonrad Dybcio #size-cells = <0>; 884cf03cd7eSKonrad Dybcio status = "disabled"; 885cf03cd7eSKonrad Dybcio }; 886cf03cd7eSKonrad Dybcio 887cf03cd7eSKonrad Dybcio i2c1: i2c@984000 { 888cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 889cf03cd7eSKonrad Dybcio reg = <0 0x00984000 0 0x4000>; 890cf03cd7eSKonrad Dybcio clock-names = "se"; 891cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 892cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 893cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c1_default>; 894cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 895cf03cd7eSKonrad Dybcio #address-cells = <1>; 896cf03cd7eSKonrad Dybcio #size-cells = <0>; 897cf03cd7eSKonrad Dybcio status = "disabled"; 898cf03cd7eSKonrad Dybcio }; 899cf03cd7eSKonrad Dybcio 900cf03cd7eSKonrad Dybcio spi1: spi@984000 { 901cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 902cf03cd7eSKonrad Dybcio reg = <0 0x00984000 0 0x4000>; 903cf03cd7eSKonrad Dybcio clock-names = "se"; 904cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 905cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 906cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 907cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 908cf03cd7eSKonrad Dybcio #address-cells = <1>; 909cf03cd7eSKonrad Dybcio #size-cells = <0>; 910cf03cd7eSKonrad Dybcio status = "disabled"; 911cf03cd7eSKonrad Dybcio }; 912cf03cd7eSKonrad Dybcio 913cf03cd7eSKonrad Dybcio i2c2: i2c@988000 { 914cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 915cf03cd7eSKonrad Dybcio reg = <0 0x00988000 0 0x4000>; 916cf03cd7eSKonrad Dybcio clock-names = "se"; 917cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 918cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 919cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c2_default>; 920cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 921cf03cd7eSKonrad Dybcio #address-cells = <1>; 922cf03cd7eSKonrad Dybcio #size-cells = <0>; 923cf03cd7eSKonrad Dybcio status = "disabled"; 924cf03cd7eSKonrad Dybcio }; 925cf03cd7eSKonrad Dybcio 926cf03cd7eSKonrad Dybcio spi2: spi@988000 { 927cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 928cf03cd7eSKonrad Dybcio reg = <0 0x00988000 0 0x4000>; 929cf03cd7eSKonrad Dybcio clock-names = "se"; 930cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 931cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 932cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 933cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 934cf03cd7eSKonrad Dybcio #address-cells = <1>; 935cf03cd7eSKonrad Dybcio #size-cells = <0>; 936cf03cd7eSKonrad Dybcio status = "disabled"; 937cf03cd7eSKonrad Dybcio }; 938cf03cd7eSKonrad Dybcio 939b7e8f433SVinod Koul uart2: serial@98c000 { 940b7e8f433SVinod Koul compatible = "qcom,geni-debug-uart"; 941b7e8f433SVinod Koul reg = <0 0x0098c000 0 0x4000>; 942b7e8f433SVinod Koul clock-names = "se"; 9436d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 944b7e8f433SVinod Koul pinctrl-names = "default"; 945b7e8f433SVinod Koul pinctrl-0 = <&qup_uart3_default_state>; 946b7e8f433SVinod Koul interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 947cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 948cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 949cf03cd7eSKonrad Dybcio #address-cells = <1>; 950cf03cd7eSKonrad Dybcio #size-cells = <0>; 951cf03cd7eSKonrad Dybcio status = "disabled"; 952cf03cd7eSKonrad Dybcio }; 953cf03cd7eSKonrad Dybcio 954cf03cd7eSKonrad Dybcio /* QUP no. 3 seems to be strictly SPI-only */ 955cf03cd7eSKonrad Dybcio 956cf03cd7eSKonrad Dybcio spi3: spi@98c000 { 957cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 958cf03cd7eSKonrad Dybcio reg = <0 0x0098c000 0 0x4000>; 959cf03cd7eSKonrad Dybcio clock-names = "se"; 960cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 961cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 962cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 963cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 964cf03cd7eSKonrad Dybcio #address-cells = <1>; 965cf03cd7eSKonrad Dybcio #size-cells = <0>; 966cf03cd7eSKonrad Dybcio status = "disabled"; 967cf03cd7eSKonrad Dybcio }; 968cf03cd7eSKonrad Dybcio 969cf03cd7eSKonrad Dybcio i2c4: i2c@990000 { 970cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 971cf03cd7eSKonrad Dybcio reg = <0 0x00990000 0 0x4000>; 972cf03cd7eSKonrad Dybcio clock-names = "se"; 973cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 974cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 975cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c4_default>; 976cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 977cf03cd7eSKonrad Dybcio #address-cells = <1>; 978cf03cd7eSKonrad Dybcio #size-cells = <0>; 979cf03cd7eSKonrad Dybcio status = "disabled"; 980cf03cd7eSKonrad Dybcio }; 981cf03cd7eSKonrad Dybcio 982cf03cd7eSKonrad Dybcio spi4: spi@990000 { 983cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 984cf03cd7eSKonrad Dybcio reg = <0 0x00990000 0 0x4000>; 985cf03cd7eSKonrad Dybcio clock-names = "se"; 986cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 987cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 988cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 989cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 990cf03cd7eSKonrad Dybcio #address-cells = <1>; 991cf03cd7eSKonrad Dybcio #size-cells = <0>; 992cf03cd7eSKonrad Dybcio status = "disabled"; 993cf03cd7eSKonrad Dybcio }; 994cf03cd7eSKonrad Dybcio 995cf03cd7eSKonrad Dybcio i2c5: i2c@994000 { 996cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 997cf03cd7eSKonrad Dybcio reg = <0 0x00994000 0 0x4000>; 998cf03cd7eSKonrad Dybcio clock-names = "se"; 999cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1000cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1001cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c5_default>; 1002cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 1003cf03cd7eSKonrad Dybcio #address-cells = <1>; 1004cf03cd7eSKonrad Dybcio #size-cells = <0>; 1005cf03cd7eSKonrad Dybcio status = "disabled"; 1006cf03cd7eSKonrad Dybcio }; 1007cf03cd7eSKonrad Dybcio 1008cf03cd7eSKonrad Dybcio spi5: spi@994000 { 1009cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1010cf03cd7eSKonrad Dybcio reg = <0 0x00994000 0 0x4000>; 1011cf03cd7eSKonrad Dybcio clock-names = "se"; 1012cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 1013cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 1014cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1015cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1016cf03cd7eSKonrad Dybcio #address-cells = <1>; 1017cf03cd7eSKonrad Dybcio #size-cells = <0>; 1018cf03cd7eSKonrad Dybcio status = "disabled"; 1019cf03cd7eSKonrad Dybcio }; 1020cf03cd7eSKonrad Dybcio 1021cf03cd7eSKonrad Dybcio i2c6: i2c@998000 { 1022cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 1023cf03cd7eSKonrad Dybcio reg = <0 0x00998000 0 0x4000>; 1024cf03cd7eSKonrad Dybcio clock-names = "se"; 1025cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1026cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1027cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c6_default>; 1028cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 1029cf03cd7eSKonrad Dybcio #address-cells = <1>; 1030cf03cd7eSKonrad Dybcio #size-cells = <0>; 1031cf03cd7eSKonrad Dybcio status = "disabled"; 1032cf03cd7eSKonrad Dybcio }; 1033cf03cd7eSKonrad Dybcio 1034cf03cd7eSKonrad Dybcio spi6: spi@998000 { 1035cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1036cf03cd7eSKonrad Dybcio reg = <0 0x00998000 0 0x4000>; 1037cf03cd7eSKonrad Dybcio clock-names = "se"; 1038cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1039cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 1040cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1041cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1042cf03cd7eSKonrad Dybcio #address-cells = <1>; 1043cf03cd7eSKonrad Dybcio #size-cells = <0>; 1044cf03cd7eSKonrad Dybcio status = "disabled"; 1045cf03cd7eSKonrad Dybcio }; 1046cf03cd7eSKonrad Dybcio 1047cf03cd7eSKonrad Dybcio uart6: serial@998000 { 1048cf03cd7eSKonrad Dybcio compatible = "qcom,geni-uart"; 1049cf03cd7eSKonrad Dybcio reg = <0 0x00998000 0 0x4000>; 1050cf03cd7eSKonrad Dybcio clock-names = "se"; 1051cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; 1052cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1053cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_uart6_default>; 1054cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; 1055cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1056cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1057cf03cd7eSKonrad Dybcio status = "disabled"; 1058cf03cd7eSKonrad Dybcio }; 1059cf03cd7eSKonrad Dybcio 1060cf03cd7eSKonrad Dybcio i2c7: i2c@99c000 { 1061cf03cd7eSKonrad Dybcio compatible = "qcom,geni-i2c"; 1062cf03cd7eSKonrad Dybcio reg = <0 0x0099c000 0 0x4000>; 1063cf03cd7eSKonrad Dybcio clock-names = "se"; 1064cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1065cf03cd7eSKonrad Dybcio pinctrl-names = "default"; 1066cf03cd7eSKonrad Dybcio pinctrl-0 = <&qup_i2c7_default>; 1067cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 1068cf03cd7eSKonrad Dybcio #address-cells = <1>; 1069cf03cd7eSKonrad Dybcio #size-cells = <0>; 1070cf03cd7eSKonrad Dybcio status = "disabled"; 1071cf03cd7eSKonrad Dybcio }; 1072cf03cd7eSKonrad Dybcio 1073cf03cd7eSKonrad Dybcio spi7: spi@99c000 { 1074cf03cd7eSKonrad Dybcio compatible = "qcom,geni-spi"; 1075cf03cd7eSKonrad Dybcio reg = <0 0x0099c000 0 0x4000>; 1076cf03cd7eSKonrad Dybcio clock-names = "se"; 1077cf03cd7eSKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; 1078cf03cd7eSKonrad Dybcio interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; 1079cf03cd7eSKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 1080cf03cd7eSKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 1081b7e8f433SVinod Koul #address-cells = <1>; 1082b7e8f433SVinod Koul #size-cells = <0>; 1083b7e8f433SVinod Koul status = "disabled"; 1084b7e8f433SVinod Koul }; 1085b7e8f433SVinod Koul }; 1086b7e8f433SVinod Koul 108706bf656eSJonathan Marek qupv3_id_1: geniqup@ac0000 { 108806bf656eSJonathan Marek compatible = "qcom,geni-se-qup"; 108906bf656eSJonathan Marek reg = <0x0 0x00ac0000 0x0 0x6000>; 109006bf656eSJonathan Marek clock-names = "m-ahb", "s-ahb"; 109106bf656eSJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 109206bf656eSJonathan Marek <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 10939bc2c8feSKonrad Dybcio iommus = <&apps_smmu 0x43 0>; 109406bf656eSJonathan Marek #address-cells = <2>; 109506bf656eSJonathan Marek #size-cells = <2>; 109606bf656eSJonathan Marek ranges; 109706bf656eSJonathan Marek status = "disabled"; 109806bf656eSJonathan Marek 109989345355SKonrad Dybcio i2c8: i2c@a80000 { 110089345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 110189345355SKonrad Dybcio reg = <0 0x00a80000 0 0x4000>; 110289345355SKonrad Dybcio clock-names = "se"; 110389345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 110489345355SKonrad Dybcio pinctrl-names = "default"; 110589345355SKonrad Dybcio pinctrl-0 = <&qup_i2c8_default>; 110689345355SKonrad Dybcio interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 110789345355SKonrad Dybcio #address-cells = <1>; 110889345355SKonrad Dybcio #size-cells = <0>; 110989345355SKonrad Dybcio status = "disabled"; 111089345355SKonrad Dybcio }; 111189345355SKonrad Dybcio 111289345355SKonrad Dybcio spi8: spi@a80000 { 111389345355SKonrad Dybcio compatible = "qcom,geni-spi"; 111489345355SKonrad Dybcio reg = <0 0x00a80000 0 0x4000>; 111589345355SKonrad Dybcio clock-names = "se"; 111689345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 111789345355SKonrad Dybcio interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 111889345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 111989345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_120mhz>; 112089345355SKonrad Dybcio #address-cells = <1>; 112189345355SKonrad Dybcio #size-cells = <0>; 112289345355SKonrad Dybcio status = "disabled"; 112389345355SKonrad Dybcio }; 112489345355SKonrad Dybcio 112589345355SKonrad Dybcio i2c9: i2c@a84000 { 112689345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 112789345355SKonrad Dybcio reg = <0 0x00a84000 0 0x4000>; 112889345355SKonrad Dybcio clock-names = "se"; 112989345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 113089345355SKonrad Dybcio pinctrl-names = "default"; 113189345355SKonrad Dybcio pinctrl-0 = <&qup_i2c9_default>; 113289345355SKonrad Dybcio interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 113389345355SKonrad Dybcio #address-cells = <1>; 113489345355SKonrad Dybcio #size-cells = <0>; 113589345355SKonrad Dybcio status = "disabled"; 113689345355SKonrad Dybcio }; 113789345355SKonrad Dybcio 113889345355SKonrad Dybcio spi9: spi@a84000 { 113989345355SKonrad Dybcio compatible = "qcom,geni-spi"; 114089345355SKonrad Dybcio reg = <0 0x00a84000 0 0x4000>; 114189345355SKonrad Dybcio clock-names = "se"; 114289345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 114389345355SKonrad Dybcio interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 114489345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 114589345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 114689345355SKonrad Dybcio #address-cells = <1>; 114789345355SKonrad Dybcio #size-cells = <0>; 114889345355SKonrad Dybcio status = "disabled"; 114989345355SKonrad Dybcio }; 115089345355SKonrad Dybcio 115189345355SKonrad Dybcio i2c10: i2c@a88000 { 115289345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 115389345355SKonrad Dybcio reg = <0 0x00a88000 0 0x4000>; 115489345355SKonrad Dybcio clock-names = "se"; 115589345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 115689345355SKonrad Dybcio pinctrl-names = "default"; 115789345355SKonrad Dybcio pinctrl-0 = <&qup_i2c10_default>; 115889345355SKonrad Dybcio interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 115989345355SKonrad Dybcio #address-cells = <1>; 116089345355SKonrad Dybcio #size-cells = <0>; 116189345355SKonrad Dybcio status = "disabled"; 116289345355SKonrad Dybcio }; 116389345355SKonrad Dybcio 116489345355SKonrad Dybcio spi10: spi@a88000 { 116589345355SKonrad Dybcio compatible = "qcom,geni-spi"; 116689345355SKonrad Dybcio reg = <0 0x00a88000 0 0x4000>; 116789345355SKonrad Dybcio clock-names = "se"; 116889345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 116989345355SKonrad Dybcio interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 117089345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 117189345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 117289345355SKonrad Dybcio #address-cells = <1>; 117389345355SKonrad Dybcio #size-cells = <0>; 117489345355SKonrad Dybcio status = "disabled"; 117589345355SKonrad Dybcio }; 117689345355SKonrad Dybcio 117789345355SKonrad Dybcio i2c11: i2c@a8c000 { 117889345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 117989345355SKonrad Dybcio reg = <0 0x00a8c000 0 0x4000>; 118089345355SKonrad Dybcio clock-names = "se"; 118189345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 118289345355SKonrad Dybcio pinctrl-names = "default"; 118389345355SKonrad Dybcio pinctrl-0 = <&qup_i2c11_default>; 118489345355SKonrad Dybcio interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 118589345355SKonrad Dybcio #address-cells = <1>; 118689345355SKonrad Dybcio #size-cells = <0>; 118789345355SKonrad Dybcio status = "disabled"; 118889345355SKonrad Dybcio }; 118989345355SKonrad Dybcio 119089345355SKonrad Dybcio spi11: spi@a8c000 { 119189345355SKonrad Dybcio compatible = "qcom,geni-spi"; 119289345355SKonrad Dybcio reg = <0 0x00a8c000 0 0x4000>; 119389345355SKonrad Dybcio clock-names = "se"; 119489345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 119589345355SKonrad Dybcio interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 119689345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 119789345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 119889345355SKonrad Dybcio #address-cells = <1>; 119989345355SKonrad Dybcio #size-cells = <0>; 120089345355SKonrad Dybcio status = "disabled"; 120189345355SKonrad Dybcio }; 120289345355SKonrad Dybcio 120389345355SKonrad Dybcio i2c12: i2c@a90000 { 120489345355SKonrad Dybcio compatible = "qcom,geni-i2c"; 120589345355SKonrad Dybcio reg = <0 0x00a90000 0 0x4000>; 120689345355SKonrad Dybcio clock-names = "se"; 120789345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 120889345355SKonrad Dybcio pinctrl-names = "default"; 120989345355SKonrad Dybcio pinctrl-0 = <&qup_i2c12_default>; 121089345355SKonrad Dybcio interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 121189345355SKonrad Dybcio #address-cells = <1>; 121289345355SKonrad Dybcio #size-cells = <0>; 121389345355SKonrad Dybcio status = "disabled"; 121489345355SKonrad Dybcio }; 121589345355SKonrad Dybcio 121689345355SKonrad Dybcio spi12: spi@a90000 { 121789345355SKonrad Dybcio compatible = "qcom,geni-spi"; 121889345355SKonrad Dybcio reg = <0 0x00a90000 0 0x4000>; 121989345355SKonrad Dybcio clock-names = "se"; 122089345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 122189345355SKonrad Dybcio interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 122289345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 122389345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 122489345355SKonrad Dybcio #address-cells = <1>; 122589345355SKonrad Dybcio #size-cells = <0>; 122689345355SKonrad Dybcio status = "disabled"; 122789345355SKonrad Dybcio }; 122889345355SKonrad Dybcio 122906bf656eSJonathan Marek i2c13: i2c@a94000 { 123006bf656eSJonathan Marek compatible = "qcom,geni-i2c"; 123106bf656eSJonathan Marek reg = <0 0x00a94000 0 0x4000>; 123206bf656eSJonathan Marek clock-names = "se"; 123306bf656eSJonathan Marek clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 123406bf656eSJonathan Marek pinctrl-names = "default"; 123589345355SKonrad Dybcio pinctrl-0 = <&qup_i2c13_default>; 123606bf656eSJonathan Marek interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 123706bf656eSJonathan Marek #address-cells = <1>; 123806bf656eSJonathan Marek #size-cells = <0>; 123906bf656eSJonathan Marek status = "disabled"; 124006bf656eSJonathan Marek }; 124189345355SKonrad Dybcio 124289345355SKonrad Dybcio spi13: spi@a94000 { 124389345355SKonrad Dybcio compatible = "qcom,geni-spi"; 124489345355SKonrad Dybcio reg = <0 0x00a94000 0 0x4000>; 124589345355SKonrad Dybcio clock-names = "se"; 124689345355SKonrad Dybcio clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 124789345355SKonrad Dybcio interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 124889345355SKonrad Dybcio power-domains = <&rpmhpd SM8350_CX>; 124989345355SKonrad Dybcio operating-points-v2 = <&qup_opp_table_100mhz>; 125089345355SKonrad Dybcio #address-cells = <1>; 125189345355SKonrad Dybcio #size-cells = <0>; 125289345355SKonrad Dybcio status = "disabled"; 125389345355SKonrad Dybcio }; 125406bf656eSJonathan Marek }; 125506bf656eSJonathan Marek 1256187f65b7SVinod Koul apps_smmu: iommu@15000000 { 1257187f65b7SVinod Koul compatible = "qcom,sm8350-smmu-500", "arm,mmu-500"; 1258187f65b7SVinod Koul reg = <0 0x15000000 0 0x100000>; 1259187f65b7SVinod Koul #iommu-cells = <2>; 1260187f65b7SVinod Koul #global-interrupts = <2>; 1261187f65b7SVinod Koul interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 1262187f65b7SVinod Koul <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 1263187f65b7SVinod Koul <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 1264187f65b7SVinod Koul <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1265187f65b7SVinod Koul <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 1266187f65b7SVinod Koul <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1267187f65b7SVinod Koul <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1268187f65b7SVinod Koul <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1269187f65b7SVinod Koul <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1270187f65b7SVinod Koul <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1271187f65b7SVinod Koul <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1272187f65b7SVinod Koul <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1273187f65b7SVinod Koul <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1274187f65b7SVinod Koul <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1275187f65b7SVinod Koul <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1276187f65b7SVinod Koul <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1277187f65b7SVinod Koul <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1278187f65b7SVinod Koul <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1279187f65b7SVinod Koul <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1280187f65b7SVinod Koul <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1281187f65b7SVinod Koul <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 1282187f65b7SVinod Koul <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1283187f65b7SVinod Koul <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1284187f65b7SVinod Koul <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 1285187f65b7SVinod Koul <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 1286187f65b7SVinod Koul <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 1287187f65b7SVinod Koul <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 1288187f65b7SVinod Koul <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 1289187f65b7SVinod Koul <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 1290187f65b7SVinod Koul <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 1291187f65b7SVinod Koul <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 1292187f65b7SVinod Koul <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 1293187f65b7SVinod Koul <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 1294187f65b7SVinod Koul <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 1295187f65b7SVinod Koul <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 1296187f65b7SVinod Koul <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 1297187f65b7SVinod Koul <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1298187f65b7SVinod Koul <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1299187f65b7SVinod Koul <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1300187f65b7SVinod Koul <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1301187f65b7SVinod Koul <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 1302187f65b7SVinod Koul <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1303187f65b7SVinod Koul <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1304187f65b7SVinod Koul <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1305187f65b7SVinod Koul <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1306187f65b7SVinod Koul <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1307187f65b7SVinod Koul <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1308187f65b7SVinod Koul <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1309187f65b7SVinod Koul <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1310187f65b7SVinod Koul <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1311187f65b7SVinod Koul <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1312187f65b7SVinod Koul <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1313187f65b7SVinod Koul <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1314187f65b7SVinod Koul <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1315187f65b7SVinod Koul <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1316187f65b7SVinod Koul <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1317187f65b7SVinod Koul <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1318187f65b7SVinod Koul <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1319187f65b7SVinod Koul <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1320187f65b7SVinod Koul <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1321187f65b7SVinod Koul <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1322187f65b7SVinod Koul <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1323187f65b7SVinod Koul <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1324187f65b7SVinod Koul <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1325187f65b7SVinod Koul <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1326187f65b7SVinod Koul <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1327187f65b7SVinod Koul <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 1328187f65b7SVinod Koul <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 1329187f65b7SVinod Koul <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 1330187f65b7SVinod Koul <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 1331187f65b7SVinod Koul <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 1332187f65b7SVinod Koul <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 1333187f65b7SVinod Koul <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 1334187f65b7SVinod Koul <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 1335187f65b7SVinod Koul <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 1336187f65b7SVinod Koul <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 1337187f65b7SVinod Koul <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 1338187f65b7SVinod Koul <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 1339187f65b7SVinod Koul <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 1340187f65b7SVinod Koul <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 1341187f65b7SVinod Koul <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 1342187f65b7SVinod Koul <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 1343187f65b7SVinod Koul <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 1344187f65b7SVinod Koul <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1345187f65b7SVinod Koul <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1346187f65b7SVinod Koul <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1347187f65b7SVinod Koul <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1348187f65b7SVinod Koul <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1349187f65b7SVinod Koul <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1350187f65b7SVinod Koul <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 1351187f65b7SVinod Koul <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 1352187f65b7SVinod Koul <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 1353187f65b7SVinod Koul <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 1354187f65b7SVinod Koul <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 1355187f65b7SVinod Koul <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 1356187f65b7SVinod Koul <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 1357187f65b7SVinod Koul <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 1358187f65b7SVinod Koul <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 1359187f65b7SVinod Koul }; 1360187f65b7SVinod Koul 1361da6b2482SVinod Koul config_noc: interconnect@1500000 { 1362da6b2482SVinod Koul compatible = "qcom,sm8350-config-noc"; 1363da6b2482SVinod Koul reg = <0 0x01500000 0 0xa580>; 1364da6b2482SVinod Koul #interconnect-cells = <1>; 1365da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1366da6b2482SVinod Koul }; 1367da6b2482SVinod Koul 1368da6b2482SVinod Koul mc_virt: interconnect@1580000 { 1369da6b2482SVinod Koul compatible = "qcom,sm8350-mc-virt"; 1370da6b2482SVinod Koul reg = <0 0x01580000 0 0x1000>; 1371da6b2482SVinod Koul #interconnect-cells = <1>; 1372da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1373da6b2482SVinod Koul }; 1374da6b2482SVinod Koul 1375da6b2482SVinod Koul system_noc: interconnect@1680000 { 1376da6b2482SVinod Koul compatible = "qcom,sm8350-system-noc"; 1377da6b2482SVinod Koul reg = <0 0x01680000 0 0x1c200>; 1378da6b2482SVinod Koul #interconnect-cells = <1>; 1379da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1380da6b2482SVinod Koul }; 1381da6b2482SVinod Koul 1382da6b2482SVinod Koul aggre1_noc: interconnect@16e0000 { 1383da6b2482SVinod Koul compatible = "qcom,sm8350-aggre1-noc"; 1384da6b2482SVinod Koul reg = <0 0x016e0000 0 0x1f180>; 1385da6b2482SVinod Koul #interconnect-cells = <1>; 1386da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1387da6b2482SVinod Koul }; 1388da6b2482SVinod Koul 1389da6b2482SVinod Koul aggre2_noc: interconnect@1700000 { 1390da6b2482SVinod Koul compatible = "qcom,sm8350-aggre2-noc"; 1391da6b2482SVinod Koul reg = <0 0x01700000 0 0x33000>; 1392da6b2482SVinod Koul #interconnect-cells = <1>; 1393da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1394da6b2482SVinod Koul }; 1395da6b2482SVinod Koul 1396da6b2482SVinod Koul mmss_noc: interconnect@1740000 { 1397da6b2482SVinod Koul compatible = "qcom,sm8350-mmss-noc"; 1398da6b2482SVinod Koul reg = <0 0x01740000 0 0x1f080>; 1399da6b2482SVinod Koul #interconnect-cells = <1>; 1400da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1401da6b2482SVinod Koul }; 1402da6b2482SVinod Koul 1403da6b2482SVinod Koul lpass_ag_noc: interconnect@3c40000 { 1404da6b2482SVinod Koul compatible = "qcom,sm8350-lpass-ag-noc"; 1405da6b2482SVinod Koul reg = <0 0x03c40000 0 0xf080>; 1406da6b2482SVinod Koul #interconnect-cells = <1>; 1407da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1408da6b2482SVinod Koul }; 1409da6b2482SVinod Koul 1410da6b2482SVinod Koul compute_noc: interconnect@a0c0000{ 1411da6b2482SVinod Koul compatible = "qcom,sm8350-compute-noc"; 1412da6b2482SVinod Koul reg = <0 0x0a0c0000 0 0xa180>; 1413da6b2482SVinod Koul #interconnect-cells = <1>; 1414da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 1415da6b2482SVinod Koul }; 1416da6b2482SVinod Koul 1417f11d3e7dSAlex Elder ipa: ipa@1e40000 { 1418f11d3e7dSAlex Elder compatible = "qcom,sm8350-ipa"; 1419f11d3e7dSAlex Elder 1420f11d3e7dSAlex Elder iommus = <&apps_smmu 0x5c0 0x0>, 1421f11d3e7dSAlex Elder <&apps_smmu 0x5c2 0x0>; 1422f11d3e7dSAlex Elder reg = <0 0x1e40000 0 0x8000>, 1423f11d3e7dSAlex Elder <0 0x1e50000 0 0x4b20>, 1424f11d3e7dSAlex Elder <0 0x1e04000 0 0x23000>; 1425f11d3e7dSAlex Elder reg-names = "ipa-reg", 1426f11d3e7dSAlex Elder "ipa-shared", 1427f11d3e7dSAlex Elder "gsi"; 1428f11d3e7dSAlex Elder 1429f11d3e7dSAlex Elder interrupts-extended = <&intc GIC_SPI 655 IRQ_TYPE_EDGE_RISING>, 1430f11d3e7dSAlex Elder <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, 1431f11d3e7dSAlex Elder <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 1432f11d3e7dSAlex Elder <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; 1433f11d3e7dSAlex Elder interrupt-names = "ipa", 1434f11d3e7dSAlex Elder "gsi", 1435f11d3e7dSAlex Elder "ipa-clock-query", 1436f11d3e7dSAlex Elder "ipa-setup-ready"; 1437f11d3e7dSAlex Elder 1438f11d3e7dSAlex Elder clocks = <&rpmhcc RPMH_IPA_CLK>; 1439f11d3e7dSAlex Elder clock-names = "core"; 1440f11d3e7dSAlex Elder 144184173ca3SAlex Elder interconnects = <&aggre2_noc MASTER_IPA &mc_virt SLAVE_EBI1>, 1442f11d3e7dSAlex Elder <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>; 144384173ca3SAlex Elder interconnect-names = "memory", 144484173ca3SAlex Elder "config"; 1445f11d3e7dSAlex Elder 144673419e4dSAlex Elder qcom,qmp = <&aoss_qmp>; 144773419e4dSAlex Elder 1448f11d3e7dSAlex Elder qcom,smem-states = <&ipa_smp2p_out 0>, 1449f11d3e7dSAlex Elder <&ipa_smp2p_out 1>; 1450f11d3e7dSAlex Elder qcom,smem-state-names = "ipa-clock-enabled-valid", 1451f11d3e7dSAlex Elder "ipa-clock-enabled"; 1452f11d3e7dSAlex Elder 1453f11d3e7dSAlex Elder status = "disabled"; 1454f11d3e7dSAlex Elder }; 1455f11d3e7dSAlex Elder 1456b7e8f433SVinod Koul tcsr_mutex: hwlock@1f40000 { 1457b7e8f433SVinod Koul compatible = "qcom,tcsr-mutex"; 1458b7e8f433SVinod Koul reg = <0x0 0x01f40000 0x0 0x40000>; 1459b7e8f433SVinod Koul #hwlock-cells = <1>; 1460b7e8f433SVinod Koul }; 1461b7e8f433SVinod Koul 1462177fcf0aSVinod Koul mpss: remoteproc@4080000 { 1463177fcf0aSVinod Koul compatible = "qcom,sm8350-mpss-pas"; 1464177fcf0aSVinod Koul reg = <0x0 0x04080000 0x0 0x4040>; 1465177fcf0aSVinod Koul 1466177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 1467177fcf0aSVinod Koul <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, 1468177fcf0aSVinod Koul <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, 1469177fcf0aSVinod Koul <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, 1470177fcf0aSVinod Koul <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, 1471177fcf0aSVinod Koul <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; 1472177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", "handover", 1473177fcf0aSVinod Koul "stop-ack", "shutdown-ack"; 1474177fcf0aSVinod Koul 1475177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1476177fcf0aSVinod Koul clock-names = "xo"; 1477177fcf0aSVinod Koul 14786b7cb2d2SSibi Sankar power-domains = <&rpmhpd 0>, 1479177fcf0aSVinod Koul <&rpmhpd 12>; 14806b7cb2d2SSibi Sankar power-domain-names = "cx", "mss"; 1481177fcf0aSVinod Koul 148284c856d0SVinod Koul interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; 1483da6b2482SVinod Koul 1484177fcf0aSVinod Koul memory-region = <&pil_modem_mem>; 1485177fcf0aSVinod Koul 14866b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 14876b7cb2d2SSibi Sankar 1488177fcf0aSVinod Koul qcom,smem-states = <&smp2p_modem_out 0>; 1489177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1490177fcf0aSVinod Koul 1491177fcf0aSVinod Koul status = "disabled"; 1492177fcf0aSVinod Koul 1493177fcf0aSVinod Koul glink-edge { 1494177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 1495177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1496177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1497177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 1498177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1499177fcf0aSVinod Koul interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; 1500177fcf0aSVinod Koul label = "modem"; 1501177fcf0aSVinod Koul qcom,remote-pid = <1>; 1502177fcf0aSVinod Koul }; 1503177fcf0aSVinod Koul }; 1504177fcf0aSVinod Koul 1505b7e8f433SVinod Koul pdc: interrupt-controller@b220000 { 1506b7e8f433SVinod Koul compatible = "qcom,sm8350-pdc", "qcom,pdc"; 1507b7e8f433SVinod Koul reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 1508b7e8f433SVinod Koul qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>, 1509b7e8f433SVinod Koul <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>, 1510b7e8f433SVinod Koul <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>, 1511b7e8f433SVinod Koul <156 716 12>; 1512b7e8f433SVinod Koul #interrupt-cells = <2>; 1513b7e8f433SVinod Koul interrupt-parent = <&intc>; 1514b7e8f433SVinod Koul interrupt-controller; 1515b7e8f433SVinod Koul }; 1516b7e8f433SVinod Koul 15171dee9e3bSVinod Koul tsens0: thermal-sensor@c263000 { 151820f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 151920f9d94eSRobert Foss reg = <0 0x0c263000 0 0x1ff>, /* TM */ 152020f9d94eSRobert Foss <0 0x0c222000 0 0x8>; /* SROT */ 152120f9d94eSRobert Foss #qcom,sensors = <15>; 15229e7f7b65SKonrad Dybcio interrupts-extended = <&pdc 26 IRQ_TYPE_LEVEL_HIGH>, 152320f9d94eSRobert Foss <&pdc 28 IRQ_TYPE_LEVEL_HIGH>; 152420f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 152520f9d94eSRobert Foss #thermal-sensor-cells = <1>; 152620f9d94eSRobert Foss }; 152720f9d94eSRobert Foss 15281dee9e3bSVinod Koul tsens1: thermal-sensor@c265000 { 152920f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 153020f9d94eSRobert Foss reg = <0 0x0c265000 0 0x1ff>, /* TM */ 153120f9d94eSRobert Foss <0 0x0c223000 0 0x8>; /* SROT */ 153220f9d94eSRobert Foss #qcom,sensors = <14>; 15339e7f7b65SKonrad Dybcio interrupts-extended = <&pdc 27 IRQ_TYPE_LEVEL_HIGH>, 153420f9d94eSRobert Foss <&pdc 29 IRQ_TYPE_LEVEL_HIGH>; 153520f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 153620f9d94eSRobert Foss #thermal-sensor-cells = <1>; 153720f9d94eSRobert Foss }; 153820f9d94eSRobert Foss 153997832fa8SSai Prakash Ranjan aoss_qmp: power-controller@c300000 { 1540b7e8f433SVinod Koul compatible = "qcom,sm8350-aoss-qmp"; 154147cb6a06SMaulik Shah reg = <0 0x0c300000 0 0x400>; 1542b7e8f433SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP 1543b7e8f433SVinod Koul IRQ_TYPE_EDGE_RISING>; 1544b7e8f433SVinod Koul mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; 1545b7e8f433SVinod Koul 1546b7e8f433SVinod Koul #clock-cells = <0>; 1547b7e8f433SVinod Koul }; 1548b7e8f433SVinod Koul 154947cb6a06SMaulik Shah sram@c3f0000 { 155047cb6a06SMaulik Shah compatible = "qcom,rpmh-stats"; 155147cb6a06SMaulik Shah reg = <0 0x0c3f0000 0 0x400>; 155247cb6a06SMaulik Shah }; 155347cb6a06SMaulik Shah 1554389cd7acSVinod Koul spmi_bus: spmi@c440000 { 1555389cd7acSVinod Koul compatible = "qcom,spmi-pmic-arb"; 1556389cd7acSVinod Koul reg = <0x0 0xc440000 0x0 0x1100>, 1557389cd7acSVinod Koul <0x0 0xc600000 0x0 0x2000000>, 1558389cd7acSVinod Koul <0x0 0xe600000 0x0 0x100000>, 1559389cd7acSVinod Koul <0x0 0xe700000 0x0 0xa0000>, 1560389cd7acSVinod Koul <0x0 0xc40a000 0x0 0x26000>; 1561389cd7acSVinod Koul reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 1562389cd7acSVinod Koul interrupt-names = "periph_irq"; 1563389cd7acSVinod Koul interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 1564389cd7acSVinod Koul qcom,ee = <0>; 1565389cd7acSVinod Koul qcom,channel = <0>; 1566389cd7acSVinod Koul #address-cells = <2>; 1567389cd7acSVinod Koul #size-cells = <0>; 1568389cd7acSVinod Koul interrupt-controller; 1569389cd7acSVinod Koul #interrupt-cells = <4>; 1570389cd7acSVinod Koul }; 1571389cd7acSVinod Koul 1572b7e8f433SVinod Koul tlmm: pinctrl@f100000 { 1573b7e8f433SVinod Koul compatible = "qcom,sm8350-tlmm"; 1574b7e8f433SVinod Koul reg = <0 0x0f100000 0 0x300000>; 1575b7e8f433SVinod Koul interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 1576b7e8f433SVinod Koul gpio-controller; 1577b7e8f433SVinod Koul #gpio-cells = <2>; 1578b7e8f433SVinod Koul interrupt-controller; 1579b7e8f433SVinod Koul #interrupt-cells = <2>; 158079015857SShawn Guo gpio-ranges = <&tlmm 0 0 204>; 158167146f07SBjorn Andersson wakeup-parent = <&pdc>; 1582b7e8f433SVinod Koul 1583b7e8f433SVinod Koul qup_uart3_default_state: qup-uart3-default-state { 1584b7e8f433SVinod Koul rx { 1585b7e8f433SVinod Koul pins = "gpio18"; 1586b7e8f433SVinod Koul function = "qup3"; 1587b7e8f433SVinod Koul }; 1588b7e8f433SVinod Koul tx { 1589b7e8f433SVinod Koul pins = "gpio19"; 1590b7e8f433SVinod Koul function = "qup3"; 1591b7e8f433SVinod Koul }; 1592b7e8f433SVinod Koul }; 159306bf656eSJonathan Marek 1594cf03cd7eSKonrad Dybcio qup_uart6_default: qup-uart6-default { 1595cf03cd7eSKonrad Dybcio pins = "gpio30", "gpio31"; 1596cf03cd7eSKonrad Dybcio function = "qup6"; 1597cf03cd7eSKonrad Dybcio drive-strength = <2>; 1598cf03cd7eSKonrad Dybcio bias-disable; 1599cf03cd7eSKonrad Dybcio }; 1600cf03cd7eSKonrad Dybcio 160198374e69SKonrad Dybcio qup_uart18_default: qup-uart18-default { 160298374e69SKonrad Dybcio pins = "gpio58", "gpio59"; 160398374e69SKonrad Dybcio function = "qup18"; 160498374e69SKonrad Dybcio drive-strength = <2>; 160598374e69SKonrad Dybcio bias-disable; 160698374e69SKonrad Dybcio }; 160798374e69SKonrad Dybcio 1608cf03cd7eSKonrad Dybcio qup_i2c0_default: qup-i2c0-default { 1609cf03cd7eSKonrad Dybcio pins = "gpio4", "gpio5"; 1610cf03cd7eSKonrad Dybcio function = "qup0"; 1611cf03cd7eSKonrad Dybcio drive-strength = <2>; 1612cf03cd7eSKonrad Dybcio bias-pull-up; 1613cf03cd7eSKonrad Dybcio }; 1614cf03cd7eSKonrad Dybcio 1615cf03cd7eSKonrad Dybcio qup_i2c1_default: qup-i2c1-default { 1616cf03cd7eSKonrad Dybcio pins = "gpio8", "gpio9"; 1617cf03cd7eSKonrad Dybcio function = "qup1"; 1618cf03cd7eSKonrad Dybcio drive-strength = <2>; 1619cf03cd7eSKonrad Dybcio bias-pull-up; 1620cf03cd7eSKonrad Dybcio }; 1621cf03cd7eSKonrad Dybcio 1622cf03cd7eSKonrad Dybcio qup_i2c2_default: qup-i2c2-default { 1623cf03cd7eSKonrad Dybcio pins = "gpio12", "gpio13"; 1624cf03cd7eSKonrad Dybcio function = "qup2"; 1625cf03cd7eSKonrad Dybcio drive-strength = <2>; 1626cf03cd7eSKonrad Dybcio bias-pull-up; 1627cf03cd7eSKonrad Dybcio }; 1628cf03cd7eSKonrad Dybcio 1629cf03cd7eSKonrad Dybcio qup_i2c4_default: qup-i2c4-default { 1630cf03cd7eSKonrad Dybcio pins = "gpio20", "gpio21"; 1631cf03cd7eSKonrad Dybcio function = "qup4"; 1632cf03cd7eSKonrad Dybcio drive-strength = <2>; 1633cf03cd7eSKonrad Dybcio bias-pull-up; 1634cf03cd7eSKonrad Dybcio }; 1635cf03cd7eSKonrad Dybcio 1636cf03cd7eSKonrad Dybcio qup_i2c5_default: qup-i2c5-default { 1637cf03cd7eSKonrad Dybcio pins = "gpio24", "gpio25"; 1638cf03cd7eSKonrad Dybcio function = "qup5"; 1639cf03cd7eSKonrad Dybcio drive-strength = <2>; 1640cf03cd7eSKonrad Dybcio bias-pull-up; 1641cf03cd7eSKonrad Dybcio }; 1642cf03cd7eSKonrad Dybcio 1643cf03cd7eSKonrad Dybcio qup_i2c6_default: qup-i2c6-default { 1644cf03cd7eSKonrad Dybcio pins = "gpio28", "gpio29"; 1645cf03cd7eSKonrad Dybcio function = "qup6"; 1646cf03cd7eSKonrad Dybcio drive-strength = <2>; 1647cf03cd7eSKonrad Dybcio bias-pull-up; 1648cf03cd7eSKonrad Dybcio }; 1649cf03cd7eSKonrad Dybcio 1650cf03cd7eSKonrad Dybcio qup_i2c7_default: qup-i2c7-default { 1651cf03cd7eSKonrad Dybcio pins = "gpio32", "gpio33"; 1652cf03cd7eSKonrad Dybcio function = "qup7"; 1653cf03cd7eSKonrad Dybcio drive-strength = <2>; 1654cf03cd7eSKonrad Dybcio bias-disable; 1655cf03cd7eSKonrad Dybcio }; 1656cf03cd7eSKonrad Dybcio 165789345355SKonrad Dybcio qup_i2c8_default: qup-i2c8-default { 165889345355SKonrad Dybcio pins = "gpio36", "gpio37"; 165989345355SKonrad Dybcio function = "qup8"; 166006bf656eSJonathan Marek drive-strength = <2>; 166106bf656eSJonathan Marek bias-pull-up; 166206bf656eSJonathan Marek }; 166389345355SKonrad Dybcio 166489345355SKonrad Dybcio qup_i2c9_default: qup-i2c9-default { 166589345355SKonrad Dybcio pins = "gpio40", "gpio41"; 166689345355SKonrad Dybcio function = "qup9"; 166789345355SKonrad Dybcio drive-strength = <2>; 166889345355SKonrad Dybcio bias-pull-up; 166989345355SKonrad Dybcio }; 167089345355SKonrad Dybcio 167189345355SKonrad Dybcio qup_i2c10_default: qup-i2c10-default { 167289345355SKonrad Dybcio pins = "gpio44", "gpio45"; 167389345355SKonrad Dybcio function = "qup10"; 167489345355SKonrad Dybcio drive-strength = <2>; 167589345355SKonrad Dybcio bias-pull-up; 167689345355SKonrad Dybcio }; 167789345355SKonrad Dybcio 167889345355SKonrad Dybcio qup_i2c11_default: qup-i2c11-default { 167989345355SKonrad Dybcio pins = "gpio48", "gpio49"; 168089345355SKonrad Dybcio function = "qup11"; 168189345355SKonrad Dybcio drive-strength = <2>; 168289345355SKonrad Dybcio bias-pull-up; 168389345355SKonrad Dybcio }; 168489345355SKonrad Dybcio 168589345355SKonrad Dybcio qup_i2c12_default: qup-i2c12-default { 168689345355SKonrad Dybcio pins = "gpio52", "gpio53"; 168789345355SKonrad Dybcio function = "qup12"; 168889345355SKonrad Dybcio drive-strength = <2>; 168989345355SKonrad Dybcio bias-pull-up; 169089345355SKonrad Dybcio }; 169189345355SKonrad Dybcio 169289345355SKonrad Dybcio qup_i2c13_default: qup-i2c13-default { 169389345355SKonrad Dybcio pins = "gpio0", "gpio1"; 169489345355SKonrad Dybcio function = "qup13"; 169589345355SKonrad Dybcio drive-strength = <2>; 169689345355SKonrad Dybcio bias-pull-up; 169706bf656eSJonathan Marek }; 169898374e69SKonrad Dybcio 169998374e69SKonrad Dybcio qup_i2c14_default: qup-i2c14-default { 170098374e69SKonrad Dybcio pins = "gpio56", "gpio57"; 170198374e69SKonrad Dybcio function = "qup14"; 170298374e69SKonrad Dybcio drive-strength = <2>; 170398374e69SKonrad Dybcio bias-disable; 170498374e69SKonrad Dybcio }; 170598374e69SKonrad Dybcio 170698374e69SKonrad Dybcio qup_i2c15_default: qup-i2c15-default { 170798374e69SKonrad Dybcio pins = "gpio60", "gpio61"; 170898374e69SKonrad Dybcio function = "qup15"; 170998374e69SKonrad Dybcio drive-strength = <2>; 171098374e69SKonrad Dybcio bias-disable; 171198374e69SKonrad Dybcio }; 171298374e69SKonrad Dybcio 171398374e69SKonrad Dybcio qup_i2c16_default: qup-i2c16-default { 171498374e69SKonrad Dybcio pins = "gpio64", "gpio65"; 171598374e69SKonrad Dybcio function = "qup16"; 171698374e69SKonrad Dybcio drive-strength = <2>; 171798374e69SKonrad Dybcio bias-disable; 171898374e69SKonrad Dybcio }; 171998374e69SKonrad Dybcio 172098374e69SKonrad Dybcio qup_i2c17_default: qup-i2c17-default { 172198374e69SKonrad Dybcio pins = "gpio72", "gpio73"; 172298374e69SKonrad Dybcio function = "qup17"; 172398374e69SKonrad Dybcio drive-strength = <2>; 172498374e69SKonrad Dybcio bias-disable; 172598374e69SKonrad Dybcio }; 172698374e69SKonrad Dybcio 172798374e69SKonrad Dybcio qup_i2c19_default: qup-i2c19-default { 172898374e69SKonrad Dybcio pins = "gpio76", "gpio77"; 172998374e69SKonrad Dybcio function = "qup19"; 173098374e69SKonrad Dybcio drive-strength = <2>; 173198374e69SKonrad Dybcio bias-disable; 173298374e69SKonrad Dybcio }; 1733b7e8f433SVinod Koul }; 1734b7e8f433SVinod Koul 173524e3eb2eSRobert Foss rng: rng@10d3000 { 173624e3eb2eSRobert Foss compatible = "qcom,prng-ee"; 173724e3eb2eSRobert Foss reg = <0 0x010d3000 0 0x1000>; 173824e3eb2eSRobert Foss clocks = <&rpmhcc RPMH_HWKM_CLK>; 173924e3eb2eSRobert Foss clock-names = "core"; 174024e3eb2eSRobert Foss }; 174124e3eb2eSRobert Foss 1742b7e8f433SVinod Koul intc: interrupt-controller@17a00000 { 1743b7e8f433SVinod Koul compatible = "arm,gic-v3"; 1744b7e8f433SVinod Koul #interrupt-cells = <3>; 1745b7e8f433SVinod Koul interrupt-controller; 1746f4d4ca9fSKonrad Dybcio #redistributor-regions = <1>; 1747f4d4ca9fSKonrad Dybcio redistributor-stride = <0 0x20000>; 1748b7e8f433SVinod Koul reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 1749b7e8f433SVinod Koul <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 1750b7e8f433SVinod Koul interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1751b7e8f433SVinod Koul }; 1752b7e8f433SVinod Koul 1753b7e8f433SVinod Koul timer@17c20000 { 1754b7e8f433SVinod Koul compatible = "arm,armv7-timer-mem"; 1755b7e8f433SVinod Koul #address-cells = <2>; 1756b7e8f433SVinod Koul #size-cells = <2>; 1757b7e8f433SVinod Koul ranges; 1758b7e8f433SVinod Koul reg = <0x0 0x17c20000 0x0 0x1000>; 1759b7e8f433SVinod Koul clock-frequency = <19200000>; 1760b7e8f433SVinod Koul 1761b7e8f433SVinod Koul frame@17c21000 { 1762b7e8f433SVinod Koul frame-number = <0>; 1763b7e8f433SVinod Koul interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 1764b7e8f433SVinod Koul <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 1765b7e8f433SVinod Koul reg = <0x0 0x17c21000 0x0 0x1000>, 1766b7e8f433SVinod Koul <0x0 0x17c22000 0x0 0x1000>; 1767b7e8f433SVinod Koul }; 1768b7e8f433SVinod Koul 1769b7e8f433SVinod Koul frame@17c23000 { 1770b7e8f433SVinod Koul frame-number = <1>; 1771b7e8f433SVinod Koul interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 1772b7e8f433SVinod Koul reg = <0x0 0x17c23000 0x0 0x1000>; 1773b7e8f433SVinod Koul status = "disabled"; 1774b7e8f433SVinod Koul }; 1775b7e8f433SVinod Koul 1776b7e8f433SVinod Koul frame@17c25000 { 1777b7e8f433SVinod Koul frame-number = <2>; 1778b7e8f433SVinod Koul interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1779b7e8f433SVinod Koul reg = <0x0 0x17c25000 0x0 0x1000>; 1780b7e8f433SVinod Koul status = "disabled"; 1781b7e8f433SVinod Koul }; 1782b7e8f433SVinod Koul 1783b7e8f433SVinod Koul frame@17c27000 { 1784b7e8f433SVinod Koul frame-number = <3>; 1785b7e8f433SVinod Koul interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 1786b7e8f433SVinod Koul reg = <0x0 0x17c27000 0x0 0x1000>; 1787b7e8f433SVinod Koul status = "disabled"; 1788b7e8f433SVinod Koul }; 1789b7e8f433SVinod Koul 1790b7e8f433SVinod Koul frame@17c29000 { 1791b7e8f433SVinod Koul frame-number = <4>; 1792b7e8f433SVinod Koul interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1793b7e8f433SVinod Koul reg = <0x0 0x17c29000 0x0 0x1000>; 1794b7e8f433SVinod Koul status = "disabled"; 1795b7e8f433SVinod Koul }; 1796b7e8f433SVinod Koul 1797b7e8f433SVinod Koul frame@17c2b000 { 1798b7e8f433SVinod Koul frame-number = <5>; 1799b7e8f433SVinod Koul interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1800b7e8f433SVinod Koul reg = <0x0 0x17c2b000 0x0 0x1000>; 1801b7e8f433SVinod Koul status = "disabled"; 1802b7e8f433SVinod Koul }; 1803b7e8f433SVinod Koul 1804b7e8f433SVinod Koul frame@17c2d000 { 1805b7e8f433SVinod Koul frame-number = <6>; 1806b7e8f433SVinod Koul interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1807b7e8f433SVinod Koul reg = <0x0 0x17c2d000 0x0 0x1000>; 1808b7e8f433SVinod Koul status = "disabled"; 1809b7e8f433SVinod Koul }; 1810b7e8f433SVinod Koul }; 1811b7e8f433SVinod Koul 1812b7e8f433SVinod Koul apps_rsc: rsc@18200000 { 1813b7e8f433SVinod Koul label = "apps_rsc"; 1814b7e8f433SVinod Koul compatible = "qcom,rpmh-rsc"; 1815b7e8f433SVinod Koul reg = <0x0 0x18200000 0x0 0x10000>, 1816b7e8f433SVinod Koul <0x0 0x18210000 0x0 0x10000>, 1817b7e8f433SVinod Koul <0x0 0x18220000 0x0 0x10000>; 1818b7e8f433SVinod Koul reg-names = "drv-0", "drv-1", "drv-2"; 1819b7e8f433SVinod Koul interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 1820b7e8f433SVinod Koul <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 1821b7e8f433SVinod Koul <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 1822b7e8f433SVinod Koul qcom,tcs-offset = <0xd00>; 1823b7e8f433SVinod Koul qcom,drv-id = <2>; 1824b7e8f433SVinod Koul qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 1825a131255eSMaulik Shah <WAKE_TCS 3>, <CONTROL_TCS 0>; 1826b7e8f433SVinod Koul 1827b7e8f433SVinod Koul rpmhcc: clock-controller { 1828b7e8f433SVinod Koul compatible = "qcom,sm8350-rpmh-clk"; 1829b7e8f433SVinod Koul #clock-cells = <1>; 1830b7e8f433SVinod Koul clock-names = "xo"; 1831b7e8f433SVinod Koul clocks = <&xo_board>; 1832b7e8f433SVinod Koul }; 1833b7e8f433SVinod Koul 183490f57509SVinod Koul rpmhpd: power-controller { 183590f57509SVinod Koul compatible = "qcom,sm8350-rpmhpd"; 183690f57509SVinod Koul #power-domain-cells = <1>; 183790f57509SVinod Koul operating-points-v2 = <&rpmhpd_opp_table>; 183890f57509SVinod Koul 183990f57509SVinod Koul rpmhpd_opp_table: opp-table { 184090f57509SVinod Koul compatible = "operating-points-v2"; 184190f57509SVinod Koul 184290f57509SVinod Koul rpmhpd_opp_ret: opp1 { 184390f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 184490f57509SVinod Koul }; 184590f57509SVinod Koul 184690f57509SVinod Koul rpmhpd_opp_min_svs: opp2 { 184790f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 184890f57509SVinod Koul }; 184990f57509SVinod Koul 185090f57509SVinod Koul rpmhpd_opp_low_svs: opp3 { 185190f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 185290f57509SVinod Koul }; 185390f57509SVinod Koul 185490f57509SVinod Koul rpmhpd_opp_svs: opp4 { 185590f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 185690f57509SVinod Koul }; 185790f57509SVinod Koul 185890f57509SVinod Koul rpmhpd_opp_svs_l1: opp5 { 185990f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 186090f57509SVinod Koul }; 186190f57509SVinod Koul 186290f57509SVinod Koul rpmhpd_opp_nom: opp6 { 186390f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 186490f57509SVinod Koul }; 186590f57509SVinod Koul 186690f57509SVinod Koul rpmhpd_opp_nom_l1: opp7 { 186790f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 186890f57509SVinod Koul }; 186990f57509SVinod Koul 187090f57509SVinod Koul rpmhpd_opp_nom_l2: opp8 { 187190f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 187290f57509SVinod Koul }; 187390f57509SVinod Koul 187490f57509SVinod Koul rpmhpd_opp_turbo: opp9 { 187590f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 187690f57509SVinod Koul }; 187790f57509SVinod Koul 187890f57509SVinod Koul rpmhpd_opp_turbo_l1: opp10 { 187990f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 188090f57509SVinod Koul }; 188190f57509SVinod Koul }; 188290f57509SVinod Koul }; 1883da6b2482SVinod Koul 1884da6b2482SVinod Koul apps_bcm_voter: bcm_voter { 1885da6b2482SVinod Koul compatible = "qcom,bcm-voter"; 1886da6b2482SVinod Koul }; 1887b7e8f433SVinod Koul }; 1888e780fb31SJack Pham 1889ccbb3abbSVinod Koul cpufreq_hw: cpufreq@18591000 { 1890ccbb3abbSVinod Koul compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss"; 1891ccbb3abbSVinod Koul reg = <0 0x18591000 0 0x1000>, 1892ccbb3abbSVinod Koul <0 0x18592000 0 0x1000>, 1893ccbb3abbSVinod Koul <0 0x18593000 0 0x1000>; 1894ccbb3abbSVinod Koul reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; 1895ccbb3abbSVinod Koul 1896ccbb3abbSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; 1897ccbb3abbSVinod Koul clock-names = "xo", "alternate"; 1898ccbb3abbSVinod Koul 1899ccbb3abbSVinod Koul #freq-domain-cells = <1>; 1900ccbb3abbSVinod Koul }; 1901ccbb3abbSVinod Koul 190259c7cf81SVinod Koul ufs_mem_hc: ufshc@1d84000 { 190359c7cf81SVinod Koul compatible = "qcom,sm8350-ufshc", "qcom,ufshc", 190459c7cf81SVinod Koul "jedec,ufs-2.0"; 190559c7cf81SVinod Koul reg = <0 0x01d84000 0 0x3000>; 190659c7cf81SVinod Koul interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 190759c7cf81SVinod Koul phys = <&ufs_mem_phy_lanes>; 190859c7cf81SVinod Koul phy-names = "ufsphy"; 190959c7cf81SVinod Koul lanes-per-direction = <2>; 191059c7cf81SVinod Koul #reset-cells = <1>; 19116d91e201SVinod Koul resets = <&gcc GCC_UFS_PHY_BCR>; 191259c7cf81SVinod Koul reset-names = "rst"; 191359c7cf81SVinod Koul 19146d91e201SVinod Koul power-domains = <&gcc UFS_PHY_GDSC>; 191559c7cf81SVinod Koul 191659c7cf81SVinod Koul iommus = <&apps_smmu 0xe0 0x0>; 191759c7cf81SVinod Koul 191859c7cf81SVinod Koul clock-names = 191959c7cf81SVinod Koul "ref_clk", 192059c7cf81SVinod Koul "core_clk", 192159c7cf81SVinod Koul "bus_aggr_clk", 192259c7cf81SVinod Koul "iface_clk", 192359c7cf81SVinod Koul "core_clk_unipro", 192459c7cf81SVinod Koul "ref_clk", 192559c7cf81SVinod Koul "tx_lane0_sync_clk", 192659c7cf81SVinod Koul "rx_lane0_sync_clk", 192759c7cf81SVinod Koul "rx_lane1_sync_clk"; 192859c7cf81SVinod Koul clocks = 192959c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 19306d91e201SVinod Koul <&gcc GCC_UFS_PHY_AXI_CLK>, 19316d91e201SVinod Koul <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 19326d91e201SVinod Koul <&gcc GCC_UFS_PHY_AHB_CLK>, 19336d91e201SVinod Koul <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 193459c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 19356d91e201SVinod Koul <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 19366d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 19376d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 193859c7cf81SVinod Koul freq-table-hz = 193959c7cf81SVinod Koul <75000000 300000000>, 194059c7cf81SVinod Koul <75000000 300000000>, 194159c7cf81SVinod Koul <0 0>, 194259c7cf81SVinod Koul <0 0>, 194359c7cf81SVinod Koul <75000000 300000000>, 194459c7cf81SVinod Koul <0 0>, 194559c7cf81SVinod Koul <0 0>, 19460fd4dcb6SBjorn Andersson <0 0>, 19470fd4dcb6SBjorn Andersson <0 0>; 194859c7cf81SVinod Koul status = "disabled"; 194959c7cf81SVinod Koul }; 195059c7cf81SVinod Koul 195159c7cf81SVinod Koul ufs_mem_phy: phy@1d87000 { 195259c7cf81SVinod Koul compatible = "qcom,sm8350-qmp-ufs-phy"; 195359c7cf81SVinod Koul reg = <0 0x01d87000 0 0xe10>; 195459c7cf81SVinod Koul #address-cells = <2>; 195559c7cf81SVinod Koul #size-cells = <2>; 195659c7cf81SVinod Koul ranges; 195759c7cf81SVinod Koul clock-names = "ref", 195859c7cf81SVinod Koul "ref_aux"; 195959c7cf81SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, 19606d91e201SVinod Koul <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 196159c7cf81SVinod Koul 196259c7cf81SVinod Koul resets = <&ufs_mem_hc 0>; 196359c7cf81SVinod Koul reset-names = "ufsphy"; 196459c7cf81SVinod Koul status = "disabled"; 196559c7cf81SVinod Koul 19661351512fSShawn Guo ufs_mem_phy_lanes: phy@1d87400 { 196759c7cf81SVinod Koul reg = <0 0x01d87400 0 0x108>, 196859c7cf81SVinod Koul <0 0x01d87600 0 0x1e0>, 196959c7cf81SVinod Koul <0 0x01d87c00 0 0x1dc>, 197059c7cf81SVinod Koul <0 0x01d87800 0 0x108>, 197159c7cf81SVinod Koul <0 0x01d87a00 0 0x1e0>; 197259c7cf81SVinod Koul #phy-cells = <0>; 197359c7cf81SVinod Koul #clock-cells = <0>; 197459c7cf81SVinod Koul }; 197559c7cf81SVinod Koul }; 197659c7cf81SVinod Koul 1977177fcf0aSVinod Koul slpi: remoteproc@5c00000 { 1978177fcf0aSVinod Koul compatible = "qcom,sm8350-slpi-pas"; 1979177fcf0aSVinod Koul reg = <0 0x05c00000 0 0x4000>; 1980177fcf0aSVinod Koul 1981177fcf0aSVinod Koul interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 1982177fcf0aSVinod Koul <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 1983177fcf0aSVinod Koul <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 1984177fcf0aSVinod Koul <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 1985177fcf0aSVinod Koul <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 1986177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1987177fcf0aSVinod Koul "handover", "stop-ack"; 1988177fcf0aSVinod Koul 1989177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1990177fcf0aSVinod Koul clock-names = "xo"; 1991177fcf0aSVinod Koul 19926b7cb2d2SSibi Sankar power-domains = <&rpmhpd 4>, 1993177fcf0aSVinod Koul <&rpmhpd 5>; 19946b7cb2d2SSibi Sankar power-domain-names = "lcx", "lmx"; 1995177fcf0aSVinod Koul 1996177fcf0aSVinod Koul memory-region = <&pil_slpi_mem>; 1997177fcf0aSVinod Koul 19986b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 19996b7cb2d2SSibi Sankar 2000177fcf0aSVinod Koul qcom,smem-states = <&smp2p_slpi_out 0>; 2001177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 2002177fcf0aSVinod Koul 2003177fcf0aSVinod Koul status = "disabled"; 2004177fcf0aSVinod Koul 2005177fcf0aSVinod Koul glink-edge { 2006177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 2007177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 2008177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 2009177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 2010177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 2011177fcf0aSVinod Koul 2012177fcf0aSVinod Koul label = "slpi"; 2013177fcf0aSVinod Koul qcom,remote-pid = <3>; 2014177fcf0aSVinod Koul 2015178056a4SOla Jeppsson fastrpc { 2016178056a4SOla Jeppsson compatible = "qcom,fastrpc"; 2017178056a4SOla Jeppsson qcom,glink-channels = "fastrpcglink-apps-dsp"; 2018178056a4SOla Jeppsson label = "sdsp"; 20198c8ce95bSJeya R qcom,non-secure-domain; 2020178056a4SOla Jeppsson #address-cells = <1>; 2021178056a4SOla Jeppsson #size-cells = <0>; 2022178056a4SOla Jeppsson 2023178056a4SOla Jeppsson compute-cb@1 { 2024178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2025178056a4SOla Jeppsson reg = <1>; 2026178056a4SOla Jeppsson iommus = <&apps_smmu 0x0541 0x0>; 2027178056a4SOla Jeppsson }; 2028178056a4SOla Jeppsson 2029178056a4SOla Jeppsson compute-cb@2 { 2030178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2031178056a4SOla Jeppsson reg = <2>; 2032178056a4SOla Jeppsson iommus = <&apps_smmu 0x0542 0x0>; 2033178056a4SOla Jeppsson }; 2034178056a4SOla Jeppsson 2035178056a4SOla Jeppsson compute-cb@3 { 2036178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2037178056a4SOla Jeppsson reg = <3>; 2038178056a4SOla Jeppsson iommus = <&apps_smmu 0x0543 0x0>; 2039178056a4SOla Jeppsson /* note: shared-cb = <4> in downstream */ 2040178056a4SOla Jeppsson }; 2041178056a4SOla Jeppsson }; 2042177fcf0aSVinod Koul }; 2043177fcf0aSVinod Koul }; 2044177fcf0aSVinod Koul 2045177fcf0aSVinod Koul cdsp: remoteproc@98900000 { 2046177fcf0aSVinod Koul compatible = "qcom,sm8350-cdsp-pas"; 2047177fcf0aSVinod Koul reg = <0 0x098900000 0 0x1400000>; 2048177fcf0aSVinod Koul 2049177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 2050177fcf0aSVinod Koul <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 2051177fcf0aSVinod Koul <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 2052177fcf0aSVinod Koul <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 2053177fcf0aSVinod Koul <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 2054177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 2055177fcf0aSVinod Koul "handover", "stop-ack"; 2056177fcf0aSVinod Koul 2057177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 2058177fcf0aSVinod Koul clock-names = "xo"; 2059177fcf0aSVinod Koul 20606b7cb2d2SSibi Sankar power-domains = <&rpmhpd 0>, 2061177fcf0aSVinod Koul <&rpmhpd 10>; 20626b7cb2d2SSibi Sankar power-domain-names = "cx", "mxc"; 2063177fcf0aSVinod Koul 206484c856d0SVinod Koul interconnects = <&compute_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>; 2065da6b2482SVinod Koul 2066177fcf0aSVinod Koul memory-region = <&pil_cdsp_mem>; 2067177fcf0aSVinod Koul 20686b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 20696b7cb2d2SSibi Sankar 2070177fcf0aSVinod Koul qcom,smem-states = <&smp2p_cdsp_out 0>; 2071177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 2072177fcf0aSVinod Koul 2073177fcf0aSVinod Koul status = "disabled"; 2074177fcf0aSVinod Koul 2075177fcf0aSVinod Koul glink-edge { 2076177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 2077177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 2078177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 2079177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 2080177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 2081177fcf0aSVinod Koul 2082177fcf0aSVinod Koul label = "cdsp"; 2083177fcf0aSVinod Koul qcom,remote-pid = <5>; 2084178056a4SOla Jeppsson 2085178056a4SOla Jeppsson fastrpc { 2086178056a4SOla Jeppsson compatible = "qcom,fastrpc"; 2087178056a4SOla Jeppsson qcom,glink-channels = "fastrpcglink-apps-dsp"; 2088178056a4SOla Jeppsson label = "cdsp"; 20898c8ce95bSJeya R qcom,non-secure-domain; 2090178056a4SOla Jeppsson #address-cells = <1>; 2091178056a4SOla Jeppsson #size-cells = <0>; 2092178056a4SOla Jeppsson 2093178056a4SOla Jeppsson compute-cb@1 { 2094178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2095178056a4SOla Jeppsson reg = <1>; 2096178056a4SOla Jeppsson iommus = <&apps_smmu 0x2161 0x0400>, 2097178056a4SOla Jeppsson <&apps_smmu 0x1181 0x0420>; 2098178056a4SOla Jeppsson }; 2099178056a4SOla Jeppsson 2100178056a4SOla Jeppsson compute-cb@2 { 2101178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2102178056a4SOla Jeppsson reg = <2>; 2103178056a4SOla Jeppsson iommus = <&apps_smmu 0x2162 0x0400>, 2104178056a4SOla Jeppsson <&apps_smmu 0x1182 0x0420>; 2105178056a4SOla Jeppsson }; 2106178056a4SOla Jeppsson 2107178056a4SOla Jeppsson compute-cb@3 { 2108178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2109178056a4SOla Jeppsson reg = <3>; 2110178056a4SOla Jeppsson iommus = <&apps_smmu 0x2163 0x0400>, 2111178056a4SOla Jeppsson <&apps_smmu 0x1183 0x0420>; 2112178056a4SOla Jeppsson }; 2113178056a4SOla Jeppsson 2114178056a4SOla Jeppsson compute-cb@4 { 2115178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2116178056a4SOla Jeppsson reg = <4>; 2117178056a4SOla Jeppsson iommus = <&apps_smmu 0x2164 0x0400>, 2118178056a4SOla Jeppsson <&apps_smmu 0x1184 0x0420>; 2119178056a4SOla Jeppsson }; 2120178056a4SOla Jeppsson 2121178056a4SOla Jeppsson compute-cb@5 { 2122178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2123178056a4SOla Jeppsson reg = <5>; 2124178056a4SOla Jeppsson iommus = <&apps_smmu 0x2165 0x0400>, 2125178056a4SOla Jeppsson <&apps_smmu 0x1185 0x0420>; 2126178056a4SOla Jeppsson }; 2127178056a4SOla Jeppsson 2128178056a4SOla Jeppsson compute-cb@6 { 2129178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2130178056a4SOla Jeppsson reg = <6>; 2131178056a4SOla Jeppsson iommus = <&apps_smmu 0x2166 0x0400>, 2132178056a4SOla Jeppsson <&apps_smmu 0x1186 0x0420>; 2133178056a4SOla Jeppsson }; 2134178056a4SOla Jeppsson 2135178056a4SOla Jeppsson compute-cb@7 { 2136178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2137178056a4SOla Jeppsson reg = <7>; 2138178056a4SOla Jeppsson iommus = <&apps_smmu 0x2167 0x0400>, 2139178056a4SOla Jeppsson <&apps_smmu 0x1187 0x0420>; 2140178056a4SOla Jeppsson }; 2141178056a4SOla Jeppsson 2142178056a4SOla Jeppsson compute-cb@8 { 2143178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2144178056a4SOla Jeppsson reg = <8>; 2145178056a4SOla Jeppsson iommus = <&apps_smmu 0x2168 0x0400>, 2146178056a4SOla Jeppsson <&apps_smmu 0x1188 0x0420>; 2147178056a4SOla Jeppsson }; 2148178056a4SOla Jeppsson 2149178056a4SOla Jeppsson /* note: secure cb9 in downstream */ 2150178056a4SOla Jeppsson }; 2151177fcf0aSVinod Koul }; 2152177fcf0aSVinod Koul }; 2153177fcf0aSVinod Koul 2154e780fb31SJack Pham usb_1_hsphy: phy@88e3000 { 2155e780fb31SJack Pham compatible = "qcom,sm8350-usb-hs-phy", 2156e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 2157e780fb31SJack Pham reg = <0 0x088e3000 0 0x400>; 2158e780fb31SJack Pham status = "disabled"; 2159e780fb31SJack Pham #phy-cells = <0>; 2160e780fb31SJack Pham 2161e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 2162e780fb31SJack Pham clock-names = "ref"; 2163e780fb31SJack Pham 21646d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 2165e780fb31SJack Pham }; 2166e780fb31SJack Pham 2167e780fb31SJack Pham usb_2_hsphy: phy@88e4000 { 2168e780fb31SJack Pham compatible = "qcom,sm8250-usb-hs-phy", 2169e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 2170e780fb31SJack Pham reg = <0 0x088e4000 0 0x400>; 2171e780fb31SJack Pham status = "disabled"; 2172e780fb31SJack Pham #phy-cells = <0>; 2173e780fb31SJack Pham 2174e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 2175e780fb31SJack Pham clock-names = "ref"; 2176e780fb31SJack Pham 21776d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 2178e780fb31SJack Pham }; 2179e780fb31SJack Pham 2180e780fb31SJack Pham usb_1_qmpphy: phy-wrapper@88e9000 { 2181e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-phy"; 2182e780fb31SJack Pham reg = <0 0x088e9000 0 0x200>, 2183e780fb31SJack Pham <0 0x088e8000 0 0x20>; 2184e780fb31SJack Pham status = "disabled"; 2185e780fb31SJack Pham #address-cells = <2>; 2186e780fb31SJack Pham #size-cells = <2>; 2187e780fb31SJack Pham ranges; 2188e780fb31SJack Pham 21896d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 2190e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 21916d91e201SVinod Koul <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 2192e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "com_aux"; 2193e780fb31SJack Pham 21946d91e201SVinod Koul resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 21956d91e201SVinod Koul <&gcc GCC_USB3_PHY_PRIM_BCR>; 2196e780fb31SJack Pham reset-names = "phy", "common"; 2197e780fb31SJack Pham 2198e780fb31SJack Pham usb_1_ssphy: phy@88e9200 { 2199e780fb31SJack Pham reg = <0 0x088e9200 0 0x200>, 2200e780fb31SJack Pham <0 0x088e9400 0 0x200>, 2201e780fb31SJack Pham <0 0x088e9c00 0 0x400>, 2202e780fb31SJack Pham <0 0x088e9600 0 0x200>, 2203e780fb31SJack Pham <0 0x088e9800 0 0x200>, 2204e780fb31SJack Pham <0 0x088e9a00 0 0x100>; 2205e780fb31SJack Pham #phy-cells = <0>; 2206e780fb31SJack Pham #clock-cells = <1>; 22076d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 2208e780fb31SJack Pham clock-names = "pipe0"; 2209e780fb31SJack Pham clock-output-names = "usb3_phy_pipe_clk_src"; 2210e780fb31SJack Pham }; 2211e780fb31SJack Pham }; 2212e780fb31SJack Pham 2213e780fb31SJack Pham usb_2_qmpphy: phy-wrapper@88eb000 { 2214e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-uni-phy"; 2215e780fb31SJack Pham reg = <0 0x088eb000 0 0x200>; 2216e780fb31SJack Pham status = "disabled"; 2217e780fb31SJack Pham #address-cells = <2>; 2218e780fb31SJack Pham #size-cells = <2>; 2219e780fb31SJack Pham ranges; 2220e780fb31SJack Pham 22216d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 2222e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 22236d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>, 22246d91e201SVinod Koul <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 2225e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 2226e780fb31SJack Pham 22276d91e201SVinod Koul resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 22286d91e201SVinod Koul <&gcc GCC_USB3_PHY_SEC_BCR>; 2229e780fb31SJack Pham reset-names = "phy", "common"; 2230e780fb31SJack Pham 2231e780fb31SJack Pham usb_2_ssphy: phy@88ebe00 { 2232e780fb31SJack Pham reg = <0 0x088ebe00 0 0x200>, 2233e780fb31SJack Pham <0 0x088ec000 0 0x200>, 2234e780fb31SJack Pham <0 0x088eb200 0 0x1100>; 2235e780fb31SJack Pham #phy-cells = <0>; 2236e780fb31SJack Pham #clock-cells = <1>; 22376d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 2238e780fb31SJack Pham clock-names = "pipe0"; 2239e780fb31SJack Pham clock-output-names = "usb3_uni_phy_pipe_clk_src"; 2240e780fb31SJack Pham }; 2241e780fb31SJack Pham }; 2242e780fb31SJack Pham 22431dee9e3bSVinod Koul dc_noc: interconnect@90c0000 { 2244da6b2482SVinod Koul compatible = "qcom,sm8350-dc-noc"; 2245da6b2482SVinod Koul reg = <0 0x090c0000 0 0x4200>; 2246da6b2482SVinod Koul #interconnect-cells = <1>; 2247da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 2248da6b2482SVinod Koul }; 2249da6b2482SVinod Koul 2250da6b2482SVinod Koul gem_noc: interconnect@9100000 { 2251da6b2482SVinod Koul compatible = "qcom,sm8350-gem-noc"; 2252da6b2482SVinod Koul reg = <0 0x09100000 0 0xb4000>; 2253da6b2482SVinod Koul #interconnect-cells = <1>; 2254da6b2482SVinod Koul qcom,bcm-voters = <&apps_bcm_voter>; 2255da6b2482SVinod Koul }; 2256da6b2482SVinod Koul 22579ac8999eSKonrad Dybcio system-cache-controller@9200000 { 22589ac8999eSKonrad Dybcio compatible = "qcom,sm8350-llcc"; 22599ac8999eSKonrad Dybcio reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; 22609ac8999eSKonrad Dybcio reg-names = "llcc_base", "llcc_broadcast_base"; 22619ac8999eSKonrad Dybcio }; 22629ac8999eSKonrad Dybcio 2263e780fb31SJack Pham usb_1: usb@a6f8800 { 2264e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 2265e780fb31SJack Pham reg = <0 0x0a6f8800 0 0x400>; 2266e780fb31SJack Pham status = "disabled"; 2267e780fb31SJack Pham #address-cells = <2>; 2268e780fb31SJack Pham #size-cells = <2>; 2269e780fb31SJack Pham ranges; 2270e780fb31SJack Pham 22716d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 22726d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>, 22736d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 2274*8d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 2275*8d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; 2276*8d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 2277*8d5fd4e4SKrzysztof Kozlowski "core", 2278*8d5fd4e4SKrzysztof Kozlowski "iface", 2279*8d5fd4e4SKrzysztof Kozlowski "sleep", 2280*8d5fd4e4SKrzysztof Kozlowski "mock_utmi"; 2281e780fb31SJack Pham 22826d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 22836d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>; 2284e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 2285e780fb31SJack Pham 2286e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 2287e780fb31SJack Pham <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 2288e780fb31SJack Pham <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 2289e780fb31SJack Pham <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 2290e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 2291e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 2292e780fb31SJack Pham 22936d91e201SVinod Koul power-domains = <&gcc USB30_PRIM_GDSC>; 2294e780fb31SJack Pham 22956d91e201SVinod Koul resets = <&gcc GCC_USB30_PRIM_BCR>; 2296e780fb31SJack Pham 22972aa2b50dSBhupesh Sharma usb_1_dwc3: usb@a600000 { 2298e780fb31SJack Pham compatible = "snps,dwc3"; 2299e780fb31SJack Pham reg = <0 0x0a600000 0 0xcd00>; 2300e780fb31SJack Pham interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 2301e780fb31SJack Pham iommus = <&apps_smmu 0x0 0x0>; 2302e780fb31SJack Pham snps,dis_u2_susphy_quirk; 2303e780fb31SJack Pham snps,dis_enblslpm_quirk; 2304e780fb31SJack Pham phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 2305e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 2306e780fb31SJack Pham }; 2307e780fb31SJack Pham }; 2308e780fb31SJack Pham 2309e780fb31SJack Pham usb_2: usb@a8f8800 { 2310e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 2311e780fb31SJack Pham reg = <0 0x0a8f8800 0 0x400>; 2312e780fb31SJack Pham status = "disabled"; 2313e780fb31SJack Pham #address-cells = <2>; 2314e780fb31SJack Pham #size-cells = <2>; 2315e780fb31SJack Pham ranges; 2316e780fb31SJack Pham 23176d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 23186d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>, 23196d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 23206d91e201SVinod Koul <&gcc GCC_USB30_SEC_SLEEP_CLK>, 2321*8d5fd4e4SKrzysztof Kozlowski <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 23226d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>; 2323*8d5fd4e4SKrzysztof Kozlowski clock-names = "cfg_noc", 2324*8d5fd4e4SKrzysztof Kozlowski "core", 2325*8d5fd4e4SKrzysztof Kozlowski "iface", 2326*8d5fd4e4SKrzysztof Kozlowski "sleep", 2327*8d5fd4e4SKrzysztof Kozlowski "mock_utmi", 2328*8d5fd4e4SKrzysztof Kozlowski "xo"; 2329e780fb31SJack Pham 23306d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 23316d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>; 2332e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 2333e780fb31SJack Pham 2334e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 2335e780fb31SJack Pham <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 2336e780fb31SJack Pham <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 2337e780fb31SJack Pham <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 2338e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 2339e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 2340e780fb31SJack Pham 23416d91e201SVinod Koul power-domains = <&gcc USB30_SEC_GDSC>; 2342e780fb31SJack Pham 23436d91e201SVinod Koul resets = <&gcc GCC_USB30_SEC_BCR>; 2344e780fb31SJack Pham 23452aa2b50dSBhupesh Sharma usb_2_dwc3: usb@a800000 { 2346e780fb31SJack Pham compatible = "snps,dwc3"; 2347e780fb31SJack Pham reg = <0 0x0a800000 0 0xcd00>; 2348e780fb31SJack Pham interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 2349e780fb31SJack Pham iommus = <&apps_smmu 0x20 0x0>; 2350e780fb31SJack Pham snps,dis_u2_susphy_quirk; 2351e780fb31SJack Pham snps,dis_enblslpm_quirk; 2352e780fb31SJack Pham phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 2353e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 2354e780fb31SJack Pham }; 2355e780fb31SJack Pham }; 2356177fcf0aSVinod Koul 2357177fcf0aSVinod Koul adsp: remoteproc@17300000 { 2358177fcf0aSVinod Koul compatible = "qcom,sm8350-adsp-pas"; 2359177fcf0aSVinod Koul reg = <0 0x17300000 0 0x100>; 2360177fcf0aSVinod Koul 2361177fcf0aSVinod Koul interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 2362177fcf0aSVinod Koul <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 2363177fcf0aSVinod Koul <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 2364177fcf0aSVinod Koul <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 2365177fcf0aSVinod Koul <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 2366177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 2367177fcf0aSVinod Koul "handover", "stop-ack"; 2368177fcf0aSVinod Koul 2369177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 2370177fcf0aSVinod Koul clock-names = "xo"; 2371177fcf0aSVinod Koul 23726b7cb2d2SSibi Sankar power-domains = <&rpmhpd 4>, 2373177fcf0aSVinod Koul <&rpmhpd 5>; 23746b7cb2d2SSibi Sankar power-domain-names = "lcx", "lmx"; 2375177fcf0aSVinod Koul 2376177fcf0aSVinod Koul memory-region = <&pil_adsp_mem>; 2377177fcf0aSVinod Koul 23786b7cb2d2SSibi Sankar qcom,qmp = <&aoss_qmp>; 23796b7cb2d2SSibi Sankar 2380177fcf0aSVinod Koul qcom,smem-states = <&smp2p_adsp_out 0>; 2381177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 2382177fcf0aSVinod Koul 2383177fcf0aSVinod Koul status = "disabled"; 2384177fcf0aSVinod Koul 2385177fcf0aSVinod Koul glink-edge { 2386177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 2387177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 2388177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 2389177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 2390177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 2391177fcf0aSVinod Koul 2392177fcf0aSVinod Koul label = "lpass"; 2393177fcf0aSVinod Koul qcom,remote-pid = <2>; 2394178056a4SOla Jeppsson 2395178056a4SOla Jeppsson fastrpc { 2396178056a4SOla Jeppsson compatible = "qcom,fastrpc"; 2397178056a4SOla Jeppsson qcom,glink-channels = "fastrpcglink-apps-dsp"; 2398178056a4SOla Jeppsson label = "adsp"; 23998c8ce95bSJeya R qcom,non-secure-domain; 2400178056a4SOla Jeppsson #address-cells = <1>; 2401178056a4SOla Jeppsson #size-cells = <0>; 2402178056a4SOla Jeppsson 2403178056a4SOla Jeppsson compute-cb@3 { 2404178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2405178056a4SOla Jeppsson reg = <3>; 2406178056a4SOla Jeppsson iommus = <&apps_smmu 0x1803 0x0>; 2407178056a4SOla Jeppsson }; 2408178056a4SOla Jeppsson 2409178056a4SOla Jeppsson compute-cb@4 { 2410178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2411178056a4SOla Jeppsson reg = <4>; 2412178056a4SOla Jeppsson iommus = <&apps_smmu 0x1804 0x0>; 2413178056a4SOla Jeppsson }; 2414178056a4SOla Jeppsson 2415178056a4SOla Jeppsson compute-cb@5 { 2416178056a4SOla Jeppsson compatible = "qcom,fastrpc-compute-cb"; 2417178056a4SOla Jeppsson reg = <5>; 2418178056a4SOla Jeppsson iommus = <&apps_smmu 0x1805 0x0>; 2419178056a4SOla Jeppsson }; 2420178056a4SOla Jeppsson }; 2421177fcf0aSVinod Koul }; 2422177fcf0aSVinod Koul }; 2423b7e8f433SVinod Koul }; 2424b7e8f433SVinod Koul 24254dcaa68eSsatya priya thermal_zones: thermal-zones { 242620f9d94eSRobert Foss cpu0-thermal { 242720f9d94eSRobert Foss polling-delay-passive = <250>; 242820f9d94eSRobert Foss polling-delay = <1000>; 242920f9d94eSRobert Foss 243020f9d94eSRobert Foss thermal-sensors = <&tsens0 1>; 243120f9d94eSRobert Foss 243220f9d94eSRobert Foss trips { 243320f9d94eSRobert Foss cpu0_alert0: trip-point0 { 243420f9d94eSRobert Foss temperature = <90000>; 243520f9d94eSRobert Foss hysteresis = <2000>; 243620f9d94eSRobert Foss type = "passive"; 243720f9d94eSRobert Foss }; 243820f9d94eSRobert Foss 243920f9d94eSRobert Foss cpu0_alert1: trip-point1 { 244020f9d94eSRobert Foss temperature = <95000>; 244120f9d94eSRobert Foss hysteresis = <2000>; 244220f9d94eSRobert Foss type = "passive"; 244320f9d94eSRobert Foss }; 244420f9d94eSRobert Foss 244520f9d94eSRobert Foss cpu0_crit: cpu_crit { 244620f9d94eSRobert Foss temperature = <110000>; 244720f9d94eSRobert Foss hysteresis = <1000>; 244820f9d94eSRobert Foss type = "critical"; 244920f9d94eSRobert Foss }; 245020f9d94eSRobert Foss }; 245120f9d94eSRobert Foss 245220f9d94eSRobert Foss cooling-maps { 245320f9d94eSRobert Foss map0 { 245420f9d94eSRobert Foss trip = <&cpu0_alert0>; 245520f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 245620f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 245720f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 245820f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 245920f9d94eSRobert Foss }; 246020f9d94eSRobert Foss map1 { 246120f9d94eSRobert Foss trip = <&cpu0_alert1>; 246220f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 246320f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 246420f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 246520f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 246620f9d94eSRobert Foss }; 246720f9d94eSRobert Foss }; 246820f9d94eSRobert Foss }; 246920f9d94eSRobert Foss 247020f9d94eSRobert Foss cpu1-thermal { 247120f9d94eSRobert Foss polling-delay-passive = <250>; 247220f9d94eSRobert Foss polling-delay = <1000>; 247320f9d94eSRobert Foss 247420f9d94eSRobert Foss thermal-sensors = <&tsens0 2>; 247520f9d94eSRobert Foss 247620f9d94eSRobert Foss trips { 247720f9d94eSRobert Foss cpu1_alert0: trip-point0 { 247820f9d94eSRobert Foss temperature = <90000>; 247920f9d94eSRobert Foss hysteresis = <2000>; 248020f9d94eSRobert Foss type = "passive"; 248120f9d94eSRobert Foss }; 248220f9d94eSRobert Foss 248320f9d94eSRobert Foss cpu1_alert1: trip-point1 { 248420f9d94eSRobert Foss temperature = <95000>; 248520f9d94eSRobert Foss hysteresis = <2000>; 248620f9d94eSRobert Foss type = "passive"; 248720f9d94eSRobert Foss }; 248820f9d94eSRobert Foss 248920f9d94eSRobert Foss cpu1_crit: cpu_crit { 249020f9d94eSRobert Foss temperature = <110000>; 249120f9d94eSRobert Foss hysteresis = <1000>; 249220f9d94eSRobert Foss type = "critical"; 249320f9d94eSRobert Foss }; 249420f9d94eSRobert Foss }; 249520f9d94eSRobert Foss 249620f9d94eSRobert Foss cooling-maps { 249720f9d94eSRobert Foss map0 { 249820f9d94eSRobert Foss trip = <&cpu1_alert0>; 249920f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 250020f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 250120f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 250220f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 250320f9d94eSRobert Foss }; 250420f9d94eSRobert Foss map1 { 250520f9d94eSRobert Foss trip = <&cpu1_alert1>; 250620f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 250720f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 250820f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 250920f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 251020f9d94eSRobert Foss }; 251120f9d94eSRobert Foss }; 251220f9d94eSRobert Foss }; 251320f9d94eSRobert Foss 251420f9d94eSRobert Foss cpu2-thermal { 251520f9d94eSRobert Foss polling-delay-passive = <250>; 251620f9d94eSRobert Foss polling-delay = <1000>; 251720f9d94eSRobert Foss 251820f9d94eSRobert Foss thermal-sensors = <&tsens0 3>; 251920f9d94eSRobert Foss 252020f9d94eSRobert Foss trips { 252120f9d94eSRobert Foss cpu2_alert0: trip-point0 { 252220f9d94eSRobert Foss temperature = <90000>; 252320f9d94eSRobert Foss hysteresis = <2000>; 252420f9d94eSRobert Foss type = "passive"; 252520f9d94eSRobert Foss }; 252620f9d94eSRobert Foss 252720f9d94eSRobert Foss cpu2_alert1: trip-point1 { 252820f9d94eSRobert Foss temperature = <95000>; 252920f9d94eSRobert Foss hysteresis = <2000>; 253020f9d94eSRobert Foss type = "passive"; 253120f9d94eSRobert Foss }; 253220f9d94eSRobert Foss 253320f9d94eSRobert Foss cpu2_crit: cpu_crit { 253420f9d94eSRobert Foss temperature = <110000>; 253520f9d94eSRobert Foss hysteresis = <1000>; 253620f9d94eSRobert Foss type = "critical"; 253720f9d94eSRobert Foss }; 253820f9d94eSRobert Foss }; 253920f9d94eSRobert Foss 254020f9d94eSRobert Foss cooling-maps { 254120f9d94eSRobert Foss map0 { 254220f9d94eSRobert Foss trip = <&cpu2_alert0>; 254320f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 254420f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 254520f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 254620f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 254720f9d94eSRobert Foss }; 254820f9d94eSRobert Foss map1 { 254920f9d94eSRobert Foss trip = <&cpu2_alert1>; 255020f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 255120f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 255220f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 255320f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 255420f9d94eSRobert Foss }; 255520f9d94eSRobert Foss }; 255620f9d94eSRobert Foss }; 255720f9d94eSRobert Foss 255820f9d94eSRobert Foss cpu3-thermal { 255920f9d94eSRobert Foss polling-delay-passive = <250>; 256020f9d94eSRobert Foss polling-delay = <1000>; 256120f9d94eSRobert Foss 256220f9d94eSRobert Foss thermal-sensors = <&tsens0 4>; 256320f9d94eSRobert Foss 256420f9d94eSRobert Foss trips { 256520f9d94eSRobert Foss cpu3_alert0: trip-point0 { 256620f9d94eSRobert Foss temperature = <90000>; 256720f9d94eSRobert Foss hysteresis = <2000>; 256820f9d94eSRobert Foss type = "passive"; 256920f9d94eSRobert Foss }; 257020f9d94eSRobert Foss 257120f9d94eSRobert Foss cpu3_alert1: trip-point1 { 257220f9d94eSRobert Foss temperature = <95000>; 257320f9d94eSRobert Foss hysteresis = <2000>; 257420f9d94eSRobert Foss type = "passive"; 257520f9d94eSRobert Foss }; 257620f9d94eSRobert Foss 257720f9d94eSRobert Foss cpu3_crit: cpu_crit { 257820f9d94eSRobert Foss temperature = <110000>; 257920f9d94eSRobert Foss hysteresis = <1000>; 258020f9d94eSRobert Foss type = "critical"; 258120f9d94eSRobert Foss }; 258220f9d94eSRobert Foss }; 258320f9d94eSRobert Foss 258420f9d94eSRobert Foss cooling-maps { 258520f9d94eSRobert Foss map0 { 258620f9d94eSRobert Foss trip = <&cpu3_alert0>; 258720f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 258820f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 258920f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 259020f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 259120f9d94eSRobert Foss }; 259220f9d94eSRobert Foss map1 { 259320f9d94eSRobert Foss trip = <&cpu3_alert1>; 259420f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 259520f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 259620f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 259720f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 259820f9d94eSRobert Foss }; 259920f9d94eSRobert Foss }; 260020f9d94eSRobert Foss }; 260120f9d94eSRobert Foss 260220f9d94eSRobert Foss cpu4-top-thermal { 260320f9d94eSRobert Foss polling-delay-passive = <250>; 260420f9d94eSRobert Foss polling-delay = <1000>; 260520f9d94eSRobert Foss 260620f9d94eSRobert Foss thermal-sensors = <&tsens0 7>; 260720f9d94eSRobert Foss 260820f9d94eSRobert Foss trips { 260920f9d94eSRobert Foss cpu4_top_alert0: trip-point0 { 261020f9d94eSRobert Foss temperature = <90000>; 261120f9d94eSRobert Foss hysteresis = <2000>; 261220f9d94eSRobert Foss type = "passive"; 261320f9d94eSRobert Foss }; 261420f9d94eSRobert Foss 261520f9d94eSRobert Foss cpu4_top_alert1: trip-point1 { 261620f9d94eSRobert Foss temperature = <95000>; 261720f9d94eSRobert Foss hysteresis = <2000>; 261820f9d94eSRobert Foss type = "passive"; 261920f9d94eSRobert Foss }; 262020f9d94eSRobert Foss 262120f9d94eSRobert Foss cpu4_top_crit: cpu_crit { 262220f9d94eSRobert Foss temperature = <110000>; 262320f9d94eSRobert Foss hysteresis = <1000>; 262420f9d94eSRobert Foss type = "critical"; 262520f9d94eSRobert Foss }; 262620f9d94eSRobert Foss }; 262720f9d94eSRobert Foss 262820f9d94eSRobert Foss cooling-maps { 262920f9d94eSRobert Foss map0 { 263020f9d94eSRobert Foss trip = <&cpu4_top_alert0>; 263120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 263220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 263320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 263420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 263520f9d94eSRobert Foss }; 263620f9d94eSRobert Foss map1 { 263720f9d94eSRobert Foss trip = <&cpu4_top_alert1>; 263820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 263920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 264020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 264120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 264220f9d94eSRobert Foss }; 264320f9d94eSRobert Foss }; 264420f9d94eSRobert Foss }; 264520f9d94eSRobert Foss 264620f9d94eSRobert Foss cpu5-top-thermal { 264720f9d94eSRobert Foss polling-delay-passive = <250>; 264820f9d94eSRobert Foss polling-delay = <1000>; 264920f9d94eSRobert Foss 265020f9d94eSRobert Foss thermal-sensors = <&tsens0 8>; 265120f9d94eSRobert Foss 265220f9d94eSRobert Foss trips { 265320f9d94eSRobert Foss cpu5_top_alert0: trip-point0 { 265420f9d94eSRobert Foss temperature = <90000>; 265520f9d94eSRobert Foss hysteresis = <2000>; 265620f9d94eSRobert Foss type = "passive"; 265720f9d94eSRobert Foss }; 265820f9d94eSRobert Foss 265920f9d94eSRobert Foss cpu5_top_alert1: trip-point1 { 266020f9d94eSRobert Foss temperature = <95000>; 266120f9d94eSRobert Foss hysteresis = <2000>; 266220f9d94eSRobert Foss type = "passive"; 266320f9d94eSRobert Foss }; 266420f9d94eSRobert Foss 266520f9d94eSRobert Foss cpu5_top_crit: cpu_crit { 266620f9d94eSRobert Foss temperature = <110000>; 266720f9d94eSRobert Foss hysteresis = <1000>; 266820f9d94eSRobert Foss type = "critical"; 266920f9d94eSRobert Foss }; 267020f9d94eSRobert Foss }; 267120f9d94eSRobert Foss 267220f9d94eSRobert Foss cooling-maps { 267320f9d94eSRobert Foss map0 { 267420f9d94eSRobert Foss trip = <&cpu5_top_alert0>; 267520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 267620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 267720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 267820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 267920f9d94eSRobert Foss }; 268020f9d94eSRobert Foss map1 { 268120f9d94eSRobert Foss trip = <&cpu5_top_alert1>; 268220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 268320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 268420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 268520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 268620f9d94eSRobert Foss }; 268720f9d94eSRobert Foss }; 268820f9d94eSRobert Foss }; 268920f9d94eSRobert Foss 269020f9d94eSRobert Foss cpu6-top-thermal { 269120f9d94eSRobert Foss polling-delay-passive = <250>; 269220f9d94eSRobert Foss polling-delay = <1000>; 269320f9d94eSRobert Foss 269420f9d94eSRobert Foss thermal-sensors = <&tsens0 9>; 269520f9d94eSRobert Foss 269620f9d94eSRobert Foss trips { 269720f9d94eSRobert Foss cpu6_top_alert0: trip-point0 { 269820f9d94eSRobert Foss temperature = <90000>; 269920f9d94eSRobert Foss hysteresis = <2000>; 270020f9d94eSRobert Foss type = "passive"; 270120f9d94eSRobert Foss }; 270220f9d94eSRobert Foss 270320f9d94eSRobert Foss cpu6_top_alert1: trip-point1 { 270420f9d94eSRobert Foss temperature = <95000>; 270520f9d94eSRobert Foss hysteresis = <2000>; 270620f9d94eSRobert Foss type = "passive"; 270720f9d94eSRobert Foss }; 270820f9d94eSRobert Foss 270920f9d94eSRobert Foss cpu6_top_crit: cpu_crit { 271020f9d94eSRobert Foss temperature = <110000>; 271120f9d94eSRobert Foss hysteresis = <1000>; 271220f9d94eSRobert Foss type = "critical"; 271320f9d94eSRobert Foss }; 271420f9d94eSRobert Foss }; 271520f9d94eSRobert Foss 271620f9d94eSRobert Foss cooling-maps { 271720f9d94eSRobert Foss map0 { 271820f9d94eSRobert Foss trip = <&cpu6_top_alert0>; 271920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 272020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 272120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 272220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 272320f9d94eSRobert Foss }; 272420f9d94eSRobert Foss map1 { 272520f9d94eSRobert Foss trip = <&cpu6_top_alert1>; 272620f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 272720f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 272820f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 272920f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 273020f9d94eSRobert Foss }; 273120f9d94eSRobert Foss }; 273220f9d94eSRobert Foss }; 273320f9d94eSRobert Foss 273420f9d94eSRobert Foss cpu7-top-thermal { 273520f9d94eSRobert Foss polling-delay-passive = <250>; 273620f9d94eSRobert Foss polling-delay = <1000>; 273720f9d94eSRobert Foss 273820f9d94eSRobert Foss thermal-sensors = <&tsens0 10>; 273920f9d94eSRobert Foss 274020f9d94eSRobert Foss trips { 274120f9d94eSRobert Foss cpu7_top_alert0: trip-point0 { 274220f9d94eSRobert Foss temperature = <90000>; 274320f9d94eSRobert Foss hysteresis = <2000>; 274420f9d94eSRobert Foss type = "passive"; 274520f9d94eSRobert Foss }; 274620f9d94eSRobert Foss 274720f9d94eSRobert Foss cpu7_top_alert1: trip-point1 { 274820f9d94eSRobert Foss temperature = <95000>; 274920f9d94eSRobert Foss hysteresis = <2000>; 275020f9d94eSRobert Foss type = "passive"; 275120f9d94eSRobert Foss }; 275220f9d94eSRobert Foss 275320f9d94eSRobert Foss cpu7_top_crit: cpu_crit { 275420f9d94eSRobert Foss temperature = <110000>; 275520f9d94eSRobert Foss hysteresis = <1000>; 275620f9d94eSRobert Foss type = "critical"; 275720f9d94eSRobert Foss }; 275820f9d94eSRobert Foss }; 275920f9d94eSRobert Foss 276020f9d94eSRobert Foss cooling-maps { 276120f9d94eSRobert Foss map0 { 276220f9d94eSRobert Foss trip = <&cpu7_top_alert0>; 276320f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 276420f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 276520f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 276620f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 276720f9d94eSRobert Foss }; 276820f9d94eSRobert Foss map1 { 276920f9d94eSRobert Foss trip = <&cpu7_top_alert1>; 277020f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 277120f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 277220f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 277320f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 277420f9d94eSRobert Foss }; 277520f9d94eSRobert Foss }; 277620f9d94eSRobert Foss }; 277720f9d94eSRobert Foss 277820f9d94eSRobert Foss cpu4-bottom-thermal { 277920f9d94eSRobert Foss polling-delay-passive = <250>; 278020f9d94eSRobert Foss polling-delay = <1000>; 278120f9d94eSRobert Foss 278220f9d94eSRobert Foss thermal-sensors = <&tsens0 11>; 278320f9d94eSRobert Foss 278420f9d94eSRobert Foss trips { 278520f9d94eSRobert Foss cpu4_bottom_alert0: trip-point0 { 278620f9d94eSRobert Foss temperature = <90000>; 278720f9d94eSRobert Foss hysteresis = <2000>; 278820f9d94eSRobert Foss type = "passive"; 278920f9d94eSRobert Foss }; 279020f9d94eSRobert Foss 279120f9d94eSRobert Foss cpu4_bottom_alert1: trip-point1 { 279220f9d94eSRobert Foss temperature = <95000>; 279320f9d94eSRobert Foss hysteresis = <2000>; 279420f9d94eSRobert Foss type = "passive"; 279520f9d94eSRobert Foss }; 279620f9d94eSRobert Foss 279720f9d94eSRobert Foss cpu4_bottom_crit: cpu_crit { 279820f9d94eSRobert Foss temperature = <110000>; 279920f9d94eSRobert Foss hysteresis = <1000>; 280020f9d94eSRobert Foss type = "critical"; 280120f9d94eSRobert Foss }; 280220f9d94eSRobert Foss }; 280320f9d94eSRobert Foss 280420f9d94eSRobert Foss cooling-maps { 280520f9d94eSRobert Foss map0 { 280620f9d94eSRobert Foss trip = <&cpu4_bottom_alert0>; 280720f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 280820f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 280920f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 281020f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 281120f9d94eSRobert Foss }; 281220f9d94eSRobert Foss map1 { 281320f9d94eSRobert Foss trip = <&cpu4_bottom_alert1>; 281420f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 281520f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 281620f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 281720f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 281820f9d94eSRobert Foss }; 281920f9d94eSRobert Foss }; 282020f9d94eSRobert Foss }; 282120f9d94eSRobert Foss 282220f9d94eSRobert Foss cpu5-bottom-thermal { 282320f9d94eSRobert Foss polling-delay-passive = <250>; 282420f9d94eSRobert Foss polling-delay = <1000>; 282520f9d94eSRobert Foss 282620f9d94eSRobert Foss thermal-sensors = <&tsens0 12>; 282720f9d94eSRobert Foss 282820f9d94eSRobert Foss trips { 282920f9d94eSRobert Foss cpu5_bottom_alert0: trip-point0 { 283020f9d94eSRobert Foss temperature = <90000>; 283120f9d94eSRobert Foss hysteresis = <2000>; 283220f9d94eSRobert Foss type = "passive"; 283320f9d94eSRobert Foss }; 283420f9d94eSRobert Foss 283520f9d94eSRobert Foss cpu5_bottom_alert1: trip-point1 { 283620f9d94eSRobert Foss temperature = <95000>; 283720f9d94eSRobert Foss hysteresis = <2000>; 283820f9d94eSRobert Foss type = "passive"; 283920f9d94eSRobert Foss }; 284020f9d94eSRobert Foss 284120f9d94eSRobert Foss cpu5_bottom_crit: cpu_crit { 284220f9d94eSRobert Foss temperature = <110000>; 284320f9d94eSRobert Foss hysteresis = <1000>; 284420f9d94eSRobert Foss type = "critical"; 284520f9d94eSRobert Foss }; 284620f9d94eSRobert Foss }; 284720f9d94eSRobert Foss 284820f9d94eSRobert Foss cooling-maps { 284920f9d94eSRobert Foss map0 { 285020f9d94eSRobert Foss trip = <&cpu5_bottom_alert0>; 285120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 285220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 285320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 285420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 285520f9d94eSRobert Foss }; 285620f9d94eSRobert Foss map1 { 285720f9d94eSRobert Foss trip = <&cpu5_bottom_alert1>; 285820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 285920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 286020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 286120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 286220f9d94eSRobert Foss }; 286320f9d94eSRobert Foss }; 286420f9d94eSRobert Foss }; 286520f9d94eSRobert Foss 286620f9d94eSRobert Foss cpu6-bottom-thermal { 286720f9d94eSRobert Foss polling-delay-passive = <250>; 286820f9d94eSRobert Foss polling-delay = <1000>; 286920f9d94eSRobert Foss 287020f9d94eSRobert Foss thermal-sensors = <&tsens0 13>; 287120f9d94eSRobert Foss 287220f9d94eSRobert Foss trips { 287320f9d94eSRobert Foss cpu6_bottom_alert0: trip-point0 { 287420f9d94eSRobert Foss temperature = <90000>; 287520f9d94eSRobert Foss hysteresis = <2000>; 287620f9d94eSRobert Foss type = "passive"; 287720f9d94eSRobert Foss }; 287820f9d94eSRobert Foss 287920f9d94eSRobert Foss cpu6_bottom_alert1: trip-point1 { 288020f9d94eSRobert Foss temperature = <95000>; 288120f9d94eSRobert Foss hysteresis = <2000>; 288220f9d94eSRobert Foss type = "passive"; 288320f9d94eSRobert Foss }; 288420f9d94eSRobert Foss 288520f9d94eSRobert Foss cpu6_bottom_crit: cpu_crit { 288620f9d94eSRobert Foss temperature = <110000>; 288720f9d94eSRobert Foss hysteresis = <1000>; 288820f9d94eSRobert Foss type = "critical"; 288920f9d94eSRobert Foss }; 289020f9d94eSRobert Foss }; 289120f9d94eSRobert Foss 289220f9d94eSRobert Foss cooling-maps { 289320f9d94eSRobert Foss map0 { 289420f9d94eSRobert Foss trip = <&cpu6_bottom_alert0>; 289520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 289620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 289720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 289820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 289920f9d94eSRobert Foss }; 290020f9d94eSRobert Foss map1 { 290120f9d94eSRobert Foss trip = <&cpu6_bottom_alert1>; 290220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 290320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 290420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 290520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 290620f9d94eSRobert Foss }; 290720f9d94eSRobert Foss }; 290820f9d94eSRobert Foss }; 290920f9d94eSRobert Foss 291020f9d94eSRobert Foss cpu7-bottom-thermal { 291120f9d94eSRobert Foss polling-delay-passive = <250>; 291220f9d94eSRobert Foss polling-delay = <1000>; 291320f9d94eSRobert Foss 291420f9d94eSRobert Foss thermal-sensors = <&tsens0 14>; 291520f9d94eSRobert Foss 291620f9d94eSRobert Foss trips { 291720f9d94eSRobert Foss cpu7_bottom_alert0: trip-point0 { 291820f9d94eSRobert Foss temperature = <90000>; 291920f9d94eSRobert Foss hysteresis = <2000>; 292020f9d94eSRobert Foss type = "passive"; 292120f9d94eSRobert Foss }; 292220f9d94eSRobert Foss 292320f9d94eSRobert Foss cpu7_bottom_alert1: trip-point1 { 292420f9d94eSRobert Foss temperature = <95000>; 292520f9d94eSRobert Foss hysteresis = <2000>; 292620f9d94eSRobert Foss type = "passive"; 292720f9d94eSRobert Foss }; 292820f9d94eSRobert Foss 292920f9d94eSRobert Foss cpu7_bottom_crit: cpu_crit { 293020f9d94eSRobert Foss temperature = <110000>; 293120f9d94eSRobert Foss hysteresis = <1000>; 293220f9d94eSRobert Foss type = "critical"; 293320f9d94eSRobert Foss }; 293420f9d94eSRobert Foss }; 293520f9d94eSRobert Foss 293620f9d94eSRobert Foss cooling-maps { 293720f9d94eSRobert Foss map0 { 293820f9d94eSRobert Foss trip = <&cpu7_bottom_alert0>; 293920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 294020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 294120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 294220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 294320f9d94eSRobert Foss }; 294420f9d94eSRobert Foss map1 { 294520f9d94eSRobert Foss trip = <&cpu7_bottom_alert1>; 294620f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 294720f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 294820f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 294920f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 295020f9d94eSRobert Foss }; 295120f9d94eSRobert Foss }; 295220f9d94eSRobert Foss }; 295320f9d94eSRobert Foss 295420f9d94eSRobert Foss aoss0-thermal { 295520f9d94eSRobert Foss polling-delay-passive = <250>; 295620f9d94eSRobert Foss polling-delay = <1000>; 295720f9d94eSRobert Foss 295820f9d94eSRobert Foss thermal-sensors = <&tsens0 0>; 295920f9d94eSRobert Foss 296020f9d94eSRobert Foss trips { 296120f9d94eSRobert Foss aoss0_alert0: trip-point0 { 296220f9d94eSRobert Foss temperature = <90000>; 296320f9d94eSRobert Foss hysteresis = <2000>; 296420f9d94eSRobert Foss type = "hot"; 296520f9d94eSRobert Foss }; 296620f9d94eSRobert Foss }; 296720f9d94eSRobert Foss }; 296820f9d94eSRobert Foss 296920f9d94eSRobert Foss cluster0-thermal { 297020f9d94eSRobert Foss polling-delay-passive = <250>; 297120f9d94eSRobert Foss polling-delay = <1000>; 297220f9d94eSRobert Foss 297320f9d94eSRobert Foss thermal-sensors = <&tsens0 5>; 297420f9d94eSRobert Foss 297520f9d94eSRobert Foss trips { 297620f9d94eSRobert Foss cluster0_alert0: trip-point0 { 297720f9d94eSRobert Foss temperature = <90000>; 297820f9d94eSRobert Foss hysteresis = <2000>; 297920f9d94eSRobert Foss type = "hot"; 298020f9d94eSRobert Foss }; 298120f9d94eSRobert Foss cluster0_crit: cluster0_crit { 298220f9d94eSRobert Foss temperature = <110000>; 298320f9d94eSRobert Foss hysteresis = <2000>; 298420f9d94eSRobert Foss type = "critical"; 298520f9d94eSRobert Foss }; 298620f9d94eSRobert Foss }; 298720f9d94eSRobert Foss }; 298820f9d94eSRobert Foss 298920f9d94eSRobert Foss cluster1-thermal { 299020f9d94eSRobert Foss polling-delay-passive = <250>; 299120f9d94eSRobert Foss polling-delay = <1000>; 299220f9d94eSRobert Foss 299320f9d94eSRobert Foss thermal-sensors = <&tsens0 6>; 299420f9d94eSRobert Foss 299520f9d94eSRobert Foss trips { 299620f9d94eSRobert Foss cluster1_alert0: trip-point0 { 299720f9d94eSRobert Foss temperature = <90000>; 299820f9d94eSRobert Foss hysteresis = <2000>; 299920f9d94eSRobert Foss type = "hot"; 300020f9d94eSRobert Foss }; 300120f9d94eSRobert Foss cluster1_crit: cluster1_crit { 300220f9d94eSRobert Foss temperature = <110000>; 300320f9d94eSRobert Foss hysteresis = <2000>; 300420f9d94eSRobert Foss type = "critical"; 300520f9d94eSRobert Foss }; 300620f9d94eSRobert Foss }; 300720f9d94eSRobert Foss }; 300820f9d94eSRobert Foss 300920f9d94eSRobert Foss aoss1-thermal { 301020f9d94eSRobert Foss polling-delay-passive = <250>; 301120f9d94eSRobert Foss polling-delay = <1000>; 301220f9d94eSRobert Foss 301320f9d94eSRobert Foss thermal-sensors = <&tsens1 0>; 301420f9d94eSRobert Foss 301520f9d94eSRobert Foss trips { 301620f9d94eSRobert Foss aoss1_alert0: trip-point0 { 301720f9d94eSRobert Foss temperature = <90000>; 301820f9d94eSRobert Foss hysteresis = <2000>; 301920f9d94eSRobert Foss type = "hot"; 302020f9d94eSRobert Foss }; 302120f9d94eSRobert Foss }; 302220f9d94eSRobert Foss }; 302320f9d94eSRobert Foss 30247be1c395SDavid Heidelberg gpu-top-thermal { 302520f9d94eSRobert Foss polling-delay-passive = <250>; 302620f9d94eSRobert Foss polling-delay = <1000>; 302720f9d94eSRobert Foss 302820f9d94eSRobert Foss thermal-sensors = <&tsens1 1>; 302920f9d94eSRobert Foss 303020f9d94eSRobert Foss trips { 303120f9d94eSRobert Foss gpu1_alert0: trip-point0 { 303220f9d94eSRobert Foss temperature = <90000>; 303320f9d94eSRobert Foss hysteresis = <1000>; 303420f9d94eSRobert Foss type = "hot"; 303520f9d94eSRobert Foss }; 303620f9d94eSRobert Foss }; 303720f9d94eSRobert Foss }; 303820f9d94eSRobert Foss 30397be1c395SDavid Heidelberg gpu-bottom-thermal { 304020f9d94eSRobert Foss polling-delay-passive = <250>; 304120f9d94eSRobert Foss polling-delay = <1000>; 304220f9d94eSRobert Foss 304320f9d94eSRobert Foss thermal-sensors = <&tsens1 2>; 304420f9d94eSRobert Foss 304520f9d94eSRobert Foss trips { 304620f9d94eSRobert Foss gpu2_alert0: trip-point0 { 304720f9d94eSRobert Foss temperature = <90000>; 304820f9d94eSRobert Foss hysteresis = <1000>; 304920f9d94eSRobert Foss type = "hot"; 305020f9d94eSRobert Foss }; 305120f9d94eSRobert Foss }; 305220f9d94eSRobert Foss }; 305320f9d94eSRobert Foss 305420f9d94eSRobert Foss nspss1-thermal { 305520f9d94eSRobert Foss polling-delay-passive = <250>; 305620f9d94eSRobert Foss polling-delay = <1000>; 305720f9d94eSRobert Foss 305820f9d94eSRobert Foss thermal-sensors = <&tsens1 3>; 305920f9d94eSRobert Foss 306020f9d94eSRobert Foss trips { 306120f9d94eSRobert Foss nspss1_alert0: trip-point0 { 306220f9d94eSRobert Foss temperature = <90000>; 306320f9d94eSRobert Foss hysteresis = <1000>; 306420f9d94eSRobert Foss type = "hot"; 306520f9d94eSRobert Foss }; 306620f9d94eSRobert Foss }; 306720f9d94eSRobert Foss }; 306820f9d94eSRobert Foss 306920f9d94eSRobert Foss nspss2-thermal { 307020f9d94eSRobert Foss polling-delay-passive = <250>; 307120f9d94eSRobert Foss polling-delay = <1000>; 307220f9d94eSRobert Foss 307320f9d94eSRobert Foss thermal-sensors = <&tsens1 4>; 307420f9d94eSRobert Foss 307520f9d94eSRobert Foss trips { 307620f9d94eSRobert Foss nspss2_alert0: trip-point0 { 307720f9d94eSRobert Foss temperature = <90000>; 307820f9d94eSRobert Foss hysteresis = <1000>; 307920f9d94eSRobert Foss type = "hot"; 308020f9d94eSRobert Foss }; 308120f9d94eSRobert Foss }; 308220f9d94eSRobert Foss }; 308320f9d94eSRobert Foss 308420f9d94eSRobert Foss nspss3-thermal { 308520f9d94eSRobert Foss polling-delay-passive = <250>; 308620f9d94eSRobert Foss polling-delay = <1000>; 308720f9d94eSRobert Foss 308820f9d94eSRobert Foss thermal-sensors = <&tsens1 5>; 308920f9d94eSRobert Foss 309020f9d94eSRobert Foss trips { 309120f9d94eSRobert Foss nspss3_alert0: trip-point0 { 309220f9d94eSRobert Foss temperature = <90000>; 309320f9d94eSRobert Foss hysteresis = <1000>; 309420f9d94eSRobert Foss type = "hot"; 309520f9d94eSRobert Foss }; 309620f9d94eSRobert Foss }; 309720f9d94eSRobert Foss }; 309820f9d94eSRobert Foss 309920f9d94eSRobert Foss video-thermal { 310020f9d94eSRobert Foss polling-delay-passive = <250>; 310120f9d94eSRobert Foss polling-delay = <1000>; 310220f9d94eSRobert Foss 310320f9d94eSRobert Foss thermal-sensors = <&tsens1 6>; 310420f9d94eSRobert Foss 310520f9d94eSRobert Foss trips { 310620f9d94eSRobert Foss video_alert0: trip-point0 { 310720f9d94eSRobert Foss temperature = <90000>; 310820f9d94eSRobert Foss hysteresis = <2000>; 310920f9d94eSRobert Foss type = "hot"; 311020f9d94eSRobert Foss }; 311120f9d94eSRobert Foss }; 311220f9d94eSRobert Foss }; 311320f9d94eSRobert Foss 311420f9d94eSRobert Foss mem-thermal { 311520f9d94eSRobert Foss polling-delay-passive = <250>; 311620f9d94eSRobert Foss polling-delay = <1000>; 311720f9d94eSRobert Foss 311820f9d94eSRobert Foss thermal-sensors = <&tsens1 7>; 311920f9d94eSRobert Foss 312020f9d94eSRobert Foss trips { 312120f9d94eSRobert Foss mem_alert0: trip-point0 { 312220f9d94eSRobert Foss temperature = <90000>; 312320f9d94eSRobert Foss hysteresis = <2000>; 312420f9d94eSRobert Foss type = "hot"; 312520f9d94eSRobert Foss }; 312620f9d94eSRobert Foss }; 312720f9d94eSRobert Foss }; 312820f9d94eSRobert Foss 31297be1c395SDavid Heidelberg modem1-top-thermal { 313020f9d94eSRobert Foss polling-delay-passive = <250>; 313120f9d94eSRobert Foss polling-delay = <1000>; 313220f9d94eSRobert Foss 313320f9d94eSRobert Foss thermal-sensors = <&tsens1 8>; 313420f9d94eSRobert Foss 313520f9d94eSRobert Foss trips { 313620f9d94eSRobert Foss modem1_alert0: trip-point0 { 313720f9d94eSRobert Foss temperature = <90000>; 313820f9d94eSRobert Foss hysteresis = <2000>; 313920f9d94eSRobert Foss type = "hot"; 314020f9d94eSRobert Foss }; 314120f9d94eSRobert Foss }; 314220f9d94eSRobert Foss }; 314320f9d94eSRobert Foss 31447be1c395SDavid Heidelberg modem2-top-thermal { 314520f9d94eSRobert Foss polling-delay-passive = <250>; 314620f9d94eSRobert Foss polling-delay = <1000>; 314720f9d94eSRobert Foss 314820f9d94eSRobert Foss thermal-sensors = <&tsens1 9>; 314920f9d94eSRobert Foss 315020f9d94eSRobert Foss trips { 315120f9d94eSRobert Foss modem2_alert0: trip-point0 { 315220f9d94eSRobert Foss temperature = <90000>; 315320f9d94eSRobert Foss hysteresis = <2000>; 315420f9d94eSRobert Foss type = "hot"; 315520f9d94eSRobert Foss }; 315620f9d94eSRobert Foss }; 315720f9d94eSRobert Foss }; 315820f9d94eSRobert Foss 31597be1c395SDavid Heidelberg modem3-top-thermal { 316020f9d94eSRobert Foss polling-delay-passive = <250>; 316120f9d94eSRobert Foss polling-delay = <1000>; 316220f9d94eSRobert Foss 316320f9d94eSRobert Foss thermal-sensors = <&tsens1 10>; 316420f9d94eSRobert Foss 316520f9d94eSRobert Foss trips { 316620f9d94eSRobert Foss modem3_alert0: trip-point0 { 316720f9d94eSRobert Foss temperature = <90000>; 316820f9d94eSRobert Foss hysteresis = <2000>; 316920f9d94eSRobert Foss type = "hot"; 317020f9d94eSRobert Foss }; 317120f9d94eSRobert Foss }; 317220f9d94eSRobert Foss }; 317320f9d94eSRobert Foss 31747be1c395SDavid Heidelberg modem4-top-thermal { 317520f9d94eSRobert Foss polling-delay-passive = <250>; 317620f9d94eSRobert Foss polling-delay = <1000>; 317720f9d94eSRobert Foss 317820f9d94eSRobert Foss thermal-sensors = <&tsens1 11>; 317920f9d94eSRobert Foss 318020f9d94eSRobert Foss trips { 318120f9d94eSRobert Foss modem4_alert0: trip-point0 { 318220f9d94eSRobert Foss temperature = <90000>; 318320f9d94eSRobert Foss hysteresis = <2000>; 318420f9d94eSRobert Foss type = "hot"; 318520f9d94eSRobert Foss }; 318620f9d94eSRobert Foss }; 318720f9d94eSRobert Foss }; 318820f9d94eSRobert Foss 31897be1c395SDavid Heidelberg camera-top-thermal { 319020f9d94eSRobert Foss polling-delay-passive = <250>; 319120f9d94eSRobert Foss polling-delay = <1000>; 319220f9d94eSRobert Foss 319320f9d94eSRobert Foss thermal-sensors = <&tsens1 12>; 319420f9d94eSRobert Foss 319520f9d94eSRobert Foss trips { 319620f9d94eSRobert Foss camera1_alert0: trip-point0 { 319720f9d94eSRobert Foss temperature = <90000>; 319820f9d94eSRobert Foss hysteresis = <2000>; 319920f9d94eSRobert Foss type = "hot"; 320020f9d94eSRobert Foss }; 320120f9d94eSRobert Foss }; 320220f9d94eSRobert Foss }; 320320f9d94eSRobert Foss 32047be1c395SDavid Heidelberg cam-bottom-thermal { 320520f9d94eSRobert Foss polling-delay-passive = <250>; 320620f9d94eSRobert Foss polling-delay = <1000>; 320720f9d94eSRobert Foss 320820f9d94eSRobert Foss thermal-sensors = <&tsens1 13>; 320920f9d94eSRobert Foss 321020f9d94eSRobert Foss trips { 321120f9d94eSRobert Foss camera2_alert0: trip-point0 { 321220f9d94eSRobert Foss temperature = <90000>; 321320f9d94eSRobert Foss hysteresis = <2000>; 321420f9d94eSRobert Foss type = "hot"; 321520f9d94eSRobert Foss }; 321620f9d94eSRobert Foss }; 321720f9d94eSRobert Foss }; 321820f9d94eSRobert Foss }; 321920f9d94eSRobert Foss 3220b7e8f433SVinod Koul timer { 3221b7e8f433SVinod Koul compatible = "arm,armv8-timer"; 3222b7e8f433SVinod Koul interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3223b7e8f433SVinod Koul <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3224b7e8f433SVinod Koul <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3225b7e8f433SVinod Koul <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3226b7e8f433SVinod Koul }; 3227b7e8f433SVinod Koul}; 3228