1b7e8f433SVinod Koul// SPDX-License-Identifier: BSD-3-Clause 2b7e8f433SVinod Koul/* 34f23d2a5SVinod Koul * Copyright (c) 2020, Linaro Limited 4b7e8f433SVinod Koul */ 5b7e8f433SVinod Koul 6b7e8f433SVinod Koul#include <dt-bindings/interrupt-controller/arm-gic.h> 76d91e201SVinod Koul#include <dt-bindings/clock/qcom,gcc-sm8350.h> 8b7e8f433SVinod Koul#include <dt-bindings/clock/qcom,rpmh.h> 9b7e8f433SVinod Koul#include <dt-bindings/mailbox/qcom-ipcc.h> 10b7e8f433SVinod Koul#include <dt-bindings/power/qcom-aoss-qmp.h> 11b7e8f433SVinod Koul#include <dt-bindings/power/qcom-rpmpd.h> 12b7e8f433SVinod Koul#include <dt-bindings/soc/qcom,rpmh-rsc.h> 13b7e8f433SVinod Koul 14b7e8f433SVinod Koul/ { 15b7e8f433SVinod Koul interrupt-parent = <&intc>; 16b7e8f433SVinod Koul 17b7e8f433SVinod Koul #address-cells = <2>; 18b7e8f433SVinod Koul #size-cells = <2>; 19b7e8f433SVinod Koul 20b7e8f433SVinod Koul chosen { }; 21b7e8f433SVinod Koul 22b7e8f433SVinod Koul clocks { 23b7e8f433SVinod Koul xo_board: xo-board { 24b7e8f433SVinod Koul compatible = "fixed-clock"; 25b7e8f433SVinod Koul #clock-cells = <0>; 26b7e8f433SVinod Koul clock-frequency = <38400000>; 27b7e8f433SVinod Koul clock-output-names = "xo_board"; 28b7e8f433SVinod Koul }; 29b7e8f433SVinod Koul 30b7e8f433SVinod Koul sleep_clk: sleep-clk { 31b7e8f433SVinod Koul compatible = "fixed-clock"; 32b7e8f433SVinod Koul clock-frequency = <32000>; 33b7e8f433SVinod Koul #clock-cells = <0>; 34b7e8f433SVinod Koul }; 35b7e8f433SVinod Koul }; 36b7e8f433SVinod Koul 37b7e8f433SVinod Koul cpus { 38b7e8f433SVinod Koul #address-cells = <2>; 39b7e8f433SVinod Koul #size-cells = <0>; 40b7e8f433SVinod Koul 41b7e8f433SVinod Koul CPU0: cpu@0 { 42b7e8f433SVinod Koul device_type = "cpu"; 43b7e8f433SVinod Koul compatible = "qcom,kryo685"; 44b7e8f433SVinod Koul reg = <0x0 0x0>; 45b7e8f433SVinod Koul enable-method = "psci"; 46b7e8f433SVinod Koul next-level-cache = <&L2_0>; 47ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 48b7e8f433SVinod Koul L2_0: l2-cache { 49b7e8f433SVinod Koul compatible = "cache"; 50b7e8f433SVinod Koul next-level-cache = <&L3_0>; 51b7e8f433SVinod Koul L3_0: l3-cache { 52b7e8f433SVinod Koul compatible = "cache"; 53b7e8f433SVinod Koul }; 54b7e8f433SVinod Koul }; 55b7e8f433SVinod Koul }; 56b7e8f433SVinod Koul 57b7e8f433SVinod Koul CPU1: cpu@100 { 58b7e8f433SVinod Koul device_type = "cpu"; 59b7e8f433SVinod Koul compatible = "qcom,kryo685"; 60b7e8f433SVinod Koul reg = <0x0 0x100>; 61b7e8f433SVinod Koul enable-method = "psci"; 62b7e8f433SVinod Koul next-level-cache = <&L2_100>; 63ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 64b7e8f433SVinod Koul L2_100: l2-cache { 65b7e8f433SVinod Koul compatible = "cache"; 66b7e8f433SVinod Koul next-level-cache = <&L3_0>; 67b7e8f433SVinod Koul }; 68b7e8f433SVinod Koul }; 69b7e8f433SVinod Koul 70b7e8f433SVinod Koul CPU2: cpu@200 { 71b7e8f433SVinod Koul device_type = "cpu"; 72b7e8f433SVinod Koul compatible = "qcom,kryo685"; 73b7e8f433SVinod Koul reg = <0x0 0x200>; 74b7e8f433SVinod Koul enable-method = "psci"; 75b7e8f433SVinod Koul next-level-cache = <&L2_200>; 76ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 77b7e8f433SVinod Koul L2_200: l2-cache { 78b7e8f433SVinod Koul compatible = "cache"; 79b7e8f433SVinod Koul next-level-cache = <&L3_0>; 80b7e8f433SVinod Koul }; 81b7e8f433SVinod Koul }; 82b7e8f433SVinod Koul 83b7e8f433SVinod Koul CPU3: cpu@300 { 84b7e8f433SVinod Koul device_type = "cpu"; 85b7e8f433SVinod Koul compatible = "qcom,kryo685"; 86b7e8f433SVinod Koul reg = <0x0 0x300>; 87b7e8f433SVinod Koul enable-method = "psci"; 88b7e8f433SVinod Koul next-level-cache = <&L2_300>; 89ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 90b7e8f433SVinod Koul L2_300: l2-cache { 91b7e8f433SVinod Koul compatible = "cache"; 92b7e8f433SVinod Koul next-level-cache = <&L3_0>; 93b7e8f433SVinod Koul }; 94b7e8f433SVinod Koul }; 95b7e8f433SVinod Koul 96b7e8f433SVinod Koul CPU4: cpu@400 { 97b7e8f433SVinod Koul device_type = "cpu"; 98b7e8f433SVinod Koul compatible = "qcom,kryo685"; 99b7e8f433SVinod Koul reg = <0x0 0x400>; 100b7e8f433SVinod Koul enable-method = "psci"; 101b7e8f433SVinod Koul next-level-cache = <&L2_400>; 102ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 103b7e8f433SVinod Koul L2_400: l2-cache { 104b7e8f433SVinod Koul compatible = "cache"; 105b7e8f433SVinod Koul next-level-cache = <&L3_0>; 106b7e8f433SVinod Koul }; 107b7e8f433SVinod Koul }; 108b7e8f433SVinod Koul 109b7e8f433SVinod Koul CPU5: cpu@500 { 110b7e8f433SVinod Koul device_type = "cpu"; 111b7e8f433SVinod Koul compatible = "qcom,kryo685"; 112b7e8f433SVinod Koul reg = <0x0 0x500>; 113b7e8f433SVinod Koul enable-method = "psci"; 114b7e8f433SVinod Koul next-level-cache = <&L2_500>; 115ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 116b7e8f433SVinod Koul L2_500: l2-cache { 117b7e8f433SVinod Koul compatible = "cache"; 118b7e8f433SVinod Koul next-level-cache = <&L3_0>; 119b7e8f433SVinod Koul }; 120b7e8f433SVinod Koul 121b7e8f433SVinod Koul }; 122b7e8f433SVinod Koul 123b7e8f433SVinod Koul CPU6: cpu@600 { 124b7e8f433SVinod Koul device_type = "cpu"; 125b7e8f433SVinod Koul compatible = "qcom,kryo685"; 126b7e8f433SVinod Koul reg = <0x0 0x600>; 127b7e8f433SVinod Koul enable-method = "psci"; 128b7e8f433SVinod Koul next-level-cache = <&L2_600>; 129ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 130b7e8f433SVinod Koul L2_600: l2-cache { 131b7e8f433SVinod Koul compatible = "cache"; 132b7e8f433SVinod Koul next-level-cache = <&L3_0>; 133b7e8f433SVinod Koul }; 134b7e8f433SVinod Koul }; 135b7e8f433SVinod Koul 136b7e8f433SVinod Koul CPU7: cpu@700 { 137b7e8f433SVinod Koul device_type = "cpu"; 138b7e8f433SVinod Koul compatible = "qcom,kryo685"; 139b7e8f433SVinod Koul reg = <0x0 0x700>; 140b7e8f433SVinod Koul enable-method = "psci"; 141b7e8f433SVinod Koul next-level-cache = <&L2_700>; 142ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 2>; 143b7e8f433SVinod Koul L2_700: l2-cache { 144b7e8f433SVinod Koul compatible = "cache"; 145b7e8f433SVinod Koul next-level-cache = <&L3_0>; 146b7e8f433SVinod Koul }; 147b7e8f433SVinod Koul }; 148b7e8f433SVinod Koul }; 149b7e8f433SVinod Koul 150b7e8f433SVinod Koul firmware { 151b7e8f433SVinod Koul scm: scm { 152b7e8f433SVinod Koul compatible = "qcom,scm-sm8350", "qcom,scm"; 153b7e8f433SVinod Koul #reset-cells = <1>; 154b7e8f433SVinod Koul }; 155b7e8f433SVinod Koul }; 156b7e8f433SVinod Koul 157b7e8f433SVinod Koul memory@80000000 { 158b7e8f433SVinod Koul device_type = "memory"; 159b7e8f433SVinod Koul /* We expect the bootloader to fill in the size */ 160b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x0>; 161b7e8f433SVinod Koul }; 162b7e8f433SVinod Koul 163b7e8f433SVinod Koul pmu { 164b7e8f433SVinod Koul compatible = "arm,armv8-pmuv3"; 165794d3e30SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 166b7e8f433SVinod Koul }; 167b7e8f433SVinod Koul 168b7e8f433SVinod Koul psci { 169b7e8f433SVinod Koul compatible = "arm,psci-1.0"; 170b7e8f433SVinod Koul method = "smc"; 171b7e8f433SVinod Koul }; 172b7e8f433SVinod Koul 173b7e8f433SVinod Koul reserved_memory: reserved-memory { 174b7e8f433SVinod Koul #address-cells = <2>; 175b7e8f433SVinod Koul #size-cells = <2>; 176b7e8f433SVinod Koul ranges; 177b7e8f433SVinod Koul 178b7e8f433SVinod Koul hyp_mem: memory@80000000 { 179b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x600000>; 180b7e8f433SVinod Koul no-map; 181b7e8f433SVinod Koul }; 182b7e8f433SVinod Koul 183b7e8f433SVinod Koul xbl_aop_mem: memory@80700000 { 184b7e8f433SVinod Koul no-map; 185b7e8f433SVinod Koul reg = <0x0 0x80700000 0x0 0x160000>; 186b7e8f433SVinod Koul }; 187b7e8f433SVinod Koul 188b7e8f433SVinod Koul cmd_db: memory@80860000 { 189b7e8f433SVinod Koul compatible = "qcom,cmd-db"; 190b7e8f433SVinod Koul reg = <0x0 0x80860000 0x0 0x20000>; 191b7e8f433SVinod Koul no-map; 192b7e8f433SVinod Koul }; 193b7e8f433SVinod Koul 194b7e8f433SVinod Koul reserved_xbl_uefi_log: memory@80880000 { 195b7e8f433SVinod Koul reg = <0x0 0x80880000 0x0 0x14000>; 196b7e8f433SVinod Koul no-map; 197b7e8f433SVinod Koul }; 198b7e8f433SVinod Koul 199b7e8f433SVinod Koul smem_mem: memory@80900000 { 200b7e8f433SVinod Koul reg = <0x0 0x80900000 0x0 0x200000>; 201b7e8f433SVinod Koul no-map; 202b7e8f433SVinod Koul }; 203b7e8f433SVinod Koul 204b7e8f433SVinod Koul cpucp_fw_mem: memory@80b00000 { 205b7e8f433SVinod Koul reg = <0x0 0x80b00000 0x0 0x100000>; 206b7e8f433SVinod Koul no-map; 207b7e8f433SVinod Koul }; 208b7e8f433SVinod Koul 209b7e8f433SVinod Koul cdsp_secure_heap: memory@80c00000 { 210b7e8f433SVinod Koul reg = <0x0 0x80c00000 0x0 0x4600000>; 211b7e8f433SVinod Koul no-map; 212b7e8f433SVinod Koul }; 213b7e8f433SVinod Koul 214b7e8f433SVinod Koul pil_camera_mem: mmeory@85200000 { 215b7e8f433SVinod Koul reg = <0x0 0x85200000 0x0 0x500000>; 216b7e8f433SVinod Koul no-map; 217b7e8f433SVinod Koul }; 218b7e8f433SVinod Koul 219b7e8f433SVinod Koul pil_video_mem: memory@85700000 { 220b7e8f433SVinod Koul reg = <0x0 0x85700000 0x0 0x500000>; 221b7e8f433SVinod Koul no-map; 222b7e8f433SVinod Koul }; 223b7e8f433SVinod Koul 224b7e8f433SVinod Koul pil_cvp_mem: memory@85c00000 { 225b7e8f433SVinod Koul reg = <0x0 0x85c00000 0x0 0x500000>; 226b7e8f433SVinod Koul no-map; 227b7e8f433SVinod Koul }; 228b7e8f433SVinod Koul 229b7e8f433SVinod Koul pil_adsp_mem: memory@86100000 { 230b7e8f433SVinod Koul reg = <0x0 0x86100000 0x0 0x2100000>; 231b7e8f433SVinod Koul no-map; 232b7e8f433SVinod Koul }; 233b7e8f433SVinod Koul 234b7e8f433SVinod Koul pil_slpi_mem: memory@88200000 { 235b7e8f433SVinod Koul reg = <0x0 0x88200000 0x0 0x1500000>; 236b7e8f433SVinod Koul no-map; 237b7e8f433SVinod Koul }; 238b7e8f433SVinod Koul 239b7e8f433SVinod Koul pil_cdsp_mem: memory@89700000 { 240b7e8f433SVinod Koul reg = <0x0 0x89700000 0x0 0x1e00000>; 241b7e8f433SVinod Koul no-map; 242b7e8f433SVinod Koul }; 243b7e8f433SVinod Koul 244b7e8f433SVinod Koul pil_ipa_fw_mem: memory@8b500000 { 245b7e8f433SVinod Koul reg = <0x0 0x8b500000 0x0 0x10000>; 246b7e8f433SVinod Koul no-map; 247b7e8f433SVinod Koul }; 248b7e8f433SVinod Koul 249b7e8f433SVinod Koul pil_ipa_gsi_mem: memory@8b510000 { 250b7e8f433SVinod Koul reg = <0x0 0x8b510000 0x0 0xa000>; 251b7e8f433SVinod Koul no-map; 252b7e8f433SVinod Koul }; 253b7e8f433SVinod Koul 254b7e8f433SVinod Koul pil_gpu_mem: memory@8b51a000 { 255b7e8f433SVinod Koul reg = <0x0 0x8b51a000 0x0 0x2000>; 256b7e8f433SVinod Koul no-map; 257b7e8f433SVinod Koul }; 258b7e8f433SVinod Koul 259b7e8f433SVinod Koul pil_spss_mem: memory@8b600000 { 260b7e8f433SVinod Koul reg = <0x0 0x8b600000 0x0 0x100000>; 261b7e8f433SVinod Koul no-map; 262b7e8f433SVinod Koul }; 263b7e8f433SVinod Koul 264b7e8f433SVinod Koul pil_modem_mem: memory@8b800000 { 265b7e8f433SVinod Koul reg = <0x0 0x8b800000 0x0 0x10000000>; 266b7e8f433SVinod Koul no-map; 267b7e8f433SVinod Koul }; 268b7e8f433SVinod Koul 269774890c9SVinod Koul rmtfs_mem: memory@9b800000 { 270774890c9SVinod Koul compatible = "qcom,rmtfs-mem"; 271774890c9SVinod Koul reg = <0x0 0x9b800000 0x0 0x280000>; 272774890c9SVinod Koul no-map; 273774890c9SVinod Koul 274774890c9SVinod Koul qcom,client-id = <1>; 275774890c9SVinod Koul qcom,vmid = <15>; 276774890c9SVinod Koul }; 277774890c9SVinod Koul 278b7e8f433SVinod Koul hyp_reserved_mem: memory@d0000000 { 279b7e8f433SVinod Koul reg = <0x0 0xd0000000 0x0 0x800000>; 280b7e8f433SVinod Koul no-map; 281b7e8f433SVinod Koul }; 282b7e8f433SVinod Koul 283b7e8f433SVinod Koul pil_trustedvm_mem: memory@d0800000 { 284b7e8f433SVinod Koul reg = <0x0 0xd0800000 0x0 0x76f7000>; 285b7e8f433SVinod Koul no-map; 286b7e8f433SVinod Koul }; 287b7e8f433SVinod Koul 288b7e8f433SVinod Koul qrtr_shbuf: memory@d7ef7000 { 289b7e8f433SVinod Koul reg = <0x0 0xd7ef7000 0x0 0x9000>; 290b7e8f433SVinod Koul no-map; 291b7e8f433SVinod Koul }; 292b7e8f433SVinod Koul 293b7e8f433SVinod Koul chan0_shbuf: memory@d7f00000 { 294b7e8f433SVinod Koul reg = <0x0 0xd7f00000 0x0 0x80000>; 295b7e8f433SVinod Koul no-map; 296b7e8f433SVinod Koul }; 297b7e8f433SVinod Koul 298b7e8f433SVinod Koul chan1_shbuf: memory@d7f80000 { 299b7e8f433SVinod Koul reg = <0x0 0xd7f80000 0x0 0x80000>; 300b7e8f433SVinod Koul no-map; 301b7e8f433SVinod Koul }; 302b7e8f433SVinod Koul 303b7e8f433SVinod Koul removed_mem: memory@d8800000 { 304b7e8f433SVinod Koul reg = <0x0 0xd8800000 0x0 0x6800000>; 305b7e8f433SVinod Koul no-map; 306b7e8f433SVinod Koul }; 307b7e8f433SVinod Koul }; 308b7e8f433SVinod Koul 309b7e8f433SVinod Koul smem: qcom,smem { 310b7e8f433SVinod Koul compatible = "qcom,smem"; 311b7e8f433SVinod Koul memory-region = <&smem_mem>; 312b7e8f433SVinod Koul hwlocks = <&tcsr_mutex 3>; 313b7e8f433SVinod Koul }; 314b7e8f433SVinod Koul 31503a41991SVinod Koul smp2p-adsp { 31603a41991SVinod Koul compatible = "qcom,smp2p"; 31703a41991SVinod Koul qcom,smem = <443>, <429>; 31803a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 31903a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 32003a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 32103a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 32203a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 32303a41991SVinod Koul 32403a41991SVinod Koul qcom,local-pid = <0>; 32503a41991SVinod Koul qcom,remote-pid = <2>; 32603a41991SVinod Koul 32703a41991SVinod Koul smp2p_adsp_out: master-kernel { 32803a41991SVinod Koul qcom,entry-name = "master-kernel"; 32903a41991SVinod Koul #qcom,smem-state-cells = <1>; 33003a41991SVinod Koul }; 33103a41991SVinod Koul 33203a41991SVinod Koul smp2p_adsp_in: slave-kernel { 33303a41991SVinod Koul qcom,entry-name = "slave-kernel"; 33403a41991SVinod Koul interrupt-controller; 33503a41991SVinod Koul #interrupt-cells = <2>; 33603a41991SVinod Koul }; 33703a41991SVinod Koul }; 33803a41991SVinod Koul 33903a41991SVinod Koul smp2p-cdsp { 34003a41991SVinod Koul compatible = "qcom,smp2p"; 34103a41991SVinod Koul qcom,smem = <94>, <432>; 34203a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 34303a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 34403a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 34503a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 34603a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 34703a41991SVinod Koul 34803a41991SVinod Koul qcom,local-pid = <0>; 34903a41991SVinod Koul qcom,remote-pid = <5>; 35003a41991SVinod Koul 35103a41991SVinod Koul smp2p_cdsp_out: master-kernel { 35203a41991SVinod Koul qcom,entry-name = "master-kernel"; 35303a41991SVinod Koul #qcom,smem-state-cells = <1>; 35403a41991SVinod Koul }; 35503a41991SVinod Koul 35603a41991SVinod Koul smp2p_cdsp_in: slave-kernel { 35703a41991SVinod Koul qcom,entry-name = "slave-kernel"; 35803a41991SVinod Koul interrupt-controller; 35903a41991SVinod Koul #interrupt-cells = <2>; 36003a41991SVinod Koul }; 36103a41991SVinod Koul }; 36203a41991SVinod Koul 36303a41991SVinod Koul smp2p-modem { 36403a41991SVinod Koul compatible = "qcom,smp2p"; 36503a41991SVinod Koul qcom,smem = <435>, <428>; 36603a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 36703a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 36803a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 36903a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 37003a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 37103a41991SVinod Koul 37203a41991SVinod Koul qcom,local-pid = <0>; 37303a41991SVinod Koul qcom,remote-pid = <1>; 37403a41991SVinod Koul 37503a41991SVinod Koul smp2p_modem_out: master-kernel { 37603a41991SVinod Koul qcom,entry-name = "master-kernel"; 37703a41991SVinod Koul #qcom,smem-state-cells = <1>; 37803a41991SVinod Koul }; 37903a41991SVinod Koul 38003a41991SVinod Koul smp2p_modem_in: slave-kernel { 38103a41991SVinod Koul qcom,entry-name = "slave-kernel"; 38203a41991SVinod Koul interrupt-controller; 38303a41991SVinod Koul #interrupt-cells = <2>; 38403a41991SVinod Koul }; 38503a41991SVinod Koul }; 38603a41991SVinod Koul 38703a41991SVinod Koul smp2p-slpi { 38803a41991SVinod Koul compatible = "qcom,smp2p"; 38903a41991SVinod Koul qcom,smem = <481>, <430>; 39003a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 39103a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 39203a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 39303a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 39403a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 39503a41991SVinod Koul 39603a41991SVinod Koul qcom,local-pid = <0>; 39703a41991SVinod Koul qcom,remote-pid = <3>; 39803a41991SVinod Koul 39903a41991SVinod Koul smp2p_slpi_out: master-kernel { 40003a41991SVinod Koul qcom,entry-name = "master-kernel"; 40103a41991SVinod Koul #qcom,smem-state-cells = <1>; 40203a41991SVinod Koul }; 40303a41991SVinod Koul 40403a41991SVinod Koul smp2p_slpi_in: slave-kernel { 40503a41991SVinod Koul qcom,entry-name = "slave-kernel"; 40603a41991SVinod Koul interrupt-controller; 40703a41991SVinod Koul #interrupt-cells = <2>; 40803a41991SVinod Koul }; 40903a41991SVinod Koul }; 41003a41991SVinod Koul 411b7e8f433SVinod Koul soc: soc@0 { 412b7e8f433SVinod Koul #address-cells = <2>; 413b7e8f433SVinod Koul #size-cells = <2>; 414b7e8f433SVinod Koul ranges = <0 0 0 0 0x10 0>; 415b7e8f433SVinod Koul dma-ranges = <0 0 0 0 0x10 0>; 416b7e8f433SVinod Koul compatible = "simple-bus"; 417b7e8f433SVinod Koul 418b7e8f433SVinod Koul gcc: clock-controller@100000 { 419b7e8f433SVinod Koul compatible = "qcom,gcc-sm8350"; 420b7e8f433SVinod Koul reg = <0x0 0x00100000 0x0 0x1f0000>; 421b7e8f433SVinod Koul #clock-cells = <1>; 422b7e8f433SVinod Koul #reset-cells = <1>; 423b7e8f433SVinod Koul #power-domain-cells = <1>; 424b7e8f433SVinod Koul clock-names = "bi_tcxo", "sleep_clk"; 425b7e8f433SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; 426b7e8f433SVinod Koul }; 427b7e8f433SVinod Koul 428b7e8f433SVinod Koul ipcc: mailbox@408000 { 429b7e8f433SVinod Koul compatible = "qcom,sm8350-ipcc", "qcom,ipcc"; 430b7e8f433SVinod Koul reg = <0 0x00408000 0 0x1000>; 431b7e8f433SVinod Koul interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 432b7e8f433SVinod Koul interrupt-controller; 433b7e8f433SVinod Koul #interrupt-cells = <3>; 434b7e8f433SVinod Koul #mbox-cells = <2>; 435b7e8f433SVinod Koul }; 436b7e8f433SVinod Koul 437b7e8f433SVinod Koul qupv3_id_1: geniqup@9c0000 { 438b7e8f433SVinod Koul compatible = "qcom,geni-se-qup"; 439b7e8f433SVinod Koul reg = <0x0 0x009c0000 0x0 0x6000>; 440b7e8f433SVinod Koul clock-names = "m-ahb", "s-ahb"; 4416d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 4426d91e201SVinod Koul <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 443b7e8f433SVinod Koul #address-cells = <2>; 444b7e8f433SVinod Koul #size-cells = <2>; 445b7e8f433SVinod Koul ranges; 446b7e8f433SVinod Koul status = "disabled"; 447b7e8f433SVinod Koul 448b7e8f433SVinod Koul uart2: serial@98c000 { 449b7e8f433SVinod Koul compatible = "qcom,geni-debug-uart"; 450b7e8f433SVinod Koul reg = <0 0x0098c000 0 0x4000>; 451b7e8f433SVinod Koul clock-names = "se"; 4526d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 453b7e8f433SVinod Koul pinctrl-names = "default"; 454b7e8f433SVinod Koul pinctrl-0 = <&qup_uart3_default_state>; 455b7e8f433SVinod Koul interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 456b7e8f433SVinod Koul #address-cells = <1>; 457b7e8f433SVinod Koul #size-cells = <0>; 458b7e8f433SVinod Koul status = "disabled"; 459b7e8f433SVinod Koul }; 460b7e8f433SVinod Koul }; 461b7e8f433SVinod Koul 462187f65b7SVinod Koul apps_smmu: iommu@15000000 { 463187f65b7SVinod Koul compatible = "qcom,sm8350-smmu-500", "arm,mmu-500"; 464187f65b7SVinod Koul reg = <0 0x15000000 0 0x100000>; 465187f65b7SVinod Koul #iommu-cells = <2>; 466187f65b7SVinod Koul #global-interrupts = <2>; 467187f65b7SVinod Koul interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 468187f65b7SVinod Koul <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 469187f65b7SVinod Koul <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 470187f65b7SVinod Koul <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 471187f65b7SVinod Koul <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 472187f65b7SVinod Koul <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 473187f65b7SVinod Koul <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 474187f65b7SVinod Koul <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 475187f65b7SVinod Koul <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 476187f65b7SVinod Koul <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 477187f65b7SVinod Koul <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 478187f65b7SVinod Koul <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 479187f65b7SVinod Koul <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 480187f65b7SVinod Koul <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 481187f65b7SVinod Koul <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 482187f65b7SVinod Koul <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 483187f65b7SVinod Koul <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 484187f65b7SVinod Koul <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 485187f65b7SVinod Koul <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 486187f65b7SVinod Koul <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 487187f65b7SVinod Koul <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 488187f65b7SVinod Koul <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 489187f65b7SVinod Koul <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 490187f65b7SVinod Koul <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 491187f65b7SVinod Koul <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 492187f65b7SVinod Koul <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 493187f65b7SVinod Koul <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 494187f65b7SVinod Koul <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 495187f65b7SVinod Koul <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 496187f65b7SVinod Koul <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 497187f65b7SVinod Koul <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 498187f65b7SVinod Koul <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 499187f65b7SVinod Koul <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 500187f65b7SVinod Koul <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 501187f65b7SVinod Koul <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 502187f65b7SVinod Koul <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 503187f65b7SVinod Koul <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 504187f65b7SVinod Koul <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 505187f65b7SVinod Koul <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 506187f65b7SVinod Koul <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 507187f65b7SVinod Koul <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 508187f65b7SVinod Koul <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 509187f65b7SVinod Koul <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 510187f65b7SVinod Koul <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 511187f65b7SVinod Koul <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 512187f65b7SVinod Koul <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 513187f65b7SVinod Koul <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 514187f65b7SVinod Koul <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 515187f65b7SVinod Koul <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 516187f65b7SVinod Koul <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 517187f65b7SVinod Koul <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 518187f65b7SVinod Koul <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 519187f65b7SVinod Koul <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 520187f65b7SVinod Koul <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 521187f65b7SVinod Koul <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 522187f65b7SVinod Koul <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 523187f65b7SVinod Koul <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 524187f65b7SVinod Koul <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 525187f65b7SVinod Koul <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 526187f65b7SVinod Koul <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 527187f65b7SVinod Koul <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 528187f65b7SVinod Koul <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 529187f65b7SVinod Koul <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 530187f65b7SVinod Koul <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 531187f65b7SVinod Koul <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 532187f65b7SVinod Koul <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 533187f65b7SVinod Koul <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 534187f65b7SVinod Koul <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 535187f65b7SVinod Koul <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 536187f65b7SVinod Koul <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 537187f65b7SVinod Koul <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 538187f65b7SVinod Koul <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 539187f65b7SVinod Koul <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 540187f65b7SVinod Koul <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 541187f65b7SVinod Koul <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 542187f65b7SVinod Koul <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 543187f65b7SVinod Koul <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 544187f65b7SVinod Koul <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 545187f65b7SVinod Koul <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 546187f65b7SVinod Koul <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 547187f65b7SVinod Koul <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 548187f65b7SVinod Koul <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 549187f65b7SVinod Koul <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 550187f65b7SVinod Koul <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 551187f65b7SVinod Koul <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 552187f65b7SVinod Koul <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 553187f65b7SVinod Koul <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 554187f65b7SVinod Koul <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 555187f65b7SVinod Koul <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 556187f65b7SVinod Koul <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 557187f65b7SVinod Koul <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 558187f65b7SVinod Koul <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 559187f65b7SVinod Koul <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 560187f65b7SVinod Koul <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 561187f65b7SVinod Koul <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 562187f65b7SVinod Koul <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 563187f65b7SVinod Koul <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 564187f65b7SVinod Koul <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 565187f65b7SVinod Koul }; 566187f65b7SVinod Koul 567b7e8f433SVinod Koul tcsr_mutex: hwlock@1f40000 { 568b7e8f433SVinod Koul compatible = "qcom,tcsr-mutex"; 569b7e8f433SVinod Koul reg = <0x0 0x01f40000 0x0 0x40000>; 570b7e8f433SVinod Koul #hwlock-cells = <1>; 571b7e8f433SVinod Koul }; 572b7e8f433SVinod Koul 573177fcf0aSVinod Koul mpss: remoteproc@4080000 { 574177fcf0aSVinod Koul compatible = "qcom,sm8350-mpss-pas"; 575177fcf0aSVinod Koul reg = <0x0 0x04080000 0x0 0x4040>; 576177fcf0aSVinod Koul 577177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 578177fcf0aSVinod Koul <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, 579177fcf0aSVinod Koul <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, 580177fcf0aSVinod Koul <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, 581177fcf0aSVinod Koul <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, 582177fcf0aSVinod Koul <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; 583177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", "handover", 584177fcf0aSVinod Koul "stop-ack", "shutdown-ack"; 585177fcf0aSVinod Koul 586177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 587177fcf0aSVinod Koul clock-names = "xo"; 588177fcf0aSVinod Koul 589177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, 590177fcf0aSVinod Koul <&rpmhpd 0>, 591177fcf0aSVinod Koul <&rpmhpd 12>; 592177fcf0aSVinod Koul power-domain-names = "load_state", "cx", "mss"; 593177fcf0aSVinod Koul 594177fcf0aSVinod Koul memory-region = <&pil_modem_mem>; 595177fcf0aSVinod Koul 596177fcf0aSVinod Koul qcom,smem-states = <&smp2p_modem_out 0>; 597177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 598177fcf0aSVinod Koul 599177fcf0aSVinod Koul status = "disabled"; 600177fcf0aSVinod Koul 601177fcf0aSVinod Koul glink-edge { 602177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 603177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 604177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 605177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 606177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 607177fcf0aSVinod Koul interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; 608177fcf0aSVinod Koul label = "modem"; 609177fcf0aSVinod Koul qcom,remote-pid = <1>; 610177fcf0aSVinod Koul }; 611177fcf0aSVinod Koul }; 612177fcf0aSVinod Koul 613b7e8f433SVinod Koul pdc: interrupt-controller@b220000 { 614b7e8f433SVinod Koul compatible = "qcom,sm8350-pdc", "qcom,pdc"; 615b7e8f433SVinod Koul reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 616b7e8f433SVinod Koul qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>, 617b7e8f433SVinod Koul <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>, 618b7e8f433SVinod Koul <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>, 619b7e8f433SVinod Koul <156 716 12>; 620b7e8f433SVinod Koul #interrupt-cells = <2>; 621b7e8f433SVinod Koul interrupt-parent = <&intc>; 622b7e8f433SVinod Koul interrupt-controller; 623b7e8f433SVinod Koul }; 624b7e8f433SVinod Koul 62597832fa8SSai Prakash Ranjan aoss_qmp: power-controller@c300000 { 626b7e8f433SVinod Koul compatible = "qcom,sm8350-aoss-qmp"; 627b7e8f433SVinod Koul reg = <0 0x0c300000 0 0x100000>; 628b7e8f433SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP 629b7e8f433SVinod Koul IRQ_TYPE_EDGE_RISING>; 630b7e8f433SVinod Koul mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; 631b7e8f433SVinod Koul 632b7e8f433SVinod Koul #clock-cells = <0>; 633b7e8f433SVinod Koul #power-domain-cells = <1>; 634b7e8f433SVinod Koul }; 635b7e8f433SVinod Koul 636*389cd7acSVinod Koul spmi_bus: spmi@c440000 { 637*389cd7acSVinod Koul compatible = "qcom,spmi-pmic-arb"; 638*389cd7acSVinod Koul reg = <0x0 0xc440000 0x0 0x1100>, 639*389cd7acSVinod Koul <0x0 0xc600000 0x0 0x2000000>, 640*389cd7acSVinod Koul <0x0 0xe600000 0x0 0x100000>, 641*389cd7acSVinod Koul <0x0 0xe700000 0x0 0xa0000>, 642*389cd7acSVinod Koul <0x0 0xc40a000 0x0 0x26000>; 643*389cd7acSVinod Koul reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 644*389cd7acSVinod Koul interrupt-names = "periph_irq"; 645*389cd7acSVinod Koul interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 646*389cd7acSVinod Koul qcom,ee = <0>; 647*389cd7acSVinod Koul qcom,channel = <0>; 648*389cd7acSVinod Koul #address-cells = <2>; 649*389cd7acSVinod Koul #size-cells = <0>; 650*389cd7acSVinod Koul interrupt-controller; 651*389cd7acSVinod Koul #interrupt-cells = <4>; 652*389cd7acSVinod Koul }; 653*389cd7acSVinod Koul 654b7e8f433SVinod Koul tlmm: pinctrl@f100000 { 655b7e8f433SVinod Koul compatible = "qcom,sm8350-tlmm"; 656b7e8f433SVinod Koul reg = <0 0x0f100000 0 0x300000>; 657b7e8f433SVinod Koul interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 658b7e8f433SVinod Koul gpio-controller; 659b7e8f433SVinod Koul #gpio-cells = <2>; 660b7e8f433SVinod Koul interrupt-controller; 661b7e8f433SVinod Koul #interrupt-cells = <2>; 66279015857SShawn Guo gpio-ranges = <&tlmm 0 0 204>; 663b7e8f433SVinod Koul 664b7e8f433SVinod Koul qup_uart3_default_state: qup-uart3-default-state { 665b7e8f433SVinod Koul rx { 666b7e8f433SVinod Koul pins = "gpio18"; 667b7e8f433SVinod Koul function = "qup3"; 668b7e8f433SVinod Koul }; 669b7e8f433SVinod Koul tx { 670b7e8f433SVinod Koul pins = "gpio19"; 671b7e8f433SVinod Koul function = "qup3"; 672b7e8f433SVinod Koul }; 673b7e8f433SVinod Koul }; 674b7e8f433SVinod Koul }; 675b7e8f433SVinod Koul 676b7e8f433SVinod Koul intc: interrupt-controller@17a00000 { 677b7e8f433SVinod Koul compatible = "arm,gic-v3"; 678b7e8f433SVinod Koul #interrupt-cells = <3>; 679b7e8f433SVinod Koul interrupt-controller; 680b7e8f433SVinod Koul reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 681b7e8f433SVinod Koul <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 682b7e8f433SVinod Koul interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 683b7e8f433SVinod Koul }; 684b7e8f433SVinod Koul 685b7e8f433SVinod Koul timer@17c20000 { 686b7e8f433SVinod Koul compatible = "arm,armv7-timer-mem"; 687b7e8f433SVinod Koul #address-cells = <2>; 688b7e8f433SVinod Koul #size-cells = <2>; 689b7e8f433SVinod Koul ranges; 690b7e8f433SVinod Koul reg = <0x0 0x17c20000 0x0 0x1000>; 691b7e8f433SVinod Koul clock-frequency = <19200000>; 692b7e8f433SVinod Koul 693b7e8f433SVinod Koul frame@17c21000 { 694b7e8f433SVinod Koul frame-number = <0>; 695b7e8f433SVinod Koul interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 696b7e8f433SVinod Koul <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 697b7e8f433SVinod Koul reg = <0x0 0x17c21000 0x0 0x1000>, 698b7e8f433SVinod Koul <0x0 0x17c22000 0x0 0x1000>; 699b7e8f433SVinod Koul }; 700b7e8f433SVinod Koul 701b7e8f433SVinod Koul frame@17c23000 { 702b7e8f433SVinod Koul frame-number = <1>; 703b7e8f433SVinod Koul interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 704b7e8f433SVinod Koul reg = <0x0 0x17c23000 0x0 0x1000>; 705b7e8f433SVinod Koul status = "disabled"; 706b7e8f433SVinod Koul }; 707b7e8f433SVinod Koul 708b7e8f433SVinod Koul frame@17c25000 { 709b7e8f433SVinod Koul frame-number = <2>; 710b7e8f433SVinod Koul interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 711b7e8f433SVinod Koul reg = <0x0 0x17c25000 0x0 0x1000>; 712b7e8f433SVinod Koul status = "disabled"; 713b7e8f433SVinod Koul }; 714b7e8f433SVinod Koul 715b7e8f433SVinod Koul frame@17c27000 { 716b7e8f433SVinod Koul frame-number = <3>; 717b7e8f433SVinod Koul interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 718b7e8f433SVinod Koul reg = <0x0 0x17c27000 0x0 0x1000>; 719b7e8f433SVinod Koul status = "disabled"; 720b7e8f433SVinod Koul }; 721b7e8f433SVinod Koul 722b7e8f433SVinod Koul frame@17c29000 { 723b7e8f433SVinod Koul frame-number = <4>; 724b7e8f433SVinod Koul interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 725b7e8f433SVinod Koul reg = <0x0 0x17c29000 0x0 0x1000>; 726b7e8f433SVinod Koul status = "disabled"; 727b7e8f433SVinod Koul }; 728b7e8f433SVinod Koul 729b7e8f433SVinod Koul frame@17c2b000 { 730b7e8f433SVinod Koul frame-number = <5>; 731b7e8f433SVinod Koul interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 732b7e8f433SVinod Koul reg = <0x0 0x17c2b000 0x0 0x1000>; 733b7e8f433SVinod Koul status = "disabled"; 734b7e8f433SVinod Koul }; 735b7e8f433SVinod Koul 736b7e8f433SVinod Koul frame@17c2d000 { 737b7e8f433SVinod Koul frame-number = <6>; 738b7e8f433SVinod Koul interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 739b7e8f433SVinod Koul reg = <0x0 0x17c2d000 0x0 0x1000>; 740b7e8f433SVinod Koul status = "disabled"; 741b7e8f433SVinod Koul }; 742b7e8f433SVinod Koul }; 743b7e8f433SVinod Koul 744b7e8f433SVinod Koul apps_rsc: rsc@18200000 { 745b7e8f433SVinod Koul label = "apps_rsc"; 746b7e8f433SVinod Koul compatible = "qcom,rpmh-rsc"; 747b7e8f433SVinod Koul reg = <0x0 0x18200000 0x0 0x10000>, 748b7e8f433SVinod Koul <0x0 0x18210000 0x0 0x10000>, 749b7e8f433SVinod Koul <0x0 0x18220000 0x0 0x10000>; 750b7e8f433SVinod Koul reg-names = "drv-0", "drv-1", "drv-2"; 751b7e8f433SVinod Koul interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 752b7e8f433SVinod Koul <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 753b7e8f433SVinod Koul <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 754b7e8f433SVinod Koul qcom,tcs-offset = <0xd00>; 755b7e8f433SVinod Koul qcom,drv-id = <2>; 756b7e8f433SVinod Koul qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 757b7e8f433SVinod Koul <WAKE_TCS 3>, <CONTROL_TCS 1>; 758b7e8f433SVinod Koul 759b7e8f433SVinod Koul rpmhcc: clock-controller { 760b7e8f433SVinod Koul compatible = "qcom,sm8350-rpmh-clk"; 761b7e8f433SVinod Koul #clock-cells = <1>; 762b7e8f433SVinod Koul clock-names = "xo"; 763b7e8f433SVinod Koul clocks = <&xo_board>; 764b7e8f433SVinod Koul }; 765b7e8f433SVinod Koul 76690f57509SVinod Koul rpmhpd: power-controller { 76790f57509SVinod Koul compatible = "qcom,sm8350-rpmhpd"; 76890f57509SVinod Koul #power-domain-cells = <1>; 76990f57509SVinod Koul operating-points-v2 = <&rpmhpd_opp_table>; 77090f57509SVinod Koul 77190f57509SVinod Koul rpmhpd_opp_table: opp-table { 77290f57509SVinod Koul compatible = "operating-points-v2"; 77390f57509SVinod Koul 77490f57509SVinod Koul rpmhpd_opp_ret: opp1 { 77590f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 77690f57509SVinod Koul }; 77790f57509SVinod Koul 77890f57509SVinod Koul rpmhpd_opp_min_svs: opp2 { 77990f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 78090f57509SVinod Koul }; 78190f57509SVinod Koul 78290f57509SVinod Koul rpmhpd_opp_low_svs: opp3 { 78390f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 78490f57509SVinod Koul }; 78590f57509SVinod Koul 78690f57509SVinod Koul rpmhpd_opp_svs: opp4 { 78790f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 78890f57509SVinod Koul }; 78990f57509SVinod Koul 79090f57509SVinod Koul rpmhpd_opp_svs_l1: opp5 { 79190f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 79290f57509SVinod Koul }; 79390f57509SVinod Koul 79490f57509SVinod Koul rpmhpd_opp_nom: opp6 { 79590f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 79690f57509SVinod Koul }; 79790f57509SVinod Koul 79890f57509SVinod Koul rpmhpd_opp_nom_l1: opp7 { 79990f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 80090f57509SVinod Koul }; 80190f57509SVinod Koul 80290f57509SVinod Koul rpmhpd_opp_nom_l2: opp8 { 80390f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 80490f57509SVinod Koul }; 80590f57509SVinod Koul 80690f57509SVinod Koul rpmhpd_opp_turbo: opp9 { 80790f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 80890f57509SVinod Koul }; 80990f57509SVinod Koul 81090f57509SVinod Koul rpmhpd_opp_turbo_l1: opp10 { 81190f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 81290f57509SVinod Koul }; 81390f57509SVinod Koul }; 81490f57509SVinod Koul }; 815b7e8f433SVinod Koul }; 816e780fb31SJack Pham 817ccbb3abbSVinod Koul cpufreq_hw: cpufreq@18591000 { 818ccbb3abbSVinod Koul compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss"; 819ccbb3abbSVinod Koul reg = <0 0x18591000 0 0x1000>, 820ccbb3abbSVinod Koul <0 0x18592000 0 0x1000>, 821ccbb3abbSVinod Koul <0 0x18593000 0 0x1000>; 822ccbb3abbSVinod Koul reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; 823ccbb3abbSVinod Koul 824ccbb3abbSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; 825ccbb3abbSVinod Koul clock-names = "xo", "alternate"; 826ccbb3abbSVinod Koul 827ccbb3abbSVinod Koul #freq-domain-cells = <1>; 828ccbb3abbSVinod Koul }; 829ccbb3abbSVinod Koul 83059c7cf81SVinod Koul ufs_mem_hc: ufshc@1d84000 { 83159c7cf81SVinod Koul compatible = "qcom,sm8350-ufshc", "qcom,ufshc", 83259c7cf81SVinod Koul "jedec,ufs-2.0"; 83359c7cf81SVinod Koul reg = <0 0x01d84000 0 0x3000>; 83459c7cf81SVinod Koul interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 83559c7cf81SVinod Koul phys = <&ufs_mem_phy_lanes>; 83659c7cf81SVinod Koul phy-names = "ufsphy"; 83759c7cf81SVinod Koul lanes-per-direction = <2>; 83859c7cf81SVinod Koul #reset-cells = <1>; 8396d91e201SVinod Koul resets = <&gcc GCC_UFS_PHY_BCR>; 84059c7cf81SVinod Koul reset-names = "rst"; 84159c7cf81SVinod Koul 8426d91e201SVinod Koul power-domains = <&gcc UFS_PHY_GDSC>; 84359c7cf81SVinod Koul 84459c7cf81SVinod Koul iommus = <&apps_smmu 0xe0 0x0>; 84559c7cf81SVinod Koul 84659c7cf81SVinod Koul clock-names = 84759c7cf81SVinod Koul "ref_clk", 84859c7cf81SVinod Koul "core_clk", 84959c7cf81SVinod Koul "bus_aggr_clk", 85059c7cf81SVinod Koul "iface_clk", 85159c7cf81SVinod Koul "core_clk_unipro", 85259c7cf81SVinod Koul "ref_clk", 85359c7cf81SVinod Koul "tx_lane0_sync_clk", 85459c7cf81SVinod Koul "rx_lane0_sync_clk", 85559c7cf81SVinod Koul "rx_lane1_sync_clk"; 85659c7cf81SVinod Koul clocks = 85759c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 8586d91e201SVinod Koul <&gcc GCC_UFS_PHY_AXI_CLK>, 8596d91e201SVinod Koul <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 8606d91e201SVinod Koul <&gcc GCC_UFS_PHY_AHB_CLK>, 8616d91e201SVinod Koul <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 86259c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 8636d91e201SVinod Koul <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 8646d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 8656d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 86659c7cf81SVinod Koul freq-table-hz = 86759c7cf81SVinod Koul <75000000 300000000>, 86859c7cf81SVinod Koul <75000000 300000000>, 86959c7cf81SVinod Koul <0 0>, 87059c7cf81SVinod Koul <0 0>, 87159c7cf81SVinod Koul <75000000 300000000>, 87259c7cf81SVinod Koul <0 0>, 87359c7cf81SVinod Koul <0 0>, 87459c7cf81SVinod Koul <75000000 300000000>, 87559c7cf81SVinod Koul <75000000 300000000>; 87659c7cf81SVinod Koul status = "disabled"; 87759c7cf81SVinod Koul }; 87859c7cf81SVinod Koul 87959c7cf81SVinod Koul ufs_mem_phy: phy@1d87000 { 88059c7cf81SVinod Koul compatible = "qcom,sm8350-qmp-ufs-phy"; 88159c7cf81SVinod Koul reg = <0 0x01d87000 0 0xe10>; 88259c7cf81SVinod Koul #address-cells = <2>; 88359c7cf81SVinod Koul #size-cells = <2>; 88459c7cf81SVinod Koul #clock-cells = <1>; 88559c7cf81SVinod Koul ranges; 88659c7cf81SVinod Koul clock-names = "ref", 88759c7cf81SVinod Koul "ref_aux"; 88859c7cf81SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, 8896d91e201SVinod Koul <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 89059c7cf81SVinod Koul 89159c7cf81SVinod Koul resets = <&ufs_mem_hc 0>; 89259c7cf81SVinod Koul reset-names = "ufsphy"; 89359c7cf81SVinod Koul status = "disabled"; 89459c7cf81SVinod Koul 89559c7cf81SVinod Koul ufs_mem_phy_lanes: lanes@1d87400 { 89659c7cf81SVinod Koul reg = <0 0x01d87400 0 0x108>, 89759c7cf81SVinod Koul <0 0x01d87600 0 0x1e0>, 89859c7cf81SVinod Koul <0 0x01d87c00 0 0x1dc>, 89959c7cf81SVinod Koul <0 0x01d87800 0 0x108>, 90059c7cf81SVinod Koul <0 0x01d87a00 0 0x1e0>; 90159c7cf81SVinod Koul #phy-cells = <0>; 90259c7cf81SVinod Koul #clock-cells = <0>; 90359c7cf81SVinod Koul }; 90459c7cf81SVinod Koul }; 90559c7cf81SVinod Koul 906177fcf0aSVinod Koul slpi: remoteproc@5c00000 { 907177fcf0aSVinod Koul compatible = "qcom,sm8350-slpi-pas"; 908177fcf0aSVinod Koul reg = <0 0x05c00000 0 0x4000>; 909177fcf0aSVinod Koul 910177fcf0aSVinod Koul interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 911177fcf0aSVinod Koul <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 912177fcf0aSVinod Koul <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 913177fcf0aSVinod Koul <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 914177fcf0aSVinod Koul <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 915177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 916177fcf0aSVinod Koul "handover", "stop-ack"; 917177fcf0aSVinod Koul 918177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 919177fcf0aSVinod Koul clock-names = "xo"; 920177fcf0aSVinod Koul 921177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, 922177fcf0aSVinod Koul <&rpmhpd 4>, 923177fcf0aSVinod Koul <&rpmhpd 5>; 924177fcf0aSVinod Koul power-domain-names = "load_state", "lcx", "lmx"; 925177fcf0aSVinod Koul 926177fcf0aSVinod Koul memory-region = <&pil_slpi_mem>; 927177fcf0aSVinod Koul 928177fcf0aSVinod Koul qcom,smem-states = <&smp2p_slpi_out 0>; 929177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 930177fcf0aSVinod Koul 931177fcf0aSVinod Koul status = "disabled"; 932177fcf0aSVinod Koul 933177fcf0aSVinod Koul glink-edge { 934177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 935177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 936177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 937177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 938177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 939177fcf0aSVinod Koul 940177fcf0aSVinod Koul label = "slpi"; 941177fcf0aSVinod Koul qcom,remote-pid = <3>; 942177fcf0aSVinod Koul 943177fcf0aSVinod Koul }; 944177fcf0aSVinod Koul }; 945177fcf0aSVinod Koul 946177fcf0aSVinod Koul cdsp: remoteproc@98900000 { 947177fcf0aSVinod Koul compatible = "qcom,sm8350-cdsp-pas"; 948177fcf0aSVinod Koul reg = <0 0x098900000 0 0x1400000>; 949177fcf0aSVinod Koul 950177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 951177fcf0aSVinod Koul <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 952177fcf0aSVinod Koul <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 953177fcf0aSVinod Koul <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 954177fcf0aSVinod Koul <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 955177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 956177fcf0aSVinod Koul "handover", "stop-ack"; 957177fcf0aSVinod Koul 958177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 959177fcf0aSVinod Koul clock-names = "xo"; 960177fcf0aSVinod Koul 961177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, 962177fcf0aSVinod Koul <&rpmhpd 0>, 963177fcf0aSVinod Koul <&rpmhpd 10>; 964177fcf0aSVinod Koul power-domain-names = "load_state", "cx", "mxc"; 965177fcf0aSVinod Koul 966177fcf0aSVinod Koul memory-region = <&pil_cdsp_mem>; 967177fcf0aSVinod Koul 968177fcf0aSVinod Koul qcom,smem-states = <&smp2p_cdsp_out 0>; 969177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 970177fcf0aSVinod Koul 971177fcf0aSVinod Koul status = "disabled"; 972177fcf0aSVinod Koul 973177fcf0aSVinod Koul glink-edge { 974177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 975177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 976177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 977177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 978177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 979177fcf0aSVinod Koul 980177fcf0aSVinod Koul label = "cdsp"; 981177fcf0aSVinod Koul qcom,remote-pid = <5>; 982177fcf0aSVinod Koul }; 983177fcf0aSVinod Koul }; 984177fcf0aSVinod Koul 985e780fb31SJack Pham usb_1_hsphy: phy@88e3000 { 986e780fb31SJack Pham compatible = "qcom,sm8350-usb-hs-phy", 987e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 988e780fb31SJack Pham reg = <0 0x088e3000 0 0x400>; 989e780fb31SJack Pham status = "disabled"; 990e780fb31SJack Pham #phy-cells = <0>; 991e780fb31SJack Pham 992e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 993e780fb31SJack Pham clock-names = "ref"; 994e780fb31SJack Pham 9956d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 996e780fb31SJack Pham }; 997e780fb31SJack Pham 998e780fb31SJack Pham usb_2_hsphy: phy@88e4000 { 999e780fb31SJack Pham compatible = "qcom,sm8250-usb-hs-phy", 1000e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 1001e780fb31SJack Pham reg = <0 0x088e4000 0 0x400>; 1002e780fb31SJack Pham status = "disabled"; 1003e780fb31SJack Pham #phy-cells = <0>; 1004e780fb31SJack Pham 1005e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 1006e780fb31SJack Pham clock-names = "ref"; 1007e780fb31SJack Pham 10086d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 1009e780fb31SJack Pham }; 1010e780fb31SJack Pham 1011e780fb31SJack Pham usb_1_qmpphy: phy-wrapper@88e9000 { 1012e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-phy"; 1013e780fb31SJack Pham reg = <0 0x088e9000 0 0x200>, 1014e780fb31SJack Pham <0 0x088e8000 0 0x20>; 1015e780fb31SJack Pham reg-names = "reg-base", "dp_com"; 1016e780fb31SJack Pham status = "disabled"; 1017e780fb31SJack Pham #clock-cells = <1>; 1018e780fb31SJack Pham #address-cells = <2>; 1019e780fb31SJack Pham #size-cells = <2>; 1020e780fb31SJack Pham ranges; 1021e780fb31SJack Pham 10226d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 1023e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 10246d91e201SVinod Koul <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 1025e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "com_aux"; 1026e780fb31SJack Pham 10276d91e201SVinod Koul resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 10286d91e201SVinod Koul <&gcc GCC_USB3_PHY_PRIM_BCR>; 1029e780fb31SJack Pham reset-names = "phy", "common"; 1030e780fb31SJack Pham 1031e780fb31SJack Pham usb_1_ssphy: phy@88e9200 { 1032e780fb31SJack Pham reg = <0 0x088e9200 0 0x200>, 1033e780fb31SJack Pham <0 0x088e9400 0 0x200>, 1034e780fb31SJack Pham <0 0x088e9c00 0 0x400>, 1035e780fb31SJack Pham <0 0x088e9600 0 0x200>, 1036e780fb31SJack Pham <0 0x088e9800 0 0x200>, 1037e780fb31SJack Pham <0 0x088e9a00 0 0x100>; 1038e780fb31SJack Pham #phy-cells = <0>; 1039e780fb31SJack Pham #clock-cells = <1>; 10406d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 1041e780fb31SJack Pham clock-names = "pipe0"; 1042e780fb31SJack Pham clock-output-names = "usb3_phy_pipe_clk_src"; 1043e780fb31SJack Pham }; 1044e780fb31SJack Pham }; 1045e780fb31SJack Pham 1046e780fb31SJack Pham usb_2_qmpphy: phy-wrapper@88eb000 { 1047e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-uni-phy"; 1048e780fb31SJack Pham reg = <0 0x088eb000 0 0x200>; 1049e780fb31SJack Pham status = "disabled"; 1050e780fb31SJack Pham #clock-cells = <1>; 1051e780fb31SJack Pham #address-cells = <2>; 1052e780fb31SJack Pham #size-cells = <2>; 1053e780fb31SJack Pham ranges; 1054e780fb31SJack Pham 10556d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 1056e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 10576d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>, 10586d91e201SVinod Koul <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 1059e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 1060e780fb31SJack Pham 10616d91e201SVinod Koul resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 10626d91e201SVinod Koul <&gcc GCC_USB3_PHY_SEC_BCR>; 1063e780fb31SJack Pham reset-names = "phy", "common"; 1064e780fb31SJack Pham 1065e780fb31SJack Pham usb_2_ssphy: phy@88ebe00 { 1066e780fb31SJack Pham reg = <0 0x088ebe00 0 0x200>, 1067e780fb31SJack Pham <0 0x088ec000 0 0x200>, 1068e780fb31SJack Pham <0 0x088eb200 0 0x1100>; 1069e780fb31SJack Pham #phy-cells = <0>; 1070e780fb31SJack Pham #clock-cells = <1>; 10716d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 1072e780fb31SJack Pham clock-names = "pipe0"; 1073e780fb31SJack Pham clock-output-names = "usb3_uni_phy_pipe_clk_src"; 1074e780fb31SJack Pham }; 1075e780fb31SJack Pham }; 1076e780fb31SJack Pham 1077e780fb31SJack Pham usb_1: usb@a6f8800 { 1078e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 1079e780fb31SJack Pham reg = <0 0x0a6f8800 0 0x400>; 1080e780fb31SJack Pham status = "disabled"; 1081e780fb31SJack Pham #address-cells = <2>; 1082e780fb31SJack Pham #size-cells = <2>; 1083e780fb31SJack Pham ranges; 1084e780fb31SJack Pham 10856d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 10866d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>, 10876d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 10886d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 10896d91e201SVinod Koul <&gcc GCC_USB30_PRIM_SLEEP_CLK>; 1090e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 1091e780fb31SJack Pham "sleep"; 1092e780fb31SJack Pham 10936d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 10946d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>; 1095e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 1096e780fb31SJack Pham 1097e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 1098e780fb31SJack Pham <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 1099e780fb31SJack Pham <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 1100e780fb31SJack Pham <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 1101e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 1102e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 1103e780fb31SJack Pham 11046d91e201SVinod Koul power-domains = <&gcc USB30_PRIM_GDSC>; 1105e780fb31SJack Pham 11066d91e201SVinod Koul resets = <&gcc GCC_USB30_PRIM_BCR>; 1107e780fb31SJack Pham 1108e780fb31SJack Pham usb_1_dwc3: dwc3@a600000 { 1109e780fb31SJack Pham compatible = "snps,dwc3"; 1110e780fb31SJack Pham reg = <0 0x0a600000 0 0xcd00>; 1111e780fb31SJack Pham interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 1112e780fb31SJack Pham iommus = <&apps_smmu 0x0 0x0>; 1113e780fb31SJack Pham snps,dis_u2_susphy_quirk; 1114e780fb31SJack Pham snps,dis_enblslpm_quirk; 1115e780fb31SJack Pham phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 1116e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 1117e780fb31SJack Pham }; 1118e780fb31SJack Pham }; 1119e780fb31SJack Pham 1120e780fb31SJack Pham usb_2: usb@a8f8800 { 1121e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 1122e780fb31SJack Pham reg = <0 0x0a8f8800 0 0x400>; 1123e780fb31SJack Pham status = "disabled"; 1124e780fb31SJack Pham #address-cells = <2>; 1125e780fb31SJack Pham #size-cells = <2>; 1126e780fb31SJack Pham ranges; 1127e780fb31SJack Pham 11286d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 11296d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>, 11306d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 11316d91e201SVinod Koul <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 11326d91e201SVinod Koul <&gcc GCC_USB30_SEC_SLEEP_CLK>, 11336d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>; 1134e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 1135e780fb31SJack Pham "sleep", "xo"; 1136e780fb31SJack Pham 11376d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 11386d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>; 1139e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 1140e780fb31SJack Pham 1141e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 1142e780fb31SJack Pham <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 1143e780fb31SJack Pham <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 1144e780fb31SJack Pham <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 1145e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 1146e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 1147e780fb31SJack Pham 11486d91e201SVinod Koul power-domains = <&gcc USB30_SEC_GDSC>; 1149e780fb31SJack Pham 11506d91e201SVinod Koul resets = <&gcc GCC_USB30_SEC_BCR>; 1151e780fb31SJack Pham 1152e780fb31SJack Pham usb_2_dwc3: dwc3@a800000 { 1153e780fb31SJack Pham compatible = "snps,dwc3"; 1154e780fb31SJack Pham reg = <0 0x0a800000 0 0xcd00>; 1155e780fb31SJack Pham interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 1156e780fb31SJack Pham iommus = <&apps_smmu 0x20 0x0>; 1157e780fb31SJack Pham snps,dis_u2_susphy_quirk; 1158e780fb31SJack Pham snps,dis_enblslpm_quirk; 1159e780fb31SJack Pham phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 1160e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 1161e780fb31SJack Pham }; 1162e780fb31SJack Pham }; 1163177fcf0aSVinod Koul 1164177fcf0aSVinod Koul adsp: remoteproc@17300000 { 1165177fcf0aSVinod Koul compatible = "qcom,sm8350-adsp-pas"; 1166177fcf0aSVinod Koul reg = <0 0x17300000 0 0x100>; 1167177fcf0aSVinod Koul 1168177fcf0aSVinod Koul interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 1169177fcf0aSVinod Koul <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 1170177fcf0aSVinod Koul <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 1171177fcf0aSVinod Koul <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 1172177fcf0aSVinod Koul <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 1173177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1174177fcf0aSVinod Koul "handover", "stop-ack"; 1175177fcf0aSVinod Koul 1176177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1177177fcf0aSVinod Koul clock-names = "xo"; 1178177fcf0aSVinod Koul 1179177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, 1180177fcf0aSVinod Koul <&rpmhpd 4>, 1181177fcf0aSVinod Koul <&rpmhpd 5>; 1182177fcf0aSVinod Koul power-domain-names = "load_state", "lcx", "lmx"; 1183177fcf0aSVinod Koul 1184177fcf0aSVinod Koul memory-region = <&pil_adsp_mem>; 1185177fcf0aSVinod Koul 1186177fcf0aSVinod Koul qcom,smem-states = <&smp2p_adsp_out 0>; 1187177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1188177fcf0aSVinod Koul 1189177fcf0aSVinod Koul status = "disabled"; 1190177fcf0aSVinod Koul 1191177fcf0aSVinod Koul glink-edge { 1192177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 1193177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1194177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1195177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 1196177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1197177fcf0aSVinod Koul 1198177fcf0aSVinod Koul label = "lpass"; 1199177fcf0aSVinod Koul qcom,remote-pid = <2>; 1200177fcf0aSVinod Koul }; 1201177fcf0aSVinod Koul }; 1202b7e8f433SVinod Koul }; 1203b7e8f433SVinod Koul 1204b7e8f433SVinod Koul timer { 1205b7e8f433SVinod Koul compatible = "arm,armv8-timer"; 1206b7e8f433SVinod Koul interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1207b7e8f433SVinod Koul <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1208b7e8f433SVinod Koul <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1209b7e8f433SVinod Koul <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 1210b7e8f433SVinod Koul }; 1211b7e8f433SVinod Koul}; 1212