1b7e8f433SVinod Koul// SPDX-License-Identifier: BSD-3-Clause 2b7e8f433SVinod Koul/* 34f23d2a5SVinod Koul * Copyright (c) 2020, Linaro Limited 4b7e8f433SVinod Koul */ 5b7e8f433SVinod Koul 6b7e8f433SVinod Koul#include <dt-bindings/interrupt-controller/arm-gic.h> 76d91e201SVinod Koul#include <dt-bindings/clock/qcom,gcc-sm8350.h> 8b7e8f433SVinod Koul#include <dt-bindings/clock/qcom,rpmh.h> 9b7e8f433SVinod Koul#include <dt-bindings/mailbox/qcom-ipcc.h> 10b7e8f433SVinod Koul#include <dt-bindings/power/qcom-aoss-qmp.h> 11b7e8f433SVinod Koul#include <dt-bindings/power/qcom-rpmpd.h> 12b7e8f433SVinod Koul#include <dt-bindings/soc/qcom,rpmh-rsc.h> 1320f9d94eSRobert Foss#include <dt-bindings/thermal/thermal.h> 14b7e8f433SVinod Koul 15b7e8f433SVinod Koul/ { 16b7e8f433SVinod Koul interrupt-parent = <&intc>; 17b7e8f433SVinod Koul 18b7e8f433SVinod Koul #address-cells = <2>; 19b7e8f433SVinod Koul #size-cells = <2>; 20b7e8f433SVinod Koul 21b7e8f433SVinod Koul chosen { }; 22b7e8f433SVinod Koul 23b7e8f433SVinod Koul clocks { 24b7e8f433SVinod Koul xo_board: xo-board { 25b7e8f433SVinod Koul compatible = "fixed-clock"; 26b7e8f433SVinod Koul #clock-cells = <0>; 27b7e8f433SVinod Koul clock-frequency = <38400000>; 28b7e8f433SVinod Koul clock-output-names = "xo_board"; 29b7e8f433SVinod Koul }; 30b7e8f433SVinod Koul 31b7e8f433SVinod Koul sleep_clk: sleep-clk { 32b7e8f433SVinod Koul compatible = "fixed-clock"; 33b7e8f433SVinod Koul clock-frequency = <32000>; 34b7e8f433SVinod Koul #clock-cells = <0>; 35b7e8f433SVinod Koul }; 36b7e8f433SVinod Koul }; 37b7e8f433SVinod Koul 38b7e8f433SVinod Koul cpus { 39b7e8f433SVinod Koul #address-cells = <2>; 40b7e8f433SVinod Koul #size-cells = <0>; 41b7e8f433SVinod Koul 42b7e8f433SVinod Koul CPU0: cpu@0 { 43b7e8f433SVinod Koul device_type = "cpu"; 44b7e8f433SVinod Koul compatible = "qcom,kryo685"; 45b7e8f433SVinod Koul reg = <0x0 0x0>; 46b7e8f433SVinod Koul enable-method = "psci"; 47b7e8f433SVinod Koul next-level-cache = <&L2_0>; 48ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 4920f9d94eSRobert Foss #cooling-cells = <2>; 50b7e8f433SVinod Koul L2_0: l2-cache { 51b7e8f433SVinod Koul compatible = "cache"; 52b7e8f433SVinod Koul next-level-cache = <&L3_0>; 53b7e8f433SVinod Koul L3_0: l3-cache { 54b7e8f433SVinod Koul compatible = "cache"; 55b7e8f433SVinod Koul }; 56b7e8f433SVinod Koul }; 57b7e8f433SVinod Koul }; 58b7e8f433SVinod Koul 59b7e8f433SVinod Koul CPU1: cpu@100 { 60b7e8f433SVinod Koul device_type = "cpu"; 61b7e8f433SVinod Koul compatible = "qcom,kryo685"; 62b7e8f433SVinod Koul reg = <0x0 0x100>; 63b7e8f433SVinod Koul enable-method = "psci"; 64b7e8f433SVinod Koul next-level-cache = <&L2_100>; 65ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 6620f9d94eSRobert Foss #cooling-cells = <2>; 67b7e8f433SVinod Koul L2_100: l2-cache { 68b7e8f433SVinod Koul compatible = "cache"; 69b7e8f433SVinod Koul next-level-cache = <&L3_0>; 70b7e8f433SVinod Koul }; 71b7e8f433SVinod Koul }; 72b7e8f433SVinod Koul 73b7e8f433SVinod Koul CPU2: cpu@200 { 74b7e8f433SVinod Koul device_type = "cpu"; 75b7e8f433SVinod Koul compatible = "qcom,kryo685"; 76b7e8f433SVinod Koul reg = <0x0 0x200>; 77b7e8f433SVinod Koul enable-method = "psci"; 78b7e8f433SVinod Koul next-level-cache = <&L2_200>; 79ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 8020f9d94eSRobert Foss #cooling-cells = <2>; 81b7e8f433SVinod Koul L2_200: l2-cache { 82b7e8f433SVinod Koul compatible = "cache"; 83b7e8f433SVinod Koul next-level-cache = <&L3_0>; 84b7e8f433SVinod Koul }; 85b7e8f433SVinod Koul }; 86b7e8f433SVinod Koul 87b7e8f433SVinod Koul CPU3: cpu@300 { 88b7e8f433SVinod Koul device_type = "cpu"; 89b7e8f433SVinod Koul compatible = "qcom,kryo685"; 90b7e8f433SVinod Koul reg = <0x0 0x300>; 91b7e8f433SVinod Koul enable-method = "psci"; 92b7e8f433SVinod Koul next-level-cache = <&L2_300>; 93ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 0>; 9420f9d94eSRobert Foss #cooling-cells = <2>; 95b7e8f433SVinod Koul L2_300: l2-cache { 96b7e8f433SVinod Koul compatible = "cache"; 97b7e8f433SVinod Koul next-level-cache = <&L3_0>; 98b7e8f433SVinod Koul }; 99b7e8f433SVinod Koul }; 100b7e8f433SVinod Koul 101b7e8f433SVinod Koul CPU4: cpu@400 { 102b7e8f433SVinod Koul device_type = "cpu"; 103b7e8f433SVinod Koul compatible = "qcom,kryo685"; 104b7e8f433SVinod Koul reg = <0x0 0x400>; 105b7e8f433SVinod Koul enable-method = "psci"; 106b7e8f433SVinod Koul next-level-cache = <&L2_400>; 107ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 10820f9d94eSRobert Foss #cooling-cells = <2>; 109b7e8f433SVinod Koul L2_400: l2-cache { 110b7e8f433SVinod Koul compatible = "cache"; 111b7e8f433SVinod Koul next-level-cache = <&L3_0>; 112b7e8f433SVinod Koul }; 113b7e8f433SVinod Koul }; 114b7e8f433SVinod Koul 115b7e8f433SVinod Koul CPU5: cpu@500 { 116b7e8f433SVinod Koul device_type = "cpu"; 117b7e8f433SVinod Koul compatible = "qcom,kryo685"; 118b7e8f433SVinod Koul reg = <0x0 0x500>; 119b7e8f433SVinod Koul enable-method = "psci"; 120b7e8f433SVinod Koul next-level-cache = <&L2_500>; 121ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 12220f9d94eSRobert Foss #cooling-cells = <2>; 123b7e8f433SVinod Koul L2_500: l2-cache { 124b7e8f433SVinod Koul compatible = "cache"; 125b7e8f433SVinod Koul next-level-cache = <&L3_0>; 126b7e8f433SVinod Koul }; 127b7e8f433SVinod Koul 128b7e8f433SVinod Koul }; 129b7e8f433SVinod Koul 130b7e8f433SVinod Koul CPU6: cpu@600 { 131b7e8f433SVinod Koul device_type = "cpu"; 132b7e8f433SVinod Koul compatible = "qcom,kryo685"; 133b7e8f433SVinod Koul reg = <0x0 0x600>; 134b7e8f433SVinod Koul enable-method = "psci"; 135b7e8f433SVinod Koul next-level-cache = <&L2_600>; 136ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 1>; 13720f9d94eSRobert Foss #cooling-cells = <2>; 138b7e8f433SVinod Koul L2_600: l2-cache { 139b7e8f433SVinod Koul compatible = "cache"; 140b7e8f433SVinod Koul next-level-cache = <&L3_0>; 141b7e8f433SVinod Koul }; 142b7e8f433SVinod Koul }; 143b7e8f433SVinod Koul 144b7e8f433SVinod Koul CPU7: cpu@700 { 145b7e8f433SVinod Koul device_type = "cpu"; 146b7e8f433SVinod Koul compatible = "qcom,kryo685"; 147b7e8f433SVinod Koul reg = <0x0 0x700>; 148b7e8f433SVinod Koul enable-method = "psci"; 149b7e8f433SVinod Koul next-level-cache = <&L2_700>; 150ccbb3abbSVinod Koul qcom,freq-domain = <&cpufreq_hw 2>; 15120f9d94eSRobert Foss #cooling-cells = <2>; 152b7e8f433SVinod Koul L2_700: l2-cache { 153b7e8f433SVinod Koul compatible = "cache"; 154b7e8f433SVinod Koul next-level-cache = <&L3_0>; 155b7e8f433SVinod Koul }; 156b7e8f433SVinod Koul }; 157b7e8f433SVinod Koul }; 158b7e8f433SVinod Koul 159b7e8f433SVinod Koul firmware { 160b7e8f433SVinod Koul scm: scm { 161b7e8f433SVinod Koul compatible = "qcom,scm-sm8350", "qcom,scm"; 162b7e8f433SVinod Koul #reset-cells = <1>; 163b7e8f433SVinod Koul }; 164b7e8f433SVinod Koul }; 165b7e8f433SVinod Koul 166b7e8f433SVinod Koul memory@80000000 { 167b7e8f433SVinod Koul device_type = "memory"; 168b7e8f433SVinod Koul /* We expect the bootloader to fill in the size */ 169b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x0>; 170b7e8f433SVinod Koul }; 171b7e8f433SVinod Koul 172b7e8f433SVinod Koul pmu { 173b7e8f433SVinod Koul compatible = "arm,armv8-pmuv3"; 174794d3e30SSai Prakash Ranjan interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 175b7e8f433SVinod Koul }; 176b7e8f433SVinod Koul 177b7e8f433SVinod Koul psci { 178b7e8f433SVinod Koul compatible = "arm,psci-1.0"; 179b7e8f433SVinod Koul method = "smc"; 180b7e8f433SVinod Koul }; 181b7e8f433SVinod Koul 182b7e8f433SVinod Koul reserved_memory: reserved-memory { 183b7e8f433SVinod Koul #address-cells = <2>; 184b7e8f433SVinod Koul #size-cells = <2>; 185b7e8f433SVinod Koul ranges; 186b7e8f433SVinod Koul 187b7e8f433SVinod Koul hyp_mem: memory@80000000 { 188b7e8f433SVinod Koul reg = <0x0 0x80000000 0x0 0x600000>; 189b7e8f433SVinod Koul no-map; 190b7e8f433SVinod Koul }; 191b7e8f433SVinod Koul 192b7e8f433SVinod Koul xbl_aop_mem: memory@80700000 { 193b7e8f433SVinod Koul no-map; 194b7e8f433SVinod Koul reg = <0x0 0x80700000 0x0 0x160000>; 195b7e8f433SVinod Koul }; 196b7e8f433SVinod Koul 197b7e8f433SVinod Koul cmd_db: memory@80860000 { 198b7e8f433SVinod Koul compatible = "qcom,cmd-db"; 199b7e8f433SVinod Koul reg = <0x0 0x80860000 0x0 0x20000>; 200b7e8f433SVinod Koul no-map; 201b7e8f433SVinod Koul }; 202b7e8f433SVinod Koul 203b7e8f433SVinod Koul reserved_xbl_uefi_log: memory@80880000 { 204b7e8f433SVinod Koul reg = <0x0 0x80880000 0x0 0x14000>; 205b7e8f433SVinod Koul no-map; 206b7e8f433SVinod Koul }; 207b7e8f433SVinod Koul 208b7e8f433SVinod Koul smem_mem: memory@80900000 { 209b7e8f433SVinod Koul reg = <0x0 0x80900000 0x0 0x200000>; 210b7e8f433SVinod Koul no-map; 211b7e8f433SVinod Koul }; 212b7e8f433SVinod Koul 213b7e8f433SVinod Koul cpucp_fw_mem: memory@80b00000 { 214b7e8f433SVinod Koul reg = <0x0 0x80b00000 0x0 0x100000>; 215b7e8f433SVinod Koul no-map; 216b7e8f433SVinod Koul }; 217b7e8f433SVinod Koul 218b7e8f433SVinod Koul cdsp_secure_heap: memory@80c00000 { 219b7e8f433SVinod Koul reg = <0x0 0x80c00000 0x0 0x4600000>; 220b7e8f433SVinod Koul no-map; 221b7e8f433SVinod Koul }; 222b7e8f433SVinod Koul 223b7e8f433SVinod Koul pil_camera_mem: mmeory@85200000 { 224b7e8f433SVinod Koul reg = <0x0 0x85200000 0x0 0x500000>; 225b7e8f433SVinod Koul no-map; 226b7e8f433SVinod Koul }; 227b7e8f433SVinod Koul 228b7e8f433SVinod Koul pil_video_mem: memory@85700000 { 229b7e8f433SVinod Koul reg = <0x0 0x85700000 0x0 0x500000>; 230b7e8f433SVinod Koul no-map; 231b7e8f433SVinod Koul }; 232b7e8f433SVinod Koul 233b7e8f433SVinod Koul pil_cvp_mem: memory@85c00000 { 234b7e8f433SVinod Koul reg = <0x0 0x85c00000 0x0 0x500000>; 235b7e8f433SVinod Koul no-map; 236b7e8f433SVinod Koul }; 237b7e8f433SVinod Koul 238b7e8f433SVinod Koul pil_adsp_mem: memory@86100000 { 239b7e8f433SVinod Koul reg = <0x0 0x86100000 0x0 0x2100000>; 240b7e8f433SVinod Koul no-map; 241b7e8f433SVinod Koul }; 242b7e8f433SVinod Koul 243b7e8f433SVinod Koul pil_slpi_mem: memory@88200000 { 244b7e8f433SVinod Koul reg = <0x0 0x88200000 0x0 0x1500000>; 245b7e8f433SVinod Koul no-map; 246b7e8f433SVinod Koul }; 247b7e8f433SVinod Koul 248b7e8f433SVinod Koul pil_cdsp_mem: memory@89700000 { 249b7e8f433SVinod Koul reg = <0x0 0x89700000 0x0 0x1e00000>; 250b7e8f433SVinod Koul no-map; 251b7e8f433SVinod Koul }; 252b7e8f433SVinod Koul 253b7e8f433SVinod Koul pil_ipa_fw_mem: memory@8b500000 { 254b7e8f433SVinod Koul reg = <0x0 0x8b500000 0x0 0x10000>; 255b7e8f433SVinod Koul no-map; 256b7e8f433SVinod Koul }; 257b7e8f433SVinod Koul 258b7e8f433SVinod Koul pil_ipa_gsi_mem: memory@8b510000 { 259b7e8f433SVinod Koul reg = <0x0 0x8b510000 0x0 0xa000>; 260b7e8f433SVinod Koul no-map; 261b7e8f433SVinod Koul }; 262b7e8f433SVinod Koul 263b7e8f433SVinod Koul pil_gpu_mem: memory@8b51a000 { 264b7e8f433SVinod Koul reg = <0x0 0x8b51a000 0x0 0x2000>; 265b7e8f433SVinod Koul no-map; 266b7e8f433SVinod Koul }; 267b7e8f433SVinod Koul 268b7e8f433SVinod Koul pil_spss_mem: memory@8b600000 { 269b7e8f433SVinod Koul reg = <0x0 0x8b600000 0x0 0x100000>; 270b7e8f433SVinod Koul no-map; 271b7e8f433SVinod Koul }; 272b7e8f433SVinod Koul 273b7e8f433SVinod Koul pil_modem_mem: memory@8b800000 { 274b7e8f433SVinod Koul reg = <0x0 0x8b800000 0x0 0x10000000>; 275b7e8f433SVinod Koul no-map; 276b7e8f433SVinod Koul }; 277b7e8f433SVinod Koul 278774890c9SVinod Koul rmtfs_mem: memory@9b800000 { 279774890c9SVinod Koul compatible = "qcom,rmtfs-mem"; 280774890c9SVinod Koul reg = <0x0 0x9b800000 0x0 0x280000>; 281774890c9SVinod Koul no-map; 282774890c9SVinod Koul 283774890c9SVinod Koul qcom,client-id = <1>; 284774890c9SVinod Koul qcom,vmid = <15>; 285774890c9SVinod Koul }; 286774890c9SVinod Koul 287b7e8f433SVinod Koul hyp_reserved_mem: memory@d0000000 { 288b7e8f433SVinod Koul reg = <0x0 0xd0000000 0x0 0x800000>; 289b7e8f433SVinod Koul no-map; 290b7e8f433SVinod Koul }; 291b7e8f433SVinod Koul 292b7e8f433SVinod Koul pil_trustedvm_mem: memory@d0800000 { 293b7e8f433SVinod Koul reg = <0x0 0xd0800000 0x0 0x76f7000>; 294b7e8f433SVinod Koul no-map; 295b7e8f433SVinod Koul }; 296b7e8f433SVinod Koul 297b7e8f433SVinod Koul qrtr_shbuf: memory@d7ef7000 { 298b7e8f433SVinod Koul reg = <0x0 0xd7ef7000 0x0 0x9000>; 299b7e8f433SVinod Koul no-map; 300b7e8f433SVinod Koul }; 301b7e8f433SVinod Koul 302b7e8f433SVinod Koul chan0_shbuf: memory@d7f00000 { 303b7e8f433SVinod Koul reg = <0x0 0xd7f00000 0x0 0x80000>; 304b7e8f433SVinod Koul no-map; 305b7e8f433SVinod Koul }; 306b7e8f433SVinod Koul 307b7e8f433SVinod Koul chan1_shbuf: memory@d7f80000 { 308b7e8f433SVinod Koul reg = <0x0 0xd7f80000 0x0 0x80000>; 309b7e8f433SVinod Koul no-map; 310b7e8f433SVinod Koul }; 311b7e8f433SVinod Koul 312b7e8f433SVinod Koul removed_mem: memory@d8800000 { 313b7e8f433SVinod Koul reg = <0x0 0xd8800000 0x0 0x6800000>; 314b7e8f433SVinod Koul no-map; 315b7e8f433SVinod Koul }; 316b7e8f433SVinod Koul }; 317b7e8f433SVinod Koul 318b7e8f433SVinod Koul smem: qcom,smem { 319b7e8f433SVinod Koul compatible = "qcom,smem"; 320b7e8f433SVinod Koul memory-region = <&smem_mem>; 321b7e8f433SVinod Koul hwlocks = <&tcsr_mutex 3>; 322b7e8f433SVinod Koul }; 323b7e8f433SVinod Koul 32403a41991SVinod Koul smp2p-adsp { 32503a41991SVinod Koul compatible = "qcom,smp2p"; 32603a41991SVinod Koul qcom,smem = <443>, <429>; 32703a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 32803a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 32903a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 33003a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 33103a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 33203a41991SVinod Koul 33303a41991SVinod Koul qcom,local-pid = <0>; 33403a41991SVinod Koul qcom,remote-pid = <2>; 33503a41991SVinod Koul 33603a41991SVinod Koul smp2p_adsp_out: master-kernel { 33703a41991SVinod Koul qcom,entry-name = "master-kernel"; 33803a41991SVinod Koul #qcom,smem-state-cells = <1>; 33903a41991SVinod Koul }; 34003a41991SVinod Koul 34103a41991SVinod Koul smp2p_adsp_in: slave-kernel { 34203a41991SVinod Koul qcom,entry-name = "slave-kernel"; 34303a41991SVinod Koul interrupt-controller; 34403a41991SVinod Koul #interrupt-cells = <2>; 34503a41991SVinod Koul }; 34603a41991SVinod Koul }; 34703a41991SVinod Koul 34803a41991SVinod Koul smp2p-cdsp { 34903a41991SVinod Koul compatible = "qcom,smp2p"; 35003a41991SVinod Koul qcom,smem = <94>, <432>; 35103a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 35203a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 35303a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 35403a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 35503a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 35603a41991SVinod Koul 35703a41991SVinod Koul qcom,local-pid = <0>; 35803a41991SVinod Koul qcom,remote-pid = <5>; 35903a41991SVinod Koul 36003a41991SVinod Koul smp2p_cdsp_out: master-kernel { 36103a41991SVinod Koul qcom,entry-name = "master-kernel"; 36203a41991SVinod Koul #qcom,smem-state-cells = <1>; 36303a41991SVinod Koul }; 36403a41991SVinod Koul 36503a41991SVinod Koul smp2p_cdsp_in: slave-kernel { 36603a41991SVinod Koul qcom,entry-name = "slave-kernel"; 36703a41991SVinod Koul interrupt-controller; 36803a41991SVinod Koul #interrupt-cells = <2>; 36903a41991SVinod Koul }; 37003a41991SVinod Koul }; 37103a41991SVinod Koul 37203a41991SVinod Koul smp2p-modem { 37303a41991SVinod Koul compatible = "qcom,smp2p"; 37403a41991SVinod Koul qcom,smem = <435>, <428>; 37503a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 37603a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 37703a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 37803a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 37903a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 38003a41991SVinod Koul 38103a41991SVinod Koul qcom,local-pid = <0>; 38203a41991SVinod Koul qcom,remote-pid = <1>; 38303a41991SVinod Koul 38403a41991SVinod Koul smp2p_modem_out: master-kernel { 38503a41991SVinod Koul qcom,entry-name = "master-kernel"; 38603a41991SVinod Koul #qcom,smem-state-cells = <1>; 38703a41991SVinod Koul }; 38803a41991SVinod Koul 38903a41991SVinod Koul smp2p_modem_in: slave-kernel { 39003a41991SVinod Koul qcom,entry-name = "slave-kernel"; 39103a41991SVinod Koul interrupt-controller; 39203a41991SVinod Koul #interrupt-cells = <2>; 39303a41991SVinod Koul }; 39403a41991SVinod Koul }; 39503a41991SVinod Koul 39603a41991SVinod Koul smp2p-slpi { 39703a41991SVinod Koul compatible = "qcom,smp2p"; 39803a41991SVinod Koul qcom,smem = <481>, <430>; 39903a41991SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 40003a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P 40103a41991SVinod Koul IRQ_TYPE_EDGE_RISING>; 40203a41991SVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 40303a41991SVinod Koul IPCC_MPROC_SIGNAL_SMP2P>; 40403a41991SVinod Koul 40503a41991SVinod Koul qcom,local-pid = <0>; 40603a41991SVinod Koul qcom,remote-pid = <3>; 40703a41991SVinod Koul 40803a41991SVinod Koul smp2p_slpi_out: master-kernel { 40903a41991SVinod Koul qcom,entry-name = "master-kernel"; 41003a41991SVinod Koul #qcom,smem-state-cells = <1>; 41103a41991SVinod Koul }; 41203a41991SVinod Koul 41303a41991SVinod Koul smp2p_slpi_in: slave-kernel { 41403a41991SVinod Koul qcom,entry-name = "slave-kernel"; 41503a41991SVinod Koul interrupt-controller; 41603a41991SVinod Koul #interrupt-cells = <2>; 41703a41991SVinod Koul }; 41803a41991SVinod Koul }; 41903a41991SVinod Koul 420b7e8f433SVinod Koul soc: soc@0 { 421b7e8f433SVinod Koul #address-cells = <2>; 422b7e8f433SVinod Koul #size-cells = <2>; 423b7e8f433SVinod Koul ranges = <0 0 0 0 0x10 0>; 424b7e8f433SVinod Koul dma-ranges = <0 0 0 0 0x10 0>; 425b7e8f433SVinod Koul compatible = "simple-bus"; 426b7e8f433SVinod Koul 427b7e8f433SVinod Koul gcc: clock-controller@100000 { 428b7e8f433SVinod Koul compatible = "qcom,gcc-sm8350"; 429b7e8f433SVinod Koul reg = <0x0 0x00100000 0x0 0x1f0000>; 430b7e8f433SVinod Koul #clock-cells = <1>; 431b7e8f433SVinod Koul #reset-cells = <1>; 432b7e8f433SVinod Koul #power-domain-cells = <1>; 433b7e8f433SVinod Koul clock-names = "bi_tcxo", "sleep_clk"; 434b7e8f433SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; 435b7e8f433SVinod Koul }; 436b7e8f433SVinod Koul 437b7e8f433SVinod Koul ipcc: mailbox@408000 { 438b7e8f433SVinod Koul compatible = "qcom,sm8350-ipcc", "qcom,ipcc"; 439b7e8f433SVinod Koul reg = <0 0x00408000 0 0x1000>; 440b7e8f433SVinod Koul interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 441b7e8f433SVinod Koul interrupt-controller; 442b7e8f433SVinod Koul #interrupt-cells = <3>; 443b7e8f433SVinod Koul #mbox-cells = <2>; 444b7e8f433SVinod Koul }; 445b7e8f433SVinod Koul 446b7e8f433SVinod Koul qupv3_id_1: geniqup@9c0000 { 447b7e8f433SVinod Koul compatible = "qcom,geni-se-qup"; 448b7e8f433SVinod Koul reg = <0x0 0x009c0000 0x0 0x6000>; 449b7e8f433SVinod Koul clock-names = "m-ahb", "s-ahb"; 4506d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 4516d91e201SVinod Koul <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 452b7e8f433SVinod Koul #address-cells = <2>; 453b7e8f433SVinod Koul #size-cells = <2>; 454b7e8f433SVinod Koul ranges; 455b7e8f433SVinod Koul status = "disabled"; 456b7e8f433SVinod Koul 457b7e8f433SVinod Koul uart2: serial@98c000 { 458b7e8f433SVinod Koul compatible = "qcom,geni-debug-uart"; 459b7e8f433SVinod Koul reg = <0 0x0098c000 0 0x4000>; 460b7e8f433SVinod Koul clock-names = "se"; 4616d91e201SVinod Koul clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 462b7e8f433SVinod Koul pinctrl-names = "default"; 463b7e8f433SVinod Koul pinctrl-0 = <&qup_uart3_default_state>; 464b7e8f433SVinod Koul interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 465b7e8f433SVinod Koul #address-cells = <1>; 466b7e8f433SVinod Koul #size-cells = <0>; 467b7e8f433SVinod Koul status = "disabled"; 468b7e8f433SVinod Koul }; 469b7e8f433SVinod Koul }; 470b7e8f433SVinod Koul 471187f65b7SVinod Koul apps_smmu: iommu@15000000 { 472187f65b7SVinod Koul compatible = "qcom,sm8350-smmu-500", "arm,mmu-500"; 473187f65b7SVinod Koul reg = <0 0x15000000 0 0x100000>; 474187f65b7SVinod Koul #iommu-cells = <2>; 475187f65b7SVinod Koul #global-interrupts = <2>; 476187f65b7SVinod Koul interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 477187f65b7SVinod Koul <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 478187f65b7SVinod Koul <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 479187f65b7SVinod Koul <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 480187f65b7SVinod Koul <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 481187f65b7SVinod Koul <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 482187f65b7SVinod Koul <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 483187f65b7SVinod Koul <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 484187f65b7SVinod Koul <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 485187f65b7SVinod Koul <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 486187f65b7SVinod Koul <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 487187f65b7SVinod Koul <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 488187f65b7SVinod Koul <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 489187f65b7SVinod Koul <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 490187f65b7SVinod Koul <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 491187f65b7SVinod Koul <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 492187f65b7SVinod Koul <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 493187f65b7SVinod Koul <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 494187f65b7SVinod Koul <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 495187f65b7SVinod Koul <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 496187f65b7SVinod Koul <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 497187f65b7SVinod Koul <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 498187f65b7SVinod Koul <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 499187f65b7SVinod Koul <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 500187f65b7SVinod Koul <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 501187f65b7SVinod Koul <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 502187f65b7SVinod Koul <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 503187f65b7SVinod Koul <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 504187f65b7SVinod Koul <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 505187f65b7SVinod Koul <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 506187f65b7SVinod Koul <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 507187f65b7SVinod Koul <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 508187f65b7SVinod Koul <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 509187f65b7SVinod Koul <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 510187f65b7SVinod Koul <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 511187f65b7SVinod Koul <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 512187f65b7SVinod Koul <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 513187f65b7SVinod Koul <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 514187f65b7SVinod Koul <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 515187f65b7SVinod Koul <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 516187f65b7SVinod Koul <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 517187f65b7SVinod Koul <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 518187f65b7SVinod Koul <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 519187f65b7SVinod Koul <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 520187f65b7SVinod Koul <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 521187f65b7SVinod Koul <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 522187f65b7SVinod Koul <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 523187f65b7SVinod Koul <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 524187f65b7SVinod Koul <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 525187f65b7SVinod Koul <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 526187f65b7SVinod Koul <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 527187f65b7SVinod Koul <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 528187f65b7SVinod Koul <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 529187f65b7SVinod Koul <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 530187f65b7SVinod Koul <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 531187f65b7SVinod Koul <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 532187f65b7SVinod Koul <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 533187f65b7SVinod Koul <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 534187f65b7SVinod Koul <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 535187f65b7SVinod Koul <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 536187f65b7SVinod Koul <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 537187f65b7SVinod Koul <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 538187f65b7SVinod Koul <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 539187f65b7SVinod Koul <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 540187f65b7SVinod Koul <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 541187f65b7SVinod Koul <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 542187f65b7SVinod Koul <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 543187f65b7SVinod Koul <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 544187f65b7SVinod Koul <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 545187f65b7SVinod Koul <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 546187f65b7SVinod Koul <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 547187f65b7SVinod Koul <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 548187f65b7SVinod Koul <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 549187f65b7SVinod Koul <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 550187f65b7SVinod Koul <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 551187f65b7SVinod Koul <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 552187f65b7SVinod Koul <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 553187f65b7SVinod Koul <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 554187f65b7SVinod Koul <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 555187f65b7SVinod Koul <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 556187f65b7SVinod Koul <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 557187f65b7SVinod Koul <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 558187f65b7SVinod Koul <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 559187f65b7SVinod Koul <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 560187f65b7SVinod Koul <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 561187f65b7SVinod Koul <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 562187f65b7SVinod Koul <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 563187f65b7SVinod Koul <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 564187f65b7SVinod Koul <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 565187f65b7SVinod Koul <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>, 566187f65b7SVinod Koul <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>, 567187f65b7SVinod Koul <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>, 568187f65b7SVinod Koul <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>, 569187f65b7SVinod Koul <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>, 570187f65b7SVinod Koul <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>, 571187f65b7SVinod Koul <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>, 572187f65b7SVinod Koul <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>, 573187f65b7SVinod Koul <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>; 574187f65b7SVinod Koul }; 575187f65b7SVinod Koul 576b7e8f433SVinod Koul tcsr_mutex: hwlock@1f40000 { 577b7e8f433SVinod Koul compatible = "qcom,tcsr-mutex"; 578b7e8f433SVinod Koul reg = <0x0 0x01f40000 0x0 0x40000>; 579b7e8f433SVinod Koul #hwlock-cells = <1>; 580b7e8f433SVinod Koul }; 581b7e8f433SVinod Koul 582177fcf0aSVinod Koul mpss: remoteproc@4080000 { 583177fcf0aSVinod Koul compatible = "qcom,sm8350-mpss-pas"; 584177fcf0aSVinod Koul reg = <0x0 0x04080000 0x0 0x4040>; 585177fcf0aSVinod Koul 586177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 587177fcf0aSVinod Koul <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, 588177fcf0aSVinod Koul <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, 589177fcf0aSVinod Koul <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, 590177fcf0aSVinod Koul <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, 591177fcf0aSVinod Koul <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; 592177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", "handover", 593177fcf0aSVinod Koul "stop-ack", "shutdown-ack"; 594177fcf0aSVinod Koul 595177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 596177fcf0aSVinod Koul clock-names = "xo"; 597177fcf0aSVinod Koul 598177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, 599177fcf0aSVinod Koul <&rpmhpd 0>, 600177fcf0aSVinod Koul <&rpmhpd 12>; 601177fcf0aSVinod Koul power-domain-names = "load_state", "cx", "mss"; 602177fcf0aSVinod Koul 603177fcf0aSVinod Koul memory-region = <&pil_modem_mem>; 604177fcf0aSVinod Koul 605177fcf0aSVinod Koul qcom,smem-states = <&smp2p_modem_out 0>; 606177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 607177fcf0aSVinod Koul 608177fcf0aSVinod Koul status = "disabled"; 609177fcf0aSVinod Koul 610177fcf0aSVinod Koul glink-edge { 611177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 612177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 613177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 614177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_MPSS 615177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 616177fcf0aSVinod Koul interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; 617177fcf0aSVinod Koul label = "modem"; 618177fcf0aSVinod Koul qcom,remote-pid = <1>; 619177fcf0aSVinod Koul }; 620177fcf0aSVinod Koul }; 621177fcf0aSVinod Koul 622b7e8f433SVinod Koul pdc: interrupt-controller@b220000 { 623b7e8f433SVinod Koul compatible = "qcom,sm8350-pdc", "qcom,pdc"; 624b7e8f433SVinod Koul reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; 625b7e8f433SVinod Koul qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>, 626b7e8f433SVinod Koul <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>, 627b7e8f433SVinod Koul <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>, 628b7e8f433SVinod Koul <156 716 12>; 629b7e8f433SVinod Koul #interrupt-cells = <2>; 630b7e8f433SVinod Koul interrupt-parent = <&intc>; 631b7e8f433SVinod Koul interrupt-controller; 632b7e8f433SVinod Koul }; 633b7e8f433SVinod Koul 63420f9d94eSRobert Foss tsens0: thermal-sensor@c222000 { 63520f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 63620f9d94eSRobert Foss reg = <0 0x0c263000 0 0x1ff>, /* TM */ 63720f9d94eSRobert Foss <0 0x0c222000 0 0x8>; /* SROT */ 63820f9d94eSRobert Foss #qcom,sensors = <15>; 63920f9d94eSRobert Foss interrupts = <&pdc 26 IRQ_TYPE_LEVEL_HIGH>, 64020f9d94eSRobert Foss <&pdc 28 IRQ_TYPE_LEVEL_HIGH>; 64120f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 64220f9d94eSRobert Foss #thermal-sensor-cells = <1>; 64320f9d94eSRobert Foss }; 64420f9d94eSRobert Foss 64520f9d94eSRobert Foss tsens1: thermal-sensor@c223000 { 64620f9d94eSRobert Foss compatible = "qcom,sm8350-tsens", "qcom,tsens-v2"; 64720f9d94eSRobert Foss reg = <0 0x0c265000 0 0x1ff>, /* TM */ 64820f9d94eSRobert Foss <0 0x0c223000 0 0x8>; /* SROT */ 64920f9d94eSRobert Foss #qcom,sensors = <14>; 65020f9d94eSRobert Foss interrupts = <&pdc 27 IRQ_TYPE_LEVEL_HIGH>, 65120f9d94eSRobert Foss <&pdc 29 IRQ_TYPE_LEVEL_HIGH>; 65220f9d94eSRobert Foss interrupt-names = "uplow", "critical"; 65320f9d94eSRobert Foss #thermal-sensor-cells = <1>; 65420f9d94eSRobert Foss }; 65520f9d94eSRobert Foss 65697832fa8SSai Prakash Ranjan aoss_qmp: power-controller@c300000 { 657b7e8f433SVinod Koul compatible = "qcom,sm8350-aoss-qmp"; 658b7e8f433SVinod Koul reg = <0 0x0c300000 0 0x100000>; 659b7e8f433SVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP 660b7e8f433SVinod Koul IRQ_TYPE_EDGE_RISING>; 661b7e8f433SVinod Koul mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; 662b7e8f433SVinod Koul 663b7e8f433SVinod Koul #clock-cells = <0>; 664b7e8f433SVinod Koul #power-domain-cells = <1>; 665b7e8f433SVinod Koul }; 666b7e8f433SVinod Koul 667389cd7acSVinod Koul spmi_bus: spmi@c440000 { 668389cd7acSVinod Koul compatible = "qcom,spmi-pmic-arb"; 669389cd7acSVinod Koul reg = <0x0 0xc440000 0x0 0x1100>, 670389cd7acSVinod Koul <0x0 0xc600000 0x0 0x2000000>, 671389cd7acSVinod Koul <0x0 0xe600000 0x0 0x100000>, 672389cd7acSVinod Koul <0x0 0xe700000 0x0 0xa0000>, 673389cd7acSVinod Koul <0x0 0xc40a000 0x0 0x26000>; 674389cd7acSVinod Koul reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 675389cd7acSVinod Koul interrupt-names = "periph_irq"; 676389cd7acSVinod Koul interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 677389cd7acSVinod Koul qcom,ee = <0>; 678389cd7acSVinod Koul qcom,channel = <0>; 679389cd7acSVinod Koul #address-cells = <2>; 680389cd7acSVinod Koul #size-cells = <0>; 681389cd7acSVinod Koul interrupt-controller; 682389cd7acSVinod Koul #interrupt-cells = <4>; 683389cd7acSVinod Koul }; 684389cd7acSVinod Koul 685b7e8f433SVinod Koul tlmm: pinctrl@f100000 { 686b7e8f433SVinod Koul compatible = "qcom,sm8350-tlmm"; 687b7e8f433SVinod Koul reg = <0 0x0f100000 0 0x300000>; 688b7e8f433SVinod Koul interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 689b7e8f433SVinod Koul gpio-controller; 690b7e8f433SVinod Koul #gpio-cells = <2>; 691b7e8f433SVinod Koul interrupt-controller; 692b7e8f433SVinod Koul #interrupt-cells = <2>; 69379015857SShawn Guo gpio-ranges = <&tlmm 0 0 204>; 694b7e8f433SVinod Koul 695b7e8f433SVinod Koul qup_uart3_default_state: qup-uart3-default-state { 696b7e8f433SVinod Koul rx { 697b7e8f433SVinod Koul pins = "gpio18"; 698b7e8f433SVinod Koul function = "qup3"; 699b7e8f433SVinod Koul }; 700b7e8f433SVinod Koul tx { 701b7e8f433SVinod Koul pins = "gpio19"; 702b7e8f433SVinod Koul function = "qup3"; 703b7e8f433SVinod Koul }; 704b7e8f433SVinod Koul }; 705b7e8f433SVinod Koul }; 706b7e8f433SVinod Koul 707*24e3eb2eSRobert Foss rng: rng@10d3000 { 708*24e3eb2eSRobert Foss compatible = "qcom,prng-ee"; 709*24e3eb2eSRobert Foss reg = <0 0x010d3000 0 0x1000>; 710*24e3eb2eSRobert Foss clocks = <&rpmhcc RPMH_HWKM_CLK>; 711*24e3eb2eSRobert Foss clock-names = "core"; 712*24e3eb2eSRobert Foss }; 713*24e3eb2eSRobert Foss 714b7e8f433SVinod Koul intc: interrupt-controller@17a00000 { 715b7e8f433SVinod Koul compatible = "arm,gic-v3"; 716b7e8f433SVinod Koul #interrupt-cells = <3>; 717b7e8f433SVinod Koul interrupt-controller; 718b7e8f433SVinod Koul reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ 719b7e8f433SVinod Koul <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ 720b7e8f433SVinod Koul interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 721b7e8f433SVinod Koul }; 722b7e8f433SVinod Koul 723b7e8f433SVinod Koul timer@17c20000 { 724b7e8f433SVinod Koul compatible = "arm,armv7-timer-mem"; 725b7e8f433SVinod Koul #address-cells = <2>; 726b7e8f433SVinod Koul #size-cells = <2>; 727b7e8f433SVinod Koul ranges; 728b7e8f433SVinod Koul reg = <0x0 0x17c20000 0x0 0x1000>; 729b7e8f433SVinod Koul clock-frequency = <19200000>; 730b7e8f433SVinod Koul 731b7e8f433SVinod Koul frame@17c21000 { 732b7e8f433SVinod Koul frame-number = <0>; 733b7e8f433SVinod Koul interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 734b7e8f433SVinod Koul <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 735b7e8f433SVinod Koul reg = <0x0 0x17c21000 0x0 0x1000>, 736b7e8f433SVinod Koul <0x0 0x17c22000 0x0 0x1000>; 737b7e8f433SVinod Koul }; 738b7e8f433SVinod Koul 739b7e8f433SVinod Koul frame@17c23000 { 740b7e8f433SVinod Koul frame-number = <1>; 741b7e8f433SVinod Koul interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 742b7e8f433SVinod Koul reg = <0x0 0x17c23000 0x0 0x1000>; 743b7e8f433SVinod Koul status = "disabled"; 744b7e8f433SVinod Koul }; 745b7e8f433SVinod Koul 746b7e8f433SVinod Koul frame@17c25000 { 747b7e8f433SVinod Koul frame-number = <2>; 748b7e8f433SVinod Koul interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 749b7e8f433SVinod Koul reg = <0x0 0x17c25000 0x0 0x1000>; 750b7e8f433SVinod Koul status = "disabled"; 751b7e8f433SVinod Koul }; 752b7e8f433SVinod Koul 753b7e8f433SVinod Koul frame@17c27000 { 754b7e8f433SVinod Koul frame-number = <3>; 755b7e8f433SVinod Koul interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 756b7e8f433SVinod Koul reg = <0x0 0x17c27000 0x0 0x1000>; 757b7e8f433SVinod Koul status = "disabled"; 758b7e8f433SVinod Koul }; 759b7e8f433SVinod Koul 760b7e8f433SVinod Koul frame@17c29000 { 761b7e8f433SVinod Koul frame-number = <4>; 762b7e8f433SVinod Koul interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 763b7e8f433SVinod Koul reg = <0x0 0x17c29000 0x0 0x1000>; 764b7e8f433SVinod Koul status = "disabled"; 765b7e8f433SVinod Koul }; 766b7e8f433SVinod Koul 767b7e8f433SVinod Koul frame@17c2b000 { 768b7e8f433SVinod Koul frame-number = <5>; 769b7e8f433SVinod Koul interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 770b7e8f433SVinod Koul reg = <0x0 0x17c2b000 0x0 0x1000>; 771b7e8f433SVinod Koul status = "disabled"; 772b7e8f433SVinod Koul }; 773b7e8f433SVinod Koul 774b7e8f433SVinod Koul frame@17c2d000 { 775b7e8f433SVinod Koul frame-number = <6>; 776b7e8f433SVinod Koul interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 777b7e8f433SVinod Koul reg = <0x0 0x17c2d000 0x0 0x1000>; 778b7e8f433SVinod Koul status = "disabled"; 779b7e8f433SVinod Koul }; 780b7e8f433SVinod Koul }; 781b7e8f433SVinod Koul 782b7e8f433SVinod Koul apps_rsc: rsc@18200000 { 783b7e8f433SVinod Koul label = "apps_rsc"; 784b7e8f433SVinod Koul compatible = "qcom,rpmh-rsc"; 785b7e8f433SVinod Koul reg = <0x0 0x18200000 0x0 0x10000>, 786b7e8f433SVinod Koul <0x0 0x18210000 0x0 0x10000>, 787b7e8f433SVinod Koul <0x0 0x18220000 0x0 0x10000>; 788b7e8f433SVinod Koul reg-names = "drv-0", "drv-1", "drv-2"; 789b7e8f433SVinod Koul interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 790b7e8f433SVinod Koul <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 791b7e8f433SVinod Koul <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 792b7e8f433SVinod Koul qcom,tcs-offset = <0xd00>; 793b7e8f433SVinod Koul qcom,drv-id = <2>; 794b7e8f433SVinod Koul qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, 795b7e8f433SVinod Koul <WAKE_TCS 3>, <CONTROL_TCS 1>; 796b7e8f433SVinod Koul 797b7e8f433SVinod Koul rpmhcc: clock-controller { 798b7e8f433SVinod Koul compatible = "qcom,sm8350-rpmh-clk"; 799b7e8f433SVinod Koul #clock-cells = <1>; 800b7e8f433SVinod Koul clock-names = "xo"; 801b7e8f433SVinod Koul clocks = <&xo_board>; 802b7e8f433SVinod Koul }; 803b7e8f433SVinod Koul 80490f57509SVinod Koul rpmhpd: power-controller { 80590f57509SVinod Koul compatible = "qcom,sm8350-rpmhpd"; 80690f57509SVinod Koul #power-domain-cells = <1>; 80790f57509SVinod Koul operating-points-v2 = <&rpmhpd_opp_table>; 80890f57509SVinod Koul 80990f57509SVinod Koul rpmhpd_opp_table: opp-table { 81090f57509SVinod Koul compatible = "operating-points-v2"; 81190f57509SVinod Koul 81290f57509SVinod Koul rpmhpd_opp_ret: opp1 { 81390f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 81490f57509SVinod Koul }; 81590f57509SVinod Koul 81690f57509SVinod Koul rpmhpd_opp_min_svs: opp2 { 81790f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 81890f57509SVinod Koul }; 81990f57509SVinod Koul 82090f57509SVinod Koul rpmhpd_opp_low_svs: opp3 { 82190f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 82290f57509SVinod Koul }; 82390f57509SVinod Koul 82490f57509SVinod Koul rpmhpd_opp_svs: opp4 { 82590f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 82690f57509SVinod Koul }; 82790f57509SVinod Koul 82890f57509SVinod Koul rpmhpd_opp_svs_l1: opp5 { 82990f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 83090f57509SVinod Koul }; 83190f57509SVinod Koul 83290f57509SVinod Koul rpmhpd_opp_nom: opp6 { 83390f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 83490f57509SVinod Koul }; 83590f57509SVinod Koul 83690f57509SVinod Koul rpmhpd_opp_nom_l1: opp7 { 83790f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 83890f57509SVinod Koul }; 83990f57509SVinod Koul 84090f57509SVinod Koul rpmhpd_opp_nom_l2: opp8 { 84190f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 84290f57509SVinod Koul }; 84390f57509SVinod Koul 84490f57509SVinod Koul rpmhpd_opp_turbo: opp9 { 84590f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 84690f57509SVinod Koul }; 84790f57509SVinod Koul 84890f57509SVinod Koul rpmhpd_opp_turbo_l1: opp10 { 84990f57509SVinod Koul opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 85090f57509SVinod Koul }; 85190f57509SVinod Koul }; 85290f57509SVinod Koul }; 853b7e8f433SVinod Koul }; 854e780fb31SJack Pham 855ccbb3abbSVinod Koul cpufreq_hw: cpufreq@18591000 { 856ccbb3abbSVinod Koul compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss"; 857ccbb3abbSVinod Koul reg = <0 0x18591000 0 0x1000>, 858ccbb3abbSVinod Koul <0 0x18592000 0 0x1000>, 859ccbb3abbSVinod Koul <0 0x18593000 0 0x1000>; 860ccbb3abbSVinod Koul reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; 861ccbb3abbSVinod Koul 862ccbb3abbSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; 863ccbb3abbSVinod Koul clock-names = "xo", "alternate"; 864ccbb3abbSVinod Koul 865ccbb3abbSVinod Koul #freq-domain-cells = <1>; 866ccbb3abbSVinod Koul }; 867ccbb3abbSVinod Koul 86859c7cf81SVinod Koul ufs_mem_hc: ufshc@1d84000 { 86959c7cf81SVinod Koul compatible = "qcom,sm8350-ufshc", "qcom,ufshc", 87059c7cf81SVinod Koul "jedec,ufs-2.0"; 87159c7cf81SVinod Koul reg = <0 0x01d84000 0 0x3000>; 87259c7cf81SVinod Koul interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; 87359c7cf81SVinod Koul phys = <&ufs_mem_phy_lanes>; 87459c7cf81SVinod Koul phy-names = "ufsphy"; 87559c7cf81SVinod Koul lanes-per-direction = <2>; 87659c7cf81SVinod Koul #reset-cells = <1>; 8776d91e201SVinod Koul resets = <&gcc GCC_UFS_PHY_BCR>; 87859c7cf81SVinod Koul reset-names = "rst"; 87959c7cf81SVinod Koul 8806d91e201SVinod Koul power-domains = <&gcc UFS_PHY_GDSC>; 88159c7cf81SVinod Koul 88259c7cf81SVinod Koul iommus = <&apps_smmu 0xe0 0x0>; 88359c7cf81SVinod Koul 88459c7cf81SVinod Koul clock-names = 88559c7cf81SVinod Koul "ref_clk", 88659c7cf81SVinod Koul "core_clk", 88759c7cf81SVinod Koul "bus_aggr_clk", 88859c7cf81SVinod Koul "iface_clk", 88959c7cf81SVinod Koul "core_clk_unipro", 89059c7cf81SVinod Koul "ref_clk", 89159c7cf81SVinod Koul "tx_lane0_sync_clk", 89259c7cf81SVinod Koul "rx_lane0_sync_clk", 89359c7cf81SVinod Koul "rx_lane1_sync_clk"; 89459c7cf81SVinod Koul clocks = 89559c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 8966d91e201SVinod Koul <&gcc GCC_UFS_PHY_AXI_CLK>, 8976d91e201SVinod Koul <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 8986d91e201SVinod Koul <&gcc GCC_UFS_PHY_AHB_CLK>, 8996d91e201SVinod Koul <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, 90059c7cf81SVinod Koul <&rpmhcc RPMH_CXO_CLK>, 9016d91e201SVinod Koul <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, 9026d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, 9036d91e201SVinod Koul <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; 90459c7cf81SVinod Koul freq-table-hz = 90559c7cf81SVinod Koul <75000000 300000000>, 90659c7cf81SVinod Koul <75000000 300000000>, 90759c7cf81SVinod Koul <0 0>, 90859c7cf81SVinod Koul <0 0>, 90959c7cf81SVinod Koul <75000000 300000000>, 91059c7cf81SVinod Koul <0 0>, 91159c7cf81SVinod Koul <0 0>, 91259c7cf81SVinod Koul <75000000 300000000>, 91359c7cf81SVinod Koul <75000000 300000000>; 91459c7cf81SVinod Koul status = "disabled"; 91559c7cf81SVinod Koul }; 91659c7cf81SVinod Koul 91759c7cf81SVinod Koul ufs_mem_phy: phy@1d87000 { 91859c7cf81SVinod Koul compatible = "qcom,sm8350-qmp-ufs-phy"; 91959c7cf81SVinod Koul reg = <0 0x01d87000 0 0xe10>; 92059c7cf81SVinod Koul #address-cells = <2>; 92159c7cf81SVinod Koul #size-cells = <2>; 92259c7cf81SVinod Koul #clock-cells = <1>; 92359c7cf81SVinod Koul ranges; 92459c7cf81SVinod Koul clock-names = "ref", 92559c7cf81SVinod Koul "ref_aux"; 92659c7cf81SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, 9276d91e201SVinod Koul <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; 92859c7cf81SVinod Koul 92959c7cf81SVinod Koul resets = <&ufs_mem_hc 0>; 93059c7cf81SVinod Koul reset-names = "ufsphy"; 93159c7cf81SVinod Koul status = "disabled"; 93259c7cf81SVinod Koul 93359c7cf81SVinod Koul ufs_mem_phy_lanes: lanes@1d87400 { 93459c7cf81SVinod Koul reg = <0 0x01d87400 0 0x108>, 93559c7cf81SVinod Koul <0 0x01d87600 0 0x1e0>, 93659c7cf81SVinod Koul <0 0x01d87c00 0 0x1dc>, 93759c7cf81SVinod Koul <0 0x01d87800 0 0x108>, 93859c7cf81SVinod Koul <0 0x01d87a00 0 0x1e0>; 93959c7cf81SVinod Koul #phy-cells = <0>; 94059c7cf81SVinod Koul #clock-cells = <0>; 94159c7cf81SVinod Koul }; 94259c7cf81SVinod Koul }; 94359c7cf81SVinod Koul 944177fcf0aSVinod Koul slpi: remoteproc@5c00000 { 945177fcf0aSVinod Koul compatible = "qcom,sm8350-slpi-pas"; 946177fcf0aSVinod Koul reg = <0 0x05c00000 0 0x4000>; 947177fcf0aSVinod Koul 948177fcf0aSVinod Koul interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, 949177fcf0aSVinod Koul <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, 950177fcf0aSVinod Koul <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, 951177fcf0aSVinod Koul <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, 952177fcf0aSVinod Koul <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; 953177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 954177fcf0aSVinod Koul "handover", "stop-ack"; 955177fcf0aSVinod Koul 956177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 957177fcf0aSVinod Koul clock-names = "xo"; 958177fcf0aSVinod Koul 959177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, 960177fcf0aSVinod Koul <&rpmhpd 4>, 961177fcf0aSVinod Koul <&rpmhpd 5>; 962177fcf0aSVinod Koul power-domain-names = "load_state", "lcx", "lmx"; 963177fcf0aSVinod Koul 964177fcf0aSVinod Koul memory-region = <&pil_slpi_mem>; 965177fcf0aSVinod Koul 966177fcf0aSVinod Koul qcom,smem-states = <&smp2p_slpi_out 0>; 967177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 968177fcf0aSVinod Koul 969177fcf0aSVinod Koul status = "disabled"; 970177fcf0aSVinod Koul 971177fcf0aSVinod Koul glink-edge { 972177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_SLPI 973177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 974177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 975177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_SLPI 976177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 977177fcf0aSVinod Koul 978177fcf0aSVinod Koul label = "slpi"; 979177fcf0aSVinod Koul qcom,remote-pid = <3>; 980177fcf0aSVinod Koul 981177fcf0aSVinod Koul }; 982177fcf0aSVinod Koul }; 983177fcf0aSVinod Koul 984177fcf0aSVinod Koul cdsp: remoteproc@98900000 { 985177fcf0aSVinod Koul compatible = "qcom,sm8350-cdsp-pas"; 986177fcf0aSVinod Koul reg = <0 0x098900000 0 0x1400000>; 987177fcf0aSVinod Koul 988177fcf0aSVinod Koul interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, 989177fcf0aSVinod Koul <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, 990177fcf0aSVinod Koul <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, 991177fcf0aSVinod Koul <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, 992177fcf0aSVinod Koul <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; 993177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 994177fcf0aSVinod Koul "handover", "stop-ack"; 995177fcf0aSVinod Koul 996177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 997177fcf0aSVinod Koul clock-names = "xo"; 998177fcf0aSVinod Koul 999177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, 1000177fcf0aSVinod Koul <&rpmhpd 0>, 1001177fcf0aSVinod Koul <&rpmhpd 10>; 1002177fcf0aSVinod Koul power-domain-names = "load_state", "cx", "mxc"; 1003177fcf0aSVinod Koul 1004177fcf0aSVinod Koul memory-region = <&pil_cdsp_mem>; 1005177fcf0aSVinod Koul 1006177fcf0aSVinod Koul qcom,smem-states = <&smp2p_cdsp_out 0>; 1007177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1008177fcf0aSVinod Koul 1009177fcf0aSVinod Koul status = "disabled"; 1010177fcf0aSVinod Koul 1011177fcf0aSVinod Koul glink-edge { 1012177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_CDSP 1013177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1014177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1015177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_CDSP 1016177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1017177fcf0aSVinod Koul 1018177fcf0aSVinod Koul label = "cdsp"; 1019177fcf0aSVinod Koul qcom,remote-pid = <5>; 1020177fcf0aSVinod Koul }; 1021177fcf0aSVinod Koul }; 1022177fcf0aSVinod Koul 1023e780fb31SJack Pham usb_1_hsphy: phy@88e3000 { 1024e780fb31SJack Pham compatible = "qcom,sm8350-usb-hs-phy", 1025e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 1026e780fb31SJack Pham reg = <0 0x088e3000 0 0x400>; 1027e780fb31SJack Pham status = "disabled"; 1028e780fb31SJack Pham #phy-cells = <0>; 1029e780fb31SJack Pham 1030e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 1031e780fb31SJack Pham clock-names = "ref"; 1032e780fb31SJack Pham 10336d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 1034e780fb31SJack Pham }; 1035e780fb31SJack Pham 1036e780fb31SJack Pham usb_2_hsphy: phy@88e4000 { 1037e780fb31SJack Pham compatible = "qcom,sm8250-usb-hs-phy", 1038e780fb31SJack Pham "qcom,usb-snps-hs-7nm-phy"; 1039e780fb31SJack Pham reg = <0 0x088e4000 0 0x400>; 1040e780fb31SJack Pham status = "disabled"; 1041e780fb31SJack Pham #phy-cells = <0>; 1042e780fb31SJack Pham 1043e780fb31SJack Pham clocks = <&rpmhcc RPMH_CXO_CLK>; 1044e780fb31SJack Pham clock-names = "ref"; 1045e780fb31SJack Pham 10466d91e201SVinod Koul resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; 1047e780fb31SJack Pham }; 1048e780fb31SJack Pham 1049e780fb31SJack Pham usb_1_qmpphy: phy-wrapper@88e9000 { 1050e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-phy"; 1051e780fb31SJack Pham reg = <0 0x088e9000 0 0x200>, 1052e780fb31SJack Pham <0 0x088e8000 0 0x20>; 1053e780fb31SJack Pham reg-names = "reg-base", "dp_com"; 1054e780fb31SJack Pham status = "disabled"; 1055e780fb31SJack Pham #clock-cells = <1>; 1056e780fb31SJack Pham #address-cells = <2>; 1057e780fb31SJack Pham #size-cells = <2>; 1058e780fb31SJack Pham ranges; 1059e780fb31SJack Pham 10606d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 1061e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 10626d91e201SVinod Koul <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 1063e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "com_aux"; 1064e780fb31SJack Pham 10656d91e201SVinod Koul resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 10666d91e201SVinod Koul <&gcc GCC_USB3_PHY_PRIM_BCR>; 1067e780fb31SJack Pham reset-names = "phy", "common"; 1068e780fb31SJack Pham 1069e780fb31SJack Pham usb_1_ssphy: phy@88e9200 { 1070e780fb31SJack Pham reg = <0 0x088e9200 0 0x200>, 1071e780fb31SJack Pham <0 0x088e9400 0 0x200>, 1072e780fb31SJack Pham <0 0x088e9c00 0 0x400>, 1073e780fb31SJack Pham <0 0x088e9600 0 0x200>, 1074e780fb31SJack Pham <0 0x088e9800 0 0x200>, 1075e780fb31SJack Pham <0 0x088e9a00 0 0x100>; 1076e780fb31SJack Pham #phy-cells = <0>; 1077e780fb31SJack Pham #clock-cells = <1>; 10786d91e201SVinod Koul clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 1079e780fb31SJack Pham clock-names = "pipe0"; 1080e780fb31SJack Pham clock-output-names = "usb3_phy_pipe_clk_src"; 1081e780fb31SJack Pham }; 1082e780fb31SJack Pham }; 1083e780fb31SJack Pham 1084e780fb31SJack Pham usb_2_qmpphy: phy-wrapper@88eb000 { 1085e780fb31SJack Pham compatible = "qcom,sm8350-qmp-usb3-uni-phy"; 1086e780fb31SJack Pham reg = <0 0x088eb000 0 0x200>; 1087e780fb31SJack Pham status = "disabled"; 1088e780fb31SJack Pham #clock-cells = <1>; 1089e780fb31SJack Pham #address-cells = <2>; 1090e780fb31SJack Pham #size-cells = <2>; 1091e780fb31SJack Pham ranges; 1092e780fb31SJack Pham 10936d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, 1094e780fb31SJack Pham <&rpmhcc RPMH_CXO_CLK>, 10956d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>, 10966d91e201SVinod Koul <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; 1097e780fb31SJack Pham clock-names = "aux", "ref_clk_src", "ref", "com_aux"; 1098e780fb31SJack Pham 10996d91e201SVinod Koul resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, 11006d91e201SVinod Koul <&gcc GCC_USB3_PHY_SEC_BCR>; 1101e780fb31SJack Pham reset-names = "phy", "common"; 1102e780fb31SJack Pham 1103e780fb31SJack Pham usb_2_ssphy: phy@88ebe00 { 1104e780fb31SJack Pham reg = <0 0x088ebe00 0 0x200>, 1105e780fb31SJack Pham <0 0x088ec000 0 0x200>, 1106e780fb31SJack Pham <0 0x088eb200 0 0x1100>; 1107e780fb31SJack Pham #phy-cells = <0>; 1108e780fb31SJack Pham #clock-cells = <1>; 11096d91e201SVinod Koul clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; 1110e780fb31SJack Pham clock-names = "pipe0"; 1111e780fb31SJack Pham clock-output-names = "usb3_uni_phy_pipe_clk_src"; 1112e780fb31SJack Pham }; 1113e780fb31SJack Pham }; 1114e780fb31SJack Pham 1115e780fb31SJack Pham usb_1: usb@a6f8800 { 1116e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 1117e780fb31SJack Pham reg = <0 0x0a6f8800 0 0x400>; 1118e780fb31SJack Pham status = "disabled"; 1119e780fb31SJack Pham #address-cells = <2>; 1120e780fb31SJack Pham #size-cells = <2>; 1121e780fb31SJack Pham ranges; 1122e780fb31SJack Pham 11236d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 11246d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>, 11256d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 11266d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 11276d91e201SVinod Koul <&gcc GCC_USB30_PRIM_SLEEP_CLK>; 1128e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 1129e780fb31SJack Pham "sleep"; 1130e780fb31SJack Pham 11316d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 11326d91e201SVinod Koul <&gcc GCC_USB30_PRIM_MASTER_CLK>; 1133e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 1134e780fb31SJack Pham 1135e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 1136e780fb31SJack Pham <&pdc 14 IRQ_TYPE_EDGE_BOTH>, 1137e780fb31SJack Pham <&pdc 15 IRQ_TYPE_EDGE_BOTH>, 1138e780fb31SJack Pham <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; 1139e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 1140e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 1141e780fb31SJack Pham 11426d91e201SVinod Koul power-domains = <&gcc USB30_PRIM_GDSC>; 1143e780fb31SJack Pham 11446d91e201SVinod Koul resets = <&gcc GCC_USB30_PRIM_BCR>; 1145e780fb31SJack Pham 1146e780fb31SJack Pham usb_1_dwc3: dwc3@a600000 { 1147e780fb31SJack Pham compatible = "snps,dwc3"; 1148e780fb31SJack Pham reg = <0 0x0a600000 0 0xcd00>; 1149e780fb31SJack Pham interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 1150e780fb31SJack Pham iommus = <&apps_smmu 0x0 0x0>; 1151e780fb31SJack Pham snps,dis_u2_susphy_quirk; 1152e780fb31SJack Pham snps,dis_enblslpm_quirk; 1153e780fb31SJack Pham phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 1154e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 1155e780fb31SJack Pham }; 1156e780fb31SJack Pham }; 1157e780fb31SJack Pham 1158e780fb31SJack Pham usb_2: usb@a8f8800 { 1159e780fb31SJack Pham compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; 1160e780fb31SJack Pham reg = <0 0x0a8f8800 0 0x400>; 1161e780fb31SJack Pham status = "disabled"; 1162e780fb31SJack Pham #address-cells = <2>; 1163e780fb31SJack Pham #size-cells = <2>; 1164e780fb31SJack Pham ranges; 1165e780fb31SJack Pham 11666d91e201SVinod Koul clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, 11676d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>, 11686d91e201SVinod Koul <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, 11696d91e201SVinod Koul <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 11706d91e201SVinod Koul <&gcc GCC_USB30_SEC_SLEEP_CLK>, 11716d91e201SVinod Koul <&gcc GCC_USB3_SEC_CLKREF_EN>; 1172e780fb31SJack Pham clock-names = "cfg_noc", "core", "iface", "mock_utmi", 1173e780fb31SJack Pham "sleep", "xo"; 1174e780fb31SJack Pham 11756d91e201SVinod Koul assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, 11766d91e201SVinod Koul <&gcc GCC_USB30_SEC_MASTER_CLK>; 1177e780fb31SJack Pham assigned-clock-rates = <19200000>, <200000000>; 1178e780fb31SJack Pham 1179e780fb31SJack Pham interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 1180e780fb31SJack Pham <&pdc 12 IRQ_TYPE_EDGE_BOTH>, 1181e780fb31SJack Pham <&pdc 13 IRQ_TYPE_EDGE_BOTH>, 1182e780fb31SJack Pham <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; 1183e780fb31SJack Pham interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", 1184e780fb31SJack Pham "dm_hs_phy_irq", "ss_phy_irq"; 1185e780fb31SJack Pham 11866d91e201SVinod Koul power-domains = <&gcc USB30_SEC_GDSC>; 1187e780fb31SJack Pham 11886d91e201SVinod Koul resets = <&gcc GCC_USB30_SEC_BCR>; 1189e780fb31SJack Pham 1190e780fb31SJack Pham usb_2_dwc3: dwc3@a800000 { 1191e780fb31SJack Pham compatible = "snps,dwc3"; 1192e780fb31SJack Pham reg = <0 0x0a800000 0 0xcd00>; 1193e780fb31SJack Pham interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 1194e780fb31SJack Pham iommus = <&apps_smmu 0x20 0x0>; 1195e780fb31SJack Pham snps,dis_u2_susphy_quirk; 1196e780fb31SJack Pham snps,dis_enblslpm_quirk; 1197e780fb31SJack Pham phys = <&usb_2_hsphy>, <&usb_2_ssphy>; 1198e780fb31SJack Pham phy-names = "usb2-phy", "usb3-phy"; 1199e780fb31SJack Pham }; 1200e780fb31SJack Pham }; 1201177fcf0aSVinod Koul 1202177fcf0aSVinod Koul adsp: remoteproc@17300000 { 1203177fcf0aSVinod Koul compatible = "qcom,sm8350-adsp-pas"; 1204177fcf0aSVinod Koul reg = <0 0x17300000 0 0x100>; 1205177fcf0aSVinod Koul 1206177fcf0aSVinod Koul interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 1207177fcf0aSVinod Koul <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 1208177fcf0aSVinod Koul <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 1209177fcf0aSVinod Koul <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 1210177fcf0aSVinod Koul <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 1211177fcf0aSVinod Koul interrupt-names = "wdog", "fatal", "ready", 1212177fcf0aSVinod Koul "handover", "stop-ack"; 1213177fcf0aSVinod Koul 1214177fcf0aSVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>; 1215177fcf0aSVinod Koul clock-names = "xo"; 1216177fcf0aSVinod Koul 1217177fcf0aSVinod Koul power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, 1218177fcf0aSVinod Koul <&rpmhpd 4>, 1219177fcf0aSVinod Koul <&rpmhpd 5>; 1220177fcf0aSVinod Koul power-domain-names = "load_state", "lcx", "lmx"; 1221177fcf0aSVinod Koul 1222177fcf0aSVinod Koul memory-region = <&pil_adsp_mem>; 1223177fcf0aSVinod Koul 1224177fcf0aSVinod Koul qcom,smem-states = <&smp2p_adsp_out 0>; 1225177fcf0aSVinod Koul qcom,smem-state-names = "stop"; 1226177fcf0aSVinod Koul 1227177fcf0aSVinod Koul status = "disabled"; 1228177fcf0aSVinod Koul 1229177fcf0aSVinod Koul glink-edge { 1230177fcf0aSVinod Koul interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 1231177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP 1232177fcf0aSVinod Koul IRQ_TYPE_EDGE_RISING>; 1233177fcf0aSVinod Koul mboxes = <&ipcc IPCC_CLIENT_LPASS 1234177fcf0aSVinod Koul IPCC_MPROC_SIGNAL_GLINK_QMP>; 1235177fcf0aSVinod Koul 1236177fcf0aSVinod Koul label = "lpass"; 1237177fcf0aSVinod Koul qcom,remote-pid = <2>; 1238177fcf0aSVinod Koul }; 1239177fcf0aSVinod Koul }; 1240b7e8f433SVinod Koul }; 1241b7e8f433SVinod Koul 124220f9d94eSRobert Foss thermal-zones { 124320f9d94eSRobert Foss cpu0-thermal { 124420f9d94eSRobert Foss polling-delay-passive = <250>; 124520f9d94eSRobert Foss polling-delay = <1000>; 124620f9d94eSRobert Foss 124720f9d94eSRobert Foss thermal-sensors = <&tsens0 1>; 124820f9d94eSRobert Foss 124920f9d94eSRobert Foss trips { 125020f9d94eSRobert Foss cpu0_alert0: trip-point0 { 125120f9d94eSRobert Foss temperature = <90000>; 125220f9d94eSRobert Foss hysteresis = <2000>; 125320f9d94eSRobert Foss type = "passive"; 125420f9d94eSRobert Foss }; 125520f9d94eSRobert Foss 125620f9d94eSRobert Foss cpu0_alert1: trip-point1 { 125720f9d94eSRobert Foss temperature = <95000>; 125820f9d94eSRobert Foss hysteresis = <2000>; 125920f9d94eSRobert Foss type = "passive"; 126020f9d94eSRobert Foss }; 126120f9d94eSRobert Foss 126220f9d94eSRobert Foss cpu0_crit: cpu_crit { 126320f9d94eSRobert Foss temperature = <110000>; 126420f9d94eSRobert Foss hysteresis = <1000>; 126520f9d94eSRobert Foss type = "critical"; 126620f9d94eSRobert Foss }; 126720f9d94eSRobert Foss }; 126820f9d94eSRobert Foss 126920f9d94eSRobert Foss cooling-maps { 127020f9d94eSRobert Foss map0 { 127120f9d94eSRobert Foss trip = <&cpu0_alert0>; 127220f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 127320f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 127420f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 127520f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 127620f9d94eSRobert Foss }; 127720f9d94eSRobert Foss map1 { 127820f9d94eSRobert Foss trip = <&cpu0_alert1>; 127920f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 128020f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 128120f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 128220f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 128320f9d94eSRobert Foss }; 128420f9d94eSRobert Foss }; 128520f9d94eSRobert Foss }; 128620f9d94eSRobert Foss 128720f9d94eSRobert Foss cpu1-thermal { 128820f9d94eSRobert Foss polling-delay-passive = <250>; 128920f9d94eSRobert Foss polling-delay = <1000>; 129020f9d94eSRobert Foss 129120f9d94eSRobert Foss thermal-sensors = <&tsens0 2>; 129220f9d94eSRobert Foss 129320f9d94eSRobert Foss trips { 129420f9d94eSRobert Foss cpu1_alert0: trip-point0 { 129520f9d94eSRobert Foss temperature = <90000>; 129620f9d94eSRobert Foss hysteresis = <2000>; 129720f9d94eSRobert Foss type = "passive"; 129820f9d94eSRobert Foss }; 129920f9d94eSRobert Foss 130020f9d94eSRobert Foss cpu1_alert1: trip-point1 { 130120f9d94eSRobert Foss temperature = <95000>; 130220f9d94eSRobert Foss hysteresis = <2000>; 130320f9d94eSRobert Foss type = "passive"; 130420f9d94eSRobert Foss }; 130520f9d94eSRobert Foss 130620f9d94eSRobert Foss cpu1_crit: cpu_crit { 130720f9d94eSRobert Foss temperature = <110000>; 130820f9d94eSRobert Foss hysteresis = <1000>; 130920f9d94eSRobert Foss type = "critical"; 131020f9d94eSRobert Foss }; 131120f9d94eSRobert Foss }; 131220f9d94eSRobert Foss 131320f9d94eSRobert Foss cooling-maps { 131420f9d94eSRobert Foss map0 { 131520f9d94eSRobert Foss trip = <&cpu1_alert0>; 131620f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 131720f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 131820f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 131920f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 132020f9d94eSRobert Foss }; 132120f9d94eSRobert Foss map1 { 132220f9d94eSRobert Foss trip = <&cpu1_alert1>; 132320f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 132420f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 132520f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 132620f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 132720f9d94eSRobert Foss }; 132820f9d94eSRobert Foss }; 132920f9d94eSRobert Foss }; 133020f9d94eSRobert Foss 133120f9d94eSRobert Foss cpu2-thermal { 133220f9d94eSRobert Foss polling-delay-passive = <250>; 133320f9d94eSRobert Foss polling-delay = <1000>; 133420f9d94eSRobert Foss 133520f9d94eSRobert Foss thermal-sensors = <&tsens0 3>; 133620f9d94eSRobert Foss 133720f9d94eSRobert Foss trips { 133820f9d94eSRobert Foss cpu2_alert0: trip-point0 { 133920f9d94eSRobert Foss temperature = <90000>; 134020f9d94eSRobert Foss hysteresis = <2000>; 134120f9d94eSRobert Foss type = "passive"; 134220f9d94eSRobert Foss }; 134320f9d94eSRobert Foss 134420f9d94eSRobert Foss cpu2_alert1: trip-point1 { 134520f9d94eSRobert Foss temperature = <95000>; 134620f9d94eSRobert Foss hysteresis = <2000>; 134720f9d94eSRobert Foss type = "passive"; 134820f9d94eSRobert Foss }; 134920f9d94eSRobert Foss 135020f9d94eSRobert Foss cpu2_crit: cpu_crit { 135120f9d94eSRobert Foss temperature = <110000>; 135220f9d94eSRobert Foss hysteresis = <1000>; 135320f9d94eSRobert Foss type = "critical"; 135420f9d94eSRobert Foss }; 135520f9d94eSRobert Foss }; 135620f9d94eSRobert Foss 135720f9d94eSRobert Foss cooling-maps { 135820f9d94eSRobert Foss map0 { 135920f9d94eSRobert Foss trip = <&cpu2_alert0>; 136020f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 136120f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 136220f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 136320f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 136420f9d94eSRobert Foss }; 136520f9d94eSRobert Foss map1 { 136620f9d94eSRobert Foss trip = <&cpu2_alert1>; 136720f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 136820f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 136920f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 137020f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 137120f9d94eSRobert Foss }; 137220f9d94eSRobert Foss }; 137320f9d94eSRobert Foss }; 137420f9d94eSRobert Foss 137520f9d94eSRobert Foss cpu3-thermal { 137620f9d94eSRobert Foss polling-delay-passive = <250>; 137720f9d94eSRobert Foss polling-delay = <1000>; 137820f9d94eSRobert Foss 137920f9d94eSRobert Foss thermal-sensors = <&tsens0 4>; 138020f9d94eSRobert Foss 138120f9d94eSRobert Foss trips { 138220f9d94eSRobert Foss cpu3_alert0: trip-point0 { 138320f9d94eSRobert Foss temperature = <90000>; 138420f9d94eSRobert Foss hysteresis = <2000>; 138520f9d94eSRobert Foss type = "passive"; 138620f9d94eSRobert Foss }; 138720f9d94eSRobert Foss 138820f9d94eSRobert Foss cpu3_alert1: trip-point1 { 138920f9d94eSRobert Foss temperature = <95000>; 139020f9d94eSRobert Foss hysteresis = <2000>; 139120f9d94eSRobert Foss type = "passive"; 139220f9d94eSRobert Foss }; 139320f9d94eSRobert Foss 139420f9d94eSRobert Foss cpu3_crit: cpu_crit { 139520f9d94eSRobert Foss temperature = <110000>; 139620f9d94eSRobert Foss hysteresis = <1000>; 139720f9d94eSRobert Foss type = "critical"; 139820f9d94eSRobert Foss }; 139920f9d94eSRobert Foss }; 140020f9d94eSRobert Foss 140120f9d94eSRobert Foss cooling-maps { 140220f9d94eSRobert Foss map0 { 140320f9d94eSRobert Foss trip = <&cpu3_alert0>; 140420f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 140520f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 140620f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 140720f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 140820f9d94eSRobert Foss }; 140920f9d94eSRobert Foss map1 { 141020f9d94eSRobert Foss trip = <&cpu3_alert1>; 141120f9d94eSRobert Foss cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 141220f9d94eSRobert Foss <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 141320f9d94eSRobert Foss <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 141420f9d94eSRobert Foss <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 141520f9d94eSRobert Foss }; 141620f9d94eSRobert Foss }; 141720f9d94eSRobert Foss }; 141820f9d94eSRobert Foss 141920f9d94eSRobert Foss cpu4-top-thermal { 142020f9d94eSRobert Foss polling-delay-passive = <250>; 142120f9d94eSRobert Foss polling-delay = <1000>; 142220f9d94eSRobert Foss 142320f9d94eSRobert Foss thermal-sensors = <&tsens0 7>; 142420f9d94eSRobert Foss 142520f9d94eSRobert Foss trips { 142620f9d94eSRobert Foss cpu4_top_alert0: trip-point0 { 142720f9d94eSRobert Foss temperature = <90000>; 142820f9d94eSRobert Foss hysteresis = <2000>; 142920f9d94eSRobert Foss type = "passive"; 143020f9d94eSRobert Foss }; 143120f9d94eSRobert Foss 143220f9d94eSRobert Foss cpu4_top_alert1: trip-point1 { 143320f9d94eSRobert Foss temperature = <95000>; 143420f9d94eSRobert Foss hysteresis = <2000>; 143520f9d94eSRobert Foss type = "passive"; 143620f9d94eSRobert Foss }; 143720f9d94eSRobert Foss 143820f9d94eSRobert Foss cpu4_top_crit: cpu_crit { 143920f9d94eSRobert Foss temperature = <110000>; 144020f9d94eSRobert Foss hysteresis = <1000>; 144120f9d94eSRobert Foss type = "critical"; 144220f9d94eSRobert Foss }; 144320f9d94eSRobert Foss }; 144420f9d94eSRobert Foss 144520f9d94eSRobert Foss cooling-maps { 144620f9d94eSRobert Foss map0 { 144720f9d94eSRobert Foss trip = <&cpu4_top_alert0>; 144820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 144920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 145220f9d94eSRobert Foss }; 145320f9d94eSRobert Foss map1 { 145420f9d94eSRobert Foss trip = <&cpu4_top_alert1>; 145520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 145820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 145920f9d94eSRobert Foss }; 146020f9d94eSRobert Foss }; 146120f9d94eSRobert Foss }; 146220f9d94eSRobert Foss 146320f9d94eSRobert Foss cpu5-top-thermal { 146420f9d94eSRobert Foss polling-delay-passive = <250>; 146520f9d94eSRobert Foss polling-delay = <1000>; 146620f9d94eSRobert Foss 146720f9d94eSRobert Foss thermal-sensors = <&tsens0 8>; 146820f9d94eSRobert Foss 146920f9d94eSRobert Foss trips { 147020f9d94eSRobert Foss cpu5_top_alert0: trip-point0 { 147120f9d94eSRobert Foss temperature = <90000>; 147220f9d94eSRobert Foss hysteresis = <2000>; 147320f9d94eSRobert Foss type = "passive"; 147420f9d94eSRobert Foss }; 147520f9d94eSRobert Foss 147620f9d94eSRobert Foss cpu5_top_alert1: trip-point1 { 147720f9d94eSRobert Foss temperature = <95000>; 147820f9d94eSRobert Foss hysteresis = <2000>; 147920f9d94eSRobert Foss type = "passive"; 148020f9d94eSRobert Foss }; 148120f9d94eSRobert Foss 148220f9d94eSRobert Foss cpu5_top_crit: cpu_crit { 148320f9d94eSRobert Foss temperature = <110000>; 148420f9d94eSRobert Foss hysteresis = <1000>; 148520f9d94eSRobert Foss type = "critical"; 148620f9d94eSRobert Foss }; 148720f9d94eSRobert Foss }; 148820f9d94eSRobert Foss 148920f9d94eSRobert Foss cooling-maps { 149020f9d94eSRobert Foss map0 { 149120f9d94eSRobert Foss trip = <&cpu5_top_alert0>; 149220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 149620f9d94eSRobert Foss }; 149720f9d94eSRobert Foss map1 { 149820f9d94eSRobert Foss trip = <&cpu5_top_alert1>; 149920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 150020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 150120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 150220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 150320f9d94eSRobert Foss }; 150420f9d94eSRobert Foss }; 150520f9d94eSRobert Foss }; 150620f9d94eSRobert Foss 150720f9d94eSRobert Foss cpu6-top-thermal { 150820f9d94eSRobert Foss polling-delay-passive = <250>; 150920f9d94eSRobert Foss polling-delay = <1000>; 151020f9d94eSRobert Foss 151120f9d94eSRobert Foss thermal-sensors = <&tsens0 9>; 151220f9d94eSRobert Foss 151320f9d94eSRobert Foss trips { 151420f9d94eSRobert Foss cpu6_top_alert0: trip-point0 { 151520f9d94eSRobert Foss temperature = <90000>; 151620f9d94eSRobert Foss hysteresis = <2000>; 151720f9d94eSRobert Foss type = "passive"; 151820f9d94eSRobert Foss }; 151920f9d94eSRobert Foss 152020f9d94eSRobert Foss cpu6_top_alert1: trip-point1 { 152120f9d94eSRobert Foss temperature = <95000>; 152220f9d94eSRobert Foss hysteresis = <2000>; 152320f9d94eSRobert Foss type = "passive"; 152420f9d94eSRobert Foss }; 152520f9d94eSRobert Foss 152620f9d94eSRobert Foss cpu6_top_crit: cpu_crit { 152720f9d94eSRobert Foss temperature = <110000>; 152820f9d94eSRobert Foss hysteresis = <1000>; 152920f9d94eSRobert Foss type = "critical"; 153020f9d94eSRobert Foss }; 153120f9d94eSRobert Foss }; 153220f9d94eSRobert Foss 153320f9d94eSRobert Foss cooling-maps { 153420f9d94eSRobert Foss map0 { 153520f9d94eSRobert Foss trip = <&cpu6_top_alert0>; 153620f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153720f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153820f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153920f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 154020f9d94eSRobert Foss }; 154120f9d94eSRobert Foss map1 { 154220f9d94eSRobert Foss trip = <&cpu6_top_alert1>; 154320f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 154420f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 154520f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 154620f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 154720f9d94eSRobert Foss }; 154820f9d94eSRobert Foss }; 154920f9d94eSRobert Foss }; 155020f9d94eSRobert Foss 155120f9d94eSRobert Foss cpu7-top-thermal { 155220f9d94eSRobert Foss polling-delay-passive = <250>; 155320f9d94eSRobert Foss polling-delay = <1000>; 155420f9d94eSRobert Foss 155520f9d94eSRobert Foss thermal-sensors = <&tsens0 10>; 155620f9d94eSRobert Foss 155720f9d94eSRobert Foss trips { 155820f9d94eSRobert Foss cpu7_top_alert0: trip-point0 { 155920f9d94eSRobert Foss temperature = <90000>; 156020f9d94eSRobert Foss hysteresis = <2000>; 156120f9d94eSRobert Foss type = "passive"; 156220f9d94eSRobert Foss }; 156320f9d94eSRobert Foss 156420f9d94eSRobert Foss cpu7_top_alert1: trip-point1 { 156520f9d94eSRobert Foss temperature = <95000>; 156620f9d94eSRobert Foss hysteresis = <2000>; 156720f9d94eSRobert Foss type = "passive"; 156820f9d94eSRobert Foss }; 156920f9d94eSRobert Foss 157020f9d94eSRobert Foss cpu7_top_crit: cpu_crit { 157120f9d94eSRobert Foss temperature = <110000>; 157220f9d94eSRobert Foss hysteresis = <1000>; 157320f9d94eSRobert Foss type = "critical"; 157420f9d94eSRobert Foss }; 157520f9d94eSRobert Foss }; 157620f9d94eSRobert Foss 157720f9d94eSRobert Foss cooling-maps { 157820f9d94eSRobert Foss map0 { 157920f9d94eSRobert Foss trip = <&cpu7_top_alert0>; 158020f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158120f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158220f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158320f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 158420f9d94eSRobert Foss }; 158520f9d94eSRobert Foss map1 { 158620f9d94eSRobert Foss trip = <&cpu7_top_alert1>; 158720f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158820f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 158920f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 159020f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 159120f9d94eSRobert Foss }; 159220f9d94eSRobert Foss }; 159320f9d94eSRobert Foss }; 159420f9d94eSRobert Foss 159520f9d94eSRobert Foss cpu4-bottom-thermal { 159620f9d94eSRobert Foss polling-delay-passive = <250>; 159720f9d94eSRobert Foss polling-delay = <1000>; 159820f9d94eSRobert Foss 159920f9d94eSRobert Foss thermal-sensors = <&tsens0 11>; 160020f9d94eSRobert Foss 160120f9d94eSRobert Foss trips { 160220f9d94eSRobert Foss cpu4_bottom_alert0: trip-point0 { 160320f9d94eSRobert Foss temperature = <90000>; 160420f9d94eSRobert Foss hysteresis = <2000>; 160520f9d94eSRobert Foss type = "passive"; 160620f9d94eSRobert Foss }; 160720f9d94eSRobert Foss 160820f9d94eSRobert Foss cpu4_bottom_alert1: trip-point1 { 160920f9d94eSRobert Foss temperature = <95000>; 161020f9d94eSRobert Foss hysteresis = <2000>; 161120f9d94eSRobert Foss type = "passive"; 161220f9d94eSRobert Foss }; 161320f9d94eSRobert Foss 161420f9d94eSRobert Foss cpu4_bottom_crit: cpu_crit { 161520f9d94eSRobert Foss temperature = <110000>; 161620f9d94eSRobert Foss hysteresis = <1000>; 161720f9d94eSRobert Foss type = "critical"; 161820f9d94eSRobert Foss }; 161920f9d94eSRobert Foss }; 162020f9d94eSRobert Foss 162120f9d94eSRobert Foss cooling-maps { 162220f9d94eSRobert Foss map0 { 162320f9d94eSRobert Foss trip = <&cpu4_bottom_alert0>; 162420f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162520f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162620f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162720f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 162820f9d94eSRobert Foss }; 162920f9d94eSRobert Foss map1 { 163020f9d94eSRobert Foss trip = <&cpu4_bottom_alert1>; 163120f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 163220f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 163320f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 163420f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 163520f9d94eSRobert Foss }; 163620f9d94eSRobert Foss }; 163720f9d94eSRobert Foss }; 163820f9d94eSRobert Foss 163920f9d94eSRobert Foss cpu5-bottom-thermal { 164020f9d94eSRobert Foss polling-delay-passive = <250>; 164120f9d94eSRobert Foss polling-delay = <1000>; 164220f9d94eSRobert Foss 164320f9d94eSRobert Foss thermal-sensors = <&tsens0 12>; 164420f9d94eSRobert Foss 164520f9d94eSRobert Foss trips { 164620f9d94eSRobert Foss cpu5_bottom_alert0: trip-point0 { 164720f9d94eSRobert Foss temperature = <90000>; 164820f9d94eSRobert Foss hysteresis = <2000>; 164920f9d94eSRobert Foss type = "passive"; 165020f9d94eSRobert Foss }; 165120f9d94eSRobert Foss 165220f9d94eSRobert Foss cpu5_bottom_alert1: trip-point1 { 165320f9d94eSRobert Foss temperature = <95000>; 165420f9d94eSRobert Foss hysteresis = <2000>; 165520f9d94eSRobert Foss type = "passive"; 165620f9d94eSRobert Foss }; 165720f9d94eSRobert Foss 165820f9d94eSRobert Foss cpu5_bottom_crit: cpu_crit { 165920f9d94eSRobert Foss temperature = <110000>; 166020f9d94eSRobert Foss hysteresis = <1000>; 166120f9d94eSRobert Foss type = "critical"; 166220f9d94eSRobert Foss }; 166320f9d94eSRobert Foss }; 166420f9d94eSRobert Foss 166520f9d94eSRobert Foss cooling-maps { 166620f9d94eSRobert Foss map0 { 166720f9d94eSRobert Foss trip = <&cpu5_bottom_alert0>; 166820f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 166920f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167020f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167120f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 167220f9d94eSRobert Foss }; 167320f9d94eSRobert Foss map1 { 167420f9d94eSRobert Foss trip = <&cpu5_bottom_alert1>; 167520f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167620f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167720f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 167820f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 167920f9d94eSRobert Foss }; 168020f9d94eSRobert Foss }; 168120f9d94eSRobert Foss }; 168220f9d94eSRobert Foss 168320f9d94eSRobert Foss cpu6-bottom-thermal { 168420f9d94eSRobert Foss polling-delay-passive = <250>; 168520f9d94eSRobert Foss polling-delay = <1000>; 168620f9d94eSRobert Foss 168720f9d94eSRobert Foss thermal-sensors = <&tsens0 13>; 168820f9d94eSRobert Foss 168920f9d94eSRobert Foss trips { 169020f9d94eSRobert Foss cpu6_bottom_alert0: trip-point0 { 169120f9d94eSRobert Foss temperature = <90000>; 169220f9d94eSRobert Foss hysteresis = <2000>; 169320f9d94eSRobert Foss type = "passive"; 169420f9d94eSRobert Foss }; 169520f9d94eSRobert Foss 169620f9d94eSRobert Foss cpu6_bottom_alert1: trip-point1 { 169720f9d94eSRobert Foss temperature = <95000>; 169820f9d94eSRobert Foss hysteresis = <2000>; 169920f9d94eSRobert Foss type = "passive"; 170020f9d94eSRobert Foss }; 170120f9d94eSRobert Foss 170220f9d94eSRobert Foss cpu6_bottom_crit: cpu_crit { 170320f9d94eSRobert Foss temperature = <110000>; 170420f9d94eSRobert Foss hysteresis = <1000>; 170520f9d94eSRobert Foss type = "critical"; 170620f9d94eSRobert Foss }; 170720f9d94eSRobert Foss }; 170820f9d94eSRobert Foss 170920f9d94eSRobert Foss cooling-maps { 171020f9d94eSRobert Foss map0 { 171120f9d94eSRobert Foss trip = <&cpu6_bottom_alert0>; 171220f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171320f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171420f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 171520f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 171620f9d94eSRobert Foss }; 171720f9d94eSRobert Foss map1 { 171820f9d94eSRobert Foss trip = <&cpu6_bottom_alert1>; 171920f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 172020f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 172120f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 172220f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 172320f9d94eSRobert Foss }; 172420f9d94eSRobert Foss }; 172520f9d94eSRobert Foss }; 172620f9d94eSRobert Foss 172720f9d94eSRobert Foss cpu7-bottom-thermal { 172820f9d94eSRobert Foss polling-delay-passive = <250>; 172920f9d94eSRobert Foss polling-delay = <1000>; 173020f9d94eSRobert Foss 173120f9d94eSRobert Foss thermal-sensors = <&tsens0 14>; 173220f9d94eSRobert Foss 173320f9d94eSRobert Foss trips { 173420f9d94eSRobert Foss cpu7_bottom_alert0: trip-point0 { 173520f9d94eSRobert Foss temperature = <90000>; 173620f9d94eSRobert Foss hysteresis = <2000>; 173720f9d94eSRobert Foss type = "passive"; 173820f9d94eSRobert Foss }; 173920f9d94eSRobert Foss 174020f9d94eSRobert Foss cpu7_bottom_alert1: trip-point1 { 174120f9d94eSRobert Foss temperature = <95000>; 174220f9d94eSRobert Foss hysteresis = <2000>; 174320f9d94eSRobert Foss type = "passive"; 174420f9d94eSRobert Foss }; 174520f9d94eSRobert Foss 174620f9d94eSRobert Foss cpu7_bottom_crit: cpu_crit { 174720f9d94eSRobert Foss temperature = <110000>; 174820f9d94eSRobert Foss hysteresis = <1000>; 174920f9d94eSRobert Foss type = "critical"; 175020f9d94eSRobert Foss }; 175120f9d94eSRobert Foss }; 175220f9d94eSRobert Foss 175320f9d94eSRobert Foss cooling-maps { 175420f9d94eSRobert Foss map0 { 175520f9d94eSRobert Foss trip = <&cpu7_bottom_alert0>; 175620f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175720f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175820f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 175920f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 176020f9d94eSRobert Foss }; 176120f9d94eSRobert Foss map1 { 176220f9d94eSRobert Foss trip = <&cpu7_bottom_alert1>; 176320f9d94eSRobert Foss cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 176420f9d94eSRobert Foss <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 176520f9d94eSRobert Foss <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 176620f9d94eSRobert Foss <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 176720f9d94eSRobert Foss }; 176820f9d94eSRobert Foss }; 176920f9d94eSRobert Foss }; 177020f9d94eSRobert Foss 177120f9d94eSRobert Foss aoss0-thermal { 177220f9d94eSRobert Foss polling-delay-passive = <250>; 177320f9d94eSRobert Foss polling-delay = <1000>; 177420f9d94eSRobert Foss 177520f9d94eSRobert Foss thermal-sensors = <&tsens0 0>; 177620f9d94eSRobert Foss 177720f9d94eSRobert Foss trips { 177820f9d94eSRobert Foss aoss0_alert0: trip-point0 { 177920f9d94eSRobert Foss temperature = <90000>; 178020f9d94eSRobert Foss hysteresis = <2000>; 178120f9d94eSRobert Foss type = "hot"; 178220f9d94eSRobert Foss }; 178320f9d94eSRobert Foss }; 178420f9d94eSRobert Foss }; 178520f9d94eSRobert Foss 178620f9d94eSRobert Foss cluster0-thermal { 178720f9d94eSRobert Foss polling-delay-passive = <250>; 178820f9d94eSRobert Foss polling-delay = <1000>; 178920f9d94eSRobert Foss 179020f9d94eSRobert Foss thermal-sensors = <&tsens0 5>; 179120f9d94eSRobert Foss 179220f9d94eSRobert Foss trips { 179320f9d94eSRobert Foss cluster0_alert0: trip-point0 { 179420f9d94eSRobert Foss temperature = <90000>; 179520f9d94eSRobert Foss hysteresis = <2000>; 179620f9d94eSRobert Foss type = "hot"; 179720f9d94eSRobert Foss }; 179820f9d94eSRobert Foss cluster0_crit: cluster0_crit { 179920f9d94eSRobert Foss temperature = <110000>; 180020f9d94eSRobert Foss hysteresis = <2000>; 180120f9d94eSRobert Foss type = "critical"; 180220f9d94eSRobert Foss }; 180320f9d94eSRobert Foss }; 180420f9d94eSRobert Foss }; 180520f9d94eSRobert Foss 180620f9d94eSRobert Foss cluster1-thermal { 180720f9d94eSRobert Foss polling-delay-passive = <250>; 180820f9d94eSRobert Foss polling-delay = <1000>; 180920f9d94eSRobert Foss 181020f9d94eSRobert Foss thermal-sensors = <&tsens0 6>; 181120f9d94eSRobert Foss 181220f9d94eSRobert Foss trips { 181320f9d94eSRobert Foss cluster1_alert0: trip-point0 { 181420f9d94eSRobert Foss temperature = <90000>; 181520f9d94eSRobert Foss hysteresis = <2000>; 181620f9d94eSRobert Foss type = "hot"; 181720f9d94eSRobert Foss }; 181820f9d94eSRobert Foss cluster1_crit: cluster1_crit { 181920f9d94eSRobert Foss temperature = <110000>; 182020f9d94eSRobert Foss hysteresis = <2000>; 182120f9d94eSRobert Foss type = "critical"; 182220f9d94eSRobert Foss }; 182320f9d94eSRobert Foss }; 182420f9d94eSRobert Foss }; 182520f9d94eSRobert Foss 182620f9d94eSRobert Foss aoss1-thermal { 182720f9d94eSRobert Foss polling-delay-passive = <250>; 182820f9d94eSRobert Foss polling-delay = <1000>; 182920f9d94eSRobert Foss 183020f9d94eSRobert Foss thermal-sensors = <&tsens1 0>; 183120f9d94eSRobert Foss 183220f9d94eSRobert Foss trips { 183320f9d94eSRobert Foss aoss1_alert0: trip-point0 { 183420f9d94eSRobert Foss temperature = <90000>; 183520f9d94eSRobert Foss hysteresis = <2000>; 183620f9d94eSRobert Foss type = "hot"; 183720f9d94eSRobert Foss }; 183820f9d94eSRobert Foss }; 183920f9d94eSRobert Foss }; 184020f9d94eSRobert Foss 184120f9d94eSRobert Foss gpu-thermal-top { 184220f9d94eSRobert Foss polling-delay-passive = <250>; 184320f9d94eSRobert Foss polling-delay = <1000>; 184420f9d94eSRobert Foss 184520f9d94eSRobert Foss thermal-sensors = <&tsens1 1>; 184620f9d94eSRobert Foss 184720f9d94eSRobert Foss trips { 184820f9d94eSRobert Foss gpu1_alert0: trip-point0 { 184920f9d94eSRobert Foss temperature = <90000>; 185020f9d94eSRobert Foss hysteresis = <1000>; 185120f9d94eSRobert Foss type = "hot"; 185220f9d94eSRobert Foss }; 185320f9d94eSRobert Foss }; 185420f9d94eSRobert Foss }; 185520f9d94eSRobert Foss 185620f9d94eSRobert Foss gpu-thermal-bottom { 185720f9d94eSRobert Foss polling-delay-passive = <250>; 185820f9d94eSRobert Foss polling-delay = <1000>; 185920f9d94eSRobert Foss 186020f9d94eSRobert Foss thermal-sensors = <&tsens1 2>; 186120f9d94eSRobert Foss 186220f9d94eSRobert Foss trips { 186320f9d94eSRobert Foss gpu2_alert0: trip-point0 { 186420f9d94eSRobert Foss temperature = <90000>; 186520f9d94eSRobert Foss hysteresis = <1000>; 186620f9d94eSRobert Foss type = "hot"; 186720f9d94eSRobert Foss }; 186820f9d94eSRobert Foss }; 186920f9d94eSRobert Foss }; 187020f9d94eSRobert Foss 187120f9d94eSRobert Foss nspss1-thermal { 187220f9d94eSRobert Foss polling-delay-passive = <250>; 187320f9d94eSRobert Foss polling-delay = <1000>; 187420f9d94eSRobert Foss 187520f9d94eSRobert Foss thermal-sensors = <&tsens1 3>; 187620f9d94eSRobert Foss 187720f9d94eSRobert Foss trips { 187820f9d94eSRobert Foss nspss1_alert0: trip-point0 { 187920f9d94eSRobert Foss temperature = <90000>; 188020f9d94eSRobert Foss hysteresis = <1000>; 188120f9d94eSRobert Foss type = "hot"; 188220f9d94eSRobert Foss }; 188320f9d94eSRobert Foss }; 188420f9d94eSRobert Foss }; 188520f9d94eSRobert Foss 188620f9d94eSRobert Foss nspss2-thermal { 188720f9d94eSRobert Foss polling-delay-passive = <250>; 188820f9d94eSRobert Foss polling-delay = <1000>; 188920f9d94eSRobert Foss 189020f9d94eSRobert Foss thermal-sensors = <&tsens1 4>; 189120f9d94eSRobert Foss 189220f9d94eSRobert Foss trips { 189320f9d94eSRobert Foss nspss2_alert0: trip-point0 { 189420f9d94eSRobert Foss temperature = <90000>; 189520f9d94eSRobert Foss hysteresis = <1000>; 189620f9d94eSRobert Foss type = "hot"; 189720f9d94eSRobert Foss }; 189820f9d94eSRobert Foss }; 189920f9d94eSRobert Foss }; 190020f9d94eSRobert Foss 190120f9d94eSRobert Foss nspss3-thermal { 190220f9d94eSRobert Foss polling-delay-passive = <250>; 190320f9d94eSRobert Foss polling-delay = <1000>; 190420f9d94eSRobert Foss 190520f9d94eSRobert Foss thermal-sensors = <&tsens1 5>; 190620f9d94eSRobert Foss 190720f9d94eSRobert Foss trips { 190820f9d94eSRobert Foss nspss3_alert0: trip-point0 { 190920f9d94eSRobert Foss temperature = <90000>; 191020f9d94eSRobert Foss hysteresis = <1000>; 191120f9d94eSRobert Foss type = "hot"; 191220f9d94eSRobert Foss }; 191320f9d94eSRobert Foss }; 191420f9d94eSRobert Foss }; 191520f9d94eSRobert Foss 191620f9d94eSRobert Foss video-thermal { 191720f9d94eSRobert Foss polling-delay-passive = <250>; 191820f9d94eSRobert Foss polling-delay = <1000>; 191920f9d94eSRobert Foss 192020f9d94eSRobert Foss thermal-sensors = <&tsens1 6>; 192120f9d94eSRobert Foss 192220f9d94eSRobert Foss trips { 192320f9d94eSRobert Foss video_alert0: trip-point0 { 192420f9d94eSRobert Foss temperature = <90000>; 192520f9d94eSRobert Foss hysteresis = <2000>; 192620f9d94eSRobert Foss type = "hot"; 192720f9d94eSRobert Foss }; 192820f9d94eSRobert Foss }; 192920f9d94eSRobert Foss }; 193020f9d94eSRobert Foss 193120f9d94eSRobert Foss mem-thermal { 193220f9d94eSRobert Foss polling-delay-passive = <250>; 193320f9d94eSRobert Foss polling-delay = <1000>; 193420f9d94eSRobert Foss 193520f9d94eSRobert Foss thermal-sensors = <&tsens1 7>; 193620f9d94eSRobert Foss 193720f9d94eSRobert Foss trips { 193820f9d94eSRobert Foss mem_alert0: trip-point0 { 193920f9d94eSRobert Foss temperature = <90000>; 194020f9d94eSRobert Foss hysteresis = <2000>; 194120f9d94eSRobert Foss type = "hot"; 194220f9d94eSRobert Foss }; 194320f9d94eSRobert Foss }; 194420f9d94eSRobert Foss }; 194520f9d94eSRobert Foss 194620f9d94eSRobert Foss modem1-thermal-top { 194720f9d94eSRobert Foss polling-delay-passive = <250>; 194820f9d94eSRobert Foss polling-delay = <1000>; 194920f9d94eSRobert Foss 195020f9d94eSRobert Foss thermal-sensors = <&tsens1 8>; 195120f9d94eSRobert Foss 195220f9d94eSRobert Foss trips { 195320f9d94eSRobert Foss modem1_alert0: trip-point0 { 195420f9d94eSRobert Foss temperature = <90000>; 195520f9d94eSRobert Foss hysteresis = <2000>; 195620f9d94eSRobert Foss type = "hot"; 195720f9d94eSRobert Foss }; 195820f9d94eSRobert Foss }; 195920f9d94eSRobert Foss }; 196020f9d94eSRobert Foss 196120f9d94eSRobert Foss modem2-thermal-top { 196220f9d94eSRobert Foss polling-delay-passive = <250>; 196320f9d94eSRobert Foss polling-delay = <1000>; 196420f9d94eSRobert Foss 196520f9d94eSRobert Foss thermal-sensors = <&tsens1 9>; 196620f9d94eSRobert Foss 196720f9d94eSRobert Foss trips { 196820f9d94eSRobert Foss modem2_alert0: trip-point0 { 196920f9d94eSRobert Foss temperature = <90000>; 197020f9d94eSRobert Foss hysteresis = <2000>; 197120f9d94eSRobert Foss type = "hot"; 197220f9d94eSRobert Foss }; 197320f9d94eSRobert Foss }; 197420f9d94eSRobert Foss }; 197520f9d94eSRobert Foss 197620f9d94eSRobert Foss modem3-thermal-top { 197720f9d94eSRobert Foss polling-delay-passive = <250>; 197820f9d94eSRobert Foss polling-delay = <1000>; 197920f9d94eSRobert Foss 198020f9d94eSRobert Foss thermal-sensors = <&tsens1 10>; 198120f9d94eSRobert Foss 198220f9d94eSRobert Foss trips { 198320f9d94eSRobert Foss modem3_alert0: trip-point0 { 198420f9d94eSRobert Foss temperature = <90000>; 198520f9d94eSRobert Foss hysteresis = <2000>; 198620f9d94eSRobert Foss type = "hot"; 198720f9d94eSRobert Foss }; 198820f9d94eSRobert Foss }; 198920f9d94eSRobert Foss }; 199020f9d94eSRobert Foss 199120f9d94eSRobert Foss modem4-thermal-top { 199220f9d94eSRobert Foss polling-delay-passive = <250>; 199320f9d94eSRobert Foss polling-delay = <1000>; 199420f9d94eSRobert Foss 199520f9d94eSRobert Foss thermal-sensors = <&tsens1 11>; 199620f9d94eSRobert Foss 199720f9d94eSRobert Foss trips { 199820f9d94eSRobert Foss modem4_alert0: trip-point0 { 199920f9d94eSRobert Foss temperature = <90000>; 200020f9d94eSRobert Foss hysteresis = <2000>; 200120f9d94eSRobert Foss type = "hot"; 200220f9d94eSRobert Foss }; 200320f9d94eSRobert Foss }; 200420f9d94eSRobert Foss }; 200520f9d94eSRobert Foss 200620f9d94eSRobert Foss camera-thermal-top { 200720f9d94eSRobert Foss polling-delay-passive = <250>; 200820f9d94eSRobert Foss polling-delay = <1000>; 200920f9d94eSRobert Foss 201020f9d94eSRobert Foss thermal-sensors = <&tsens1 12>; 201120f9d94eSRobert Foss 201220f9d94eSRobert Foss trips { 201320f9d94eSRobert Foss camera1_alert0: trip-point0 { 201420f9d94eSRobert Foss temperature = <90000>; 201520f9d94eSRobert Foss hysteresis = <2000>; 201620f9d94eSRobert Foss type = "hot"; 201720f9d94eSRobert Foss }; 201820f9d94eSRobert Foss }; 201920f9d94eSRobert Foss }; 202020f9d94eSRobert Foss 202120f9d94eSRobert Foss camera-thermal-bottom { 202220f9d94eSRobert Foss polling-delay-passive = <250>; 202320f9d94eSRobert Foss polling-delay = <1000>; 202420f9d94eSRobert Foss 202520f9d94eSRobert Foss thermal-sensors = <&tsens1 13>; 202620f9d94eSRobert Foss 202720f9d94eSRobert Foss trips { 202820f9d94eSRobert Foss camera2_alert0: trip-point0 { 202920f9d94eSRobert Foss temperature = <90000>; 203020f9d94eSRobert Foss hysteresis = <2000>; 203120f9d94eSRobert Foss type = "hot"; 203220f9d94eSRobert Foss }; 203320f9d94eSRobert Foss }; 203420f9d94eSRobert Foss }; 203520f9d94eSRobert Foss }; 203620f9d94eSRobert Foss 2037b7e8f433SVinod Koul timer { 2038b7e8f433SVinod Koul compatible = "arm,armv8-timer"; 2039b7e8f433SVinod Koul interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2040b7e8f433SVinod Koul <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2041b7e8f433SVinod Koul <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2042b7e8f433SVinod Koul <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 2043b7e8f433SVinod Koul }; 2044b7e8f433SVinod Koul}; 2045